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[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / net / e1000 / e1000_ethtool.c
1 /*******************************************************************************
2
3
4 Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
26 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27
28 *******************************************************************************/
29
30 /* ethtool support for e1000 */
31
32 #include "e1000.h"
33
34 #include <asm/uaccess.h>
35
36 struct e1000_stats {
37 char stat_string[ETH_GSTRING_LEN];
38 int sizeof_stat;
39 int stat_offset;
40 };
41
42 #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
43 offsetof(struct e1000_adapter, m)
44 static const struct e1000_stats e1000_gstrings_stats[] = {
45 { "rx_packets", E1000_STAT(net_stats.rx_packets) },
46 { "tx_packets", E1000_STAT(net_stats.tx_packets) },
47 { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
48 { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
49 { "rx_errors", E1000_STAT(net_stats.rx_errors) },
50 { "tx_errors", E1000_STAT(net_stats.tx_errors) },
51 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
52 { "multicast", E1000_STAT(net_stats.multicast) },
53 { "collisions", E1000_STAT(net_stats.collisions) },
54 { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
55 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
56 { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
57 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
58 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
59 { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
60 { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
61 { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
62 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
63 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
64 { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
65 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
66 { "tx_deferred_ok", E1000_STAT(stats.dc) },
67 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
68 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
69 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
70 { "rx_long_length_errors", E1000_STAT(stats.roc) },
71 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
72 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
73 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
74 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
75 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
76 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
77 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
78 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
79 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
80 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
81 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
82 { "rx_header_split", E1000_STAT(rx_hdr_split) },
83 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
84 };
85
86 #define E1000_QUEUE_STATS_LEN 0
87 #define E1000_GLOBAL_STATS_LEN \
88 sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
89 #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
90 static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
91 "Register test (offline)", "Eeprom test (offline)",
92 "Interrupt test (offline)", "Loopback test (offline)",
93 "Link test (on/offline)"
94 };
95 #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
96
97 static int
98 e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
99 {
100 struct e1000_adapter *adapter = netdev_priv(netdev);
101 struct e1000_hw *hw = &adapter->hw;
102
103 if (hw->media_type == e1000_media_type_copper) {
104
105 ecmd->supported = (SUPPORTED_10baseT_Half |
106 SUPPORTED_10baseT_Full |
107 SUPPORTED_100baseT_Half |
108 SUPPORTED_100baseT_Full |
109 SUPPORTED_1000baseT_Full|
110 SUPPORTED_Autoneg |
111 SUPPORTED_TP);
112
113 ecmd->advertising = ADVERTISED_TP;
114
115 if (hw->autoneg == 1) {
116 ecmd->advertising |= ADVERTISED_Autoneg;
117
118 /* the e1000 autoneg seems to match ethtool nicely */
119
120 ecmd->advertising |= hw->autoneg_advertised;
121 }
122
123 ecmd->port = PORT_TP;
124 ecmd->phy_address = hw->phy_addr;
125
126 if (hw->mac_type == e1000_82543)
127 ecmd->transceiver = XCVR_EXTERNAL;
128 else
129 ecmd->transceiver = XCVR_INTERNAL;
130
131 } else {
132 ecmd->supported = (SUPPORTED_1000baseT_Full |
133 SUPPORTED_FIBRE |
134 SUPPORTED_Autoneg);
135
136 ecmd->advertising = (ADVERTISED_1000baseT_Full |
137 ADVERTISED_FIBRE |
138 ADVERTISED_Autoneg);
139
140 ecmd->port = PORT_FIBRE;
141
142 if (hw->mac_type >= e1000_82545)
143 ecmd->transceiver = XCVR_INTERNAL;
144 else
145 ecmd->transceiver = XCVR_EXTERNAL;
146 }
147
148 if (netif_carrier_ok(adapter->netdev)) {
149
150 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
151 &adapter->link_duplex);
152 ecmd->speed = adapter->link_speed;
153
154 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
155 * and HALF_DUPLEX != DUPLEX_HALF */
156
157 if (adapter->link_duplex == FULL_DUPLEX)
158 ecmd->duplex = DUPLEX_FULL;
159 else
160 ecmd->duplex = DUPLEX_HALF;
161 } else {
162 ecmd->speed = -1;
163 ecmd->duplex = -1;
164 }
165
166 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
167 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
168 return 0;
169 }
170
171 static int
172 e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
173 {
174 struct e1000_adapter *adapter = netdev_priv(netdev);
175 struct e1000_hw *hw = &adapter->hw;
176
177 /* When SoL/IDER sessions are active, autoneg/speed/duplex
178 * cannot be changed */
179 if (e1000_check_phy_reset_block(hw)) {
180 DPRINTK(DRV, ERR, "Cannot change link characteristics "
181 "when SoL/IDER is active.\n");
182 return -EINVAL;
183 }
184
185 if (ecmd->autoneg == AUTONEG_ENABLE) {
186 hw->autoneg = 1;
187 if (hw->media_type == e1000_media_type_fiber)
188 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
189 ADVERTISED_FIBRE |
190 ADVERTISED_Autoneg;
191 else
192 hw->autoneg_advertised = ADVERTISED_10baseT_Half |
193 ADVERTISED_10baseT_Full |
194 ADVERTISED_100baseT_Half |
195 ADVERTISED_100baseT_Full |
196 ADVERTISED_1000baseT_Full|
197 ADVERTISED_Autoneg |
198 ADVERTISED_TP;
199 ecmd->advertising = hw->autoneg_advertised;
200 } else
201 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
202 return -EINVAL;
203
204 /* reset the link */
205
206 if (netif_running(adapter->netdev)) {
207 e1000_down(adapter);
208 e1000_reset(adapter);
209 e1000_up(adapter);
210 } else
211 e1000_reset(adapter);
212
213 return 0;
214 }
215
216 static void
217 e1000_get_pauseparam(struct net_device *netdev,
218 struct ethtool_pauseparam *pause)
219 {
220 struct e1000_adapter *adapter = netdev_priv(netdev);
221 struct e1000_hw *hw = &adapter->hw;
222
223 pause->autoneg =
224 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
225
226 if (hw->fc == e1000_fc_rx_pause)
227 pause->rx_pause = 1;
228 else if (hw->fc == e1000_fc_tx_pause)
229 pause->tx_pause = 1;
230 else if (hw->fc == e1000_fc_full) {
231 pause->rx_pause = 1;
232 pause->tx_pause = 1;
233 }
234 }
235
236 static int
237 e1000_set_pauseparam(struct net_device *netdev,
238 struct ethtool_pauseparam *pause)
239 {
240 struct e1000_adapter *adapter = netdev_priv(netdev);
241 struct e1000_hw *hw = &adapter->hw;
242
243 adapter->fc_autoneg = pause->autoneg;
244
245 if (pause->rx_pause && pause->tx_pause)
246 hw->fc = e1000_fc_full;
247 else if (pause->rx_pause && !pause->tx_pause)
248 hw->fc = e1000_fc_rx_pause;
249 else if (!pause->rx_pause && pause->tx_pause)
250 hw->fc = e1000_fc_tx_pause;
251 else if (!pause->rx_pause && !pause->tx_pause)
252 hw->fc = e1000_fc_none;
253
254 hw->original_fc = hw->fc;
255
256 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
257 if (netif_running(adapter->netdev)) {
258 e1000_down(adapter);
259 e1000_up(adapter);
260 } else
261 e1000_reset(adapter);
262 } else
263 return ((hw->media_type == e1000_media_type_fiber) ?
264 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
265
266 return 0;
267 }
268
269 static uint32_t
270 e1000_get_rx_csum(struct net_device *netdev)
271 {
272 struct e1000_adapter *adapter = netdev_priv(netdev);
273 return adapter->rx_csum;
274 }
275
276 static int
277 e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
278 {
279 struct e1000_adapter *adapter = netdev_priv(netdev);
280 adapter->rx_csum = data;
281
282 if (netif_running(netdev)) {
283 e1000_down(adapter);
284 e1000_up(adapter);
285 } else
286 e1000_reset(adapter);
287 return 0;
288 }
289
290 static uint32_t
291 e1000_get_tx_csum(struct net_device *netdev)
292 {
293 return (netdev->features & NETIF_F_HW_CSUM) != 0;
294 }
295
296 static int
297 e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
298 {
299 struct e1000_adapter *adapter = netdev_priv(netdev);
300
301 if (adapter->hw.mac_type < e1000_82543) {
302 if (!data)
303 return -EINVAL;
304 return 0;
305 }
306
307 if (data)
308 netdev->features |= NETIF_F_HW_CSUM;
309 else
310 netdev->features &= ~NETIF_F_HW_CSUM;
311
312 return 0;
313 }
314
315 #ifdef NETIF_F_TSO
316 static int
317 e1000_set_tso(struct net_device *netdev, uint32_t data)
318 {
319 struct e1000_adapter *adapter = netdev_priv(netdev);
320 if ((adapter->hw.mac_type < e1000_82544) ||
321 (adapter->hw.mac_type == e1000_82547))
322 return data ? -EINVAL : 0;
323
324 if (data)
325 netdev->features |= NETIF_F_TSO;
326 else
327 netdev->features &= ~NETIF_F_TSO;
328
329 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
330 adapter->tso_force = TRUE;
331 return 0;
332 }
333 #endif /* NETIF_F_TSO */
334
335 static uint32_t
336 e1000_get_msglevel(struct net_device *netdev)
337 {
338 struct e1000_adapter *adapter = netdev_priv(netdev);
339 return adapter->msg_enable;
340 }
341
342 static void
343 e1000_set_msglevel(struct net_device *netdev, uint32_t data)
344 {
345 struct e1000_adapter *adapter = netdev_priv(netdev);
346 adapter->msg_enable = data;
347 }
348
349 static int
350 e1000_get_regs_len(struct net_device *netdev)
351 {
352 #define E1000_REGS_LEN 32
353 return E1000_REGS_LEN * sizeof(uint32_t);
354 }
355
356 static void
357 e1000_get_regs(struct net_device *netdev,
358 struct ethtool_regs *regs, void *p)
359 {
360 struct e1000_adapter *adapter = netdev_priv(netdev);
361 struct e1000_hw *hw = &adapter->hw;
362 uint32_t *regs_buff = p;
363 uint16_t phy_data;
364
365 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
366
367 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
368
369 regs_buff[0] = E1000_READ_REG(hw, CTRL);
370 regs_buff[1] = E1000_READ_REG(hw, STATUS);
371
372 regs_buff[2] = E1000_READ_REG(hw, RCTL);
373 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
374 regs_buff[4] = E1000_READ_REG(hw, RDH);
375 regs_buff[5] = E1000_READ_REG(hw, RDT);
376 regs_buff[6] = E1000_READ_REG(hw, RDTR);
377
378 regs_buff[7] = E1000_READ_REG(hw, TCTL);
379 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
380 regs_buff[9] = E1000_READ_REG(hw, TDH);
381 regs_buff[10] = E1000_READ_REG(hw, TDT);
382 regs_buff[11] = E1000_READ_REG(hw, TIDV);
383
384 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
385 if (hw->phy_type == e1000_phy_igp) {
386 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
387 IGP01E1000_PHY_AGC_A);
388 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
389 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
390 regs_buff[13] = (uint32_t)phy_data; /* cable length */
391 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
392 IGP01E1000_PHY_AGC_B);
393 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
394 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
395 regs_buff[14] = (uint32_t)phy_data; /* cable length */
396 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
397 IGP01E1000_PHY_AGC_C);
398 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
399 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
400 regs_buff[15] = (uint32_t)phy_data; /* cable length */
401 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
402 IGP01E1000_PHY_AGC_D);
403 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
404 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
405 regs_buff[16] = (uint32_t)phy_data; /* cable length */
406 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
407 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
408 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
409 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
410 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
411 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
412 IGP01E1000_PHY_PCS_INIT_REG);
413 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
414 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
415 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
416 regs_buff[20] = 0; /* polarity correction enabled (always) */
417 regs_buff[22] = 0; /* phy receive errors (unavailable) */
418 regs_buff[23] = regs_buff[18]; /* mdix mode */
419 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
420 } else {
421 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
422 regs_buff[13] = (uint32_t)phy_data; /* cable length */
423 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
424 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
425 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
426 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
427 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
428 regs_buff[18] = regs_buff[13]; /* cable polarity */
429 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
430 regs_buff[20] = regs_buff[17]; /* polarity correction */
431 /* phy receive errors */
432 regs_buff[22] = adapter->phy_stats.receive_errors;
433 regs_buff[23] = regs_buff[13]; /* mdix mode */
434 }
435 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
436 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
437 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
438 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
439 if (hw->mac_type >= e1000_82540 &&
440 hw->media_type == e1000_media_type_copper) {
441 regs_buff[26] = E1000_READ_REG(hw, MANC);
442 }
443 }
444
445 static int
446 e1000_get_eeprom_len(struct net_device *netdev)
447 {
448 struct e1000_adapter *adapter = netdev_priv(netdev);
449 return adapter->hw.eeprom.word_size * 2;
450 }
451
452 static int
453 e1000_get_eeprom(struct net_device *netdev,
454 struct ethtool_eeprom *eeprom, uint8_t *bytes)
455 {
456 struct e1000_adapter *adapter = netdev_priv(netdev);
457 struct e1000_hw *hw = &adapter->hw;
458 uint16_t *eeprom_buff;
459 int first_word, last_word;
460 int ret_val = 0;
461 uint16_t i;
462
463 if (eeprom->len == 0)
464 return -EINVAL;
465
466 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
467
468 first_word = eeprom->offset >> 1;
469 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
470
471 eeprom_buff = kmalloc(sizeof(uint16_t) *
472 (last_word - first_word + 1), GFP_KERNEL);
473 if (!eeprom_buff)
474 return -ENOMEM;
475
476 if (hw->eeprom.type == e1000_eeprom_spi)
477 ret_val = e1000_read_eeprom(hw, first_word,
478 last_word - first_word + 1,
479 eeprom_buff);
480 else {
481 for (i = 0; i < last_word - first_word + 1; i++)
482 if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
483 &eeprom_buff[i])))
484 break;
485 }
486
487 /* Device's eeprom is always little-endian, word addressable */
488 for (i = 0; i < last_word - first_word + 1; i++)
489 le16_to_cpus(&eeprom_buff[i]);
490
491 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
492 eeprom->len);
493 kfree(eeprom_buff);
494
495 return ret_val;
496 }
497
498 static int
499 e1000_set_eeprom(struct net_device *netdev,
500 struct ethtool_eeprom *eeprom, uint8_t *bytes)
501 {
502 struct e1000_adapter *adapter = netdev_priv(netdev);
503 struct e1000_hw *hw = &adapter->hw;
504 uint16_t *eeprom_buff;
505 void *ptr;
506 int max_len, first_word, last_word, ret_val = 0;
507 uint16_t i;
508
509 if (eeprom->len == 0)
510 return -EOPNOTSUPP;
511
512 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
513 return -EFAULT;
514
515 max_len = hw->eeprom.word_size * 2;
516
517 first_word = eeprom->offset >> 1;
518 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
519 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
520 if (!eeprom_buff)
521 return -ENOMEM;
522
523 ptr = (void *)eeprom_buff;
524
525 if (eeprom->offset & 1) {
526 /* need read/modify/write of first changed EEPROM word */
527 /* only the second byte of the word is being modified */
528 ret_val = e1000_read_eeprom(hw, first_word, 1,
529 &eeprom_buff[0]);
530 ptr++;
531 }
532 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
533 /* need read/modify/write of last changed EEPROM word */
534 /* only the first byte of the word is being modified */
535 ret_val = e1000_read_eeprom(hw, last_word, 1,
536 &eeprom_buff[last_word - first_word]);
537 }
538
539 /* Device's eeprom is always little-endian, word addressable */
540 for (i = 0; i < last_word - first_word + 1; i++)
541 le16_to_cpus(&eeprom_buff[i]);
542
543 memcpy(ptr, bytes, eeprom->len);
544
545 for (i = 0; i < last_word - first_word + 1; i++)
546 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
547
548 ret_val = e1000_write_eeprom(hw, first_word,
549 last_word - first_word + 1, eeprom_buff);
550
551 /* Update the checksum over the first part of the EEPROM if needed
552 * and flush shadow RAM for 82573 conrollers */
553 if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
554 (hw->mac_type == e1000_82573)))
555 e1000_update_eeprom_checksum(hw);
556
557 kfree(eeprom_buff);
558 return ret_val;
559 }
560
561 static void
562 e1000_get_drvinfo(struct net_device *netdev,
563 struct ethtool_drvinfo *drvinfo)
564 {
565 struct e1000_adapter *adapter = netdev_priv(netdev);
566 char firmware_version[32];
567 uint16_t eeprom_data;
568
569 strncpy(drvinfo->driver, e1000_driver_name, 32);
570 strncpy(drvinfo->version, e1000_driver_version, 32);
571
572 /* EEPROM image version # is reported as firmware version # for
573 * 8257{1|2|3} controllers */
574 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
575 switch (adapter->hw.mac_type) {
576 case e1000_82571:
577 case e1000_82572:
578 case e1000_82573:
579 case e1000_80003es2lan:
580 sprintf(firmware_version, "%d.%d-%d",
581 (eeprom_data & 0xF000) >> 12,
582 (eeprom_data & 0x0FF0) >> 4,
583 eeprom_data & 0x000F);
584 break;
585 default:
586 sprintf(firmware_version, "N/A");
587 }
588
589 strncpy(drvinfo->fw_version, firmware_version, 32);
590 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
591 drvinfo->n_stats = E1000_STATS_LEN;
592 drvinfo->testinfo_len = E1000_TEST_LEN;
593 drvinfo->regdump_len = e1000_get_regs_len(netdev);
594 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
595 }
596
597 static void
598 e1000_get_ringparam(struct net_device *netdev,
599 struct ethtool_ringparam *ring)
600 {
601 struct e1000_adapter *adapter = netdev_priv(netdev);
602 e1000_mac_type mac_type = adapter->hw.mac_type;
603 struct e1000_tx_ring *txdr = adapter->tx_ring;
604 struct e1000_rx_ring *rxdr = adapter->rx_ring;
605
606 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
607 E1000_MAX_82544_RXD;
608 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
609 E1000_MAX_82544_TXD;
610 ring->rx_mini_max_pending = 0;
611 ring->rx_jumbo_max_pending = 0;
612 ring->rx_pending = rxdr->count;
613 ring->tx_pending = txdr->count;
614 ring->rx_mini_pending = 0;
615 ring->rx_jumbo_pending = 0;
616 }
617
618 static int
619 e1000_set_ringparam(struct net_device *netdev,
620 struct ethtool_ringparam *ring)
621 {
622 struct e1000_adapter *adapter = netdev_priv(netdev);
623 e1000_mac_type mac_type = adapter->hw.mac_type;
624 struct e1000_tx_ring *txdr, *tx_old, *tx_new;
625 struct e1000_rx_ring *rxdr, *rx_old, *rx_new;
626 int i, err, tx_ring_size, rx_ring_size;
627
628 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
629 return -EINVAL;
630
631 tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
632 rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
633
634 if (netif_running(adapter->netdev))
635 e1000_down(adapter);
636
637 tx_old = adapter->tx_ring;
638 rx_old = adapter->rx_ring;
639
640 adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL);
641 if (!adapter->tx_ring) {
642 err = -ENOMEM;
643 goto err_setup_rx;
644 }
645 memset(adapter->tx_ring, 0, tx_ring_size);
646
647 adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL);
648 if (!adapter->rx_ring) {
649 kfree(adapter->tx_ring);
650 err = -ENOMEM;
651 goto err_setup_rx;
652 }
653 memset(adapter->rx_ring, 0, rx_ring_size);
654
655 txdr = adapter->tx_ring;
656 rxdr = adapter->rx_ring;
657
658 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
659 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
660 E1000_MAX_RXD : E1000_MAX_82544_RXD));
661 E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
662
663 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
664 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
665 E1000_MAX_TXD : E1000_MAX_82544_TXD));
666 E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
667
668 for (i = 0; i < adapter->num_tx_queues; i++)
669 txdr[i].count = txdr->count;
670 for (i = 0; i < adapter->num_rx_queues; i++)
671 rxdr[i].count = rxdr->count;
672
673 if (netif_running(adapter->netdev)) {
674 /* Try to get new resources before deleting old */
675 if ((err = e1000_setup_all_rx_resources(adapter)))
676 goto err_setup_rx;
677 if ((err = e1000_setup_all_tx_resources(adapter)))
678 goto err_setup_tx;
679
680 /* save the new, restore the old in order to free it,
681 * then restore the new back again */
682
683 rx_new = adapter->rx_ring;
684 tx_new = adapter->tx_ring;
685 adapter->rx_ring = rx_old;
686 adapter->tx_ring = tx_old;
687 e1000_free_all_rx_resources(adapter);
688 e1000_free_all_tx_resources(adapter);
689 kfree(tx_old);
690 kfree(rx_old);
691 adapter->rx_ring = rx_new;
692 adapter->tx_ring = tx_new;
693 if ((err = e1000_up(adapter)))
694 return err;
695 }
696
697 return 0;
698 err_setup_tx:
699 e1000_free_all_rx_resources(adapter);
700 err_setup_rx:
701 adapter->rx_ring = rx_old;
702 adapter->tx_ring = tx_old;
703 e1000_up(adapter);
704 return err;
705 }
706
707 #define REG_PATTERN_TEST(R, M, W) \
708 { \
709 uint32_t pat, value; \
710 uint32_t test[] = \
711 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
712 for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
713 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
714 value = E1000_READ_REG(&adapter->hw, R); \
715 if (value != (test[pat] & W & M)) { \
716 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
717 "0x%08X expected 0x%08X\n", \
718 E1000_##R, value, (test[pat] & W & M)); \
719 *data = (adapter->hw.mac_type < e1000_82543) ? \
720 E1000_82542_##R : E1000_##R; \
721 return 1; \
722 } \
723 } \
724 }
725
726 #define REG_SET_AND_CHECK(R, M, W) \
727 { \
728 uint32_t value; \
729 E1000_WRITE_REG(&adapter->hw, R, W & M); \
730 value = E1000_READ_REG(&adapter->hw, R); \
731 if ((W & M) != (value & M)) { \
732 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
733 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
734 *data = (adapter->hw.mac_type < e1000_82543) ? \
735 E1000_82542_##R : E1000_##R; \
736 return 1; \
737 } \
738 }
739
740 static int
741 e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
742 {
743 uint32_t value, before, after;
744 uint32_t i, toggle;
745
746 /* The status register is Read Only, so a write should fail.
747 * Some bits that get toggled are ignored.
748 */
749 switch (adapter->hw.mac_type) {
750 /* there are several bits on newer hardware that are r/w */
751 case e1000_82571:
752 case e1000_82572:
753 case e1000_80003es2lan:
754 toggle = 0x7FFFF3FF;
755 break;
756 case e1000_82573:
757 toggle = 0x7FFFF033;
758 break;
759 default:
760 toggle = 0xFFFFF833;
761 break;
762 }
763
764 before = E1000_READ_REG(&adapter->hw, STATUS);
765 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
766 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
767 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
768 if (value != after) {
769 DPRINTK(DRV, ERR, "failed STATUS register test got: "
770 "0x%08X expected: 0x%08X\n", after, value);
771 *data = 1;
772 return 1;
773 }
774 /* restore previous status */
775 E1000_WRITE_REG(&adapter->hw, STATUS, before);
776
777 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
778 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
779 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
780 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
781 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
782 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
783 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
784 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
785 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
786 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
787 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
788 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
789 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
790 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
791
792 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
793 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
794 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
795
796 if (adapter->hw.mac_type >= e1000_82543) {
797
798 REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
799 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
800 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
801 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
802 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
803
804 for (i = 0; i < E1000_RAR_ENTRIES; i++) {
805 REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
806 0xFFFFFFFF);
807 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
808 0xFFFFFFFF);
809 }
810
811 } else {
812
813 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
814 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
815 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
816 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
817
818 }
819
820 for (i = 0; i < E1000_MC_TBL_SIZE; i++)
821 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
822
823 *data = 0;
824 return 0;
825 }
826
827 static int
828 e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
829 {
830 uint16_t temp;
831 uint16_t checksum = 0;
832 uint16_t i;
833
834 *data = 0;
835 /* Read and add up the contents of the EEPROM */
836 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
837 if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
838 *data = 1;
839 break;
840 }
841 checksum += temp;
842 }
843
844 /* If Checksum is not Correct return error else test passed */
845 if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
846 *data = 2;
847
848 return *data;
849 }
850
851 static irqreturn_t
852 e1000_test_intr(int irq,
853 void *data,
854 struct pt_regs *regs)
855 {
856 struct net_device *netdev = (struct net_device *) data;
857 struct e1000_adapter *adapter = netdev_priv(netdev);
858
859 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
860
861 return IRQ_HANDLED;
862 }
863
864 static int
865 e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
866 {
867 struct net_device *netdev = adapter->netdev;
868 uint32_t mask, i=0, shared_int = TRUE;
869 uint32_t irq = adapter->pdev->irq;
870
871 *data = 0;
872
873 /* Hook up test interrupt handler just for this test */
874 if (!request_irq(irq, &e1000_test_intr, SA_PROBEIRQ, netdev->name,
875 netdev)) {
876 shared_int = FALSE;
877 } else if (request_irq(irq, &e1000_test_intr, SA_SHIRQ,
878 netdev->name, netdev)){
879 *data = 1;
880 return -1;
881 }
882 DPRINTK(PROBE,INFO, "testing %s interrupt\n",
883 (shared_int ? "shared" : "unshared"));
884
885 /* Disable all the interrupts */
886 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
887 msec_delay(10);
888
889 /* Test each interrupt */
890 for (; i < 10; i++) {
891
892 /* Interrupt to test */
893 mask = 1 << i;
894
895 if (!shared_int) {
896 /* Disable the interrupt to be reported in
897 * the cause register and then force the same
898 * interrupt and see if one gets posted. If
899 * an interrupt was posted to the bus, the
900 * test failed.
901 */
902 adapter->test_icr = 0;
903 E1000_WRITE_REG(&adapter->hw, IMC, mask);
904 E1000_WRITE_REG(&adapter->hw, ICS, mask);
905 msec_delay(10);
906
907 if (adapter->test_icr & mask) {
908 *data = 3;
909 break;
910 }
911 }
912
913 /* Enable the interrupt to be reported in
914 * the cause register and then force the same
915 * interrupt and see if one gets posted. If
916 * an interrupt was not posted to the bus, the
917 * test failed.
918 */
919 adapter->test_icr = 0;
920 E1000_WRITE_REG(&adapter->hw, IMS, mask);
921 E1000_WRITE_REG(&adapter->hw, ICS, mask);
922 msec_delay(10);
923
924 if (!(adapter->test_icr & mask)) {
925 *data = 4;
926 break;
927 }
928
929 if (!shared_int) {
930 /* Disable the other interrupts to be reported in
931 * the cause register and then force the other
932 * interrupts and see if any get posted. If
933 * an interrupt was posted to the bus, the
934 * test failed.
935 */
936 adapter->test_icr = 0;
937 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
938 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
939 msec_delay(10);
940
941 if (adapter->test_icr) {
942 *data = 5;
943 break;
944 }
945 }
946 }
947
948 /* Disable all the interrupts */
949 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
950 msec_delay(10);
951
952 /* Unhook test interrupt handler */
953 free_irq(irq, netdev);
954
955 return *data;
956 }
957
958 static void
959 e1000_free_desc_rings(struct e1000_adapter *adapter)
960 {
961 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
962 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
963 struct pci_dev *pdev = adapter->pdev;
964 int i;
965
966 if (txdr->desc && txdr->buffer_info) {
967 for (i = 0; i < txdr->count; i++) {
968 if (txdr->buffer_info[i].dma)
969 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
970 txdr->buffer_info[i].length,
971 PCI_DMA_TODEVICE);
972 if (txdr->buffer_info[i].skb)
973 dev_kfree_skb(txdr->buffer_info[i].skb);
974 }
975 }
976
977 if (rxdr->desc && rxdr->buffer_info) {
978 for (i = 0; i < rxdr->count; i++) {
979 if (rxdr->buffer_info[i].dma)
980 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
981 rxdr->buffer_info[i].length,
982 PCI_DMA_FROMDEVICE);
983 if (rxdr->buffer_info[i].skb)
984 dev_kfree_skb(rxdr->buffer_info[i].skb);
985 }
986 }
987
988 if (txdr->desc) {
989 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
990 txdr->desc = NULL;
991 }
992 if (rxdr->desc) {
993 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
994 rxdr->desc = NULL;
995 }
996
997 kfree(txdr->buffer_info);
998 txdr->buffer_info = NULL;
999 kfree(rxdr->buffer_info);
1000 rxdr->buffer_info = NULL;
1001
1002 return;
1003 }
1004
1005 static int
1006 e1000_setup_desc_rings(struct e1000_adapter *adapter)
1007 {
1008 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1009 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1010 struct pci_dev *pdev = adapter->pdev;
1011 uint32_t rctl;
1012 int size, i, ret_val;
1013
1014 /* Setup Tx descriptor ring and Tx buffers */
1015
1016 if (!txdr->count)
1017 txdr->count = E1000_DEFAULT_TXD;
1018
1019 size = txdr->count * sizeof(struct e1000_buffer);
1020 if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1021 ret_val = 1;
1022 goto err_nomem;
1023 }
1024 memset(txdr->buffer_info, 0, size);
1025
1026 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1027 E1000_ROUNDUP(txdr->size, 4096);
1028 if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
1029 ret_val = 2;
1030 goto err_nomem;
1031 }
1032 memset(txdr->desc, 0, txdr->size);
1033 txdr->next_to_use = txdr->next_to_clean = 0;
1034
1035 E1000_WRITE_REG(&adapter->hw, TDBAL,
1036 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1037 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1038 E1000_WRITE_REG(&adapter->hw, TDLEN,
1039 txdr->count * sizeof(struct e1000_tx_desc));
1040 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1041 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1042 E1000_WRITE_REG(&adapter->hw, TCTL,
1043 E1000_TCTL_PSP | E1000_TCTL_EN |
1044 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1045 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1046
1047 for (i = 0; i < txdr->count; i++) {
1048 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1049 struct sk_buff *skb;
1050 unsigned int size = 1024;
1051
1052 if (!(skb = alloc_skb(size, GFP_KERNEL))) {
1053 ret_val = 3;
1054 goto err_nomem;
1055 }
1056 skb_put(skb, size);
1057 txdr->buffer_info[i].skb = skb;
1058 txdr->buffer_info[i].length = skb->len;
1059 txdr->buffer_info[i].dma =
1060 pci_map_single(pdev, skb->data, skb->len,
1061 PCI_DMA_TODEVICE);
1062 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1063 tx_desc->lower.data = cpu_to_le32(skb->len);
1064 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1065 E1000_TXD_CMD_IFCS |
1066 E1000_TXD_CMD_RPS);
1067 tx_desc->upper.data = 0;
1068 }
1069
1070 /* Setup Rx descriptor ring and Rx buffers */
1071
1072 if (!rxdr->count)
1073 rxdr->count = E1000_DEFAULT_RXD;
1074
1075 size = rxdr->count * sizeof(struct e1000_buffer);
1076 if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1077 ret_val = 4;
1078 goto err_nomem;
1079 }
1080 memset(rxdr->buffer_info, 0, size);
1081
1082 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
1083 if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1084 ret_val = 5;
1085 goto err_nomem;
1086 }
1087 memset(rxdr->desc, 0, rxdr->size);
1088 rxdr->next_to_use = rxdr->next_to_clean = 0;
1089
1090 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1091 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1092 E1000_WRITE_REG(&adapter->hw, RDBAL,
1093 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1094 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1095 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1096 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1097 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1098 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1099 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1100 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1101 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1102
1103 for (i = 0; i < rxdr->count; i++) {
1104 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1105 struct sk_buff *skb;
1106
1107 if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1108 GFP_KERNEL))) {
1109 ret_val = 6;
1110 goto err_nomem;
1111 }
1112 skb_reserve(skb, NET_IP_ALIGN);
1113 rxdr->buffer_info[i].skb = skb;
1114 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1115 rxdr->buffer_info[i].dma =
1116 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1117 PCI_DMA_FROMDEVICE);
1118 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1119 memset(skb->data, 0x00, skb->len);
1120 }
1121
1122 return 0;
1123
1124 err_nomem:
1125 e1000_free_desc_rings(adapter);
1126 return ret_val;
1127 }
1128
1129 static void
1130 e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1131 {
1132 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1133 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1134 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1135 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1136 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1137 }
1138
1139 static void
1140 e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1141 {
1142 uint16_t phy_reg;
1143
1144 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1145 * Extended PHY Specific Control Register to 25MHz clock. This
1146 * value defaults back to a 2.5MHz clock when the PHY is reset.
1147 */
1148 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1149 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1150 e1000_write_phy_reg(&adapter->hw,
1151 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1152
1153 /* In addition, because of the s/w reset above, we need to enable
1154 * CRS on TX. This must be set for both full and half duplex
1155 * operation.
1156 */
1157 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1158 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1159 e1000_write_phy_reg(&adapter->hw,
1160 M88E1000_PHY_SPEC_CTRL, phy_reg);
1161 }
1162
1163 static int
1164 e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1165 {
1166 uint32_t ctrl_reg;
1167 uint16_t phy_reg;
1168
1169 /* Setup the Device Control Register for PHY loopback test. */
1170
1171 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1172 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1173 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1174 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1175 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1176 E1000_CTRL_FD); /* Force Duplex to FULL */
1177
1178 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1179
1180 /* Read the PHY Specific Control Register (0x10) */
1181 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1182
1183 /* Clear Auto-Crossover bits in PHY Specific Control Register
1184 * (bits 6:5).
1185 */
1186 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1187 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1188
1189 /* Perform software reset on the PHY */
1190 e1000_phy_reset(&adapter->hw);
1191
1192 /* Have to setup TX_CLK and TX_CRS after software reset */
1193 e1000_phy_reset_clk_and_crs(adapter);
1194
1195 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1196
1197 /* Wait for reset to complete. */
1198 udelay(500);
1199
1200 /* Have to setup TX_CLK and TX_CRS after software reset */
1201 e1000_phy_reset_clk_and_crs(adapter);
1202
1203 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1204 e1000_phy_disable_receiver(adapter);
1205
1206 /* Set the loopback bit in the PHY control register. */
1207 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1208 phy_reg |= MII_CR_LOOPBACK;
1209 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1210
1211 /* Setup TX_CLK and TX_CRS one more time. */
1212 e1000_phy_reset_clk_and_crs(adapter);
1213
1214 /* Check Phy Configuration */
1215 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1216 if (phy_reg != 0x4100)
1217 return 9;
1218
1219 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1220 if (phy_reg != 0x0070)
1221 return 10;
1222
1223 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
1224 if (phy_reg != 0x001A)
1225 return 11;
1226
1227 return 0;
1228 }
1229
1230 static int
1231 e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1232 {
1233 uint32_t ctrl_reg = 0;
1234 uint32_t stat_reg = 0;
1235
1236 adapter->hw.autoneg = FALSE;
1237
1238 if (adapter->hw.phy_type == e1000_phy_m88) {
1239 /* Auto-MDI/MDIX Off */
1240 e1000_write_phy_reg(&adapter->hw,
1241 M88E1000_PHY_SPEC_CTRL, 0x0808);
1242 /* reset to update Auto-MDI/MDIX */
1243 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1244 /* autoneg off */
1245 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
1246 } else if (adapter->hw.phy_type == e1000_phy_gg82563) {
1247 e1000_write_phy_reg(&adapter->hw,
1248 GG82563_PHY_KMRN_MODE_CTRL,
1249 0x1CE);
1250 }
1251 /* force 1000, set loopback */
1252 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1253
1254 /* Now set up the MAC to the same speed/duplex as the PHY. */
1255 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1256 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1257 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1258 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1259 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1260 E1000_CTRL_FD); /* Force Duplex to FULL */
1261
1262 if (adapter->hw.media_type == e1000_media_type_copper &&
1263 adapter->hw.phy_type == e1000_phy_m88) {
1264 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1265 } else {
1266 /* Set the ILOS bit on the fiber Nic is half
1267 * duplex link is detected. */
1268 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
1269 if ((stat_reg & E1000_STATUS_FD) == 0)
1270 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1271 }
1272
1273 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1274
1275 /* Disable the receiver on the PHY so when a cable is plugged in, the
1276 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1277 */
1278 if (adapter->hw.phy_type == e1000_phy_m88)
1279 e1000_phy_disable_receiver(adapter);
1280
1281 udelay(500);
1282
1283 return 0;
1284 }
1285
1286 static int
1287 e1000_set_phy_loopback(struct e1000_adapter *adapter)
1288 {
1289 uint16_t phy_reg = 0;
1290 uint16_t count = 0;
1291
1292 switch (adapter->hw.mac_type) {
1293 case e1000_82543:
1294 if (adapter->hw.media_type == e1000_media_type_copper) {
1295 /* Attempt to setup Loopback mode on Non-integrated PHY.
1296 * Some PHY registers get corrupted at random, so
1297 * attempt this 10 times.
1298 */
1299 while (e1000_nonintegrated_phy_loopback(adapter) &&
1300 count++ < 10);
1301 if (count < 11)
1302 return 0;
1303 }
1304 break;
1305
1306 case e1000_82544:
1307 case e1000_82540:
1308 case e1000_82545:
1309 case e1000_82545_rev_3:
1310 case e1000_82546:
1311 case e1000_82546_rev_3:
1312 case e1000_82541:
1313 case e1000_82541_rev_2:
1314 case e1000_82547:
1315 case e1000_82547_rev_2:
1316 case e1000_82571:
1317 case e1000_82572:
1318 case e1000_82573:
1319 case e1000_80003es2lan:
1320 return e1000_integrated_phy_loopback(adapter);
1321 break;
1322
1323 default:
1324 /* Default PHY loopback work is to read the MII
1325 * control register and assert bit 14 (loopback mode).
1326 */
1327 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1328 phy_reg |= MII_CR_LOOPBACK;
1329 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1330 return 0;
1331 break;
1332 }
1333
1334 return 8;
1335 }
1336
1337 static int
1338 e1000_setup_loopback_test(struct e1000_adapter *adapter)
1339 {
1340 struct e1000_hw *hw = &adapter->hw;
1341 uint32_t rctl;
1342
1343 if (hw->media_type == e1000_media_type_fiber ||
1344 hw->media_type == e1000_media_type_internal_serdes) {
1345 switch (hw->mac_type) {
1346 case e1000_82545:
1347 case e1000_82546:
1348 case e1000_82545_rev_3:
1349 case e1000_82546_rev_3:
1350 return e1000_set_phy_loopback(adapter);
1351 break;
1352 case e1000_82571:
1353 case e1000_82572:
1354 #define E1000_SERDES_LB_ON 0x410
1355 e1000_set_phy_loopback(adapter);
1356 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
1357 msec_delay(10);
1358 return 0;
1359 break;
1360 default:
1361 rctl = E1000_READ_REG(hw, RCTL);
1362 rctl |= E1000_RCTL_LBM_TCVR;
1363 E1000_WRITE_REG(hw, RCTL, rctl);
1364 return 0;
1365 }
1366 } else if (hw->media_type == e1000_media_type_copper)
1367 return e1000_set_phy_loopback(adapter);
1368
1369 return 7;
1370 }
1371
1372 static void
1373 e1000_loopback_cleanup(struct e1000_adapter *adapter)
1374 {
1375 struct e1000_hw *hw = &adapter->hw;
1376 uint32_t rctl;
1377 uint16_t phy_reg;
1378
1379 rctl = E1000_READ_REG(hw, RCTL);
1380 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1381 E1000_WRITE_REG(hw, RCTL, rctl);
1382
1383 switch (hw->mac_type) {
1384 case e1000_82571:
1385 case e1000_82572:
1386 if (hw->media_type == e1000_media_type_fiber ||
1387 hw->media_type == e1000_media_type_internal_serdes) {
1388 #define E1000_SERDES_LB_OFF 0x400
1389 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
1390 msec_delay(10);
1391 break;
1392 }
1393 /* Fall Through */
1394 case e1000_82545:
1395 case e1000_82546:
1396 case e1000_82545_rev_3:
1397 case e1000_82546_rev_3:
1398 default:
1399 hw->autoneg = TRUE;
1400 if (hw->phy_type == e1000_phy_gg82563) {
1401 e1000_write_phy_reg(hw,
1402 GG82563_PHY_KMRN_MODE_CTRL,
1403 0x180);
1404 }
1405 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1406 if (phy_reg & MII_CR_LOOPBACK) {
1407 phy_reg &= ~MII_CR_LOOPBACK;
1408 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1409 e1000_phy_reset(hw);
1410 }
1411 break;
1412 }
1413 }
1414
1415 static void
1416 e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1417 {
1418 memset(skb->data, 0xFF, frame_size);
1419 frame_size &= ~1;
1420 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1421 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1422 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1423 }
1424
1425 static int
1426 e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1427 {
1428 frame_size &= ~1;
1429 if (*(skb->data + 3) == 0xFF) {
1430 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1431 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1432 return 0;
1433 }
1434 }
1435 return 13;
1436 }
1437
1438 static int
1439 e1000_run_loopback_test(struct e1000_adapter *adapter)
1440 {
1441 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1442 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1443 struct pci_dev *pdev = adapter->pdev;
1444 int i, j, k, l, lc, good_cnt, ret_val=0;
1445 unsigned long time;
1446
1447 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1448
1449 /* Calculate the loop count based on the largest descriptor ring
1450 * The idea is to wrap the largest ring a number of times using 64
1451 * send/receive pairs during each loop
1452 */
1453
1454 if (rxdr->count <= txdr->count)
1455 lc = ((txdr->count / 64) * 2) + 1;
1456 else
1457 lc = ((rxdr->count / 64) * 2) + 1;
1458
1459 k = l = 0;
1460 for (j = 0; j <= lc; j++) { /* loop count loop */
1461 for (i = 0; i < 64; i++) { /* send the packets */
1462 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
1463 1024);
1464 pci_dma_sync_single_for_device(pdev,
1465 txdr->buffer_info[k].dma,
1466 txdr->buffer_info[k].length,
1467 PCI_DMA_TODEVICE);
1468 if (unlikely(++k == txdr->count)) k = 0;
1469 }
1470 E1000_WRITE_REG(&adapter->hw, TDT, k);
1471 msec_delay(200);
1472 time = jiffies; /* set the start time for the receive */
1473 good_cnt = 0;
1474 do { /* receive the sent packets */
1475 pci_dma_sync_single_for_cpu(pdev,
1476 rxdr->buffer_info[l].dma,
1477 rxdr->buffer_info[l].length,
1478 PCI_DMA_FROMDEVICE);
1479
1480 ret_val = e1000_check_lbtest_frame(
1481 rxdr->buffer_info[l].skb,
1482 1024);
1483 if (!ret_val)
1484 good_cnt++;
1485 if (unlikely(++l == rxdr->count)) l = 0;
1486 /* time + 20 msecs (200 msecs on 2.4) is more than
1487 * enough time to complete the receives, if it's
1488 * exceeded, break and error off
1489 */
1490 } while (good_cnt < 64 && jiffies < (time + 20));
1491 if (good_cnt != 64) {
1492 ret_val = 13; /* ret_val is the same as mis-compare */
1493 break;
1494 }
1495 if (jiffies >= (time + 2)) {
1496 ret_val = 14; /* error code for time out error */
1497 break;
1498 }
1499 } /* end loop count loop */
1500 return ret_val;
1501 }
1502
1503 static int
1504 e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1505 {
1506 /* PHY loopback cannot be performed if SoL/IDER
1507 * sessions are active */
1508 if (e1000_check_phy_reset_block(&adapter->hw)) {
1509 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1510 "when SoL/IDER is active.\n");
1511 *data = 0;
1512 goto out;
1513 }
1514
1515 if ((*data = e1000_setup_desc_rings(adapter)))
1516 goto out;
1517 if ((*data = e1000_setup_loopback_test(adapter)))
1518 goto err_loopback;
1519 *data = e1000_run_loopback_test(adapter);
1520 e1000_loopback_cleanup(adapter);
1521
1522 err_loopback:
1523 e1000_free_desc_rings(adapter);
1524 out:
1525 return *data;
1526 }
1527
1528 static int
1529 e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1530 {
1531 *data = 0;
1532 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1533 int i = 0;
1534 adapter->hw.serdes_link_down = TRUE;
1535
1536 /* On some blade server designs, link establishment
1537 * could take as long as 2-3 minutes */
1538 do {
1539 e1000_check_for_link(&adapter->hw);
1540 if (adapter->hw.serdes_link_down == FALSE)
1541 return *data;
1542 msec_delay(20);
1543 } while (i++ < 3750);
1544
1545 *data = 1;
1546 } else {
1547 e1000_check_for_link(&adapter->hw);
1548 if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
1549 msec_delay(4000);
1550
1551 if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1552 *data = 1;
1553 }
1554 }
1555 return *data;
1556 }
1557
1558 static int
1559 e1000_diag_test_count(struct net_device *netdev)
1560 {
1561 return E1000_TEST_LEN;
1562 }
1563
1564 static void
1565 e1000_diag_test(struct net_device *netdev,
1566 struct ethtool_test *eth_test, uint64_t *data)
1567 {
1568 struct e1000_adapter *adapter = netdev_priv(netdev);
1569 boolean_t if_running = netif_running(netdev);
1570
1571 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1572 /* Offline tests */
1573
1574 /* save speed, duplex, autoneg settings */
1575 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1576 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1577 uint8_t autoneg = adapter->hw.autoneg;
1578
1579 /* Link test performed before hardware reset so autoneg doesn't
1580 * interfere with test result */
1581 if (e1000_link_test(adapter, &data[4]))
1582 eth_test->flags |= ETH_TEST_FL_FAILED;
1583
1584 if (if_running)
1585 e1000_down(adapter);
1586 else
1587 e1000_reset(adapter);
1588
1589 if (e1000_reg_test(adapter, &data[0]))
1590 eth_test->flags |= ETH_TEST_FL_FAILED;
1591
1592 e1000_reset(adapter);
1593 if (e1000_eeprom_test(adapter, &data[1]))
1594 eth_test->flags |= ETH_TEST_FL_FAILED;
1595
1596 e1000_reset(adapter);
1597 if (e1000_intr_test(adapter, &data[2]))
1598 eth_test->flags |= ETH_TEST_FL_FAILED;
1599
1600 e1000_reset(adapter);
1601 if (e1000_loopback_test(adapter, &data[3]))
1602 eth_test->flags |= ETH_TEST_FL_FAILED;
1603
1604 /* restore speed, duplex, autoneg settings */
1605 adapter->hw.autoneg_advertised = autoneg_advertised;
1606 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1607 adapter->hw.autoneg = autoneg;
1608
1609 e1000_reset(adapter);
1610 if (if_running)
1611 e1000_up(adapter);
1612 } else {
1613 /* Online tests */
1614 if (e1000_link_test(adapter, &data[4]))
1615 eth_test->flags |= ETH_TEST_FL_FAILED;
1616
1617 /* Offline tests aren't run; pass by default */
1618 data[0] = 0;
1619 data[1] = 0;
1620 data[2] = 0;
1621 data[3] = 0;
1622 }
1623 msleep_interruptible(4 * 1000);
1624 }
1625
1626 static void
1627 e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1628 {
1629 struct e1000_adapter *adapter = netdev_priv(netdev);
1630 struct e1000_hw *hw = &adapter->hw;
1631
1632 switch (adapter->hw.device_id) {
1633 case E1000_DEV_ID_82542:
1634 case E1000_DEV_ID_82543GC_FIBER:
1635 case E1000_DEV_ID_82543GC_COPPER:
1636 case E1000_DEV_ID_82544EI_FIBER:
1637 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1638 case E1000_DEV_ID_82545EM_FIBER:
1639 case E1000_DEV_ID_82545EM_COPPER:
1640 case E1000_DEV_ID_82546GB_QUAD_COPPER:
1641 wol->supported = 0;
1642 wol->wolopts = 0;
1643 return;
1644
1645 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1646 /* device id 10B5 port-A supports wol */
1647 if (!adapter->ksp3_port_a) {
1648 wol->supported = 0;
1649 return;
1650 }
1651 /* KSP3 does not suppport UCAST wake-ups for any interface */
1652 wol->supported = WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
1653
1654 if (adapter->wol & E1000_WUFC_EX)
1655 DPRINTK(DRV, ERR, "Interface does not support "
1656 "directed (unicast) frame wake-up packets\n");
1657 wol->wolopts = 0;
1658 goto do_defaults;
1659
1660 case E1000_DEV_ID_82546EB_FIBER:
1661 case E1000_DEV_ID_82546GB_FIBER:
1662 case E1000_DEV_ID_82571EB_FIBER:
1663 /* Wake events only supported on port A for dual fiber */
1664 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1665 wol->supported = 0;
1666 wol->wolopts = 0;
1667 return;
1668 }
1669 /* Fall Through */
1670
1671 default:
1672 wol->supported = WAKE_UCAST | WAKE_MCAST |
1673 WAKE_BCAST | WAKE_MAGIC;
1674 wol->wolopts = 0;
1675
1676 do_defaults:
1677 if (adapter->wol & E1000_WUFC_EX)
1678 wol->wolopts |= WAKE_UCAST;
1679 if (adapter->wol & E1000_WUFC_MC)
1680 wol->wolopts |= WAKE_MCAST;
1681 if (adapter->wol & E1000_WUFC_BC)
1682 wol->wolopts |= WAKE_BCAST;
1683 if (adapter->wol & E1000_WUFC_MAG)
1684 wol->wolopts |= WAKE_MAGIC;
1685 return;
1686 }
1687 }
1688
1689 static int
1690 e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1691 {
1692 struct e1000_adapter *adapter = netdev_priv(netdev);
1693 struct e1000_hw *hw = &adapter->hw;
1694
1695 switch (adapter->hw.device_id) {
1696 case E1000_DEV_ID_82542:
1697 case E1000_DEV_ID_82543GC_FIBER:
1698 case E1000_DEV_ID_82543GC_COPPER:
1699 case E1000_DEV_ID_82544EI_FIBER:
1700 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1701 case E1000_DEV_ID_82546GB_QUAD_COPPER:
1702 case E1000_DEV_ID_82545EM_FIBER:
1703 case E1000_DEV_ID_82545EM_COPPER:
1704 return wol->wolopts ? -EOPNOTSUPP : 0;
1705
1706 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1707 /* device id 10B5 port-A supports wol */
1708 if (!adapter->ksp3_port_a)
1709 return wol->wolopts ? -EOPNOTSUPP : 0;
1710
1711 if (wol->wolopts & WAKE_UCAST) {
1712 DPRINTK(DRV, ERR, "Interface does not support "
1713 "directed (unicast) frame wake-up packets\n");
1714 return -EOPNOTSUPP;
1715 }
1716
1717 case E1000_DEV_ID_82546EB_FIBER:
1718 case E1000_DEV_ID_82546GB_FIBER:
1719 case E1000_DEV_ID_82571EB_FIBER:
1720 /* Wake events only supported on port A for dual fiber */
1721 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
1722 return wol->wolopts ? -EOPNOTSUPP : 0;
1723 /* Fall Through */
1724
1725 default:
1726 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1727 return -EOPNOTSUPP;
1728
1729 adapter->wol = 0;
1730
1731 if (wol->wolopts & WAKE_UCAST)
1732 adapter->wol |= E1000_WUFC_EX;
1733 if (wol->wolopts & WAKE_MCAST)
1734 adapter->wol |= E1000_WUFC_MC;
1735 if (wol->wolopts & WAKE_BCAST)
1736 adapter->wol |= E1000_WUFC_BC;
1737 if (wol->wolopts & WAKE_MAGIC)
1738 adapter->wol |= E1000_WUFC_MAG;
1739 }
1740
1741 return 0;
1742 }
1743
1744 /* toggle LED 4 times per second = 2 "blinks" per second */
1745 #define E1000_ID_INTERVAL (HZ/4)
1746
1747 /* bit defines for adapter->led_status */
1748 #define E1000_LED_ON 0
1749
1750 static void
1751 e1000_led_blink_callback(unsigned long data)
1752 {
1753 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1754
1755 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1756 e1000_led_off(&adapter->hw);
1757 else
1758 e1000_led_on(&adapter->hw);
1759
1760 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1761 }
1762
1763 static int
1764 e1000_phys_id(struct net_device *netdev, uint32_t data)
1765 {
1766 struct e1000_adapter *adapter = netdev_priv(netdev);
1767
1768 if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1769 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1770
1771 if (adapter->hw.mac_type < e1000_82571) {
1772 if (!adapter->blink_timer.function) {
1773 init_timer(&adapter->blink_timer);
1774 adapter->blink_timer.function = e1000_led_blink_callback;
1775 adapter->blink_timer.data = (unsigned long) adapter;
1776 }
1777 e1000_setup_led(&adapter->hw);
1778 mod_timer(&adapter->blink_timer, jiffies);
1779 msleep_interruptible(data * 1000);
1780 del_timer_sync(&adapter->blink_timer);
1781 } else if (adapter->hw.mac_type < e1000_82573) {
1782 E1000_WRITE_REG(&adapter->hw, LEDCTL,
1783 (E1000_LEDCTL_LED2_BLINK_RATE |
1784 E1000_LEDCTL_LED0_BLINK | E1000_LEDCTL_LED2_BLINK |
1785 (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
1786 (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED0_MODE_SHIFT) |
1787 (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED1_MODE_SHIFT)));
1788 msleep_interruptible(data * 1000);
1789 } else {
1790 E1000_WRITE_REG(&adapter->hw, LEDCTL,
1791 (E1000_LEDCTL_LED2_BLINK_RATE |
1792 E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
1793 (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
1794 (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
1795 (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
1796 msleep_interruptible(data * 1000);
1797 }
1798
1799 e1000_led_off(&adapter->hw);
1800 clear_bit(E1000_LED_ON, &adapter->led_status);
1801 e1000_cleanup_led(&adapter->hw);
1802
1803 return 0;
1804 }
1805
1806 static int
1807 e1000_nway_reset(struct net_device *netdev)
1808 {
1809 struct e1000_adapter *adapter = netdev_priv(netdev);
1810 if (netif_running(netdev)) {
1811 e1000_down(adapter);
1812 e1000_up(adapter);
1813 }
1814 return 0;
1815 }
1816
1817 static int
1818 e1000_get_stats_count(struct net_device *netdev)
1819 {
1820 return E1000_STATS_LEN;
1821 }
1822
1823 static void
1824 e1000_get_ethtool_stats(struct net_device *netdev,
1825 struct ethtool_stats *stats, uint64_t *data)
1826 {
1827 struct e1000_adapter *adapter = netdev_priv(netdev);
1828 int i;
1829
1830 e1000_update_stats(adapter);
1831 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1832 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1833 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1834 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1835 }
1836 /* BUG_ON(i != E1000_STATS_LEN); */
1837 }
1838
1839 static void
1840 e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1841 {
1842 uint8_t *p = data;
1843 int i;
1844
1845 switch (stringset) {
1846 case ETH_SS_TEST:
1847 memcpy(data, *e1000_gstrings_test,
1848 E1000_TEST_LEN*ETH_GSTRING_LEN);
1849 break;
1850 case ETH_SS_STATS:
1851 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1852 memcpy(p, e1000_gstrings_stats[i].stat_string,
1853 ETH_GSTRING_LEN);
1854 p += ETH_GSTRING_LEN;
1855 }
1856 /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1857 break;
1858 }
1859 }
1860
1861 static struct ethtool_ops e1000_ethtool_ops = {
1862 .get_settings = e1000_get_settings,
1863 .set_settings = e1000_set_settings,
1864 .get_drvinfo = e1000_get_drvinfo,
1865 .get_regs_len = e1000_get_regs_len,
1866 .get_regs = e1000_get_regs,
1867 .get_wol = e1000_get_wol,
1868 .set_wol = e1000_set_wol,
1869 .get_msglevel = e1000_get_msglevel,
1870 .set_msglevel = e1000_set_msglevel,
1871 .nway_reset = e1000_nway_reset,
1872 .get_link = ethtool_op_get_link,
1873 .get_eeprom_len = e1000_get_eeprom_len,
1874 .get_eeprom = e1000_get_eeprom,
1875 .set_eeprom = e1000_set_eeprom,
1876 .get_ringparam = e1000_get_ringparam,
1877 .set_ringparam = e1000_set_ringparam,
1878 .get_pauseparam = e1000_get_pauseparam,
1879 .set_pauseparam = e1000_set_pauseparam,
1880 .get_rx_csum = e1000_get_rx_csum,
1881 .set_rx_csum = e1000_set_rx_csum,
1882 .get_tx_csum = e1000_get_tx_csum,
1883 .set_tx_csum = e1000_set_tx_csum,
1884 .get_sg = ethtool_op_get_sg,
1885 .set_sg = ethtool_op_set_sg,
1886 #ifdef NETIF_F_TSO
1887 .get_tso = ethtool_op_get_tso,
1888 .set_tso = e1000_set_tso,
1889 #endif
1890 .self_test_count = e1000_diag_test_count,
1891 .self_test = e1000_diag_test,
1892 .get_strings = e1000_get_strings,
1893 .phys_id = e1000_phys_id,
1894 .get_stats_count = e1000_get_stats_count,
1895 .get_ethtool_stats = e1000_get_ethtool_stats,
1896 .get_perm_addr = ethtool_op_get_perm_addr,
1897 };
1898
1899 void e1000_set_ethtool_ops(struct net_device *netdev)
1900 {
1901 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1902 }