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PCI: Change all drivers to use pci_device->revision
[GitHub/LineageOS/android_kernel_motorola_exynos9610.git] / drivers / net / atl1 / atl1_main.c
1 /*
2 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
3 * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
4 * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
5 *
6 * Derived from Intel e1000 driver
7 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free
11 * Software Foundation; either version 2 of the License, or (at your option)
12 * any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program; if not, write to the Free Software Foundation, Inc., 59
21 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 *
23 * The full GNU General Public License is included in this distribution in the
24 * file called COPYING.
25 *
26 * Contact Information:
27 * Xiong Huang <xiong_huang@attansic.com>
28 * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
29 * Xinzhu 302, TAIWAN, REPUBLIC OF CHINA
30 *
31 * Chris Snook <csnook@redhat.com>
32 * Jay Cliburn <jcliburn@gmail.com>
33 *
34 * This version is adapted from the Attansic reference driver for
35 * inclusion in the Linux kernel. It is currently under heavy development.
36 * A very incomplete list of things that need to be dealt with:
37 *
38 * TODO:
39 * Fix TSO; tx performance is horrible with TSO enabled.
40 * Wake on LAN.
41 * Add more ethtool functions, including set ring parameters.
42 * Fix abstruse irq enable/disable condition described here:
43 * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
44 *
45 * NEEDS TESTING:
46 * VLAN
47 * multicast
48 * promiscuous mode
49 * interrupt coalescing
50 * SMP torture testing
51 */
52
53 #include <linux/types.h>
54 #include <linux/netdevice.h>
55 #include <linux/pci.h>
56 #include <linux/spinlock.h>
57 #include <linux/slab.h>
58 #include <linux/string.h>
59 #include <linux/skbuff.h>
60 #include <linux/etherdevice.h>
61 #include <linux/if_vlan.h>
62 #include <linux/irqreturn.h>
63 #include <linux/workqueue.h>
64 #include <linux/timer.h>
65 #include <linux/jiffies.h>
66 #include <linux/hardirq.h>
67 #include <linux/interrupt.h>
68 #include <linux/irqflags.h>
69 #include <linux/dma-mapping.h>
70 #include <linux/net.h>
71 #include <linux/pm.h>
72 #include <linux/in.h>
73 #include <linux/ip.h>
74 #include <linux/tcp.h>
75 #include <linux/compiler.h>
76 #include <linux/delay.h>
77 #include <linux/mii.h>
78 #include <net/checksum.h>
79
80 #include <asm/atomic.h>
81 #include <asm/byteorder.h>
82
83 #include "atl1.h"
84
85 #define DRIVER_VERSION "2.0.7"
86
87 char atl1_driver_name[] = "atl1";
88 static const char atl1_driver_string[] = "Attansic L1 Ethernet Network Driver";
89 static const char atl1_copyright[] = "Copyright(c) 2005-2006 Attansic Corporation.";
90 char atl1_driver_version[] = DRIVER_VERSION;
91
92 MODULE_AUTHOR
93 ("Attansic Corporation <xiong_huang@attansic.com>, Chris Snook <csnook@redhat.com>, Jay Cliburn <jcliburn@gmail.com>");
94 MODULE_DESCRIPTION("Attansic 1000M Ethernet Network Driver");
95 MODULE_LICENSE("GPL");
96 MODULE_VERSION(DRIVER_VERSION);
97
98 /*
99 * atl1_pci_tbl - PCI Device ID Table
100 */
101 static const struct pci_device_id atl1_pci_tbl[] = {
102 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
103 /* required last entry */
104 {0,}
105 };
106
107 MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
108
109 /*
110 * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
111 * @adapter: board private structure to initialize
112 *
113 * atl1_sw_init initializes the Adapter private data structure.
114 * Fields are initialized based on PCI device information and
115 * OS network device settings (MTU size).
116 */
117 static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
118 {
119 struct atl1_hw *hw = &adapter->hw;
120 struct net_device *netdev = adapter->netdev;
121
122 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
123 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
124
125 adapter->wol = 0;
126 adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
127 adapter->ict = 50000; /* 100ms */
128 adapter->link_speed = SPEED_0; /* hardware init */
129 adapter->link_duplex = FULL_DUPLEX;
130
131 hw->phy_configured = false;
132 hw->preamble_len = 7;
133 hw->ipgt = 0x60;
134 hw->min_ifg = 0x50;
135 hw->ipgr1 = 0x40;
136 hw->ipgr2 = 0x60;
137 hw->max_retry = 0xf;
138 hw->lcol = 0x37;
139 hw->jam_ipg = 7;
140 hw->rfd_burst = 8;
141 hw->rrd_burst = 8;
142 hw->rfd_fetch_gap = 1;
143 hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
144 hw->rx_jumbo_lkah = 1;
145 hw->rrd_ret_timer = 16;
146 hw->tpd_burst = 4;
147 hw->tpd_fetch_th = 16;
148 hw->txf_burst = 0x100;
149 hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
150 hw->tpd_fetch_gap = 1;
151 hw->rcb_value = atl1_rcb_64;
152 hw->dma_ord = atl1_dma_ord_enh;
153 hw->dmar_block = atl1_dma_req_256;
154 hw->dmaw_block = atl1_dma_req_256;
155 hw->cmb_rrd = 4;
156 hw->cmb_tpd = 4;
157 hw->cmb_rx_timer = 1; /* about 2us */
158 hw->cmb_tx_timer = 1; /* about 2us */
159 hw->smb_timer = 100000; /* about 200ms */
160
161 atomic_set(&adapter->irq_sem, 0);
162 spin_lock_init(&adapter->lock);
163 spin_lock_init(&adapter->mb_lock);
164
165 return 0;
166 }
167
168 /*
169 * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
170 * @adapter: board private structure
171 *
172 * Return 0 on success, negative on failure
173 */
174 s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
175 {
176 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
177 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
178 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
179 struct atl1_ring_header *ring_header = &adapter->ring_header;
180 struct pci_dev *pdev = adapter->pdev;
181 int size;
182 u8 offset = 0;
183
184 size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
185 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
186 if (unlikely(!tpd_ring->buffer_info)) {
187 dev_err(&pdev->dev, "kzalloc failed , size = D%d\n", size);
188 goto err_nomem;
189 }
190 rfd_ring->buffer_info =
191 (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
192
193 /* real ring DMA buffer */
194 ring_header->size = size = sizeof(struct tx_packet_desc) *
195 tpd_ring->count
196 + sizeof(struct rx_free_desc) * rfd_ring->count
197 + sizeof(struct rx_return_desc) * rrd_ring->count
198 + sizeof(struct coals_msg_block)
199 + sizeof(struct stats_msg_block)
200 + 40; /* "40: for 8 bytes align" huh? -- CHS */
201
202 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
203 &ring_header->dma);
204 if (unlikely(!ring_header->desc)) {
205 dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
206 goto err_nomem;
207 }
208
209 memset(ring_header->desc, 0, ring_header->size);
210
211 /* init TPD ring */
212 tpd_ring->dma = ring_header->dma;
213 offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
214 tpd_ring->dma += offset;
215 tpd_ring->desc = (u8 *) ring_header->desc + offset;
216 tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
217 atomic_set(&tpd_ring->next_to_use, 0);
218 atomic_set(&tpd_ring->next_to_clean, 0);
219
220 /* init RFD ring */
221 rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
222 offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
223 rfd_ring->dma += offset;
224 rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
225 rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
226 rfd_ring->next_to_clean = 0;
227 /* rfd_ring->next_to_use = rfd_ring->count - 1; */
228 atomic_set(&rfd_ring->next_to_use, 0);
229
230 /* init RRD ring */
231 rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
232 offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
233 rrd_ring->dma += offset;
234 rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
235 rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
236 rrd_ring->next_to_use = 0;
237 atomic_set(&rrd_ring->next_to_clean, 0);
238
239 /* init CMB */
240 adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
241 offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
242 adapter->cmb.dma += offset;
243 adapter->cmb.cmb =
244 (struct coals_msg_block *) ((u8 *) rrd_ring->desc +
245 (rrd_ring->size + offset));
246
247 /* init SMB */
248 adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
249 offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
250 adapter->smb.dma += offset;
251 adapter->smb.smb = (struct stats_msg_block *)
252 ((u8 *) adapter->cmb.cmb + (sizeof(struct coals_msg_block) + offset));
253
254 return ATL1_SUCCESS;
255
256 err_nomem:
257 kfree(tpd_ring->buffer_info);
258 return -ENOMEM;
259 }
260
261 /*
262 * atl1_irq_enable - Enable default interrupt generation settings
263 * @adapter: board private structure
264 */
265 static void atl1_irq_enable(struct atl1_adapter *adapter)
266 {
267 if (likely(!atomic_dec_and_test(&adapter->irq_sem)))
268 iowrite32(IMR_NORMAL_MASK, adapter->hw.hw_addr + REG_IMR);
269 }
270
271 static void atl1_clear_phy_int(struct atl1_adapter *adapter)
272 {
273 u16 phy_data;
274 unsigned long flags;
275
276 spin_lock_irqsave(&adapter->lock, flags);
277 atl1_read_phy_reg(&adapter->hw, 19, &phy_data);
278 spin_unlock_irqrestore(&adapter->lock, flags);
279 }
280
281 static void atl1_inc_smb(struct atl1_adapter *adapter)
282 {
283 struct stats_msg_block *smb = adapter->smb.smb;
284
285 /* Fill out the OS statistics structure */
286 adapter->soft_stats.rx_packets += smb->rx_ok;
287 adapter->soft_stats.tx_packets += smb->tx_ok;
288 adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
289 adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
290 adapter->soft_stats.multicast += smb->rx_mcast;
291 adapter->soft_stats.collisions += (smb->tx_1_col +
292 smb->tx_2_col * 2 +
293 smb->tx_late_col +
294 smb->tx_abort_col *
295 adapter->hw.max_retry);
296
297 /* Rx Errors */
298 adapter->soft_stats.rx_errors += (smb->rx_frag +
299 smb->rx_fcs_err +
300 smb->rx_len_err +
301 smb->rx_sz_ov +
302 smb->rx_rxf_ov +
303 smb->rx_rrd_ov + smb->rx_align_err);
304 adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
305 adapter->soft_stats.rx_length_errors += smb->rx_len_err;
306 adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
307 adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
308 adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
309 smb->rx_rxf_ov);
310
311 adapter->soft_stats.rx_pause += smb->rx_pause;
312 adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
313 adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
314
315 /* Tx Errors */
316 adapter->soft_stats.tx_errors += (smb->tx_late_col +
317 smb->tx_abort_col +
318 smb->tx_underrun + smb->tx_trunc);
319 adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
320 adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
321 adapter->soft_stats.tx_window_errors += smb->tx_late_col;
322
323 adapter->soft_stats.excecol += smb->tx_abort_col;
324 adapter->soft_stats.deffer += smb->tx_defer;
325 adapter->soft_stats.scc += smb->tx_1_col;
326 adapter->soft_stats.mcc += smb->tx_2_col;
327 adapter->soft_stats.latecol += smb->tx_late_col;
328 adapter->soft_stats.tx_underun += smb->tx_underrun;
329 adapter->soft_stats.tx_trunc += smb->tx_trunc;
330 adapter->soft_stats.tx_pause += smb->tx_pause;
331
332 adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
333 adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
334 adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
335 adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
336 adapter->net_stats.multicast = adapter->soft_stats.multicast;
337 adapter->net_stats.collisions = adapter->soft_stats.collisions;
338 adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
339 adapter->net_stats.rx_over_errors =
340 adapter->soft_stats.rx_missed_errors;
341 adapter->net_stats.rx_length_errors =
342 adapter->soft_stats.rx_length_errors;
343 adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
344 adapter->net_stats.rx_frame_errors =
345 adapter->soft_stats.rx_frame_errors;
346 adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
347 adapter->net_stats.rx_missed_errors =
348 adapter->soft_stats.rx_missed_errors;
349 adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
350 adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
351 adapter->net_stats.tx_aborted_errors =
352 adapter->soft_stats.tx_aborted_errors;
353 adapter->net_stats.tx_window_errors =
354 adapter->soft_stats.tx_window_errors;
355 adapter->net_stats.tx_carrier_errors =
356 adapter->soft_stats.tx_carrier_errors;
357 }
358
359 static void atl1_rx_checksum(struct atl1_adapter *adapter,
360 struct rx_return_desc *rrd,
361 struct sk_buff *skb)
362 {
363 skb->ip_summed = CHECKSUM_NONE;
364
365 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
366 if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
367 ERR_FLAG_CODE | ERR_FLAG_OV)) {
368 adapter->hw_csum_err++;
369 dev_dbg(&adapter->pdev->dev, "rx checksum error\n");
370 return;
371 }
372 }
373
374 /* not IPv4 */
375 if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
376 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
377 return;
378
379 /* IPv4 packet */
380 if (likely(!(rrd->err_flg &
381 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
382 skb->ip_summed = CHECKSUM_UNNECESSARY;
383 adapter->hw_csum_good++;
384 return;
385 }
386
387 /* IPv4, but hardware thinks its checksum is wrong */
388 dev_dbg(&adapter->pdev->dev,
389 "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
390 rrd->pkt_flg, rrd->err_flg);
391 skb->ip_summed = CHECKSUM_COMPLETE;
392 skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
393 adapter->hw_csum_err++;
394 return;
395 }
396
397 /*
398 * atl1_alloc_rx_buffers - Replace used receive buffers
399 * @adapter: address of board private structure
400 */
401 static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
402 {
403 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
404 struct pci_dev *pdev = adapter->pdev;
405 struct page *page;
406 unsigned long offset;
407 struct atl1_buffer *buffer_info, *next_info;
408 struct sk_buff *skb;
409 u16 num_alloc = 0;
410 u16 rfd_next_to_use, next_next;
411 struct rx_free_desc *rfd_desc;
412
413 next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
414 if (++next_next == rfd_ring->count)
415 next_next = 0;
416 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
417 next_info = &rfd_ring->buffer_info[next_next];
418
419 while (!buffer_info->alloced && !next_info->alloced) {
420 if (buffer_info->skb) {
421 buffer_info->alloced = 1;
422 goto next;
423 }
424
425 rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
426
427 skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
428 if (unlikely(!skb)) { /* Better luck next round */
429 adapter->net_stats.rx_dropped++;
430 break;
431 }
432
433 /*
434 * Make buffer alignment 2 beyond a 16 byte boundary
435 * this will result in a 16 byte aligned IP header after
436 * the 14 byte MAC header is removed
437 */
438 skb_reserve(skb, NET_IP_ALIGN);
439
440 buffer_info->alloced = 1;
441 buffer_info->skb = skb;
442 buffer_info->length = (u16) adapter->rx_buffer_len;
443 page = virt_to_page(skb->data);
444 offset = (unsigned long)skb->data & ~PAGE_MASK;
445 buffer_info->dma = pci_map_page(pdev, page, offset,
446 adapter->rx_buffer_len,
447 PCI_DMA_FROMDEVICE);
448 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
449 rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
450 rfd_desc->coalese = 0;
451
452 next:
453 rfd_next_to_use = next_next;
454 if (unlikely(++next_next == rfd_ring->count))
455 next_next = 0;
456
457 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
458 next_info = &rfd_ring->buffer_info[next_next];
459 num_alloc++;
460 }
461
462 if (num_alloc) {
463 /*
464 * Force memory writes to complete before letting h/w
465 * know there are new descriptors to fetch. (Only
466 * applicable for weak-ordered memory model archs,
467 * such as IA-64).
468 */
469 wmb();
470 atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
471 }
472 return num_alloc;
473 }
474
475 static void atl1_intr_rx(struct atl1_adapter *adapter)
476 {
477 int i, count;
478 u16 length;
479 u16 rrd_next_to_clean;
480 u32 value;
481 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
482 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
483 struct atl1_buffer *buffer_info;
484 struct rx_return_desc *rrd;
485 struct sk_buff *skb;
486
487 count = 0;
488
489 rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
490
491 while (1) {
492 rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
493 i = 1;
494 if (likely(rrd->xsz.valid)) { /* packet valid */
495 chk_rrd:
496 /* check rrd status */
497 if (likely(rrd->num_buf == 1))
498 goto rrd_ok;
499
500 /* rrd seems to be bad */
501 if (unlikely(i-- > 0)) {
502 /* rrd may not be DMAed completely */
503 dev_dbg(&adapter->pdev->dev,
504 "incomplete RRD DMA transfer\n");
505 udelay(1);
506 goto chk_rrd;
507 }
508 /* bad rrd */
509 dev_dbg(&adapter->pdev->dev, "bad RRD\n");
510 /* see if update RFD index */
511 if (rrd->num_buf > 1) {
512 u16 num_buf;
513 num_buf =
514 (rrd->xsz.xsum_sz.pkt_size +
515 adapter->rx_buffer_len -
516 1) / adapter->rx_buffer_len;
517 if (rrd->num_buf == num_buf) {
518 /* clean alloc flag for bad rrd */
519 while (rfd_ring->next_to_clean !=
520 (rrd->buf_indx + num_buf)) {
521 rfd_ring->buffer_info[rfd_ring->
522 next_to_clean].alloced = 0;
523 if (++rfd_ring->next_to_clean ==
524 rfd_ring->count) {
525 rfd_ring->
526 next_to_clean = 0;
527 }
528 }
529 }
530 }
531
532 /* update rrd */
533 rrd->xsz.valid = 0;
534 if (++rrd_next_to_clean == rrd_ring->count)
535 rrd_next_to_clean = 0;
536 count++;
537 continue;
538 } else { /* current rrd still not be updated */
539
540 break;
541 }
542 rrd_ok:
543 /* clean alloc flag for bad rrd */
544 while (rfd_ring->next_to_clean != rrd->buf_indx) {
545 rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced =
546 0;
547 if (++rfd_ring->next_to_clean == rfd_ring->count)
548 rfd_ring->next_to_clean = 0;
549 }
550
551 buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
552 if (++rfd_ring->next_to_clean == rfd_ring->count)
553 rfd_ring->next_to_clean = 0;
554
555 /* update rrd next to clean */
556 if (++rrd_next_to_clean == rrd_ring->count)
557 rrd_next_to_clean = 0;
558 count++;
559
560 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
561 if (!(rrd->err_flg &
562 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
563 | ERR_FLAG_LEN))) {
564 /* packet error, don't need upstream */
565 buffer_info->alloced = 0;
566 rrd->xsz.valid = 0;
567 continue;
568 }
569 }
570
571 /* Good Receive */
572 pci_unmap_page(adapter->pdev, buffer_info->dma,
573 buffer_info->length, PCI_DMA_FROMDEVICE);
574 skb = buffer_info->skb;
575 length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
576
577 skb_put(skb, length - ETHERNET_FCS_SIZE);
578
579 /* Receive Checksum Offload */
580 atl1_rx_checksum(adapter, rrd, skb);
581 skb->protocol = eth_type_trans(skb, adapter->netdev);
582
583 if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
584 u16 vlan_tag = (rrd->vlan_tag >> 4) |
585 ((rrd->vlan_tag & 7) << 13) |
586 ((rrd->vlan_tag & 8) << 9);
587 vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
588 } else
589 netif_rx(skb);
590
591 /* let protocol layer free skb */
592 buffer_info->skb = NULL;
593 buffer_info->alloced = 0;
594 rrd->xsz.valid = 0;
595
596 adapter->netdev->last_rx = jiffies;
597 }
598
599 atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
600
601 atl1_alloc_rx_buffers(adapter);
602
603 /* update mailbox ? */
604 if (count) {
605 u32 tpd_next_to_use;
606 u32 rfd_next_to_use;
607 u32 rrd_next_to_clean;
608
609 spin_lock(&adapter->mb_lock);
610
611 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
612 rfd_next_to_use =
613 atomic_read(&adapter->rfd_ring.next_to_use);
614 rrd_next_to_clean =
615 atomic_read(&adapter->rrd_ring.next_to_clean);
616 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
617 MB_RFD_PROD_INDX_SHIFT) |
618 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
619 MB_RRD_CONS_INDX_SHIFT) |
620 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
621 MB_TPD_PROD_INDX_SHIFT);
622 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
623 spin_unlock(&adapter->mb_lock);
624 }
625 }
626
627 static void atl1_intr_tx(struct atl1_adapter *adapter)
628 {
629 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
630 struct atl1_buffer *buffer_info;
631 u16 sw_tpd_next_to_clean;
632 u16 cmb_tpd_next_to_clean;
633
634 sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
635 cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
636
637 while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
638 struct tx_packet_desc *tpd;
639
640 tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
641 buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
642 if (buffer_info->dma) {
643 pci_unmap_page(adapter->pdev, buffer_info->dma,
644 buffer_info->length, PCI_DMA_TODEVICE);
645 buffer_info->dma = 0;
646 }
647
648 if (buffer_info->skb) {
649 dev_kfree_skb_irq(buffer_info->skb);
650 buffer_info->skb = NULL;
651 }
652 tpd->buffer_addr = 0;
653 tpd->desc.data = 0;
654
655 if (++sw_tpd_next_to_clean == tpd_ring->count)
656 sw_tpd_next_to_clean = 0;
657 }
658 atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
659
660 if (netif_queue_stopped(adapter->netdev)
661 && netif_carrier_ok(adapter->netdev))
662 netif_wake_queue(adapter->netdev);
663 }
664
665 static void atl1_check_for_link(struct atl1_adapter *adapter)
666 {
667 struct net_device *netdev = adapter->netdev;
668 u16 phy_data = 0;
669
670 spin_lock(&adapter->lock);
671 adapter->phy_timer_pending = false;
672 atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
673 atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
674 spin_unlock(&adapter->lock);
675
676 /* notify upper layer link down ASAP */
677 if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
678 if (netif_carrier_ok(netdev)) { /* old link state: Up */
679 dev_info(&adapter->pdev->dev, "%s link is down\n",
680 netdev->name);
681 adapter->link_speed = SPEED_0;
682 netif_carrier_off(netdev);
683 netif_stop_queue(netdev);
684 }
685 }
686 schedule_work(&adapter->link_chg_task);
687 }
688
689 /*
690 * atl1_intr - Interrupt Handler
691 * @irq: interrupt number
692 * @data: pointer to a network interface device structure
693 * @pt_regs: CPU registers structure
694 */
695 static irqreturn_t atl1_intr(int irq, void *data)
696 {
697 /*struct atl1_adapter *adapter = ((struct net_device *)data)->priv;*/
698 struct atl1_adapter *adapter = netdev_priv(data);
699 u32 status;
700 u8 update_rx;
701 int max_ints = 10;
702
703 status = adapter->cmb.cmb->int_stats;
704 if (!status)
705 return IRQ_NONE;
706
707 update_rx = 0;
708
709 do {
710 /* clear CMB interrupt status at once */
711 adapter->cmb.cmb->int_stats = 0;
712
713 if (status & ISR_GPHY) /* clear phy status */
714 atl1_clear_phy_int(adapter);
715
716 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
717 iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
718
719 /* check if SMB intr */
720 if (status & ISR_SMB)
721 atl1_inc_smb(adapter);
722
723 /* check if PCIE PHY Link down */
724 if (status & ISR_PHY_LINKDOWN) {
725 dev_dbg(&adapter->pdev->dev, "pcie phy link down %x\n",
726 status);
727 if (netif_running(adapter->netdev)) { /* reset MAC */
728 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
729 schedule_work(&adapter->pcie_dma_to_rst_task);
730 return IRQ_HANDLED;
731 }
732 }
733
734 /* check if DMA read/write error ? */
735 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
736 dev_dbg(&adapter->pdev->dev,
737 "pcie DMA r/w error (status = 0x%x)\n",
738 status);
739 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
740 schedule_work(&adapter->pcie_dma_to_rst_task);
741 return IRQ_HANDLED;
742 }
743
744 /* link event */
745 if (status & ISR_GPHY) {
746 adapter->soft_stats.tx_carrier_errors++;
747 atl1_check_for_link(adapter);
748 }
749
750 /* transmit event */
751 if (status & ISR_CMB_TX)
752 atl1_intr_tx(adapter);
753
754 /* rx exception */
755 if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
756 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
757 ISR_HOST_RRD_OV | ISR_CMB_RX))) {
758 if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
759 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
760 ISR_HOST_RRD_OV))
761 dev_dbg(&adapter->pdev->dev,
762 "rx exception, ISR = 0x%x\n", status);
763 atl1_intr_rx(adapter);
764 }
765
766 if (--max_ints < 0)
767 break;
768
769 } while ((status = adapter->cmb.cmb->int_stats));
770
771 /* re-enable Interrupt */
772 iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
773 return IRQ_HANDLED;
774 }
775
776 /*
777 * atl1_set_multi - Multicast and Promiscuous mode set
778 * @netdev: network interface device structure
779 *
780 * The set_multi entry point is called whenever the multicast address
781 * list or the network interface flags are updated. This routine is
782 * responsible for configuring the hardware for proper multicast,
783 * promiscuous mode, and all-multi behavior.
784 */
785 static void atl1_set_multi(struct net_device *netdev)
786 {
787 struct atl1_adapter *adapter = netdev_priv(netdev);
788 struct atl1_hw *hw = &adapter->hw;
789 struct dev_mc_list *mc_ptr;
790 u32 rctl;
791 u32 hash_value;
792
793 /* Check for Promiscuous and All Multicast modes */
794 rctl = ioread32(hw->hw_addr + REG_MAC_CTRL);
795 if (netdev->flags & IFF_PROMISC)
796 rctl |= MAC_CTRL_PROMIS_EN;
797 else if (netdev->flags & IFF_ALLMULTI) {
798 rctl |= MAC_CTRL_MC_ALL_EN;
799 rctl &= ~MAC_CTRL_PROMIS_EN;
800 } else
801 rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
802
803 iowrite32(rctl, hw->hw_addr + REG_MAC_CTRL);
804
805 /* clear the old settings from the multicast hash table */
806 iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
807 iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
808
809 /* compute mc addresses' hash value ,and put it into hash table */
810 for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
811 hash_value = atl1_hash_mc_addr(hw, mc_ptr->dmi_addr);
812 atl1_hash_set(hw, hash_value);
813 }
814 }
815
816 static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
817 {
818 u32 value;
819 struct atl1_hw *hw = &adapter->hw;
820 struct net_device *netdev = adapter->netdev;
821 /* Config MAC CTRL Register */
822 value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
823 /* duplex */
824 if (FULL_DUPLEX == adapter->link_duplex)
825 value |= MAC_CTRL_DUPLX;
826 /* speed */
827 value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
828 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
829 MAC_CTRL_SPEED_SHIFT);
830 /* flow control */
831 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
832 /* PAD & CRC */
833 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
834 /* preamble length */
835 value |= (((u32) adapter->hw.preamble_len
836 & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
837 /* vlan */
838 if (adapter->vlgrp)
839 value |= MAC_CTRL_RMV_VLAN;
840 /* rx checksum
841 if (adapter->rx_csum)
842 value |= MAC_CTRL_RX_CHKSUM_EN;
843 */
844 /* filter mode */
845 value |= MAC_CTRL_BC_EN;
846 if (netdev->flags & IFF_PROMISC)
847 value |= MAC_CTRL_PROMIS_EN;
848 else if (netdev->flags & IFF_ALLMULTI)
849 value |= MAC_CTRL_MC_ALL_EN;
850 /* value |= MAC_CTRL_LOOPBACK; */
851 iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
852 }
853
854 static u32 atl1_check_link(struct atl1_adapter *adapter)
855 {
856 struct atl1_hw *hw = &adapter->hw;
857 struct net_device *netdev = adapter->netdev;
858 u32 ret_val;
859 u16 speed, duplex, phy_data;
860 int reconfig = 0;
861
862 /* MII_BMSR must read twice */
863 atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
864 atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
865 if (!(phy_data & BMSR_LSTATUS)) { /* link down */
866 if (netif_carrier_ok(netdev)) { /* old link state: Up */
867 dev_info(&adapter->pdev->dev, "link is down\n");
868 adapter->link_speed = SPEED_0;
869 netif_carrier_off(netdev);
870 netif_stop_queue(netdev);
871 }
872 return ATL1_SUCCESS;
873 }
874
875 /* Link Up */
876 ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
877 if (ret_val)
878 return ret_val;
879
880 switch (hw->media_type) {
881 case MEDIA_TYPE_1000M_FULL:
882 if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
883 reconfig = 1;
884 break;
885 case MEDIA_TYPE_100M_FULL:
886 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
887 reconfig = 1;
888 break;
889 case MEDIA_TYPE_100M_HALF:
890 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
891 reconfig = 1;
892 break;
893 case MEDIA_TYPE_10M_FULL:
894 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
895 reconfig = 1;
896 break;
897 case MEDIA_TYPE_10M_HALF:
898 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
899 reconfig = 1;
900 break;
901 }
902
903 /* link result is our setting */
904 if (!reconfig) {
905 if (adapter->link_speed != speed
906 || adapter->link_duplex != duplex) {
907 adapter->link_speed = speed;
908 adapter->link_duplex = duplex;
909 atl1_setup_mac_ctrl(adapter);
910 dev_info(&adapter->pdev->dev,
911 "%s link is up %d Mbps %s\n",
912 netdev->name, adapter->link_speed,
913 adapter->link_duplex == FULL_DUPLEX ?
914 "full duplex" : "half duplex");
915 }
916 if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
917 netif_carrier_on(netdev);
918 netif_wake_queue(netdev);
919 }
920 return ATL1_SUCCESS;
921 }
922
923 /* change orignal link status */
924 if (netif_carrier_ok(netdev)) {
925 adapter->link_speed = SPEED_0;
926 netif_carrier_off(netdev);
927 netif_stop_queue(netdev);
928 }
929
930 if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
931 hw->media_type != MEDIA_TYPE_1000M_FULL) {
932 switch (hw->media_type) {
933 case MEDIA_TYPE_100M_FULL:
934 phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
935 MII_CR_RESET;
936 break;
937 case MEDIA_TYPE_100M_HALF:
938 phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
939 break;
940 case MEDIA_TYPE_10M_FULL:
941 phy_data =
942 MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
943 break;
944 default: /* MEDIA_TYPE_10M_HALF: */
945 phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
946 break;
947 }
948 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
949 return ATL1_SUCCESS;
950 }
951
952 /* auto-neg, insert timer to re-config phy */
953 if (!adapter->phy_timer_pending) {
954 adapter->phy_timer_pending = true;
955 mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
956 }
957
958 return ATL1_SUCCESS;
959 }
960
961 static void set_flow_ctrl_old(struct atl1_adapter *adapter)
962 {
963 u32 hi, lo, value;
964
965 /* RFD Flow Control */
966 value = adapter->rfd_ring.count;
967 hi = value / 16;
968 if (hi < 2)
969 hi = 2;
970 lo = value * 7 / 8;
971
972 value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
973 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
974 iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
975
976 /* RRD Flow Control */
977 value = adapter->rrd_ring.count;
978 lo = value / 16;
979 hi = value * 7 / 8;
980 if (lo < 2)
981 lo = 2;
982 value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
983 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
984 iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
985 }
986
987 static void set_flow_ctrl_new(struct atl1_hw *hw)
988 {
989 u32 hi, lo, value;
990
991 /* RXF Flow Control */
992 value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
993 lo = value / 16;
994 if (lo < 192)
995 lo = 192;
996 hi = value * 7 / 8;
997 if (hi < lo)
998 hi = lo + 16;
999 value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1000 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1001 iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1002
1003 /* RRD Flow Control */
1004 value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
1005 lo = value / 8;
1006 hi = value * 7 / 8;
1007 if (lo < 2)
1008 lo = 2;
1009 if (hi < lo)
1010 hi = lo + 3;
1011 value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1012 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1013 iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1014 }
1015
1016 /*
1017 * atl1_configure - Configure Transmit&Receive Unit after Reset
1018 * @adapter: board private structure
1019 *
1020 * Configure the Tx /Rx unit of the MAC after a reset.
1021 */
1022 static u32 atl1_configure(struct atl1_adapter *adapter)
1023 {
1024 struct atl1_hw *hw = &adapter->hw;
1025 u32 value;
1026
1027 /* clear interrupt status */
1028 iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
1029
1030 /* set MAC Address */
1031 value = (((u32) hw->mac_addr[2]) << 24) |
1032 (((u32) hw->mac_addr[3]) << 16) |
1033 (((u32) hw->mac_addr[4]) << 8) |
1034 (((u32) hw->mac_addr[5]));
1035 iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
1036 value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
1037 iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
1038
1039 /* tx / rx ring */
1040
1041 /* HI base address */
1042 iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
1043 hw->hw_addr + REG_DESC_BASE_ADDR_HI);
1044 /* LO base address */
1045 iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
1046 hw->hw_addr + REG_DESC_RFD_ADDR_LO);
1047 iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
1048 hw->hw_addr + REG_DESC_RRD_ADDR_LO);
1049 iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
1050 hw->hw_addr + REG_DESC_TPD_ADDR_LO);
1051 iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
1052 hw->hw_addr + REG_DESC_CMB_ADDR_LO);
1053 iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
1054 hw->hw_addr + REG_DESC_SMB_ADDR_LO);
1055
1056 /* element count */
1057 value = adapter->rrd_ring.count;
1058 value <<= 16;
1059 value += adapter->rfd_ring.count;
1060 iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
1061 iowrite32(adapter->tpd_ring.count, hw->hw_addr + REG_DESC_TPD_RING_SIZE);
1062
1063 /* Load Ptr */
1064 iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
1065
1066 /* config Mailbox */
1067 value = ((atomic_read(&adapter->tpd_ring.next_to_use)
1068 & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
1069 ((atomic_read(&adapter->rrd_ring.next_to_clean)
1070 & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
1071 ((atomic_read(&adapter->rfd_ring.next_to_use)
1072 & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
1073 iowrite32(value, hw->hw_addr + REG_MAILBOX);
1074
1075 /* config IPG/IFG */
1076 value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
1077 << MAC_IPG_IFG_IPGT_SHIFT) |
1078 (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
1079 << MAC_IPG_IFG_MIFG_SHIFT) |
1080 (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
1081 << MAC_IPG_IFG_IPGR1_SHIFT) |
1082 (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
1083 << MAC_IPG_IFG_IPGR2_SHIFT);
1084 iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
1085
1086 /* config Half-Duplex Control */
1087 value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
1088 (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
1089 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
1090 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
1091 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
1092 (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
1093 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
1094 iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
1095
1096 /* set Interrupt Moderator Timer */
1097 iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
1098 iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
1099
1100 /* set Interrupt Clear Timer */
1101 iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
1102
1103 /* set MTU, 4 : VLAN */
1104 iowrite32(hw->max_frame_size + 4, hw->hw_addr + REG_MTU);
1105
1106 /* jumbo size & rrd retirement timer */
1107 value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
1108 << RXQ_JMBOSZ_TH_SHIFT) |
1109 (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
1110 << RXQ_JMBO_LKAH_SHIFT) |
1111 (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
1112 << RXQ_RRD_TIMER_SHIFT);
1113 iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
1114
1115 /* Flow Control */
1116 switch (hw->dev_rev) {
1117 case 0x8001:
1118 case 0x9001:
1119 case 0x9002:
1120 case 0x9003:
1121 set_flow_ctrl_old(adapter);
1122 break;
1123 default:
1124 set_flow_ctrl_new(hw);
1125 break;
1126 }
1127
1128 /* config TXQ */
1129 value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
1130 << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
1131 (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
1132 << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
1133 (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
1134 << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN;
1135 iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
1136
1137 /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
1138 value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
1139 << TX_JUMBO_TASK_TH_SHIFT) |
1140 (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
1141 << TX_TPD_MIN_IPG_SHIFT);
1142 iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
1143
1144 /* config RXQ */
1145 value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
1146 << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
1147 (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
1148 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
1149 (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
1150 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) |
1151 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1152 iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
1153
1154 /* config DMA Engine */
1155 value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1156 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
1157 ((((u32) hw->dmaw_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1158 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
1159 DMA_CTRL_DMAR_EN | DMA_CTRL_DMAW_EN;
1160 value |= (u32) hw->dma_ord;
1161 if (atl1_rcb_128 == hw->rcb_value)
1162 value |= DMA_CTRL_RCB_VALUE;
1163 iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
1164
1165 /* config CMB / SMB */
1166 value = hw->cmb_rrd | ((u32) hw->cmb_tpd << 16);
1167 iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
1168 value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
1169 iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
1170 iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
1171
1172 /* --- enable CMB / SMB */
1173 value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
1174 iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
1175
1176 value = ioread32(adapter->hw.hw_addr + REG_ISR);
1177 if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
1178 value = 1; /* config failed */
1179 else
1180 value = 0;
1181
1182 /* clear all interrupt status */
1183 iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
1184 iowrite32(0, adapter->hw.hw_addr + REG_ISR);
1185 return value;
1186 }
1187
1188 /*
1189 * atl1_irq_disable - Mask off interrupt generation on the NIC
1190 * @adapter: board private structure
1191 */
1192 static void atl1_irq_disable(struct atl1_adapter *adapter)
1193 {
1194 atomic_inc(&adapter->irq_sem);
1195 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
1196 ioread32(adapter->hw.hw_addr + REG_IMR);
1197 synchronize_irq(adapter->pdev->irq);
1198 }
1199
1200 static void atl1_vlan_rx_register(struct net_device *netdev,
1201 struct vlan_group *grp)
1202 {
1203 struct atl1_adapter *adapter = netdev_priv(netdev);
1204 unsigned long flags;
1205 u32 ctrl;
1206
1207 spin_lock_irqsave(&adapter->lock, flags);
1208 /* atl1_irq_disable(adapter); */
1209 adapter->vlgrp = grp;
1210
1211 if (grp) {
1212 /* enable VLAN tag insert/strip */
1213 ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
1214 ctrl |= MAC_CTRL_RMV_VLAN;
1215 iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
1216 } else {
1217 /* disable VLAN tag insert/strip */
1218 ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
1219 ctrl &= ~MAC_CTRL_RMV_VLAN;
1220 iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
1221 }
1222
1223 /* atl1_irq_enable(adapter); */
1224 spin_unlock_irqrestore(&adapter->lock, flags);
1225 }
1226
1227 static void atl1_restore_vlan(struct atl1_adapter *adapter)
1228 {
1229 atl1_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1230 }
1231
1232 static u16 tpd_avail(struct atl1_tpd_ring *tpd_ring)
1233 {
1234 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1235 u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
1236 return ((next_to_clean >
1237 next_to_use) ? next_to_clean - next_to_use -
1238 1 : tpd_ring->count + next_to_clean - next_to_use - 1);
1239 }
1240
1241 static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
1242 struct tso_param *tso)
1243 {
1244 /* We enter this function holding a spinlock. */
1245 u8 ipofst;
1246 int err;
1247
1248 if (skb_shinfo(skb)->gso_size) {
1249 if (skb_header_cloned(skb)) {
1250 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1251 if (unlikely(err))
1252 return err;
1253 }
1254
1255 if (skb->protocol == ntohs(ETH_P_IP)) {
1256 struct iphdr *iph = ip_hdr(skb);
1257
1258 iph->tot_len = 0;
1259 iph->check = 0;
1260 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1261 iph->daddr, 0,
1262 IPPROTO_TCP,
1263 0);
1264 ipofst = skb_network_offset(skb);
1265 if (ipofst != ENET_HEADER_SIZE) /* 802.3 frame */
1266 tso->tsopl |= 1 << TSO_PARAM_ETHTYPE_SHIFT;
1267
1268 tso->tsopl |= (iph->ihl &
1269 CSUM_PARAM_IPHL_MASK) << CSUM_PARAM_IPHL_SHIFT;
1270 tso->tsopl |= (tcp_hdrlen(skb) &
1271 TSO_PARAM_TCPHDRLEN_MASK) << TSO_PARAM_TCPHDRLEN_SHIFT;
1272 tso->tsopl |= (skb_shinfo(skb)->gso_size &
1273 TSO_PARAM_MSS_MASK) << TSO_PARAM_MSS_SHIFT;
1274 tso->tsopl |= 1 << TSO_PARAM_IPCKSUM_SHIFT;
1275 tso->tsopl |= 1 << TSO_PARAM_TCPCKSUM_SHIFT;
1276 tso->tsopl |= 1 << TSO_PARAM_SEGMENT_SHIFT;
1277 return true;
1278 }
1279 }
1280 return false;
1281 }
1282
1283 static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
1284 struct csum_param *csum)
1285 {
1286 u8 css, cso;
1287
1288 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1289 cso = skb_transport_offset(skb);
1290 css = cso + skb->csum_offset;
1291 if (unlikely(cso & 0x1)) {
1292 dev_dbg(&adapter->pdev->dev,
1293 "payload offset not an even number\n");
1294 return -1;
1295 }
1296 csum->csumpl |= (cso & CSUM_PARAM_PLOADOFFSET_MASK) <<
1297 CSUM_PARAM_PLOADOFFSET_SHIFT;
1298 csum->csumpl |= (css & CSUM_PARAM_XSUMOFFSET_MASK) <<
1299 CSUM_PARAM_XSUMOFFSET_SHIFT;
1300 csum->csumpl |= 1 << CSUM_PARAM_CUSTOMCKSUM_SHIFT;
1301 return true;
1302 }
1303
1304 return true;
1305 }
1306
1307 static void atl1_tx_map(struct atl1_adapter *adapter,
1308 struct sk_buff *skb, bool tcp_seg)
1309 {
1310 /* We enter this function holding a spinlock. */
1311 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1312 struct atl1_buffer *buffer_info;
1313 struct page *page;
1314 int first_buf_len = skb->len;
1315 unsigned long offset;
1316 unsigned int nr_frags;
1317 unsigned int f;
1318 u16 tpd_next_to_use;
1319 u16 proto_hdr_len;
1320 u16 i, m, len12;
1321
1322 first_buf_len -= skb->data_len;
1323 nr_frags = skb_shinfo(skb)->nr_frags;
1324 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
1325 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1326 if (unlikely(buffer_info->skb))
1327 BUG();
1328 buffer_info->skb = NULL; /* put skb in last TPD */
1329
1330 if (tcp_seg) {
1331 /* TSO/GSO */
1332 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1333 buffer_info->length = proto_hdr_len;
1334 page = virt_to_page(skb->data);
1335 offset = (unsigned long)skb->data & ~PAGE_MASK;
1336 buffer_info->dma = pci_map_page(adapter->pdev, page,
1337 offset, proto_hdr_len,
1338 PCI_DMA_TODEVICE);
1339
1340 if (++tpd_next_to_use == tpd_ring->count)
1341 tpd_next_to_use = 0;
1342
1343 if (first_buf_len > proto_hdr_len) {
1344 len12 = first_buf_len - proto_hdr_len;
1345 m = (len12 + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1346 for (i = 0; i < m; i++) {
1347 buffer_info =
1348 &tpd_ring->buffer_info[tpd_next_to_use];
1349 buffer_info->skb = NULL;
1350 buffer_info->length =
1351 (MAX_TX_BUF_LEN >=
1352 len12) ? MAX_TX_BUF_LEN : len12;
1353 len12 -= buffer_info->length;
1354 page = virt_to_page(skb->data +
1355 (proto_hdr_len +
1356 i * MAX_TX_BUF_LEN));
1357 offset = (unsigned long)(skb->data +
1358 (proto_hdr_len +
1359 i * MAX_TX_BUF_LEN)) &
1360 ~PAGE_MASK;
1361 buffer_info->dma =
1362 pci_map_page(adapter->pdev, page, offset,
1363 buffer_info->length,
1364 PCI_DMA_TODEVICE);
1365 if (++tpd_next_to_use == tpd_ring->count)
1366 tpd_next_to_use = 0;
1367 }
1368 }
1369 } else {
1370 /* not TSO/GSO */
1371 buffer_info->length = first_buf_len;
1372 page = virt_to_page(skb->data);
1373 offset = (unsigned long)skb->data & ~PAGE_MASK;
1374 buffer_info->dma = pci_map_page(adapter->pdev, page,
1375 offset, first_buf_len,
1376 PCI_DMA_TODEVICE);
1377 if (++tpd_next_to_use == tpd_ring->count)
1378 tpd_next_to_use = 0;
1379 }
1380
1381 for (f = 0; f < nr_frags; f++) {
1382 struct skb_frag_struct *frag;
1383 u16 lenf, i, m;
1384
1385 frag = &skb_shinfo(skb)->frags[f];
1386 lenf = frag->size;
1387
1388 m = (lenf + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1389 for (i = 0; i < m; i++) {
1390 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1391 if (unlikely(buffer_info->skb))
1392 BUG();
1393 buffer_info->skb = NULL;
1394 buffer_info->length =
1395 (lenf > MAX_TX_BUF_LEN) ? MAX_TX_BUF_LEN : lenf;
1396 lenf -= buffer_info->length;
1397 buffer_info->dma =
1398 pci_map_page(adapter->pdev, frag->page,
1399 frag->page_offset + i * MAX_TX_BUF_LEN,
1400 buffer_info->length, PCI_DMA_TODEVICE);
1401
1402 if (++tpd_next_to_use == tpd_ring->count)
1403 tpd_next_to_use = 0;
1404 }
1405 }
1406
1407 /* last tpd's buffer-info */
1408 buffer_info->skb = skb;
1409 }
1410
1411 static void atl1_tx_queue(struct atl1_adapter *adapter, int count,
1412 union tpd_descr *descr)
1413 {
1414 /* We enter this function holding a spinlock. */
1415 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1416 int j;
1417 u32 val;
1418 struct atl1_buffer *buffer_info;
1419 struct tx_packet_desc *tpd;
1420 u16 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
1421
1422 for (j = 0; j < count; j++) {
1423 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1424 tpd = ATL1_TPD_DESC(&adapter->tpd_ring, tpd_next_to_use);
1425 tpd->desc.csum.csumpu = descr->csum.csumpu;
1426 tpd->desc.csum.csumpl = descr->csum.csumpl;
1427 tpd->desc.tso.tsopu = descr->tso.tsopu;
1428 tpd->desc.tso.tsopl = descr->tso.tsopl;
1429 tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
1430 tpd->desc.data = descr->data;
1431 tpd->desc.csum.csumpu |= (cpu_to_le16(buffer_info->length) &
1432 CSUM_PARAM_BUFLEN_MASK) << CSUM_PARAM_BUFLEN_SHIFT;
1433
1434 val = (descr->tso.tsopl >> TSO_PARAM_SEGMENT_SHIFT) &
1435 TSO_PARAM_SEGMENT_MASK;
1436 if (val && !j)
1437 tpd->desc.tso.tsopl |= 1 << TSO_PARAM_HDRFLAG_SHIFT;
1438
1439 if (j == (count - 1))
1440 tpd->desc.csum.csumpl |= 1 << CSUM_PARAM_EOP_SHIFT;
1441
1442 if (++tpd_next_to_use == tpd_ring->count)
1443 tpd_next_to_use = 0;
1444 }
1445 /*
1446 * Force memory writes to complete before letting h/w
1447 * know there are new descriptors to fetch. (Only
1448 * applicable for weak-ordered memory model archs,
1449 * such as IA-64).
1450 */
1451 wmb();
1452
1453 atomic_set(&tpd_ring->next_to_use, (int)tpd_next_to_use);
1454 }
1455
1456 static void atl1_update_mailbox(struct atl1_adapter *adapter)
1457 {
1458 unsigned long flags;
1459 u32 tpd_next_to_use;
1460 u32 rfd_next_to_use;
1461 u32 rrd_next_to_clean;
1462 u32 value;
1463
1464 spin_lock_irqsave(&adapter->mb_lock, flags);
1465
1466 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1467 rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
1468 rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
1469
1470 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1471 MB_RFD_PROD_INDX_SHIFT) |
1472 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1473 MB_RRD_CONS_INDX_SHIFT) |
1474 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1475 MB_TPD_PROD_INDX_SHIFT);
1476 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1477
1478 spin_unlock_irqrestore(&adapter->mb_lock, flags);
1479 }
1480
1481 static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1482 {
1483 struct atl1_adapter *adapter = netdev_priv(netdev);
1484 int len = skb->len;
1485 int tso;
1486 int count = 1;
1487 int ret_val;
1488 u32 val;
1489 union tpd_descr param;
1490 u16 frag_size;
1491 u16 vlan_tag;
1492 unsigned long flags;
1493 unsigned int nr_frags = 0;
1494 unsigned int mss = 0;
1495 unsigned int f;
1496 unsigned int proto_hdr_len;
1497
1498 len -= skb->data_len;
1499
1500 if (unlikely(skb->len == 0)) {
1501 dev_kfree_skb_any(skb);
1502 return NETDEV_TX_OK;
1503 }
1504
1505 param.data = 0;
1506 param.tso.tsopu = 0;
1507 param.tso.tsopl = 0;
1508 param.csum.csumpu = 0;
1509 param.csum.csumpl = 0;
1510
1511 /* nr_frags will be nonzero if we're doing scatter/gather (SG) */
1512 nr_frags = skb_shinfo(skb)->nr_frags;
1513 for (f = 0; f < nr_frags; f++) {
1514 frag_size = skb_shinfo(skb)->frags[f].size;
1515 if (frag_size)
1516 count +=
1517 (frag_size + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1518 }
1519
1520 /* mss will be nonzero if we're doing segment offload (TSO/GSO) */
1521 mss = skb_shinfo(skb)->gso_size;
1522 if (mss) {
1523 if (skb->protocol == htons(ETH_P_IP)) {
1524 proto_hdr_len = (skb_transport_offset(skb) +
1525 tcp_hdrlen(skb));
1526 if (unlikely(proto_hdr_len > len)) {
1527 dev_kfree_skb_any(skb);
1528 return NETDEV_TX_OK;
1529 }
1530 /* need additional TPD ? */
1531 if (proto_hdr_len != len)
1532 count += (len - proto_hdr_len +
1533 MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1534 }
1535 }
1536
1537 local_irq_save(flags);
1538 if (!spin_trylock(&adapter->lock)) {
1539 /* Can't get lock - tell upper layer to requeue */
1540 local_irq_restore(flags);
1541 dev_dbg(&adapter->pdev->dev, "tx locked\n");
1542 return NETDEV_TX_LOCKED;
1543 }
1544
1545 if (tpd_avail(&adapter->tpd_ring) < count) {
1546 /* not enough descriptors */
1547 netif_stop_queue(netdev);
1548 spin_unlock_irqrestore(&adapter->lock, flags);
1549 dev_dbg(&adapter->pdev->dev, "tx busy\n");
1550 return NETDEV_TX_BUSY;
1551 }
1552
1553 param.data = 0;
1554
1555 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
1556 vlan_tag = vlan_tx_tag_get(skb);
1557 vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
1558 ((vlan_tag >> 9) & 0x8);
1559 param.csum.csumpl |= 1 << CSUM_PARAM_INSVLAG_SHIFT;
1560 param.csum.csumpu |= (vlan_tag & CSUM_PARAM_VALANTAG_MASK) <<
1561 CSUM_PARAM_VALAN_SHIFT;
1562 }
1563
1564 tso = atl1_tso(adapter, skb, &param.tso);
1565 if (tso < 0) {
1566 spin_unlock_irqrestore(&adapter->lock, flags);
1567 dev_kfree_skb_any(skb);
1568 return NETDEV_TX_OK;
1569 }
1570
1571 if (!tso) {
1572 ret_val = atl1_tx_csum(adapter, skb, &param.csum);
1573 if (ret_val < 0) {
1574 spin_unlock_irqrestore(&adapter->lock, flags);
1575 dev_kfree_skb_any(skb);
1576 return NETDEV_TX_OK;
1577 }
1578 }
1579
1580 val = (param.csum.csumpl >> CSUM_PARAM_SEGMENT_SHIFT) &
1581 CSUM_PARAM_SEGMENT_MASK;
1582 atl1_tx_map(adapter, skb, 1 == val);
1583 atl1_tx_queue(adapter, count, &param);
1584 netdev->trans_start = jiffies;
1585 spin_unlock_irqrestore(&adapter->lock, flags);
1586 atl1_update_mailbox(adapter);
1587 return NETDEV_TX_OK;
1588 }
1589
1590 /*
1591 * atl1_get_stats - Get System Network Statistics
1592 * @netdev: network interface device structure
1593 *
1594 * Returns the address of the device statistics structure.
1595 * The statistics are actually updated from the timer callback.
1596 */
1597 static struct net_device_stats *atl1_get_stats(struct net_device *netdev)
1598 {
1599 struct atl1_adapter *adapter = netdev_priv(netdev);
1600 return &adapter->net_stats;
1601 }
1602
1603 /*
1604 * atl1_clean_rx_ring - Free RFD Buffers
1605 * @adapter: board private structure
1606 */
1607 static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
1608 {
1609 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1610 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1611 struct atl1_buffer *buffer_info;
1612 struct pci_dev *pdev = adapter->pdev;
1613 unsigned long size;
1614 unsigned int i;
1615
1616 /* Free all the Rx ring sk_buffs */
1617 for (i = 0; i < rfd_ring->count; i++) {
1618 buffer_info = &rfd_ring->buffer_info[i];
1619 if (buffer_info->dma) {
1620 pci_unmap_page(pdev,
1621 buffer_info->dma,
1622 buffer_info->length,
1623 PCI_DMA_FROMDEVICE);
1624 buffer_info->dma = 0;
1625 }
1626 if (buffer_info->skb) {
1627 dev_kfree_skb(buffer_info->skb);
1628 buffer_info->skb = NULL;
1629 }
1630 }
1631
1632 size = sizeof(struct atl1_buffer) * rfd_ring->count;
1633 memset(rfd_ring->buffer_info, 0, size);
1634
1635 /* Zero out the descriptor ring */
1636 memset(rfd_ring->desc, 0, rfd_ring->size);
1637
1638 rfd_ring->next_to_clean = 0;
1639 atomic_set(&rfd_ring->next_to_use, 0);
1640
1641 rrd_ring->next_to_use = 0;
1642 atomic_set(&rrd_ring->next_to_clean, 0);
1643 }
1644
1645 /*
1646 * atl1_clean_tx_ring - Free Tx Buffers
1647 * @adapter: board private structure
1648 */
1649 static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
1650 {
1651 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1652 struct atl1_buffer *buffer_info;
1653 struct pci_dev *pdev = adapter->pdev;
1654 unsigned long size;
1655 unsigned int i;
1656
1657 /* Free all the Tx ring sk_buffs */
1658 for (i = 0; i < tpd_ring->count; i++) {
1659 buffer_info = &tpd_ring->buffer_info[i];
1660 if (buffer_info->dma) {
1661 pci_unmap_page(pdev, buffer_info->dma,
1662 buffer_info->length, PCI_DMA_TODEVICE);
1663 buffer_info->dma = 0;
1664 }
1665 }
1666
1667 for (i = 0; i < tpd_ring->count; i++) {
1668 buffer_info = &tpd_ring->buffer_info[i];
1669 if (buffer_info->skb) {
1670 dev_kfree_skb_any(buffer_info->skb);
1671 buffer_info->skb = NULL;
1672 }
1673 }
1674
1675 size = sizeof(struct atl1_buffer) * tpd_ring->count;
1676 memset(tpd_ring->buffer_info, 0, size);
1677
1678 /* Zero out the descriptor ring */
1679 memset(tpd_ring->desc, 0, tpd_ring->size);
1680
1681 atomic_set(&tpd_ring->next_to_use, 0);
1682 atomic_set(&tpd_ring->next_to_clean, 0);
1683 }
1684
1685 /*
1686 * atl1_free_ring_resources - Free Tx / RX descriptor Resources
1687 * @adapter: board private structure
1688 *
1689 * Free all transmit software resources
1690 */
1691 void atl1_free_ring_resources(struct atl1_adapter *adapter)
1692 {
1693 struct pci_dev *pdev = adapter->pdev;
1694 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1695 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1696 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1697 struct atl1_ring_header *ring_header = &adapter->ring_header;
1698
1699 atl1_clean_tx_ring(adapter);
1700 atl1_clean_rx_ring(adapter);
1701
1702 kfree(tpd_ring->buffer_info);
1703 pci_free_consistent(pdev, ring_header->size, ring_header->desc,
1704 ring_header->dma);
1705
1706 tpd_ring->buffer_info = NULL;
1707 tpd_ring->desc = NULL;
1708 tpd_ring->dma = 0;
1709
1710 rfd_ring->buffer_info = NULL;
1711 rfd_ring->desc = NULL;
1712 rfd_ring->dma = 0;
1713
1714 rrd_ring->desc = NULL;
1715 rrd_ring->dma = 0;
1716 }
1717
1718 s32 atl1_up(struct atl1_adapter *adapter)
1719 {
1720 struct net_device *netdev = adapter->netdev;
1721 int err;
1722 int irq_flags = IRQF_SAMPLE_RANDOM;
1723
1724 /* hardware has been reset, we need to reload some things */
1725 atl1_set_multi(netdev);
1726 atl1_restore_vlan(adapter);
1727 err = atl1_alloc_rx_buffers(adapter);
1728 if (unlikely(!err)) /* no RX BUFFER allocated */
1729 return -ENOMEM;
1730
1731 if (unlikely(atl1_configure(adapter))) {
1732 err = -EIO;
1733 goto err_up;
1734 }
1735
1736 err = pci_enable_msi(adapter->pdev);
1737 if (err) {
1738 dev_info(&adapter->pdev->dev,
1739 "Unable to enable MSI: %d\n", err);
1740 irq_flags |= IRQF_SHARED;
1741 }
1742
1743 err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
1744 netdev->name, netdev);
1745 if (unlikely(err))
1746 goto err_up;
1747
1748 mod_timer(&adapter->watchdog_timer, jiffies);
1749 atl1_irq_enable(adapter);
1750 atl1_check_link(adapter);
1751 return 0;
1752
1753 /* FIXME: unreachable code! -- CHS */
1754 /* free irq disable any interrupt */
1755 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
1756 free_irq(adapter->pdev->irq, netdev);
1757
1758 err_up:
1759 pci_disable_msi(adapter->pdev);
1760 /* free rx_buffers */
1761 atl1_clean_rx_ring(adapter);
1762 return err;
1763 }
1764
1765 void atl1_down(struct atl1_adapter *adapter)
1766 {
1767 struct net_device *netdev = adapter->netdev;
1768
1769 del_timer_sync(&adapter->watchdog_timer);
1770 del_timer_sync(&adapter->phy_config_timer);
1771 adapter->phy_timer_pending = false;
1772
1773 atl1_irq_disable(adapter);
1774 free_irq(adapter->pdev->irq, netdev);
1775 pci_disable_msi(adapter->pdev);
1776 atl1_reset_hw(&adapter->hw);
1777 adapter->cmb.cmb->int_stats = 0;
1778
1779 adapter->link_speed = SPEED_0;
1780 adapter->link_duplex = -1;
1781 netif_carrier_off(netdev);
1782 netif_stop_queue(netdev);
1783
1784 atl1_clean_tx_ring(adapter);
1785 atl1_clean_rx_ring(adapter);
1786 }
1787
1788 /*
1789 * atl1_change_mtu - Change the Maximum Transfer Unit
1790 * @netdev: network interface device structure
1791 * @new_mtu: new value for maximum frame size
1792 *
1793 * Returns 0 on success, negative on failure
1794 */
1795 static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
1796 {
1797 struct atl1_adapter *adapter = netdev_priv(netdev);
1798 int old_mtu = netdev->mtu;
1799 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1800
1801 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
1802 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
1803 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
1804 return -EINVAL;
1805 }
1806
1807 adapter->hw.max_frame_size = max_frame;
1808 adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
1809 adapter->rx_buffer_len = (max_frame + 7) & ~7;
1810 adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
1811
1812 netdev->mtu = new_mtu;
1813 if ((old_mtu != new_mtu) && netif_running(netdev)) {
1814 atl1_down(adapter);
1815 atl1_up(adapter);
1816 }
1817
1818 return 0;
1819 }
1820
1821 /*
1822 * atl1_set_mac - Change the Ethernet Address of the NIC
1823 * @netdev: network interface device structure
1824 * @p: pointer to an address structure
1825 *
1826 * Returns 0 on success, negative on failure
1827 */
1828 static int atl1_set_mac(struct net_device *netdev, void *p)
1829 {
1830 struct atl1_adapter *adapter = netdev_priv(netdev);
1831 struct sockaddr *addr = p;
1832
1833 if (netif_running(netdev))
1834 return -EBUSY;
1835
1836 if (!is_valid_ether_addr(addr->sa_data))
1837 return -EADDRNOTAVAIL;
1838
1839 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1840 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
1841
1842 atl1_set_mac_addr(&adapter->hw);
1843 return 0;
1844 }
1845
1846 /*
1847 * atl1_watchdog - Timer Call-back
1848 * @data: pointer to netdev cast into an unsigned long
1849 */
1850 static void atl1_watchdog(unsigned long data)
1851 {
1852 struct atl1_adapter *adapter = (struct atl1_adapter *)data;
1853
1854 /* Reset the timer */
1855 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1856 }
1857
1858 static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
1859 {
1860 struct atl1_adapter *adapter = netdev_priv(netdev);
1861 u16 result;
1862
1863 atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
1864
1865 return result;
1866 }
1867
1868 static void mdio_write(struct net_device *netdev, int phy_id, int reg_num, int val)
1869 {
1870 struct atl1_adapter *adapter = netdev_priv(netdev);
1871
1872 atl1_write_phy_reg(&adapter->hw, reg_num, val);
1873 }
1874
1875 /*
1876 * atl1_mii_ioctl -
1877 * @netdev:
1878 * @ifreq:
1879 * @cmd:
1880 */
1881 static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1882 {
1883 struct atl1_adapter *adapter = netdev_priv(netdev);
1884 unsigned long flags;
1885 int retval;
1886
1887 if (!netif_running(netdev))
1888 return -EINVAL;
1889
1890 spin_lock_irqsave(&adapter->lock, flags);
1891 retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
1892 spin_unlock_irqrestore(&adapter->lock, flags);
1893
1894 return retval;
1895 }
1896
1897 /*
1898 * atl1_ioctl -
1899 * @netdev:
1900 * @ifreq:
1901 * @cmd:
1902 */
1903 static int atl1_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1904 {
1905 switch (cmd) {
1906 case SIOCGMIIPHY:
1907 case SIOCGMIIREG:
1908 case SIOCSMIIREG:
1909 return atl1_mii_ioctl(netdev, ifr, cmd);
1910 default:
1911 return -EOPNOTSUPP;
1912 }
1913 }
1914
1915 /*
1916 * atl1_tx_timeout - Respond to a Tx Hang
1917 * @netdev: network interface device structure
1918 */
1919 static void atl1_tx_timeout(struct net_device *netdev)
1920 {
1921 struct atl1_adapter *adapter = netdev_priv(netdev);
1922 /* Do the reset outside of interrupt context */
1923 schedule_work(&adapter->tx_timeout_task);
1924 }
1925
1926 /*
1927 * atl1_phy_config - Timer Call-back
1928 * @data: pointer to netdev cast into an unsigned long
1929 */
1930 static void atl1_phy_config(unsigned long data)
1931 {
1932 struct atl1_adapter *adapter = (struct atl1_adapter *)data;
1933 struct atl1_hw *hw = &adapter->hw;
1934 unsigned long flags;
1935
1936 spin_lock_irqsave(&adapter->lock, flags);
1937 adapter->phy_timer_pending = false;
1938 atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
1939 atl1_write_phy_reg(hw, MII_AT001_CR, hw->mii_1000t_ctrl_reg);
1940 atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
1941 spin_unlock_irqrestore(&adapter->lock, flags);
1942 }
1943
1944 int atl1_reset(struct atl1_adapter *adapter)
1945 {
1946 int ret;
1947
1948 ret = atl1_reset_hw(&adapter->hw);
1949 if (ret != ATL1_SUCCESS)
1950 return ret;
1951 return atl1_init_hw(&adapter->hw);
1952 }
1953
1954 /*
1955 * atl1_open - Called when a network interface is made active
1956 * @netdev: network interface device structure
1957 *
1958 * Returns 0 on success, negative value on failure
1959 *
1960 * The open entry point is called when a network interface is made
1961 * active by the system (IFF_UP). At this point all resources needed
1962 * for transmit and receive operations are allocated, the interrupt
1963 * handler is registered with the OS, the watchdog timer is started,
1964 * and the stack is notified that the interface is ready.
1965 */
1966 static int atl1_open(struct net_device *netdev)
1967 {
1968 struct atl1_adapter *adapter = netdev_priv(netdev);
1969 int err;
1970
1971 /* allocate transmit descriptors */
1972 err = atl1_setup_ring_resources(adapter);
1973 if (err)
1974 return err;
1975
1976 err = atl1_up(adapter);
1977 if (err)
1978 goto err_up;
1979
1980 return 0;
1981
1982 err_up:
1983 atl1_reset(adapter);
1984 return err;
1985 }
1986
1987 /*
1988 * atl1_close - Disables a network interface
1989 * @netdev: network interface device structure
1990 *
1991 * Returns 0, this is not allowed to fail
1992 *
1993 * The close entry point is called when an interface is de-activated
1994 * by the OS. The hardware is still under the drivers control, but
1995 * needs to be disabled. A global MAC reset is issued to stop the
1996 * hardware, and all transmit and receive resources are freed.
1997 */
1998 static int atl1_close(struct net_device *netdev)
1999 {
2000 struct atl1_adapter *adapter = netdev_priv(netdev);
2001 atl1_down(adapter);
2002 atl1_free_ring_resources(adapter);
2003 return 0;
2004 }
2005
2006 #ifdef CONFIG_NET_POLL_CONTROLLER
2007 static void atl1_poll_controller(struct net_device *netdev)
2008 {
2009 disable_irq(netdev->irq);
2010 atl1_intr(netdev->irq, netdev);
2011 enable_irq(netdev->irq);
2012 }
2013 #endif
2014
2015 /*
2016 * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
2017 * will assert. We do soft reset <0x1400=1> according
2018 * with the SPEC. BUT, it seemes that PCIE or DMA
2019 * state-machine will not be reset. DMAR_TO_INT will
2020 * assert again and again.
2021 */
2022 static void atl1_tx_timeout_task(struct work_struct *work)
2023 {
2024 struct atl1_adapter *adapter =
2025 container_of(work, struct atl1_adapter, tx_timeout_task);
2026 struct net_device *netdev = adapter->netdev;
2027
2028 netif_device_detach(netdev);
2029 atl1_down(adapter);
2030 atl1_up(adapter);
2031 netif_device_attach(netdev);
2032 }
2033
2034 /*
2035 * atl1_link_chg_task - deal with link change event Out of interrupt context
2036 */
2037 static void atl1_link_chg_task(struct work_struct *work)
2038 {
2039 struct atl1_adapter *adapter =
2040 container_of(work, struct atl1_adapter, link_chg_task);
2041 unsigned long flags;
2042
2043 spin_lock_irqsave(&adapter->lock, flags);
2044 atl1_check_link(adapter);
2045 spin_unlock_irqrestore(&adapter->lock, flags);
2046 }
2047
2048 /*
2049 * atl1_pcie_patch - Patch for PCIE module
2050 */
2051 static void atl1_pcie_patch(struct atl1_adapter *adapter)
2052 {
2053 u32 value;
2054 value = 0x6500;
2055 iowrite32(value, adapter->hw.hw_addr + 0x12FC);
2056 /* pcie flow control mode change */
2057 value = ioread32(adapter->hw.hw_addr + 0x1008);
2058 value |= 0x8000;
2059 iowrite32(value, adapter->hw.hw_addr + 0x1008);
2060 }
2061
2062 /*
2063 * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
2064 * on PCI Command register is disable.
2065 * The function enable this bit.
2066 * Brackett, 2006/03/15
2067 */
2068 static void atl1_via_workaround(struct atl1_adapter *adapter)
2069 {
2070 unsigned long value;
2071
2072 value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
2073 if (value & PCI_COMMAND_INTX_DISABLE)
2074 value &= ~PCI_COMMAND_INTX_DISABLE;
2075 iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
2076 }
2077
2078 /*
2079 * atl1_probe - Device Initialization Routine
2080 * @pdev: PCI device information struct
2081 * @ent: entry in atl1_pci_tbl
2082 *
2083 * Returns 0 on success, negative on failure
2084 *
2085 * atl1_probe initializes an adapter identified by a pci_dev structure.
2086 * The OS initialization, configuring of the adapter private structure,
2087 * and a hardware reset occur.
2088 */
2089 static int __devinit atl1_probe(struct pci_dev *pdev,
2090 const struct pci_device_id *ent)
2091 {
2092 struct net_device *netdev;
2093 struct atl1_adapter *adapter;
2094 static int cards_found = 0;
2095 bool pci_using_64 = true;
2096 int err;
2097
2098 err = pci_enable_device(pdev);
2099 if (err)
2100 return err;
2101
2102 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
2103 if (err) {
2104 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2105 if (err) {
2106 dev_err(&pdev->dev, "no usable DMA configuration\n");
2107 goto err_dma;
2108 }
2109 pci_using_64 = false;
2110 }
2111 /* Mark all PCI regions associated with PCI device
2112 * pdev as being reserved by owner atl1_driver_name
2113 */
2114 err = pci_request_regions(pdev, atl1_driver_name);
2115 if (err)
2116 goto err_request_regions;
2117
2118 /* Enables bus-mastering on the device and calls
2119 * pcibios_set_master to do the needed arch specific settings
2120 */
2121 pci_set_master(pdev);
2122
2123 netdev = alloc_etherdev(sizeof(struct atl1_adapter));
2124 if (!netdev) {
2125 err = -ENOMEM;
2126 goto err_alloc_etherdev;
2127 }
2128 SET_MODULE_OWNER(netdev);
2129 SET_NETDEV_DEV(netdev, &pdev->dev);
2130
2131 pci_set_drvdata(pdev, netdev);
2132 adapter = netdev_priv(netdev);
2133 adapter->netdev = netdev;
2134 adapter->pdev = pdev;
2135 adapter->hw.back = adapter;
2136
2137 adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
2138 if (!adapter->hw.hw_addr) {
2139 err = -EIO;
2140 goto err_pci_iomap;
2141 }
2142 /* get device revision number */
2143 adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
2144 (REG_MASTER_CTRL + 2));
2145 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
2146
2147 /* set default ring resource counts */
2148 adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
2149 adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
2150
2151 adapter->mii.dev = netdev;
2152 adapter->mii.mdio_read = mdio_read;
2153 adapter->mii.mdio_write = mdio_write;
2154 adapter->mii.phy_id_mask = 0x1f;
2155 adapter->mii.reg_num_mask = 0x1f;
2156
2157 netdev->open = &atl1_open;
2158 netdev->stop = &atl1_close;
2159 netdev->hard_start_xmit = &atl1_xmit_frame;
2160 netdev->get_stats = &atl1_get_stats;
2161 netdev->set_multicast_list = &atl1_set_multi;
2162 netdev->set_mac_address = &atl1_set_mac;
2163 netdev->change_mtu = &atl1_change_mtu;
2164 netdev->do_ioctl = &atl1_ioctl;
2165 netdev->tx_timeout = &atl1_tx_timeout;
2166 netdev->watchdog_timeo = 5 * HZ;
2167 #ifdef CONFIG_NET_POLL_CONTROLLER
2168 netdev->poll_controller = atl1_poll_controller;
2169 #endif
2170 netdev->vlan_rx_register = atl1_vlan_rx_register;
2171
2172 netdev->ethtool_ops = &atl1_ethtool_ops;
2173 adapter->bd_number = cards_found;
2174 adapter->pci_using_64 = pci_using_64;
2175
2176 /* setup the private structure */
2177 err = atl1_sw_init(adapter);
2178 if (err)
2179 goto err_common;
2180
2181 netdev->features = NETIF_F_HW_CSUM;
2182 netdev->features |= NETIF_F_SG;
2183 netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
2184
2185 /*
2186 * FIXME - Until tso performance gets fixed, disable the feature.
2187 * Enable it with ethtool -K if desired.
2188 */
2189 /* netdev->features |= NETIF_F_TSO; */
2190
2191 if (pci_using_64)
2192 netdev->features |= NETIF_F_HIGHDMA;
2193
2194 netdev->features |= NETIF_F_LLTX;
2195
2196 /*
2197 * patch for some L1 of old version,
2198 * the final version of L1 may not need these
2199 * patches
2200 */
2201 /* atl1_pcie_patch(adapter); */
2202
2203 /* really reset GPHY core */
2204 iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
2205
2206 /*
2207 * reset the controller to
2208 * put the device in a known good starting state
2209 */
2210 if (atl1_reset_hw(&adapter->hw)) {
2211 err = -EIO;
2212 goto err_common;
2213 }
2214
2215 /* copy the MAC address out of the EEPROM */
2216 atl1_read_mac_addr(&adapter->hw);
2217 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2218
2219 if (!is_valid_ether_addr(netdev->dev_addr)) {
2220 err = -EIO;
2221 goto err_common;
2222 }
2223
2224 atl1_check_options(adapter);
2225
2226 /* pre-init the MAC, and setup link */
2227 err = atl1_init_hw(&adapter->hw);
2228 if (err) {
2229 err = -EIO;
2230 goto err_common;
2231 }
2232
2233 atl1_pcie_patch(adapter);
2234 /* assume we have no link for now */
2235 netif_carrier_off(netdev);
2236 netif_stop_queue(netdev);
2237
2238 init_timer(&adapter->watchdog_timer);
2239 adapter->watchdog_timer.function = &atl1_watchdog;
2240 adapter->watchdog_timer.data = (unsigned long)adapter;
2241
2242 init_timer(&adapter->phy_config_timer);
2243 adapter->phy_config_timer.function = &atl1_phy_config;
2244 adapter->phy_config_timer.data = (unsigned long)adapter;
2245 adapter->phy_timer_pending = false;
2246
2247 INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
2248
2249 INIT_WORK(&adapter->link_chg_task, atl1_link_chg_task);
2250
2251 INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
2252
2253 err = register_netdev(netdev);
2254 if (err)
2255 goto err_common;
2256
2257 cards_found++;
2258 atl1_via_workaround(adapter);
2259 return 0;
2260
2261 err_common:
2262 pci_iounmap(pdev, adapter->hw.hw_addr);
2263 err_pci_iomap:
2264 free_netdev(netdev);
2265 err_alloc_etherdev:
2266 pci_release_regions(pdev);
2267 err_dma:
2268 err_request_regions:
2269 pci_disable_device(pdev);
2270 return err;
2271 }
2272
2273 /*
2274 * atl1_remove - Device Removal Routine
2275 * @pdev: PCI device information struct
2276 *
2277 * atl1_remove is called by the PCI subsystem to alert the driver
2278 * that it should release a PCI device. The could be caused by a
2279 * Hot-Plug event, or because the driver is going to be removed from
2280 * memory.
2281 */
2282 static void __devexit atl1_remove(struct pci_dev *pdev)
2283 {
2284 struct net_device *netdev = pci_get_drvdata(pdev);
2285 struct atl1_adapter *adapter;
2286 /* Device not available. Return. */
2287 if (!netdev)
2288 return;
2289
2290 adapter = netdev_priv(netdev);
2291
2292 /* Some atl1 boards lack persistent storage for their MAC, and get it
2293 * from the BIOS during POST. If we've been messing with the MAC
2294 * address, we need to save the permanent one.
2295 */
2296 if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
2297 memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN);
2298 atl1_set_mac_addr(&adapter->hw);
2299 }
2300
2301 iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
2302 unregister_netdev(netdev);
2303 pci_iounmap(pdev, adapter->hw.hw_addr);
2304 pci_release_regions(pdev);
2305 free_netdev(netdev);
2306 pci_disable_device(pdev);
2307 }
2308
2309 #ifdef CONFIG_PM
2310 static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
2311 {
2312 struct net_device *netdev = pci_get_drvdata(pdev);
2313 struct atl1_adapter *adapter = netdev_priv(netdev);
2314 struct atl1_hw *hw = &adapter->hw;
2315 u32 ctrl = 0;
2316 u32 wufc = adapter->wol;
2317
2318 netif_device_detach(netdev);
2319 if (netif_running(netdev))
2320 atl1_down(adapter);
2321
2322 atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2323 atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2324 if (ctrl & BMSR_LSTATUS)
2325 wufc &= ~ATL1_WUFC_LNKC;
2326
2327 /* reduce speed to 10/100M */
2328 if (wufc) {
2329 atl1_phy_enter_power_saving(hw);
2330 /* if resume, let driver to re- setup link */
2331 hw->phy_configured = false;
2332 atl1_set_mac_addr(hw);
2333 atl1_set_multi(netdev);
2334
2335 ctrl = 0;
2336 /* turn on magic packet wol */
2337 if (wufc & ATL1_WUFC_MAG)
2338 ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2339
2340 /* turn on Link change WOL */
2341 if (wufc & ATL1_WUFC_LNKC)
2342 ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
2343 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2344
2345 /* turn on all-multi mode if wake on multicast is enabled */
2346 ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL);
2347 ctrl &= ~MAC_CTRL_DBG;
2348 ctrl &= ~MAC_CTRL_PROMIS_EN;
2349 if (wufc & ATL1_WUFC_MC)
2350 ctrl |= MAC_CTRL_MC_ALL_EN;
2351 else
2352 ctrl &= ~MAC_CTRL_MC_ALL_EN;
2353
2354 /* turn on broadcast mode if wake on-BC is enabled */
2355 if (wufc & ATL1_WUFC_BC)
2356 ctrl |= MAC_CTRL_BC_EN;
2357 else
2358 ctrl &= ~MAC_CTRL_BC_EN;
2359
2360 /* enable RX */
2361 ctrl |= MAC_CTRL_RX_EN;
2362 iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
2363 pci_enable_wake(pdev, PCI_D3hot, 1);
2364 pci_enable_wake(pdev, PCI_D3cold, 1); /* 4 == D3 cold */
2365 } else {
2366 iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
2367 pci_enable_wake(pdev, PCI_D3hot, 0);
2368 pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
2369 }
2370
2371 pci_save_state(pdev);
2372 pci_disable_device(pdev);
2373
2374 pci_set_power_state(pdev, PCI_D3hot);
2375
2376 return 0;
2377 }
2378
2379 static int atl1_resume(struct pci_dev *pdev)
2380 {
2381 struct net_device *netdev = pci_get_drvdata(pdev);
2382 struct atl1_adapter *adapter = netdev_priv(netdev);
2383 u32 ret_val;
2384
2385 pci_set_power_state(pdev, 0);
2386 pci_restore_state(pdev);
2387
2388 ret_val = pci_enable_device(pdev);
2389 pci_enable_wake(pdev, PCI_D3hot, 0);
2390 pci_enable_wake(pdev, PCI_D3cold, 0);
2391
2392 iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
2393 atl1_reset(adapter);
2394
2395 if (netif_running(netdev))
2396 atl1_up(adapter);
2397 netif_device_attach(netdev);
2398
2399 atl1_via_workaround(adapter);
2400
2401 return 0;
2402 }
2403 #else
2404 #define atl1_suspend NULL
2405 #define atl1_resume NULL
2406 #endif
2407
2408 static struct pci_driver atl1_driver = {
2409 .name = atl1_driver_name,
2410 .id_table = atl1_pci_tbl,
2411 .probe = atl1_probe,
2412 .remove = __devexit_p(atl1_remove),
2413 /* Power Managment Hooks */
2414 /* probably broken right now -- CHS */
2415 .suspend = atl1_suspend,
2416 .resume = atl1_resume
2417 };
2418
2419 /*
2420 * atl1_exit_module - Driver Exit Cleanup Routine
2421 *
2422 * atl1_exit_module is called just before the driver is removed
2423 * from memory.
2424 */
2425 static void __exit atl1_exit_module(void)
2426 {
2427 pci_unregister_driver(&atl1_driver);
2428 }
2429
2430 /*
2431 * atl1_init_module - Driver Registration Routine
2432 *
2433 * atl1_init_module is the first routine called when the driver is
2434 * loaded. All it does is register with the PCI subsystem.
2435 */
2436 static int __init atl1_init_module(void)
2437 {
2438 return pci_register_driver(&atl1_driver);
2439 }
2440
2441 module_init(atl1_init_module);
2442 module_exit(atl1_exit_module);