2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
5 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13 * see how to subscribe.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
21 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33 * ETHTOOL_GDRVINFO support
34 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
35 * handler and close() cleanup.
36 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
37 * memory mapped IO is enabled to
38 * make the driver work on RS/6000.
39 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
40 * where the driver would disable
41 * bus master mode if it had to disable
42 * write and invalidate.
43 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
45 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
46 * rx producer index when
47 * flushing the Jumbo ring.
48 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
50 * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/types.h>
56 #include <linux/errno.h>
57 #include <linux/ioport.h>
58 #include <linux/pci.h>
59 #include <linux/dma-mapping.h>
60 #include <linux/kernel.h>
61 #include <linux/netdevice.h>
62 #include <linux/etherdevice.h>
63 #include <linux/skbuff.h>
64 #include <linux/init.h>
65 #include <linux/delay.h>
67 #include <linux/highmem.h>
68 #include <linux/sockios.h>
69 #include <linux/firmware.h>
71 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
72 #include <linux/if_vlan.h>
76 #include <linux/ethtool.h>
82 #include <asm/system.h>
85 #include <asm/byteorder.h>
86 #include <asm/uaccess.h>
89 #define DRV_NAME "acenic"
93 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
94 #define ACE_IS_TIGON_I(ap) 0
95 #define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
97 #define ACE_IS_TIGON_I(ap) (ap->version == 1)
98 #define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
101 #ifndef PCI_VENDOR_ID_ALTEON
102 #define PCI_VENDOR_ID_ALTEON 0x12ae
104 #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
105 #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
106 #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
108 #ifndef PCI_DEVICE_ID_3COM_3C985
109 #define PCI_DEVICE_ID_3COM_3C985 0x0001
111 #ifndef PCI_VENDOR_ID_NETGEAR
112 #define PCI_VENDOR_ID_NETGEAR 0x1385
113 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
115 #ifndef PCI_DEVICE_ID_NETGEAR_GA620T
116 #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
121 * Farallon used the DEC vendor ID by mistake and they seem not
124 #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
125 #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
127 #ifndef PCI_DEVICE_ID_FARALLON_PN9100T
128 #define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
130 #ifndef PCI_VENDOR_ID_SGI
131 #define PCI_VENDOR_ID_SGI 0x10a9
133 #ifndef PCI_DEVICE_ID_SGI_ACENIC
134 #define PCI_DEVICE_ID_SGI_ACENIC 0x0009
137 static DEFINE_PCI_DEVICE_TABLE(acenic_pci_tbl
) = {
138 { PCI_VENDOR_ID_ALTEON
, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
,
139 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
140 { PCI_VENDOR_ID_ALTEON
, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER
,
141 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
142 { PCI_VENDOR_ID_3COM
, PCI_DEVICE_ID_3COM_3C985
,
143 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
144 { PCI_VENDOR_ID_NETGEAR
, PCI_DEVICE_ID_NETGEAR_GA620
,
145 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
146 { PCI_VENDOR_ID_NETGEAR
, PCI_DEVICE_ID_NETGEAR_GA620T
,
147 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
149 * Farallon used the DEC vendor ID on their cards incorrectly,
150 * then later Alteon's ID.
152 { PCI_VENDOR_ID_DEC
, PCI_DEVICE_ID_FARALLON_PN9000SX
,
153 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
154 { PCI_VENDOR_ID_ALTEON
, PCI_DEVICE_ID_FARALLON_PN9100T
,
155 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
156 { PCI_VENDOR_ID_SGI
, PCI_DEVICE_ID_SGI_ACENIC
,
157 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
160 MODULE_DEVICE_TABLE(pci
, acenic_pci_tbl
);
162 #define ace_sync_irq(irq) synchronize_irq(irq)
164 #ifndef offset_in_page
165 #define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
168 #define ACE_MAX_MOD_PARMS 8
169 #define BOARD_IDX_STATIC 0
170 #define BOARD_IDX_OVERFLOW -1
172 #if (defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)) && \
173 defined(NETIF_F_HW_VLAN_RX)
174 #define ACENIC_DO_VLAN 1
175 #define ACE_RCB_VLAN_FLAG RCB_FLG_VLAN_ASSIST
177 #define ACENIC_DO_VLAN 0
178 #define ACE_RCB_VLAN_FLAG 0
184 * These must be defined before the firmware is included.
186 #define MAX_TEXT_LEN 96*1024
187 #define MAX_RODATA_LEN 8*1024
188 #define MAX_DATA_LEN 2*1024
190 #ifndef tigon2FwReleaseLocal
191 #define tigon2FwReleaseLocal 0
195 * This driver currently supports Tigon I and Tigon II based cards
196 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
197 * GA620. The driver should also work on the SGI, DEC and Farallon
198 * versions of the card, however I have not been able to test that
201 * This card is really neat, it supports receive hardware checksumming
202 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
203 * firmware. Also the programming interface is quite neat, except for
204 * the parts dealing with the i2c eeprom on the card ;-)
206 * Using jumbo frames:
208 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
209 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
210 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
211 * interface number and <MTU> being the MTU value.
215 * When compiled as a loadable module, the driver allows for a number
216 * of module parameters to be specified. The driver supports the
217 * following module parameters:
219 * trace=<val> - Firmware trace level. This requires special traced
220 * firmware to replace the firmware supplied with
221 * the driver - for debugging purposes only.
223 * link=<val> - Link state. Normally you want to use the default link
224 * parameters set by the driver. This can be used to
225 * override these in case your switch doesn't negotiate
226 * the link properly. Valid values are:
227 * 0x0001 - Force half duplex link.
228 * 0x0002 - Do not negotiate line speed with the other end.
229 * 0x0010 - 10Mbit/sec link.
230 * 0x0020 - 100Mbit/sec link.
231 * 0x0040 - 1000Mbit/sec link.
232 * 0x0100 - Do not negotiate flow control.
233 * 0x0200 - Enable RX flow control Y
234 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
235 * Default value is 0x0270, ie. enable link+flow
236 * control negotiation. Negotiating the highest
237 * possible link speed with RX flow control enabled.
239 * When disabling link speed negotiation, only one link
240 * speed is allowed to be specified!
242 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
243 * to wait for more packets to arive before
244 * interrupting the host, from the time the first
247 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
248 * to wait for more packets to arive in the transmit ring,
249 * before interrupting the host, after transmitting the
250 * first packet in the ring.
252 * max_tx_desc=<val> - maximum number of transmit descriptors
253 * (packets) transmitted before interrupting the host.
255 * max_rx_desc=<val> - maximum number of receive descriptors
256 * (packets) received before interrupting the host.
258 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
259 * increments of the NIC's on board memory to be used for
260 * transmit and receive buffers. For the 1MB NIC app. 800KB
261 * is available, on the 1/2MB NIC app. 300KB is available.
262 * 68KB will always be available as a minimum for both
263 * directions. The default value is a 50/50 split.
264 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
265 * operations, default (1) is to always disable this as
266 * that is what Alteon does on NT. I have not been able
267 * to measure any real performance differences with
268 * this on my systems. Set <val>=0 if you want to
269 * enable these operations.
271 * If you use more than one NIC, specify the parameters for the
272 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
273 * run tracing on NIC #2 but not on NIC #1 and #3.
277 * - Proper multicast support.
278 * - NIC dump support.
279 * - More tuning parameters.
281 * The mini ring is not used under Linux and I am not sure it makes sense
282 * to actually use it.
284 * New interrupt handler strategy:
286 * The old interrupt handler worked using the traditional method of
287 * replacing an skbuff with a new one when a packet arrives. However
288 * the rx rings do not need to contain a static number of buffer
289 * descriptors, thus it makes sense to move the memory allocation out
290 * of the main interrupt handler and do it in a bottom half handler
291 * and only allocate new buffers when the number of buffers in the
292 * ring is below a certain threshold. In order to avoid starving the
293 * NIC under heavy load it is however necessary to force allocation
294 * when hitting a minimum threshold. The strategy for alloction is as
297 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
298 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
299 * the buffers in the interrupt handler
300 * RX_RING_THRES - maximum number of buffers in the rx ring
301 * RX_MINI_THRES - maximum number of buffers in the mini ring
302 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
304 * One advantagous side effect of this allocation approach is that the
305 * entire rx processing can be done without holding any spin lock
306 * since the rx rings and registers are totally independent of the tx
307 * ring and its registers. This of course includes the kmalloc's of
308 * new skb's. Thus start_xmit can run in parallel with rx processing
309 * and the memory allocation on SMP systems.
311 * Note that running the skb reallocation in a bottom half opens up
312 * another can of races which needs to be handled properly. In
313 * particular it can happen that the interrupt handler tries to run
314 * the reallocation while the bottom half is either running on another
315 * CPU or was interrupted on the same CPU. To get around this the
316 * driver uses bitops to prevent the reallocation routines from being
319 * TX handling can also be done without holding any spin lock, wheee
320 * this is fun! since tx_ret_csm is only written to by the interrupt
321 * handler. The case to be aware of is when shutting down the device
322 * and cleaning up where it is necessary to make sure that
323 * start_xmit() is not running while this is happening. Well DaveM
324 * informs me that this case is already protected against ... bye bye
325 * Mr. Spin Lock, it was nice to know you.
327 * TX interrupts are now partly disabled so the NIC will only generate
328 * TX interrupts for the number of coal ticks, not for the number of
329 * TX packets in the queue. This should reduce the number of TX only,
330 * ie. when no RX processing is done, interrupts seen.
334 * Threshold values for RX buffer allocation - the low water marks for
335 * when to start refilling the rings are set to 75% of the ring
336 * sizes. It seems to make sense to refill the rings entirely from the
337 * intrrupt handler once it gets below the panic threshold, that way
338 * we don't risk that the refilling is moved to another CPU when the
339 * one running the interrupt handler just got the slab code hot in its
342 #define RX_RING_SIZE 72
343 #define RX_MINI_SIZE 64
344 #define RX_JUMBO_SIZE 48
346 #define RX_PANIC_STD_THRES 16
347 #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
348 #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
349 #define RX_PANIC_MINI_THRES 12
350 #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
351 #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
352 #define RX_PANIC_JUMBO_THRES 6
353 #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
354 #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
358 * Size of the mini ring entries, basically these just should be big
359 * enough to take TCP ACKs
361 #define ACE_MINI_SIZE 100
363 #define ACE_MINI_BUFSIZE ACE_MINI_SIZE
364 #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4)
365 #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4)
368 * There seems to be a magic difference in the effect between 995 and 996
369 * but little difference between 900 and 995 ... no idea why.
371 * There is now a default set of tuning parameters which is set, depending
372 * on whether or not the user enables Jumbo frames. It's assumed that if
373 * Jumbo frames are enabled, the user wants optimal tuning for that case.
375 #define DEF_TX_COAL 400 /* 996 */
376 #define DEF_TX_MAX_DESC 60 /* was 40 */
377 #define DEF_RX_COAL 120 /* 1000 */
378 #define DEF_RX_MAX_DESC 25
379 #define DEF_TX_RATIO 21 /* 24 */
381 #define DEF_JUMBO_TX_COAL 20
382 #define DEF_JUMBO_TX_MAX_DESC 60
383 #define DEF_JUMBO_RX_COAL 30
384 #define DEF_JUMBO_RX_MAX_DESC 6
385 #define DEF_JUMBO_TX_RATIO 21
387 #if tigon2FwReleaseLocal < 20001118
389 * Standard firmware and early modifications duplicate
390 * IRQ load without this flag (coal timer is never reset).
391 * Note that with this flag tx_coal should be less than
392 * time to xmit full tx ring.
393 * 400usec is not so bad for tx ring size of 128.
395 #define TX_COAL_INTS_ONLY 1 /* worth it */
398 * With modified firmware, this is not necessary, but still useful.
400 #define TX_COAL_INTS_ONLY 1
404 #define DEF_STAT (2 * TICKS_PER_SEC)
407 static int link_state
[ACE_MAX_MOD_PARMS
];
408 static int trace
[ACE_MAX_MOD_PARMS
];
409 static int tx_coal_tick
[ACE_MAX_MOD_PARMS
];
410 static int rx_coal_tick
[ACE_MAX_MOD_PARMS
];
411 static int max_tx_desc
[ACE_MAX_MOD_PARMS
];
412 static int max_rx_desc
[ACE_MAX_MOD_PARMS
];
413 static int tx_ratio
[ACE_MAX_MOD_PARMS
];
414 static int dis_pci_mem_inval
[ACE_MAX_MOD_PARMS
] = {1, 1, 1, 1, 1, 1, 1, 1};
416 MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
417 MODULE_LICENSE("GPL");
418 MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
419 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
420 MODULE_FIRMWARE("acenic/tg1.bin");
422 MODULE_FIRMWARE("acenic/tg2.bin");
424 module_param_array_named(link
, link_state
, int, NULL
, 0);
425 module_param_array(trace
, int, NULL
, 0);
426 module_param_array(tx_coal_tick
, int, NULL
, 0);
427 module_param_array(max_tx_desc
, int, NULL
, 0);
428 module_param_array(rx_coal_tick
, int, NULL
, 0);
429 module_param_array(max_rx_desc
, int, NULL
, 0);
430 module_param_array(tx_ratio
, int, NULL
, 0);
431 MODULE_PARM_DESC(link
, "AceNIC/3C985/NetGear link state");
432 MODULE_PARM_DESC(trace
, "AceNIC/3C985/NetGear firmware trace level");
433 MODULE_PARM_DESC(tx_coal_tick
, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
434 MODULE_PARM_DESC(max_tx_desc
, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
435 MODULE_PARM_DESC(rx_coal_tick
, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
436 MODULE_PARM_DESC(max_rx_desc
, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
437 MODULE_PARM_DESC(tx_ratio
, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
440 static const char version
[] __devinitconst
=
441 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
442 " http://home.cern.ch/~jes/gige/acenic.html\n";
444 static int ace_get_settings(struct net_device
*, struct ethtool_cmd
*);
445 static int ace_set_settings(struct net_device
*, struct ethtool_cmd
*);
446 static void ace_get_drvinfo(struct net_device
*, struct ethtool_drvinfo
*);
448 static const struct ethtool_ops ace_ethtool_ops
= {
449 .get_settings
= ace_get_settings
,
450 .set_settings
= ace_set_settings
,
451 .get_drvinfo
= ace_get_drvinfo
,
454 static void ace_watchdog(struct net_device
*dev
);
456 static const struct net_device_ops ace_netdev_ops
= {
457 .ndo_open
= ace_open
,
458 .ndo_stop
= ace_close
,
459 .ndo_tx_timeout
= ace_watchdog
,
460 .ndo_get_stats
= ace_get_stats
,
461 .ndo_start_xmit
= ace_start_xmit
,
462 .ndo_set_multicast_list
= ace_set_multicast_list
,
463 .ndo_validate_addr
= eth_validate_addr
,
464 .ndo_set_mac_address
= ace_set_mac_addr
,
465 .ndo_change_mtu
= ace_change_mtu
,
467 .ndo_vlan_rx_register
= ace_vlan_rx_register
,
471 static int __devinit
acenic_probe_one(struct pci_dev
*pdev
,
472 const struct pci_device_id
*id
)
474 struct net_device
*dev
;
475 struct ace_private
*ap
;
476 static int boards_found
;
478 dev
= alloc_etherdev(sizeof(struct ace_private
));
480 printk(KERN_ERR
"acenic: Unable to allocate "
481 "net_device structure!\n");
485 SET_NETDEV_DEV(dev
, &pdev
->dev
);
487 ap
= netdev_priv(dev
);
489 ap
->name
= pci_name(pdev
);
491 dev
->features
|= NETIF_F_SG
| NETIF_F_IP_CSUM
;
493 dev
->features
|= NETIF_F_HW_VLAN_TX
| NETIF_F_HW_VLAN_RX
;
496 dev
->watchdog_timeo
= 5*HZ
;
498 dev
->netdev_ops
= &ace_netdev_ops
;
499 SET_ETHTOOL_OPS(dev
, &ace_ethtool_ops
);
501 /* we only display this string ONCE */
505 if (pci_enable_device(pdev
))
506 goto fail_free_netdev
;
509 * Enable master mode before we start playing with the
510 * pci_command word since pci_set_master() will modify
513 pci_set_master(pdev
);
515 pci_read_config_word(pdev
, PCI_COMMAND
, &ap
->pci_command
);
517 /* OpenFirmware on Mac's does not set this - DOH.. */
518 if (!(ap
->pci_command
& PCI_COMMAND_MEMORY
)) {
519 printk(KERN_INFO
"%s: Enabling PCI Memory Mapped "
520 "access - was not enabled by BIOS/Firmware\n",
522 ap
->pci_command
= ap
->pci_command
| PCI_COMMAND_MEMORY
;
523 pci_write_config_word(ap
->pdev
, PCI_COMMAND
,
528 pci_read_config_byte(pdev
, PCI_LATENCY_TIMER
, &ap
->pci_latency
);
529 if (ap
->pci_latency
<= 0x40) {
530 ap
->pci_latency
= 0x40;
531 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, ap
->pci_latency
);
535 * Remap the regs into kernel space - this is abuse of
536 * dev->base_addr since it was means for I/O port
537 * addresses but who gives a damn.
539 dev
->base_addr
= pci_resource_start(pdev
, 0);
540 ap
->regs
= ioremap(dev
->base_addr
, 0x4000);
542 printk(KERN_ERR
"%s: Unable to map I/O register, "
543 "AceNIC %i will be disabled.\n",
544 ap
->name
, boards_found
);
545 goto fail_free_netdev
;
548 switch(pdev
->vendor
) {
549 case PCI_VENDOR_ID_ALTEON
:
550 if (pdev
->device
== PCI_DEVICE_ID_FARALLON_PN9100T
) {
551 printk(KERN_INFO
"%s: Farallon PN9100-T ",
554 printk(KERN_INFO
"%s: Alteon AceNIC ",
558 case PCI_VENDOR_ID_3COM
:
559 printk(KERN_INFO
"%s: 3Com 3C985 ", ap
->name
);
561 case PCI_VENDOR_ID_NETGEAR
:
562 printk(KERN_INFO
"%s: NetGear GA620 ", ap
->name
);
564 case PCI_VENDOR_ID_DEC
:
565 if (pdev
->device
== PCI_DEVICE_ID_FARALLON_PN9000SX
) {
566 printk(KERN_INFO
"%s: Farallon PN9000-SX ",
570 case PCI_VENDOR_ID_SGI
:
571 printk(KERN_INFO
"%s: SGI AceNIC ", ap
->name
);
574 printk(KERN_INFO
"%s: Unknown AceNIC ", ap
->name
);
578 printk("Gigabit Ethernet at 0x%08lx, ", dev
->base_addr
);
579 printk("irq %d\n", pdev
->irq
);
581 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
582 if ((readl(&ap
->regs
->HostCtrl
) >> 28) == 4) {
583 printk(KERN_ERR
"%s: Driver compiled without Tigon I"
584 " support - NIC disabled\n", dev
->name
);
589 if (ace_allocate_descriptors(dev
))
590 goto fail_free_netdev
;
593 if (boards_found
>= ACE_MAX_MOD_PARMS
)
594 ap
->board_idx
= BOARD_IDX_OVERFLOW
;
596 ap
->board_idx
= boards_found
;
598 ap
->board_idx
= BOARD_IDX_STATIC
;
602 goto fail_free_netdev
;
604 if (register_netdev(dev
)) {
605 printk(KERN_ERR
"acenic: device registration failed\n");
608 ap
->name
= dev
->name
;
610 if (ap
->pci_using_dac
)
611 dev
->features
|= NETIF_F_HIGHDMA
;
613 pci_set_drvdata(pdev
, dev
);
619 ace_init_cleanup(dev
);
625 static void __devexit
acenic_remove_one(struct pci_dev
*pdev
)
627 struct net_device
*dev
= pci_get_drvdata(pdev
);
628 struct ace_private
*ap
= netdev_priv(dev
);
629 struct ace_regs __iomem
*regs
= ap
->regs
;
632 unregister_netdev(dev
);
634 writel(readl(®s
->CpuCtrl
) | CPU_HALT
, ®s
->CpuCtrl
);
635 if (ap
->version
>= 2)
636 writel(readl(®s
->CpuBCtrl
) | CPU_HALT
, ®s
->CpuBCtrl
);
639 * This clears any pending interrupts
641 writel(1, ®s
->Mb0Lo
);
642 readl(®s
->CpuCtrl
); /* flush */
645 * Make sure no other CPUs are processing interrupts
646 * on the card before the buffers are being released.
647 * Otherwise one might experience some `interesting'
650 * Then release the RX buffers - jumbo buffers were
651 * already released in ace_close().
653 ace_sync_irq(dev
->irq
);
655 for (i
= 0; i
< RX_STD_RING_ENTRIES
; i
++) {
656 struct sk_buff
*skb
= ap
->skb
->rx_std_skbuff
[i
].skb
;
659 struct ring_info
*ringp
;
662 ringp
= &ap
->skb
->rx_std_skbuff
[i
];
663 mapping
= pci_unmap_addr(ringp
, mapping
);
664 pci_unmap_page(ap
->pdev
, mapping
,
668 ap
->rx_std_ring
[i
].size
= 0;
669 ap
->skb
->rx_std_skbuff
[i
].skb
= NULL
;
674 if (ap
->version
>= 2) {
675 for (i
= 0; i
< RX_MINI_RING_ENTRIES
; i
++) {
676 struct sk_buff
*skb
= ap
->skb
->rx_mini_skbuff
[i
].skb
;
679 struct ring_info
*ringp
;
682 ringp
= &ap
->skb
->rx_mini_skbuff
[i
];
683 mapping
= pci_unmap_addr(ringp
,mapping
);
684 pci_unmap_page(ap
->pdev
, mapping
,
688 ap
->rx_mini_ring
[i
].size
= 0;
689 ap
->skb
->rx_mini_skbuff
[i
].skb
= NULL
;
695 for (i
= 0; i
< RX_JUMBO_RING_ENTRIES
; i
++) {
696 struct sk_buff
*skb
= ap
->skb
->rx_jumbo_skbuff
[i
].skb
;
698 struct ring_info
*ringp
;
701 ringp
= &ap
->skb
->rx_jumbo_skbuff
[i
];
702 mapping
= pci_unmap_addr(ringp
, mapping
);
703 pci_unmap_page(ap
->pdev
, mapping
,
707 ap
->rx_jumbo_ring
[i
].size
= 0;
708 ap
->skb
->rx_jumbo_skbuff
[i
].skb
= NULL
;
713 ace_init_cleanup(dev
);
717 static struct pci_driver acenic_pci_driver
= {
719 .id_table
= acenic_pci_tbl
,
720 .probe
= acenic_probe_one
,
721 .remove
= __devexit_p(acenic_remove_one
),
724 static int __init
acenic_init(void)
726 return pci_register_driver(&acenic_pci_driver
);
729 static void __exit
acenic_exit(void)
731 pci_unregister_driver(&acenic_pci_driver
);
734 module_init(acenic_init
);
735 module_exit(acenic_exit
);
737 static void ace_free_descriptors(struct net_device
*dev
)
739 struct ace_private
*ap
= netdev_priv(dev
);
742 if (ap
->rx_std_ring
!= NULL
) {
743 size
= (sizeof(struct rx_desc
) *
744 (RX_STD_RING_ENTRIES
+
745 RX_JUMBO_RING_ENTRIES
+
746 RX_MINI_RING_ENTRIES
+
747 RX_RETURN_RING_ENTRIES
));
748 pci_free_consistent(ap
->pdev
, size
, ap
->rx_std_ring
,
749 ap
->rx_ring_base_dma
);
750 ap
->rx_std_ring
= NULL
;
751 ap
->rx_jumbo_ring
= NULL
;
752 ap
->rx_mini_ring
= NULL
;
753 ap
->rx_return_ring
= NULL
;
755 if (ap
->evt_ring
!= NULL
) {
756 size
= (sizeof(struct event
) * EVT_RING_ENTRIES
);
757 pci_free_consistent(ap
->pdev
, size
, ap
->evt_ring
,
761 if (ap
->tx_ring
!= NULL
&& !ACE_IS_TIGON_I(ap
)) {
762 size
= (sizeof(struct tx_desc
) * MAX_TX_RING_ENTRIES
);
763 pci_free_consistent(ap
->pdev
, size
, ap
->tx_ring
,
768 if (ap
->evt_prd
!= NULL
) {
769 pci_free_consistent(ap
->pdev
, sizeof(u32
),
770 (void *)ap
->evt_prd
, ap
->evt_prd_dma
);
773 if (ap
->rx_ret_prd
!= NULL
) {
774 pci_free_consistent(ap
->pdev
, sizeof(u32
),
775 (void *)ap
->rx_ret_prd
,
777 ap
->rx_ret_prd
= NULL
;
779 if (ap
->tx_csm
!= NULL
) {
780 pci_free_consistent(ap
->pdev
, sizeof(u32
),
781 (void *)ap
->tx_csm
, ap
->tx_csm_dma
);
787 static int ace_allocate_descriptors(struct net_device
*dev
)
789 struct ace_private
*ap
= netdev_priv(dev
);
792 size
= (sizeof(struct rx_desc
) *
793 (RX_STD_RING_ENTRIES
+
794 RX_JUMBO_RING_ENTRIES
+
795 RX_MINI_RING_ENTRIES
+
796 RX_RETURN_RING_ENTRIES
));
798 ap
->rx_std_ring
= pci_alloc_consistent(ap
->pdev
, size
,
799 &ap
->rx_ring_base_dma
);
800 if (ap
->rx_std_ring
== NULL
)
803 ap
->rx_jumbo_ring
= ap
->rx_std_ring
+ RX_STD_RING_ENTRIES
;
804 ap
->rx_mini_ring
= ap
->rx_jumbo_ring
+ RX_JUMBO_RING_ENTRIES
;
805 ap
->rx_return_ring
= ap
->rx_mini_ring
+ RX_MINI_RING_ENTRIES
;
807 size
= (sizeof(struct event
) * EVT_RING_ENTRIES
);
809 ap
->evt_ring
= pci_alloc_consistent(ap
->pdev
, size
, &ap
->evt_ring_dma
);
811 if (ap
->evt_ring
== NULL
)
815 * Only allocate a host TX ring for the Tigon II, the Tigon I
816 * has to use PCI registers for this ;-(
818 if (!ACE_IS_TIGON_I(ap
)) {
819 size
= (sizeof(struct tx_desc
) * MAX_TX_RING_ENTRIES
);
821 ap
->tx_ring
= pci_alloc_consistent(ap
->pdev
, size
,
824 if (ap
->tx_ring
== NULL
)
828 ap
->evt_prd
= pci_alloc_consistent(ap
->pdev
, sizeof(u32
),
830 if (ap
->evt_prd
== NULL
)
833 ap
->rx_ret_prd
= pci_alloc_consistent(ap
->pdev
, sizeof(u32
),
834 &ap
->rx_ret_prd_dma
);
835 if (ap
->rx_ret_prd
== NULL
)
838 ap
->tx_csm
= pci_alloc_consistent(ap
->pdev
, sizeof(u32
),
840 if (ap
->tx_csm
== NULL
)
847 ace_init_cleanup(dev
);
853 * Generic cleanup handling data allocated during init. Used when the
854 * module is unloaded or if an error occurs during initialization
856 static void ace_init_cleanup(struct net_device
*dev
)
858 struct ace_private
*ap
;
860 ap
= netdev_priv(dev
);
862 ace_free_descriptors(dev
);
865 pci_free_consistent(ap
->pdev
, sizeof(struct ace_info
),
866 ap
->info
, ap
->info_dma
);
868 kfree(ap
->trace_buf
);
871 free_irq(dev
->irq
, dev
);
878 * Commands are considered to be slow.
880 static inline void ace_issue_cmd(struct ace_regs __iomem
*regs
, struct cmd
*cmd
)
884 idx
= readl(®s
->CmdPrd
);
886 writel(*(u32
*)(cmd
), ®s
->CmdRng
[idx
]);
887 idx
= (idx
+ 1) % CMD_RING_ENTRIES
;
889 writel(idx
, ®s
->CmdPrd
);
893 static int __devinit
ace_init(struct net_device
*dev
)
895 struct ace_private
*ap
;
896 struct ace_regs __iomem
*regs
;
897 struct ace_info
*info
= NULL
;
898 struct pci_dev
*pdev
;
901 u32 tig_ver
, mac1
, mac2
, tmp
, pci_state
;
902 int board_idx
, ecode
= 0;
904 unsigned char cache_size
;
906 ap
= netdev_priv(dev
);
909 board_idx
= ap
->board_idx
;
912 * aman@sgi.com - its useful to do a NIC reset here to
913 * address the `Firmware not running' problem subsequent
914 * to any crashes involving the NIC
916 writel(HW_RESET
| (HW_RESET
<< 24), ®s
->HostCtrl
);
917 readl(®s
->HostCtrl
); /* PCI write posting */
921 * Don't access any other registers before this point!
925 * This will most likely need BYTE_SWAP once we switch
926 * to using __raw_writel()
928 writel((WORD_SWAP
| CLR_INT
| ((WORD_SWAP
| CLR_INT
) << 24)),
931 writel((CLR_INT
| WORD_SWAP
| ((CLR_INT
| WORD_SWAP
) << 24)),
934 readl(®s
->HostCtrl
); /* PCI write posting */
937 * Stop the NIC CPU and clear pending interrupts
939 writel(readl(®s
->CpuCtrl
) | CPU_HALT
, ®s
->CpuCtrl
);
940 readl(®s
->CpuCtrl
); /* PCI write posting */
941 writel(0, ®s
->Mb0Lo
);
943 tig_ver
= readl(®s
->HostCtrl
) >> 28;
946 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
949 printk(KERN_INFO
" Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
950 tig_ver
, ap
->firmware_major
, ap
->firmware_minor
,
952 writel(0, ®s
->LocalCtrl
);
954 ap
->tx_ring_entries
= TIGON_I_TX_RING_ENTRIES
;
958 printk(KERN_INFO
" Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
959 tig_ver
, ap
->firmware_major
, ap
->firmware_minor
,
961 writel(readl(®s
->CpuBCtrl
) | CPU_HALT
, ®s
->CpuBCtrl
);
962 readl(®s
->CpuBCtrl
); /* PCI write posting */
964 * The SRAM bank size does _not_ indicate the amount
965 * of memory on the card, it controls the _bank_ size!
966 * Ie. a 1MB AceNIC will have two banks of 512KB.
968 writel(SRAM_BANK_512K
, ®s
->LocalCtrl
);
969 writel(SYNC_SRAM_TIMING
, ®s
->MiscCfg
);
971 ap
->tx_ring_entries
= MAX_TX_RING_ENTRIES
;
974 printk(KERN_WARNING
" Unsupported Tigon version detected "
981 * ModeStat _must_ be set after the SRAM settings as this change
982 * seems to corrupt the ModeStat and possible other registers.
983 * The SRAM settings survive resets and setting it to the same
984 * value a second time works as well. This is what caused the
985 * `Firmware not running' problem on the Tigon II.
988 writel(ACE_BYTE_SWAP_DMA
| ACE_WARN
| ACE_FATAL
| ACE_BYTE_SWAP_BD
|
989 ACE_WORD_SWAP_BD
| ACE_NO_JUMBO_FRAG
, ®s
->ModeStat
);
991 writel(ACE_BYTE_SWAP_DMA
| ACE_WARN
| ACE_FATAL
|
992 ACE_WORD_SWAP_BD
| ACE_NO_JUMBO_FRAG
, ®s
->ModeStat
);
994 readl(®s
->ModeStat
); /* PCI write posting */
997 for(i
= 0; i
< 4; i
++) {
1001 t
= read_eeprom_byte(dev
, 0x8c+i
);
1009 for(i
= 4; i
< 8; i
++) {
1013 t
= read_eeprom_byte(dev
, 0x8c+i
);
1021 writel(mac1
, ®s
->MacAddrHi
);
1022 writel(mac2
, ®s
->MacAddrLo
);
1024 dev
->dev_addr
[0] = (mac1
>> 8) & 0xff;
1025 dev
->dev_addr
[1] = mac1
& 0xff;
1026 dev
->dev_addr
[2] = (mac2
>> 24) & 0xff;
1027 dev
->dev_addr
[3] = (mac2
>> 16) & 0xff;
1028 dev
->dev_addr
[4] = (mac2
>> 8) & 0xff;
1029 dev
->dev_addr
[5] = mac2
& 0xff;
1031 printk("MAC: %pM\n", dev
->dev_addr
);
1034 * Looks like this is necessary to deal with on all architectures,
1035 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1036 * Ie. having two NICs in the machine, one will have the cache
1037 * line set at boot time, the other will not.
1040 pci_read_config_byte(pdev
, PCI_CACHE_LINE_SIZE
, &cache_size
);
1042 if (cache_size
!= SMP_CACHE_BYTES
) {
1043 printk(KERN_INFO
" PCI cache line size set incorrectly "
1044 "(%i bytes) by BIOS/FW, ", cache_size
);
1045 if (cache_size
> SMP_CACHE_BYTES
)
1046 printk("expecting %i\n", SMP_CACHE_BYTES
);
1048 printk("correcting to %i\n", SMP_CACHE_BYTES
);
1049 pci_write_config_byte(pdev
, PCI_CACHE_LINE_SIZE
,
1050 SMP_CACHE_BYTES
>> 2);
1054 pci_state
= readl(®s
->PciState
);
1055 printk(KERN_INFO
" PCI bus width: %i bits, speed: %iMHz, "
1056 "latency: %i clks\n",
1057 (pci_state
& PCI_32BIT
) ? 32 : 64,
1058 (pci_state
& PCI_66MHZ
) ? 66 : 33,
1062 * Set the max DMA transfer size. Seems that for most systems
1063 * the performance is better when no MAX parameter is
1064 * set. However for systems enabling PCI write and invalidate,
1065 * DMA writes must be set to the L1 cache line size to get
1066 * optimal performance.
1068 * The default is now to turn the PCI write and invalidate off
1069 * - that is what Alteon does for NT.
1071 tmp
= READ_CMD_MEM
| WRITE_CMD_MEM
;
1072 if (ap
->version
>= 2) {
1073 tmp
|= (MEM_READ_MULTIPLE
| (pci_state
& PCI_66MHZ
));
1075 * Tuning parameters only supported for 8 cards
1077 if (board_idx
== BOARD_IDX_OVERFLOW
||
1078 dis_pci_mem_inval
[board_idx
]) {
1079 if (ap
->pci_command
& PCI_COMMAND_INVALIDATE
) {
1080 ap
->pci_command
&= ~PCI_COMMAND_INVALIDATE
;
1081 pci_write_config_word(pdev
, PCI_COMMAND
,
1083 printk(KERN_INFO
" Disabling PCI memory "
1084 "write and invalidate\n");
1086 } else if (ap
->pci_command
& PCI_COMMAND_INVALIDATE
) {
1087 printk(KERN_INFO
" PCI memory write & invalidate "
1088 "enabled by BIOS, enabling counter measures\n");
1090 switch(SMP_CACHE_BYTES
) {
1092 tmp
|= DMA_WRITE_MAX_16
;
1095 tmp
|= DMA_WRITE_MAX_32
;
1098 tmp
|= DMA_WRITE_MAX_64
;
1101 tmp
|= DMA_WRITE_MAX_128
;
1104 printk(KERN_INFO
" Cache line size %i not "
1105 "supported, PCI write and invalidate "
1106 "disabled\n", SMP_CACHE_BYTES
);
1107 ap
->pci_command
&= ~PCI_COMMAND_INVALIDATE
;
1108 pci_write_config_word(pdev
, PCI_COMMAND
,
1116 * On this platform, we know what the best dma settings
1117 * are. We use 64-byte maximum bursts, because if we
1118 * burst larger than the cache line size (or even cross
1119 * a 64byte boundary in a single burst) the UltraSparc
1120 * PCI controller will disconnect at 64-byte multiples.
1122 * Read-multiple will be properly enabled above, and when
1123 * set will give the PCI controller proper hints about
1126 tmp
&= ~DMA_READ_WRITE_MASK
;
1127 tmp
|= DMA_READ_MAX_64
;
1128 tmp
|= DMA_WRITE_MAX_64
;
1131 tmp
&= ~DMA_READ_WRITE_MASK
;
1132 tmp
|= DMA_READ_MAX_128
;
1134 * All the docs say MUST NOT. Well, I did.
1135 * Nothing terrible happens, if we load wrong size.
1136 * Bit w&i still works better!
1138 tmp
|= DMA_WRITE_MAX_128
;
1140 writel(tmp
, ®s
->PciState
);
1144 * The Host PCI bus controller driver has to set FBB.
1145 * If all devices on that PCI bus support FBB, then the controller
1146 * can enable FBB support in the Host PCI Bus controller (or on
1147 * the PCI-PCI bridge if that applies).
1151 * I have received reports from people having problems when this
1154 if (!(ap
->pci_command
& PCI_COMMAND_FAST_BACK
)) {
1155 printk(KERN_INFO
" Enabling PCI Fast Back to Back\n");
1156 ap
->pci_command
|= PCI_COMMAND_FAST_BACK
;
1157 pci_write_config_word(pdev
, PCI_COMMAND
, ap
->pci_command
);
1162 * Configure DMA attributes.
1164 if (!pci_set_dma_mask(pdev
, DMA_BIT_MASK(64))) {
1165 ap
->pci_using_dac
= 1;
1166 } else if (!pci_set_dma_mask(pdev
, DMA_BIT_MASK(32))) {
1167 ap
->pci_using_dac
= 0;
1174 * Initialize the generic info block and the command+event rings
1175 * and the control blocks for the transmit and receive rings
1176 * as they need to be setup once and for all.
1178 if (!(info
= pci_alloc_consistent(ap
->pdev
, sizeof(struct ace_info
),
1186 * Get the memory for the skb rings.
1188 if (!(ap
->skb
= kmalloc(sizeof(struct ace_skb
), GFP_KERNEL
))) {
1193 ecode
= request_irq(pdev
->irq
, ace_interrupt
, IRQF_SHARED
,
1196 printk(KERN_WARNING
"%s: Requested IRQ %d is busy\n",
1197 DRV_NAME
, pdev
->irq
);
1200 dev
->irq
= pdev
->irq
;
1203 spin_lock_init(&ap
->debug_lock
);
1204 ap
->last_tx
= ACE_TX_RING_ENTRIES(ap
) - 1;
1205 ap
->last_std_rx
= 0;
1206 ap
->last_mini_rx
= 0;
1209 memset(ap
->info
, 0, sizeof(struct ace_info
));
1210 memset(ap
->skb
, 0, sizeof(struct ace_skb
));
1212 ecode
= ace_load_firmware(dev
);
1218 tmp_ptr
= ap
->info_dma
;
1219 writel(tmp_ptr
>> 32, ®s
->InfoPtrHi
);
1220 writel(tmp_ptr
& 0xffffffff, ®s
->InfoPtrLo
);
1222 memset(ap
->evt_ring
, 0, EVT_RING_ENTRIES
* sizeof(struct event
));
1224 set_aceaddr(&info
->evt_ctrl
.rngptr
, ap
->evt_ring_dma
);
1225 info
->evt_ctrl
.flags
= 0;
1229 set_aceaddr(&info
->evt_prd_ptr
, ap
->evt_prd_dma
);
1230 writel(0, ®s
->EvtCsm
);
1232 set_aceaddr(&info
->cmd_ctrl
.rngptr
, 0x100);
1233 info
->cmd_ctrl
.flags
= 0;
1234 info
->cmd_ctrl
.max_len
= 0;
1236 for (i
= 0; i
< CMD_RING_ENTRIES
; i
++)
1237 writel(0, ®s
->CmdRng
[i
]);
1239 writel(0, ®s
->CmdPrd
);
1240 writel(0, ®s
->CmdCsm
);
1242 tmp_ptr
= ap
->info_dma
;
1243 tmp_ptr
+= (unsigned long) &(((struct ace_info
*)0)->s
.stats
);
1244 set_aceaddr(&info
->stats2_ptr
, (dma_addr_t
) tmp_ptr
);
1246 set_aceaddr(&info
->rx_std_ctrl
.rngptr
, ap
->rx_ring_base_dma
);
1247 info
->rx_std_ctrl
.max_len
= ACE_STD_BUFSIZE
;
1248 info
->rx_std_ctrl
.flags
=
1249 RCB_FLG_TCP_UDP_SUM
| RCB_FLG_NO_PSEUDO_HDR
| ACE_RCB_VLAN_FLAG
;
1251 memset(ap
->rx_std_ring
, 0,
1252 RX_STD_RING_ENTRIES
* sizeof(struct rx_desc
));
1254 for (i
= 0; i
< RX_STD_RING_ENTRIES
; i
++)
1255 ap
->rx_std_ring
[i
].flags
= BD_FLG_TCP_UDP_SUM
;
1257 ap
->rx_std_skbprd
= 0;
1258 atomic_set(&ap
->cur_rx_bufs
, 0);
1260 set_aceaddr(&info
->rx_jumbo_ctrl
.rngptr
,
1261 (ap
->rx_ring_base_dma
+
1262 (sizeof(struct rx_desc
) * RX_STD_RING_ENTRIES
)));
1263 info
->rx_jumbo_ctrl
.max_len
= 0;
1264 info
->rx_jumbo_ctrl
.flags
=
1265 RCB_FLG_TCP_UDP_SUM
| RCB_FLG_NO_PSEUDO_HDR
| ACE_RCB_VLAN_FLAG
;
1267 memset(ap
->rx_jumbo_ring
, 0,
1268 RX_JUMBO_RING_ENTRIES
* sizeof(struct rx_desc
));
1270 for (i
= 0; i
< RX_JUMBO_RING_ENTRIES
; i
++)
1271 ap
->rx_jumbo_ring
[i
].flags
= BD_FLG_TCP_UDP_SUM
| BD_FLG_JUMBO
;
1273 ap
->rx_jumbo_skbprd
= 0;
1274 atomic_set(&ap
->cur_jumbo_bufs
, 0);
1276 memset(ap
->rx_mini_ring
, 0,
1277 RX_MINI_RING_ENTRIES
* sizeof(struct rx_desc
));
1279 if (ap
->version
>= 2) {
1280 set_aceaddr(&info
->rx_mini_ctrl
.rngptr
,
1281 (ap
->rx_ring_base_dma
+
1282 (sizeof(struct rx_desc
) *
1283 (RX_STD_RING_ENTRIES
+
1284 RX_JUMBO_RING_ENTRIES
))));
1285 info
->rx_mini_ctrl
.max_len
= ACE_MINI_SIZE
;
1286 info
->rx_mini_ctrl
.flags
=
1287 RCB_FLG_TCP_UDP_SUM
|RCB_FLG_NO_PSEUDO_HDR
|ACE_RCB_VLAN_FLAG
;
1289 for (i
= 0; i
< RX_MINI_RING_ENTRIES
; i
++)
1290 ap
->rx_mini_ring
[i
].flags
=
1291 BD_FLG_TCP_UDP_SUM
| BD_FLG_MINI
;
1293 set_aceaddr(&info
->rx_mini_ctrl
.rngptr
, 0);
1294 info
->rx_mini_ctrl
.flags
= RCB_FLG_RNG_DISABLE
;
1295 info
->rx_mini_ctrl
.max_len
= 0;
1298 ap
->rx_mini_skbprd
= 0;
1299 atomic_set(&ap
->cur_mini_bufs
, 0);
1301 set_aceaddr(&info
->rx_return_ctrl
.rngptr
,
1302 (ap
->rx_ring_base_dma
+
1303 (sizeof(struct rx_desc
) *
1304 (RX_STD_RING_ENTRIES
+
1305 RX_JUMBO_RING_ENTRIES
+
1306 RX_MINI_RING_ENTRIES
))));
1307 info
->rx_return_ctrl
.flags
= 0;
1308 info
->rx_return_ctrl
.max_len
= RX_RETURN_RING_ENTRIES
;
1310 memset(ap
->rx_return_ring
, 0,
1311 RX_RETURN_RING_ENTRIES
* sizeof(struct rx_desc
));
1313 set_aceaddr(&info
->rx_ret_prd_ptr
, ap
->rx_ret_prd_dma
);
1314 *(ap
->rx_ret_prd
) = 0;
1316 writel(TX_RING_BASE
, ®s
->WinBase
);
1318 if (ACE_IS_TIGON_I(ap
)) {
1319 ap
->tx_ring
= (__force
struct tx_desc
*) regs
->Window
;
1320 for (i
= 0; i
< (TIGON_I_TX_RING_ENTRIES
1321 * sizeof(struct tx_desc
)) / sizeof(u32
); i
++)
1322 writel(0, (__force
void __iomem
*)ap
->tx_ring
+ i
* 4);
1324 set_aceaddr(&info
->tx_ctrl
.rngptr
, TX_RING_BASE
);
1326 memset(ap
->tx_ring
, 0,
1327 MAX_TX_RING_ENTRIES
* sizeof(struct tx_desc
));
1329 set_aceaddr(&info
->tx_ctrl
.rngptr
, ap
->tx_ring_dma
);
1332 info
->tx_ctrl
.max_len
= ACE_TX_RING_ENTRIES(ap
);
1333 tmp
= RCB_FLG_TCP_UDP_SUM
| RCB_FLG_NO_PSEUDO_HDR
| ACE_RCB_VLAN_FLAG
;
1336 * The Tigon I does not like having the TX ring in host memory ;-(
1338 if (!ACE_IS_TIGON_I(ap
))
1339 tmp
|= RCB_FLG_TX_HOST_RING
;
1340 #if TX_COAL_INTS_ONLY
1341 tmp
|= RCB_FLG_COAL_INT_ONLY
;
1343 info
->tx_ctrl
.flags
= tmp
;
1345 set_aceaddr(&info
->tx_csm_ptr
, ap
->tx_csm_dma
);
1348 * Potential item for tuning parameter
1351 writel(DMA_THRESH_16W
, ®s
->DmaReadCfg
);
1352 writel(DMA_THRESH_16W
, ®s
->DmaWriteCfg
);
1354 writel(DMA_THRESH_8W
, ®s
->DmaReadCfg
);
1355 writel(DMA_THRESH_8W
, ®s
->DmaWriteCfg
);
1358 writel(0, ®s
->MaskInt
);
1359 writel(1, ®s
->IfIdx
);
1362 * McKinley boxes do not like us fiddling with AssistState
1365 writel(1, ®s
->AssistState
);
1368 writel(DEF_STAT
, ®s
->TuneStatTicks
);
1369 writel(DEF_TRACE
, ®s
->TuneTrace
);
1371 ace_set_rxtx_parms(dev
, 0);
1373 if (board_idx
== BOARD_IDX_OVERFLOW
) {
1374 printk(KERN_WARNING
"%s: more than %i NICs detected, "
1375 "ignoring module parameters!\n",
1376 ap
->name
, ACE_MAX_MOD_PARMS
);
1377 } else if (board_idx
>= 0) {
1378 if (tx_coal_tick
[board_idx
])
1379 writel(tx_coal_tick
[board_idx
],
1380 ®s
->TuneTxCoalTicks
);
1381 if (max_tx_desc
[board_idx
])
1382 writel(max_tx_desc
[board_idx
], ®s
->TuneMaxTxDesc
);
1384 if (rx_coal_tick
[board_idx
])
1385 writel(rx_coal_tick
[board_idx
],
1386 ®s
->TuneRxCoalTicks
);
1387 if (max_rx_desc
[board_idx
])
1388 writel(max_rx_desc
[board_idx
], ®s
->TuneMaxRxDesc
);
1390 if (trace
[board_idx
])
1391 writel(trace
[board_idx
], ®s
->TuneTrace
);
1393 if ((tx_ratio
[board_idx
] > 0) && (tx_ratio
[board_idx
] < 64))
1394 writel(tx_ratio
[board_idx
], ®s
->TxBufRat
);
1398 * Default link parameters
1400 tmp
= LNK_ENABLE
| LNK_FULL_DUPLEX
| LNK_1000MB
| LNK_100MB
|
1401 LNK_10MB
| LNK_RX_FLOW_CTL_Y
| LNK_NEG_FCTL
| LNK_NEGOTIATE
;
1402 if(ap
->version
>= 2)
1403 tmp
|= LNK_TX_FLOW_CTL_Y
;
1406 * Override link default parameters
1408 if ((board_idx
>= 0) && link_state
[board_idx
]) {
1409 int option
= link_state
[board_idx
];
1413 if (option
& 0x01) {
1414 printk(KERN_INFO
"%s: Setting half duplex link\n",
1416 tmp
&= ~LNK_FULL_DUPLEX
;
1419 tmp
&= ~LNK_NEGOTIATE
;
1426 if ((option
& 0x70) == 0) {
1427 printk(KERN_WARNING
"%s: No media speed specified, "
1428 "forcing auto negotiation\n", ap
->name
);
1429 tmp
|= LNK_NEGOTIATE
| LNK_1000MB
|
1430 LNK_100MB
| LNK_10MB
;
1432 if ((option
& 0x100) == 0)
1433 tmp
|= LNK_NEG_FCTL
;
1435 printk(KERN_INFO
"%s: Disabling flow control "
1436 "negotiation\n", ap
->name
);
1438 tmp
|= LNK_RX_FLOW_CTL_Y
;
1439 if ((option
& 0x400) && (ap
->version
>= 2)) {
1440 printk(KERN_INFO
"%s: Enabling TX flow control\n",
1442 tmp
|= LNK_TX_FLOW_CTL_Y
;
1447 writel(tmp
, ®s
->TuneLink
);
1448 if (ap
->version
>= 2)
1449 writel(tmp
, ®s
->TuneFastLink
);
1451 writel(ap
->firmware_start
, ®s
->Pc
);
1453 writel(0, ®s
->Mb0Lo
);
1456 * Set tx_csm before we start receiving interrupts, otherwise
1457 * the interrupt handler might think it is supposed to process
1458 * tx ints before we are up and running, which may cause a null
1459 * pointer access in the int handler.
1462 ap
->tx_prd
= *(ap
->tx_csm
) = ap
->tx_ret_csm
= 0;
1465 ace_set_txprd(regs
, ap
, 0);
1466 writel(0, ®s
->RxRetCsm
);
1469 * Enable DMA engine now.
1470 * If we do this sooner, Mckinley box pukes.
1471 * I assume it's because Tigon II DMA engine wants to check
1472 * *something* even before the CPU is started.
1474 writel(1, ®s
->AssistState
); /* enable DMA */
1479 writel(readl(®s
->CpuCtrl
) & ~(CPU_HALT
|CPU_TRACE
), ®s
->CpuCtrl
);
1480 readl(®s
->CpuCtrl
);
1483 * Wait for the firmware to spin up - max 3 seconds.
1485 myjif
= jiffies
+ 3 * HZ
;
1486 while (time_before(jiffies
, myjif
) && !ap
->fw_running
)
1489 if (!ap
->fw_running
) {
1490 printk(KERN_ERR
"%s: Firmware NOT running!\n", ap
->name
);
1493 writel(readl(®s
->CpuCtrl
) | CPU_HALT
, ®s
->CpuCtrl
);
1494 readl(®s
->CpuCtrl
);
1496 /* aman@sgi.com - account for badly behaving firmware/NIC:
1497 * - have observed that the NIC may continue to generate
1498 * interrupts for some reason; attempt to stop it - halt
1499 * second CPU for Tigon II cards, and also clear Mb0
1500 * - if we're a module, we'll fail to load if this was
1501 * the only GbE card in the system => if the kernel does
1502 * see an interrupt from the NIC, code to handle it is
1503 * gone and OOps! - so free_irq also
1505 if (ap
->version
>= 2)
1506 writel(readl(®s
->CpuBCtrl
) | CPU_HALT
,
1508 writel(0, ®s
->Mb0Lo
);
1509 readl(®s
->Mb0Lo
);
1516 * We load the ring here as there seem to be no way to tell the
1517 * firmware to wipe the ring without re-initializing it.
1519 if (!test_and_set_bit(0, &ap
->std_refill_busy
))
1520 ace_load_std_rx_ring(ap
, RX_RING_SIZE
);
1522 printk(KERN_ERR
"%s: Someone is busy refilling the RX ring\n",
1524 if (ap
->version
>= 2) {
1525 if (!test_and_set_bit(0, &ap
->mini_refill_busy
))
1526 ace_load_mini_rx_ring(ap
, RX_MINI_SIZE
);
1528 printk(KERN_ERR
"%s: Someone is busy refilling "
1529 "the RX mini ring\n", ap
->name
);
1534 ace_init_cleanup(dev
);
1539 static void ace_set_rxtx_parms(struct net_device
*dev
, int jumbo
)
1541 struct ace_private
*ap
= netdev_priv(dev
);
1542 struct ace_regs __iomem
*regs
= ap
->regs
;
1543 int board_idx
= ap
->board_idx
;
1545 if (board_idx
>= 0) {
1547 if (!tx_coal_tick
[board_idx
])
1548 writel(DEF_TX_COAL
, ®s
->TuneTxCoalTicks
);
1549 if (!max_tx_desc
[board_idx
])
1550 writel(DEF_TX_MAX_DESC
, ®s
->TuneMaxTxDesc
);
1551 if (!rx_coal_tick
[board_idx
])
1552 writel(DEF_RX_COAL
, ®s
->TuneRxCoalTicks
);
1553 if (!max_rx_desc
[board_idx
])
1554 writel(DEF_RX_MAX_DESC
, ®s
->TuneMaxRxDesc
);
1555 if (!tx_ratio
[board_idx
])
1556 writel(DEF_TX_RATIO
, ®s
->TxBufRat
);
1558 if (!tx_coal_tick
[board_idx
])
1559 writel(DEF_JUMBO_TX_COAL
,
1560 ®s
->TuneTxCoalTicks
);
1561 if (!max_tx_desc
[board_idx
])
1562 writel(DEF_JUMBO_TX_MAX_DESC
,
1563 ®s
->TuneMaxTxDesc
);
1564 if (!rx_coal_tick
[board_idx
])
1565 writel(DEF_JUMBO_RX_COAL
,
1566 ®s
->TuneRxCoalTicks
);
1567 if (!max_rx_desc
[board_idx
])
1568 writel(DEF_JUMBO_RX_MAX_DESC
,
1569 ®s
->TuneMaxRxDesc
);
1570 if (!tx_ratio
[board_idx
])
1571 writel(DEF_JUMBO_TX_RATIO
, ®s
->TxBufRat
);
1577 static void ace_watchdog(struct net_device
*data
)
1579 struct net_device
*dev
= data
;
1580 struct ace_private
*ap
= netdev_priv(dev
);
1581 struct ace_regs __iomem
*regs
= ap
->regs
;
1584 * We haven't received a stats update event for more than 2.5
1585 * seconds and there is data in the transmit queue, thus we
1586 * asume the card is stuck.
1588 if (*ap
->tx_csm
!= ap
->tx_ret_csm
) {
1589 printk(KERN_WARNING
"%s: Transmitter is stuck, %08x\n",
1590 dev
->name
, (unsigned int)readl(®s
->HostCtrl
));
1591 /* This can happen due to ieee flow control. */
1593 printk(KERN_DEBUG
"%s: BUG... transmitter died. Kicking it.\n",
1596 netif_wake_queue(dev
);
1602 static void ace_tasklet(unsigned long dev
)
1604 struct ace_private
*ap
= netdev_priv((struct net_device
*)dev
);
1607 cur_size
= atomic_read(&ap
->cur_rx_bufs
);
1608 if ((cur_size
< RX_LOW_STD_THRES
) &&
1609 !test_and_set_bit(0, &ap
->std_refill_busy
)) {
1611 printk("refilling buffers (current %i)\n", cur_size
);
1613 ace_load_std_rx_ring(ap
, RX_RING_SIZE
- cur_size
);
1616 if (ap
->version
>= 2) {
1617 cur_size
= atomic_read(&ap
->cur_mini_bufs
);
1618 if ((cur_size
< RX_LOW_MINI_THRES
) &&
1619 !test_and_set_bit(0, &ap
->mini_refill_busy
)) {
1621 printk("refilling mini buffers (current %i)\n",
1624 ace_load_mini_rx_ring(ap
, RX_MINI_SIZE
- cur_size
);
1628 cur_size
= atomic_read(&ap
->cur_jumbo_bufs
);
1629 if (ap
->jumbo
&& (cur_size
< RX_LOW_JUMBO_THRES
) &&
1630 !test_and_set_bit(0, &ap
->jumbo_refill_busy
)) {
1632 printk("refilling jumbo buffers (current %i)\n", cur_size
);
1634 ace_load_jumbo_rx_ring(ap
, RX_JUMBO_SIZE
- cur_size
);
1636 ap
->tasklet_pending
= 0;
1641 * Copy the contents of the NIC's trace buffer to kernel memory.
1643 static void ace_dump_trace(struct ace_private
*ap
)
1647 if (!(ap
->trace_buf
= kmalloc(ACE_TRACE_SIZE
, GFP_KERNEL
)))
1654 * Load the standard rx ring.
1656 * Loading rings is safe without holding the spin lock since this is
1657 * done only before the device is enabled, thus no interrupts are
1658 * generated and by the interrupt handler/tasklet handler.
1660 static void ace_load_std_rx_ring(struct ace_private
*ap
, int nr_bufs
)
1662 struct ace_regs __iomem
*regs
= ap
->regs
;
1666 prefetchw(&ap
->cur_rx_bufs
);
1668 idx
= ap
->rx_std_skbprd
;
1670 for (i
= 0; i
< nr_bufs
; i
++) {
1671 struct sk_buff
*skb
;
1675 skb
= alloc_skb(ACE_STD_BUFSIZE
+ NET_IP_ALIGN
, GFP_ATOMIC
);
1679 skb_reserve(skb
, NET_IP_ALIGN
);
1680 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
1681 offset_in_page(skb
->data
),
1683 PCI_DMA_FROMDEVICE
);
1684 ap
->skb
->rx_std_skbuff
[idx
].skb
= skb
;
1685 pci_unmap_addr_set(&ap
->skb
->rx_std_skbuff
[idx
],
1688 rd
= &ap
->rx_std_ring
[idx
];
1689 set_aceaddr(&rd
->addr
, mapping
);
1690 rd
->size
= ACE_STD_BUFSIZE
;
1692 idx
= (idx
+ 1) % RX_STD_RING_ENTRIES
;
1698 atomic_add(i
, &ap
->cur_rx_bufs
);
1699 ap
->rx_std_skbprd
= idx
;
1701 if (ACE_IS_TIGON_I(ap
)) {
1703 cmd
.evt
= C_SET_RX_PRD_IDX
;
1705 cmd
.idx
= ap
->rx_std_skbprd
;
1706 ace_issue_cmd(regs
, &cmd
);
1708 writel(idx
, ®s
->RxStdPrd
);
1713 clear_bit(0, &ap
->std_refill_busy
);
1717 printk(KERN_INFO
"Out of memory when allocating "
1718 "standard receive buffers\n");
1723 static void ace_load_mini_rx_ring(struct ace_private
*ap
, int nr_bufs
)
1725 struct ace_regs __iomem
*regs
= ap
->regs
;
1728 prefetchw(&ap
->cur_mini_bufs
);
1730 idx
= ap
->rx_mini_skbprd
;
1731 for (i
= 0; i
< nr_bufs
; i
++) {
1732 struct sk_buff
*skb
;
1736 skb
= alloc_skb(ACE_MINI_BUFSIZE
+ NET_IP_ALIGN
, GFP_ATOMIC
);
1740 skb_reserve(skb
, NET_IP_ALIGN
);
1741 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
1742 offset_in_page(skb
->data
),
1744 PCI_DMA_FROMDEVICE
);
1745 ap
->skb
->rx_mini_skbuff
[idx
].skb
= skb
;
1746 pci_unmap_addr_set(&ap
->skb
->rx_mini_skbuff
[idx
],
1749 rd
= &ap
->rx_mini_ring
[idx
];
1750 set_aceaddr(&rd
->addr
, mapping
);
1751 rd
->size
= ACE_MINI_BUFSIZE
;
1753 idx
= (idx
+ 1) % RX_MINI_RING_ENTRIES
;
1759 atomic_add(i
, &ap
->cur_mini_bufs
);
1761 ap
->rx_mini_skbprd
= idx
;
1763 writel(idx
, ®s
->RxMiniPrd
);
1767 clear_bit(0, &ap
->mini_refill_busy
);
1770 printk(KERN_INFO
"Out of memory when allocating "
1771 "mini receive buffers\n");
1777 * Load the jumbo rx ring, this may happen at any time if the MTU
1778 * is changed to a value > 1500.
1780 static void ace_load_jumbo_rx_ring(struct ace_private
*ap
, int nr_bufs
)
1782 struct ace_regs __iomem
*regs
= ap
->regs
;
1785 idx
= ap
->rx_jumbo_skbprd
;
1787 for (i
= 0; i
< nr_bufs
; i
++) {
1788 struct sk_buff
*skb
;
1792 skb
= alloc_skb(ACE_JUMBO_BUFSIZE
+ NET_IP_ALIGN
, GFP_ATOMIC
);
1796 skb_reserve(skb
, NET_IP_ALIGN
);
1797 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
1798 offset_in_page(skb
->data
),
1800 PCI_DMA_FROMDEVICE
);
1801 ap
->skb
->rx_jumbo_skbuff
[idx
].skb
= skb
;
1802 pci_unmap_addr_set(&ap
->skb
->rx_jumbo_skbuff
[idx
],
1805 rd
= &ap
->rx_jumbo_ring
[idx
];
1806 set_aceaddr(&rd
->addr
, mapping
);
1807 rd
->size
= ACE_JUMBO_BUFSIZE
;
1809 idx
= (idx
+ 1) % RX_JUMBO_RING_ENTRIES
;
1815 atomic_add(i
, &ap
->cur_jumbo_bufs
);
1816 ap
->rx_jumbo_skbprd
= idx
;
1818 if (ACE_IS_TIGON_I(ap
)) {
1820 cmd
.evt
= C_SET_RX_JUMBO_PRD_IDX
;
1822 cmd
.idx
= ap
->rx_jumbo_skbprd
;
1823 ace_issue_cmd(regs
, &cmd
);
1825 writel(idx
, ®s
->RxJumboPrd
);
1830 clear_bit(0, &ap
->jumbo_refill_busy
);
1833 if (net_ratelimit())
1834 printk(KERN_INFO
"Out of memory when allocating "
1835 "jumbo receive buffers\n");
1841 * All events are considered to be slow (RX/TX ints do not generate
1842 * events) and are handled here, outside the main interrupt handler,
1843 * to reduce the size of the handler.
1845 static u32
ace_handle_event(struct net_device
*dev
, u32 evtcsm
, u32 evtprd
)
1847 struct ace_private
*ap
;
1849 ap
= netdev_priv(dev
);
1851 while (evtcsm
!= evtprd
) {
1852 switch (ap
->evt_ring
[evtcsm
].evt
) {
1854 printk(KERN_INFO
"%s: Firmware up and running\n",
1859 case E_STATS_UPDATED
:
1863 u16 code
= ap
->evt_ring
[evtcsm
].code
;
1867 u32 state
= readl(&ap
->regs
->GigLnkState
);
1868 printk(KERN_WARNING
"%s: Optical link UP "
1869 "(%s Duplex, Flow Control: %s%s)\n",
1871 state
& LNK_FULL_DUPLEX
? "Full":"Half",
1872 state
& LNK_TX_FLOW_CTL_Y
? "TX " : "",
1873 state
& LNK_RX_FLOW_CTL_Y
? "RX" : "");
1877 printk(KERN_WARNING
"%s: Optical link DOWN\n",
1880 case E_C_LINK_10_100
:
1881 printk(KERN_WARNING
"%s: 10/100BaseT link "
1885 printk(KERN_ERR
"%s: Unknown optical link "
1886 "state %02x\n", ap
->name
, code
);
1891 switch(ap
->evt_ring
[evtcsm
].code
) {
1892 case E_C_ERR_INVAL_CMD
:
1893 printk(KERN_ERR
"%s: invalid command error\n",
1896 case E_C_ERR_UNIMP_CMD
:
1897 printk(KERN_ERR
"%s: unimplemented command "
1898 "error\n", ap
->name
);
1900 case E_C_ERR_BAD_CFG
:
1901 printk(KERN_ERR
"%s: bad config error\n",
1905 printk(KERN_ERR
"%s: unknown error %02x\n",
1906 ap
->name
, ap
->evt_ring
[evtcsm
].code
);
1909 case E_RESET_JUMBO_RNG
:
1912 for (i
= 0; i
< RX_JUMBO_RING_ENTRIES
; i
++) {
1913 if (ap
->skb
->rx_jumbo_skbuff
[i
].skb
) {
1914 ap
->rx_jumbo_ring
[i
].size
= 0;
1915 set_aceaddr(&ap
->rx_jumbo_ring
[i
].addr
, 0);
1916 dev_kfree_skb(ap
->skb
->rx_jumbo_skbuff
[i
].skb
);
1917 ap
->skb
->rx_jumbo_skbuff
[i
].skb
= NULL
;
1921 if (ACE_IS_TIGON_I(ap
)) {
1923 cmd
.evt
= C_SET_RX_JUMBO_PRD_IDX
;
1926 ace_issue_cmd(ap
->regs
, &cmd
);
1928 writel(0, &((ap
->regs
)->RxJumboPrd
));
1933 ap
->rx_jumbo_skbprd
= 0;
1934 printk(KERN_INFO
"%s: Jumbo ring flushed\n",
1936 clear_bit(0, &ap
->jumbo_refill_busy
);
1940 printk(KERN_ERR
"%s: Unhandled event 0x%02x\n",
1941 ap
->name
, ap
->evt_ring
[evtcsm
].evt
);
1943 evtcsm
= (evtcsm
+ 1) % EVT_RING_ENTRIES
;
1950 static void ace_rx_int(struct net_device
*dev
, u32 rxretprd
, u32 rxretcsm
)
1952 struct ace_private
*ap
= netdev_priv(dev
);
1954 int mini_count
= 0, std_count
= 0;
1958 prefetchw(&ap
->cur_rx_bufs
);
1959 prefetchw(&ap
->cur_mini_bufs
);
1961 while (idx
!= rxretprd
) {
1962 struct ring_info
*rip
;
1963 struct sk_buff
*skb
;
1964 struct rx_desc
*rxdesc
, *retdesc
;
1966 int bd_flags
, desc_type
, mapsize
;
1970 /* make sure the rx descriptor isn't read before rxretprd */
1971 if (idx
== rxretcsm
)
1974 retdesc
= &ap
->rx_return_ring
[idx
];
1975 skbidx
= retdesc
->idx
;
1976 bd_flags
= retdesc
->flags
;
1977 desc_type
= bd_flags
& (BD_FLG_JUMBO
| BD_FLG_MINI
);
1981 * Normal frames do not have any flags set
1983 * Mini and normal frames arrive frequently,
1984 * so use a local counter to avoid doing
1985 * atomic operations for each packet arriving.
1988 rip
= &ap
->skb
->rx_std_skbuff
[skbidx
];
1989 mapsize
= ACE_STD_BUFSIZE
;
1990 rxdesc
= &ap
->rx_std_ring
[skbidx
];
1994 rip
= &ap
->skb
->rx_jumbo_skbuff
[skbidx
];
1995 mapsize
= ACE_JUMBO_BUFSIZE
;
1996 rxdesc
= &ap
->rx_jumbo_ring
[skbidx
];
1997 atomic_dec(&ap
->cur_jumbo_bufs
);
2000 rip
= &ap
->skb
->rx_mini_skbuff
[skbidx
];
2001 mapsize
= ACE_MINI_BUFSIZE
;
2002 rxdesc
= &ap
->rx_mini_ring
[skbidx
];
2006 printk(KERN_INFO
"%s: unknown frame type (0x%02x) "
2007 "returned by NIC\n", dev
->name
,
2014 pci_unmap_page(ap
->pdev
,
2015 pci_unmap_addr(rip
, mapping
),
2017 PCI_DMA_FROMDEVICE
);
2018 skb_put(skb
, retdesc
->size
);
2023 csum
= retdesc
->tcp_udp_csum
;
2025 skb
->protocol
= eth_type_trans(skb
, dev
);
2028 * Instead of forcing the poor tigon mips cpu to calculate
2029 * pseudo hdr checksum, we do this ourselves.
2031 if (bd_flags
& BD_FLG_TCP_UDP_SUM
) {
2032 skb
->csum
= htons(csum
);
2033 skb
->ip_summed
= CHECKSUM_COMPLETE
;
2035 skb
->ip_summed
= CHECKSUM_NONE
;
2040 if (ap
->vlgrp
&& (bd_flags
& BD_FLG_VLAN_TAG
)) {
2041 vlan_hwaccel_rx(skb
, ap
->vlgrp
, retdesc
->vlan
);
2046 dev
->stats
.rx_packets
++;
2047 dev
->stats
.rx_bytes
+= retdesc
->size
;
2049 idx
= (idx
+ 1) % RX_RETURN_RING_ENTRIES
;
2052 atomic_sub(std_count
, &ap
->cur_rx_bufs
);
2053 if (!ACE_IS_TIGON_I(ap
))
2054 atomic_sub(mini_count
, &ap
->cur_mini_bufs
);
2058 * According to the documentation RxRetCsm is obsolete with
2059 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2061 if (ACE_IS_TIGON_I(ap
)) {
2062 writel(idx
, &ap
->regs
->RxRetCsm
);
2073 static inline void ace_tx_int(struct net_device
*dev
,
2076 struct ace_private
*ap
= netdev_priv(dev
);
2079 struct sk_buff
*skb
;
2080 struct tx_ring_info
*info
;
2082 info
= ap
->skb
->tx_skbuff
+ idx
;
2085 if (dma_unmap_len(info
, maplen
)) {
2086 pci_unmap_page(ap
->pdev
, dma_unmap_addr(info
, mapping
),
2087 pci_unmap_len(info
, maplen
),
2089 dma_unmap_len_set(info
, maplen
, 0);
2093 dev
->stats
.tx_packets
++;
2094 dev
->stats
.tx_bytes
+= skb
->len
;
2095 dev_kfree_skb_irq(skb
);
2099 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2100 } while (idx
!= txcsm
);
2102 if (netif_queue_stopped(dev
))
2103 netif_wake_queue(dev
);
2106 ap
->tx_ret_csm
= txcsm
;
2108 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2110 * We could try to make it before. In this case we would get
2111 * the following race condition: hard_start_xmit on other cpu
2112 * enters after we advanced tx_ret_csm and fills space,
2113 * which we have just freed, so that we make illegal device wakeup.
2114 * There is no good way to workaround this (at entry
2115 * to ace_start_xmit detects this condition and prevents
2116 * ring corruption, but it is not a good workaround.)
2118 * When tx_ret_csm is advanced after, we wake up device _only_
2119 * if we really have some space in ring (though the core doing
2120 * hard_start_xmit can see full ring for some period and has to
2121 * synchronize.) Superb.
2122 * BUT! We get another subtle race condition. hard_start_xmit
2123 * may think that ring is full between wakeup and advancing
2124 * tx_ret_csm and will stop device instantly! It is not so bad.
2125 * We are guaranteed that there is something in ring, so that
2126 * the next irq will resume transmission. To speedup this we could
2127 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2128 * (see ace_start_xmit).
2130 * Well, this dilemma exists in all lock-free devices.
2131 * We, following scheme used in drivers by Donald Becker,
2132 * select the least dangerous.
2138 static irqreturn_t
ace_interrupt(int irq
, void *dev_id
)
2140 struct net_device
*dev
= (struct net_device
*)dev_id
;
2141 struct ace_private
*ap
= netdev_priv(dev
);
2142 struct ace_regs __iomem
*regs
= ap
->regs
;
2144 u32 txcsm
, rxretcsm
, rxretprd
;
2148 * In case of PCI shared interrupts or spurious interrupts,
2149 * we want to make sure it is actually our interrupt before
2150 * spending any time in here.
2152 if (!(readl(®s
->HostCtrl
) & IN_INT
))
2156 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2157 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2158 * writel(0, ®s->Mb0Lo).
2160 * "IRQ avoidance" recommended in docs applies to IRQs served
2161 * threads and it is wrong even for that case.
2163 writel(0, ®s
->Mb0Lo
);
2164 readl(®s
->Mb0Lo
);
2167 * There is no conflict between transmit handling in
2168 * start_xmit and receive processing, thus there is no reason
2169 * to take a spin lock for RX handling. Wait until we start
2170 * working on the other stuff - hey we don't need a spin lock
2173 rxretprd
= *ap
->rx_ret_prd
;
2174 rxretcsm
= ap
->cur_rx
;
2176 if (rxretprd
!= rxretcsm
)
2177 ace_rx_int(dev
, rxretprd
, rxretcsm
);
2179 txcsm
= *ap
->tx_csm
;
2180 idx
= ap
->tx_ret_csm
;
2184 * If each skb takes only one descriptor this check degenerates
2185 * to identity, because new space has just been opened.
2186 * But if skbs are fragmented we must check that this index
2187 * update releases enough of space, otherwise we just
2188 * wait for device to make more work.
2190 if (!tx_ring_full(ap
, txcsm
, ap
->tx_prd
))
2191 ace_tx_int(dev
, txcsm
, idx
);
2194 evtcsm
= readl(®s
->EvtCsm
);
2195 evtprd
= *ap
->evt_prd
;
2197 if (evtcsm
!= evtprd
) {
2198 evtcsm
= ace_handle_event(dev
, evtcsm
, evtprd
);
2199 writel(evtcsm
, ®s
->EvtCsm
);
2203 * This has to go last in the interrupt handler and run with
2204 * the spin lock released ... what lock?
2206 if (netif_running(dev
)) {
2208 int run_tasklet
= 0;
2210 cur_size
= atomic_read(&ap
->cur_rx_bufs
);
2211 if (cur_size
< RX_LOW_STD_THRES
) {
2212 if ((cur_size
< RX_PANIC_STD_THRES
) &&
2213 !test_and_set_bit(0, &ap
->std_refill_busy
)) {
2215 printk("low on std buffers %i\n", cur_size
);
2217 ace_load_std_rx_ring(ap
,
2218 RX_RING_SIZE
- cur_size
);
2223 if (!ACE_IS_TIGON_I(ap
)) {
2224 cur_size
= atomic_read(&ap
->cur_mini_bufs
);
2225 if (cur_size
< RX_LOW_MINI_THRES
) {
2226 if ((cur_size
< RX_PANIC_MINI_THRES
) &&
2227 !test_and_set_bit(0,
2228 &ap
->mini_refill_busy
)) {
2230 printk("low on mini buffers %i\n",
2233 ace_load_mini_rx_ring(ap
, RX_MINI_SIZE
- cur_size
);
2240 cur_size
= atomic_read(&ap
->cur_jumbo_bufs
);
2241 if (cur_size
< RX_LOW_JUMBO_THRES
) {
2242 if ((cur_size
< RX_PANIC_JUMBO_THRES
) &&
2243 !test_and_set_bit(0,
2244 &ap
->jumbo_refill_busy
)){
2246 printk("low on jumbo buffers %i\n",
2249 ace_load_jumbo_rx_ring(ap
, RX_JUMBO_SIZE
- cur_size
);
2254 if (run_tasklet
&& !ap
->tasklet_pending
) {
2255 ap
->tasklet_pending
= 1;
2256 tasklet_schedule(&ap
->ace_tasklet
);
2265 static void ace_vlan_rx_register(struct net_device
*dev
, struct vlan_group
*grp
)
2267 struct ace_private
*ap
= netdev_priv(dev
);
2268 unsigned long flags
;
2270 local_irq_save(flags
);
2275 ace_unmask_irq(dev
);
2276 local_irq_restore(flags
);
2278 #endif /* ACENIC_DO_VLAN */
2281 static int ace_open(struct net_device
*dev
)
2283 struct ace_private
*ap
= netdev_priv(dev
);
2284 struct ace_regs __iomem
*regs
= ap
->regs
;
2287 if (!(ap
->fw_running
)) {
2288 printk(KERN_WARNING
"%s: Firmware not running!\n", dev
->name
);
2292 writel(dev
->mtu
+ ETH_HLEN
+ 4, ®s
->IfMtu
);
2294 cmd
.evt
= C_CLEAR_STATS
;
2297 ace_issue_cmd(regs
, &cmd
);
2299 cmd
.evt
= C_HOST_STATE
;
2300 cmd
.code
= C_C_STACK_UP
;
2302 ace_issue_cmd(regs
, &cmd
);
2305 !test_and_set_bit(0, &ap
->jumbo_refill_busy
))
2306 ace_load_jumbo_rx_ring(ap
, RX_JUMBO_SIZE
);
2308 if (dev
->flags
& IFF_PROMISC
) {
2309 cmd
.evt
= C_SET_PROMISC_MODE
;
2310 cmd
.code
= C_C_PROMISC_ENABLE
;
2312 ace_issue_cmd(regs
, &cmd
);
2320 cmd
.evt
= C_LNK_NEGOTIATION
;
2323 ace_issue_cmd(regs
, &cmd
);
2326 netif_start_queue(dev
);
2329 * Setup the bottom half rx ring refill handler
2331 tasklet_init(&ap
->ace_tasklet
, ace_tasklet
, (unsigned long)dev
);
2336 static int ace_close(struct net_device
*dev
)
2338 struct ace_private
*ap
= netdev_priv(dev
);
2339 struct ace_regs __iomem
*regs
= ap
->regs
;
2341 unsigned long flags
;
2345 * Without (or before) releasing irq and stopping hardware, this
2346 * is an absolute non-sense, by the way. It will be reset instantly
2349 netif_stop_queue(dev
);
2353 cmd
.evt
= C_SET_PROMISC_MODE
;
2354 cmd
.code
= C_C_PROMISC_DISABLE
;
2356 ace_issue_cmd(regs
, &cmd
);
2360 cmd
.evt
= C_HOST_STATE
;
2361 cmd
.code
= C_C_STACK_DOWN
;
2363 ace_issue_cmd(regs
, &cmd
);
2365 tasklet_kill(&ap
->ace_tasklet
);
2368 * Make sure one CPU is not processing packets while
2369 * buffers are being released by another.
2372 local_irq_save(flags
);
2375 for (i
= 0; i
< ACE_TX_RING_ENTRIES(ap
); i
++) {
2376 struct sk_buff
*skb
;
2377 struct tx_ring_info
*info
;
2379 info
= ap
->skb
->tx_skbuff
+ i
;
2382 if (dma_unmap_len(info
, maplen
)) {
2383 if (ACE_IS_TIGON_I(ap
)) {
2384 /* NB: TIGON_1 is special, tx_ring is in io space */
2385 struct tx_desc __iomem
*tx
;
2386 tx
= (__force
struct tx_desc __iomem
*) &ap
->tx_ring
[i
];
2387 writel(0, &tx
->addr
.addrhi
);
2388 writel(0, &tx
->addr
.addrlo
);
2389 writel(0, &tx
->flagsize
);
2391 memset(ap
->tx_ring
+ i
, 0,
2392 sizeof(struct tx_desc
));
2393 pci_unmap_page(ap
->pdev
, dma_unmap_addr(info
, mapping
),
2394 pci_unmap_len(info
, maplen
),
2396 dma_unmap_len_set(info
, maplen
, 0);
2405 cmd
.evt
= C_RESET_JUMBO_RNG
;
2408 ace_issue_cmd(regs
, &cmd
);
2411 ace_unmask_irq(dev
);
2412 local_irq_restore(flags
);
2418 static inline dma_addr_t
2419 ace_map_tx_skb(struct ace_private
*ap
, struct sk_buff
*skb
,
2420 struct sk_buff
*tail
, u32 idx
)
2423 struct tx_ring_info
*info
;
2425 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
2426 offset_in_page(skb
->data
),
2427 skb
->len
, PCI_DMA_TODEVICE
);
2429 info
= ap
->skb
->tx_skbuff
+ idx
;
2431 pci_unmap_addr_set(info
, mapping
, mapping
);
2432 pci_unmap_len_set(info
, maplen
, skb
->len
);
2438 ace_load_tx_bd(struct ace_private
*ap
, struct tx_desc
*desc
, u64 addr
,
2439 u32 flagsize
, u32 vlan_tag
)
2441 #if !USE_TX_COAL_NOW
2442 flagsize
&= ~BD_FLG_COAL_NOW
;
2445 if (ACE_IS_TIGON_I(ap
)) {
2446 struct tx_desc __iomem
*io
= (__force
struct tx_desc __iomem
*) desc
;
2447 writel(addr
>> 32, &io
->addr
.addrhi
);
2448 writel(addr
& 0xffffffff, &io
->addr
.addrlo
);
2449 writel(flagsize
, &io
->flagsize
);
2451 writel(vlan_tag
, &io
->vlanres
);
2454 desc
->addr
.addrhi
= addr
>> 32;
2455 desc
->addr
.addrlo
= addr
;
2456 desc
->flagsize
= flagsize
;
2458 desc
->vlanres
= vlan_tag
;
2464 static netdev_tx_t
ace_start_xmit(struct sk_buff
*skb
,
2465 struct net_device
*dev
)
2467 struct ace_private
*ap
= netdev_priv(dev
);
2468 struct ace_regs __iomem
*regs
= ap
->regs
;
2469 struct tx_desc
*desc
;
2471 unsigned long maxjiff
= jiffies
+ 3*HZ
;
2476 if (tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2479 if (!skb_shinfo(skb
)->nr_frags
) {
2483 mapping
= ace_map_tx_skb(ap
, skb
, skb
, idx
);
2484 flagsize
= (skb
->len
<< 16) | (BD_FLG_END
);
2485 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2486 flagsize
|= BD_FLG_TCP_UDP_SUM
;
2488 if (vlan_tx_tag_present(skb
)) {
2489 flagsize
|= BD_FLG_VLAN_TAG
;
2490 vlan_tag
= vlan_tx_tag_get(skb
);
2493 desc
= ap
->tx_ring
+ idx
;
2494 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2496 /* Look at ace_tx_int for explanations. */
2497 if (tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2498 flagsize
|= BD_FLG_COAL_NOW
;
2500 ace_load_tx_bd(ap
, desc
, mapping
, flagsize
, vlan_tag
);
2506 mapping
= ace_map_tx_skb(ap
, skb
, NULL
, idx
);
2507 flagsize
= (skb_headlen(skb
) << 16);
2508 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2509 flagsize
|= BD_FLG_TCP_UDP_SUM
;
2511 if (vlan_tx_tag_present(skb
)) {
2512 flagsize
|= BD_FLG_VLAN_TAG
;
2513 vlan_tag
= vlan_tx_tag_get(skb
);
2517 ace_load_tx_bd(ap
, ap
->tx_ring
+ idx
, mapping
, flagsize
, vlan_tag
);
2519 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2521 for (i
= 0; i
< skb_shinfo(skb
)->nr_frags
; i
++) {
2522 skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[i
];
2523 struct tx_ring_info
*info
;
2526 info
= ap
->skb
->tx_skbuff
+ idx
;
2527 desc
= ap
->tx_ring
+ idx
;
2529 mapping
= pci_map_page(ap
->pdev
, frag
->page
,
2530 frag
->page_offset
, frag
->size
,
2533 flagsize
= (frag
->size
<< 16);
2534 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2535 flagsize
|= BD_FLG_TCP_UDP_SUM
;
2536 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2538 if (i
== skb_shinfo(skb
)->nr_frags
- 1) {
2539 flagsize
|= BD_FLG_END
;
2540 if (tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2541 flagsize
|= BD_FLG_COAL_NOW
;
2544 * Only the last fragment frees
2551 pci_unmap_addr_set(info
, mapping
, mapping
);
2552 pci_unmap_len_set(info
, maplen
, frag
->size
);
2553 ace_load_tx_bd(ap
, desc
, mapping
, flagsize
, vlan_tag
);
2559 ace_set_txprd(regs
, ap
, idx
);
2561 if (flagsize
& BD_FLG_COAL_NOW
) {
2562 netif_stop_queue(dev
);
2565 * A TX-descriptor producer (an IRQ) might have gotten
2566 * inbetween, making the ring free again. Since xmit is
2567 * serialized, this is the only situation we have to
2570 if (!tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2571 netif_wake_queue(dev
);
2574 return NETDEV_TX_OK
;
2578 * This race condition is unavoidable with lock-free drivers.
2579 * We wake up the queue _before_ tx_prd is advanced, so that we can
2580 * enter hard_start_xmit too early, while tx ring still looks closed.
2581 * This happens ~1-4 times per 100000 packets, so that we can allow
2582 * to loop syncing to other CPU. Probably, we need an additional
2583 * wmb() in ace_tx_intr as well.
2585 * Note that this race is relieved by reserving one more entry
2586 * in tx ring than it is necessary (see original non-SG driver).
2587 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2588 * is already overkill.
2590 * Alternative is to return with 1 not throttling queue. In this
2591 * case loop becomes longer, no more useful effects.
2593 if (time_before(jiffies
, maxjiff
)) {
2599 /* The ring is stuck full. */
2600 printk(KERN_WARNING
"%s: Transmit ring stuck full\n", dev
->name
);
2601 return NETDEV_TX_BUSY
;
2605 static int ace_change_mtu(struct net_device
*dev
, int new_mtu
)
2607 struct ace_private
*ap
= netdev_priv(dev
);
2608 struct ace_regs __iomem
*regs
= ap
->regs
;
2610 if (new_mtu
> ACE_JUMBO_MTU
)
2613 writel(new_mtu
+ ETH_HLEN
+ 4, ®s
->IfMtu
);
2616 if (new_mtu
> ACE_STD_MTU
) {
2618 printk(KERN_INFO
"%s: Enabling Jumbo frame "
2619 "support\n", dev
->name
);
2621 if (!test_and_set_bit(0, &ap
->jumbo_refill_busy
))
2622 ace_load_jumbo_rx_ring(ap
, RX_JUMBO_SIZE
);
2623 ace_set_rxtx_parms(dev
, 1);
2626 while (test_and_set_bit(0, &ap
->jumbo_refill_busy
));
2627 ace_sync_irq(dev
->irq
);
2628 ace_set_rxtx_parms(dev
, 0);
2632 cmd
.evt
= C_RESET_JUMBO_RNG
;
2635 ace_issue_cmd(regs
, &cmd
);
2642 static int ace_get_settings(struct net_device
*dev
, struct ethtool_cmd
*ecmd
)
2644 struct ace_private
*ap
= netdev_priv(dev
);
2645 struct ace_regs __iomem
*regs
= ap
->regs
;
2648 memset(ecmd
, 0, sizeof(struct ethtool_cmd
));
2650 (SUPPORTED_10baseT_Half
| SUPPORTED_10baseT_Full
|
2651 SUPPORTED_100baseT_Half
| SUPPORTED_100baseT_Full
|
2652 SUPPORTED_1000baseT_Half
| SUPPORTED_1000baseT_Full
|
2653 SUPPORTED_Autoneg
| SUPPORTED_FIBRE
);
2655 ecmd
->port
= PORT_FIBRE
;
2656 ecmd
->transceiver
= XCVR_INTERNAL
;
2658 link
= readl(®s
->GigLnkState
);
2659 if (link
& LNK_1000MB
)
2660 ecmd
->speed
= SPEED_1000
;
2662 link
= readl(®s
->FastLnkState
);
2663 if (link
& LNK_100MB
)
2664 ecmd
->speed
= SPEED_100
;
2665 else if (link
& LNK_10MB
)
2666 ecmd
->speed
= SPEED_10
;
2670 if (link
& LNK_FULL_DUPLEX
)
2671 ecmd
->duplex
= DUPLEX_FULL
;
2673 ecmd
->duplex
= DUPLEX_HALF
;
2675 if (link
& LNK_NEGOTIATE
)
2676 ecmd
->autoneg
= AUTONEG_ENABLE
;
2678 ecmd
->autoneg
= AUTONEG_DISABLE
;
2682 * Current struct ethtool_cmd is insufficient
2684 ecmd
->trace
= readl(®s
->TuneTrace
);
2686 ecmd
->txcoal
= readl(®s
->TuneTxCoalTicks
);
2687 ecmd
->rxcoal
= readl(®s
->TuneRxCoalTicks
);
2689 ecmd
->maxtxpkt
= readl(®s
->TuneMaxTxDesc
);
2690 ecmd
->maxrxpkt
= readl(®s
->TuneMaxRxDesc
);
2695 static int ace_set_settings(struct net_device
*dev
, struct ethtool_cmd
*ecmd
)
2697 struct ace_private
*ap
= netdev_priv(dev
);
2698 struct ace_regs __iomem
*regs
= ap
->regs
;
2701 link
= readl(®s
->GigLnkState
);
2702 if (link
& LNK_1000MB
)
2705 link
= readl(®s
->FastLnkState
);
2706 if (link
& LNK_100MB
)
2708 else if (link
& LNK_10MB
)
2714 link
= LNK_ENABLE
| LNK_1000MB
| LNK_100MB
| LNK_10MB
|
2715 LNK_RX_FLOW_CTL_Y
| LNK_NEG_FCTL
;
2716 if (!ACE_IS_TIGON_I(ap
))
2717 link
|= LNK_TX_FLOW_CTL_Y
;
2718 if (ecmd
->autoneg
== AUTONEG_ENABLE
)
2719 link
|= LNK_NEGOTIATE
;
2720 if (ecmd
->speed
!= speed
) {
2721 link
&= ~(LNK_1000MB
| LNK_100MB
| LNK_10MB
);
2735 if (ecmd
->duplex
== DUPLEX_FULL
)
2736 link
|= LNK_FULL_DUPLEX
;
2738 if (link
!= ap
->link
) {
2740 printk(KERN_INFO
"%s: Renegotiating link state\n",
2744 writel(link
, ®s
->TuneLink
);
2745 if (!ACE_IS_TIGON_I(ap
))
2746 writel(link
, ®s
->TuneFastLink
);
2749 cmd
.evt
= C_LNK_NEGOTIATION
;
2752 ace_issue_cmd(regs
, &cmd
);
2757 static void ace_get_drvinfo(struct net_device
*dev
,
2758 struct ethtool_drvinfo
*info
)
2760 struct ace_private
*ap
= netdev_priv(dev
);
2762 strlcpy(info
->driver
, "acenic", sizeof(info
->driver
));
2763 snprintf(info
->version
, sizeof(info
->version
), "%i.%i.%i",
2764 ap
->firmware_major
, ap
->firmware_minor
,
2768 strlcpy(info
->bus_info
, pci_name(ap
->pdev
),
2769 sizeof(info
->bus_info
));
2774 * Set the hardware MAC address.
2776 static int ace_set_mac_addr(struct net_device
*dev
, void *p
)
2778 struct ace_private
*ap
= netdev_priv(dev
);
2779 struct ace_regs __iomem
*regs
= ap
->regs
;
2780 struct sockaddr
*addr
=p
;
2784 if(netif_running(dev
))
2787 memcpy(dev
->dev_addr
, addr
->sa_data
,dev
->addr_len
);
2789 da
= (u8
*)dev
->dev_addr
;
2791 writel(da
[0] << 8 | da
[1], ®s
->MacAddrHi
);
2792 writel((da
[2] << 24) | (da
[3] << 16) | (da
[4] << 8) | da
[5],
2795 cmd
.evt
= C_SET_MAC_ADDR
;
2798 ace_issue_cmd(regs
, &cmd
);
2804 static void ace_set_multicast_list(struct net_device
*dev
)
2806 struct ace_private
*ap
= netdev_priv(dev
);
2807 struct ace_regs __iomem
*regs
= ap
->regs
;
2810 if ((dev
->flags
& IFF_ALLMULTI
) && !(ap
->mcast_all
)) {
2811 cmd
.evt
= C_SET_MULTICAST_MODE
;
2812 cmd
.code
= C_C_MCAST_ENABLE
;
2814 ace_issue_cmd(regs
, &cmd
);
2816 } else if (ap
->mcast_all
) {
2817 cmd
.evt
= C_SET_MULTICAST_MODE
;
2818 cmd
.code
= C_C_MCAST_DISABLE
;
2820 ace_issue_cmd(regs
, &cmd
);
2824 if ((dev
->flags
& IFF_PROMISC
) && !(ap
->promisc
)) {
2825 cmd
.evt
= C_SET_PROMISC_MODE
;
2826 cmd
.code
= C_C_PROMISC_ENABLE
;
2828 ace_issue_cmd(regs
, &cmd
);
2830 }else if (!(dev
->flags
& IFF_PROMISC
) && (ap
->promisc
)) {
2831 cmd
.evt
= C_SET_PROMISC_MODE
;
2832 cmd
.code
= C_C_PROMISC_DISABLE
;
2834 ace_issue_cmd(regs
, &cmd
);
2839 * For the time being multicast relies on the upper layers
2840 * filtering it properly. The Firmware does not allow one to
2841 * set the entire multicast list at a time and keeping track of
2842 * it here is going to be messy.
2844 if (!netdev_mc_empty(dev
) && !ap
->mcast_all
) {
2845 cmd
.evt
= C_SET_MULTICAST_MODE
;
2846 cmd
.code
= C_C_MCAST_ENABLE
;
2848 ace_issue_cmd(regs
, &cmd
);
2849 }else if (!ap
->mcast_all
) {
2850 cmd
.evt
= C_SET_MULTICAST_MODE
;
2851 cmd
.code
= C_C_MCAST_DISABLE
;
2853 ace_issue_cmd(regs
, &cmd
);
2858 static struct net_device_stats
*ace_get_stats(struct net_device
*dev
)
2860 struct ace_private
*ap
= netdev_priv(dev
);
2861 struct ace_mac_stats __iomem
*mac_stats
=
2862 (struct ace_mac_stats __iomem
*)ap
->regs
->Stats
;
2864 dev
->stats
.rx_missed_errors
= readl(&mac_stats
->drop_space
);
2865 dev
->stats
.multicast
= readl(&mac_stats
->kept_mc
);
2866 dev
->stats
.collisions
= readl(&mac_stats
->coll
);
2872 static void __devinit
ace_copy(struct ace_regs __iomem
*regs
, const __be32
*src
,
2875 void __iomem
*tdest
;
2882 tsize
= min_t(u32
, ((~dest
& (ACE_WINDOW_SIZE
- 1)) + 1),
2883 min_t(u32
, size
, ACE_WINDOW_SIZE
));
2884 tdest
= (void __iomem
*) ®s
->Window
+
2885 (dest
& (ACE_WINDOW_SIZE
- 1));
2886 writel(dest
& ~(ACE_WINDOW_SIZE
- 1), ®s
->WinBase
);
2887 for (i
= 0; i
< (tsize
/ 4); i
++) {
2888 /* Firmware is big-endian */
2889 writel(be32_to_cpup(src
), tdest
);
2899 static void __devinit
ace_clear(struct ace_regs __iomem
*regs
, u32 dest
, int size
)
2901 void __iomem
*tdest
;
2908 tsize
= min_t(u32
, ((~dest
& (ACE_WINDOW_SIZE
- 1)) + 1),
2909 min_t(u32
, size
, ACE_WINDOW_SIZE
));
2910 tdest
= (void __iomem
*) ®s
->Window
+
2911 (dest
& (ACE_WINDOW_SIZE
- 1));
2912 writel(dest
& ~(ACE_WINDOW_SIZE
- 1), ®s
->WinBase
);
2914 for (i
= 0; i
< (tsize
/ 4); i
++) {
2915 writel(0, tdest
+ i
*4);
2927 * Download the firmware into the SRAM on the NIC
2929 * This operation requires the NIC to be halted and is performed with
2930 * interrupts disabled and with the spinlock hold.
2932 static int __devinit
ace_load_firmware(struct net_device
*dev
)
2934 const struct firmware
*fw
;
2935 const char *fw_name
= "acenic/tg2.bin";
2936 struct ace_private
*ap
= netdev_priv(dev
);
2937 struct ace_regs __iomem
*regs
= ap
->regs
;
2938 const __be32
*fw_data
;
2942 if (!(readl(®s
->CpuCtrl
) & CPU_HALTED
)) {
2943 printk(KERN_ERR
"%s: trying to download firmware while the "
2944 "CPU is running!\n", ap
->name
);
2948 if (ACE_IS_TIGON_I(ap
))
2949 fw_name
= "acenic/tg1.bin";
2951 ret
= request_firmware(&fw
, fw_name
, &ap
->pdev
->dev
);
2953 printk(KERN_ERR
"%s: Failed to load firmware \"%s\"\n",
2958 fw_data
= (void *)fw
->data
;
2960 /* Firmware blob starts with version numbers, followed by
2961 load and start address. Remainder is the blob to be loaded
2962 contiguously from load address. We don't bother to represent
2963 the BSS/SBSS sections any more, since we were clearing the
2964 whole thing anyway. */
2965 ap
->firmware_major
= fw
->data
[0];
2966 ap
->firmware_minor
= fw
->data
[1];
2967 ap
->firmware_fix
= fw
->data
[2];
2969 ap
->firmware_start
= be32_to_cpu(fw_data
[1]);
2970 if (ap
->firmware_start
< 0x4000 || ap
->firmware_start
>= 0x80000) {
2971 printk(KERN_ERR
"%s: bogus load address %08x in \"%s\"\n",
2972 ap
->name
, ap
->firmware_start
, fw_name
);
2977 load_addr
= be32_to_cpu(fw_data
[2]);
2978 if (load_addr
< 0x4000 || load_addr
>= 0x80000) {
2979 printk(KERN_ERR
"%s: bogus load address %08x in \"%s\"\n",
2980 ap
->name
, load_addr
, fw_name
);
2986 * Do not try to clear more than 512KiB or we end up seeing
2987 * funny things on NICs with only 512KiB SRAM
2989 ace_clear(regs
, 0x2000, 0x80000-0x2000);
2990 ace_copy(regs
, &fw_data
[3], load_addr
, fw
->size
-12);
2992 release_firmware(fw
);
2998 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
3000 * Accessing the EEPROM is `interesting' to say the least - don't read
3001 * this code right after dinner.
3003 * This is all about black magic and bit-banging the device .... I
3004 * wonder in what hospital they have put the guy who designed the i2c
3007 * Oh yes, this is only the beginning!
3009 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
3010 * code i2c readout code by beta testing all my hacks.
3012 static void __devinit
eeprom_start(struct ace_regs __iomem
*regs
)
3016 readl(®s
->LocalCtrl
);
3017 udelay(ACE_SHORT_DELAY
);
3018 local
= readl(®s
->LocalCtrl
);
3019 local
|= EEPROM_DATA_OUT
| EEPROM_WRITE_ENABLE
;
3020 writel(local
, ®s
->LocalCtrl
);
3021 readl(®s
->LocalCtrl
);
3023 udelay(ACE_SHORT_DELAY
);
3024 local
|= EEPROM_CLK_OUT
;
3025 writel(local
, ®s
->LocalCtrl
);
3026 readl(®s
->LocalCtrl
);
3028 udelay(ACE_SHORT_DELAY
);
3029 local
&= ~EEPROM_DATA_OUT
;
3030 writel(local
, ®s
->LocalCtrl
);
3031 readl(®s
->LocalCtrl
);
3033 udelay(ACE_SHORT_DELAY
);
3034 local
&= ~EEPROM_CLK_OUT
;
3035 writel(local
, ®s
->LocalCtrl
);
3036 readl(®s
->LocalCtrl
);
3041 static void __devinit
eeprom_prep(struct ace_regs __iomem
*regs
, u8 magic
)
3046 udelay(ACE_SHORT_DELAY
);
3047 local
= readl(®s
->LocalCtrl
);
3048 local
&= ~EEPROM_DATA_OUT
;
3049 local
|= EEPROM_WRITE_ENABLE
;
3050 writel(local
, ®s
->LocalCtrl
);
3051 readl(®s
->LocalCtrl
);
3054 for (i
= 0; i
< 8; i
++, magic
<<= 1) {
3055 udelay(ACE_SHORT_DELAY
);
3057 local
|= EEPROM_DATA_OUT
;
3059 local
&= ~EEPROM_DATA_OUT
;
3060 writel(local
, ®s
->LocalCtrl
);
3061 readl(®s
->LocalCtrl
);
3064 udelay(ACE_SHORT_DELAY
);
3065 local
|= EEPROM_CLK_OUT
;
3066 writel(local
, ®s
->LocalCtrl
);
3067 readl(®s
->LocalCtrl
);
3069 udelay(ACE_SHORT_DELAY
);
3070 local
&= ~(EEPROM_CLK_OUT
| EEPROM_DATA_OUT
);
3071 writel(local
, ®s
->LocalCtrl
);
3072 readl(®s
->LocalCtrl
);
3078 static int __devinit
eeprom_check_ack(struct ace_regs __iomem
*regs
)
3083 local
= readl(®s
->LocalCtrl
);
3084 local
&= ~EEPROM_WRITE_ENABLE
;
3085 writel(local
, ®s
->LocalCtrl
);
3086 readl(®s
->LocalCtrl
);
3088 udelay(ACE_LONG_DELAY
);
3089 local
|= EEPROM_CLK_OUT
;
3090 writel(local
, ®s
->LocalCtrl
);
3091 readl(®s
->LocalCtrl
);
3093 udelay(ACE_SHORT_DELAY
);
3094 /* sample data in middle of high clk */
3095 state
= (readl(®s
->LocalCtrl
) & EEPROM_DATA_IN
) != 0;
3096 udelay(ACE_SHORT_DELAY
);
3098 writel(readl(®s
->LocalCtrl
) & ~EEPROM_CLK_OUT
, ®s
->LocalCtrl
);
3099 readl(®s
->LocalCtrl
);
3106 static void __devinit
eeprom_stop(struct ace_regs __iomem
*regs
)
3110 udelay(ACE_SHORT_DELAY
);
3111 local
= readl(®s
->LocalCtrl
);
3112 local
|= EEPROM_WRITE_ENABLE
;
3113 writel(local
, ®s
->LocalCtrl
);
3114 readl(®s
->LocalCtrl
);
3116 udelay(ACE_SHORT_DELAY
);
3117 local
&= ~EEPROM_DATA_OUT
;
3118 writel(local
, ®s
->LocalCtrl
);
3119 readl(®s
->LocalCtrl
);
3121 udelay(ACE_SHORT_DELAY
);
3122 local
|= EEPROM_CLK_OUT
;
3123 writel(local
, ®s
->LocalCtrl
);
3124 readl(®s
->LocalCtrl
);
3126 udelay(ACE_SHORT_DELAY
);
3127 local
|= EEPROM_DATA_OUT
;
3128 writel(local
, ®s
->LocalCtrl
);
3129 readl(®s
->LocalCtrl
);
3131 udelay(ACE_LONG_DELAY
);
3132 local
&= ~EEPROM_CLK_OUT
;
3133 writel(local
, ®s
->LocalCtrl
);
3139 * Read a whole byte from the EEPROM.
3141 static int __devinit
read_eeprom_byte(struct net_device
*dev
,
3142 unsigned long offset
)
3144 struct ace_private
*ap
= netdev_priv(dev
);
3145 struct ace_regs __iomem
*regs
= ap
->regs
;
3146 unsigned long flags
;
3152 * Don't take interrupts on this CPU will bit banging
3153 * the %#%#@$ I2C device
3155 local_irq_save(flags
);
3159 eeprom_prep(regs
, EEPROM_WRITE_SELECT
);
3160 if (eeprom_check_ack(regs
)) {
3161 local_irq_restore(flags
);
3162 printk(KERN_ERR
"%s: Unable to sync eeprom\n", ap
->name
);
3164 goto eeprom_read_error
;
3167 eeprom_prep(regs
, (offset
>> 8) & 0xff);
3168 if (eeprom_check_ack(regs
)) {
3169 local_irq_restore(flags
);
3170 printk(KERN_ERR
"%s: Unable to set address byte 0\n",
3173 goto eeprom_read_error
;
3176 eeprom_prep(regs
, offset
& 0xff);
3177 if (eeprom_check_ack(regs
)) {
3178 local_irq_restore(flags
);
3179 printk(KERN_ERR
"%s: Unable to set address byte 1\n",
3182 goto eeprom_read_error
;
3186 eeprom_prep(regs
, EEPROM_READ_SELECT
);
3187 if (eeprom_check_ack(regs
)) {
3188 local_irq_restore(flags
);
3189 printk(KERN_ERR
"%s: Unable to set READ_SELECT\n",
3192 goto eeprom_read_error
;
3195 for (i
= 0; i
< 8; i
++) {
3196 local
= readl(®s
->LocalCtrl
);
3197 local
&= ~EEPROM_WRITE_ENABLE
;
3198 writel(local
, ®s
->LocalCtrl
);
3199 readl(®s
->LocalCtrl
);
3200 udelay(ACE_LONG_DELAY
);
3202 local
|= EEPROM_CLK_OUT
;
3203 writel(local
, ®s
->LocalCtrl
);
3204 readl(®s
->LocalCtrl
);
3206 udelay(ACE_SHORT_DELAY
);
3207 /* sample data mid high clk */
3208 result
= (result
<< 1) |
3209 ((readl(®s
->LocalCtrl
) & EEPROM_DATA_IN
) != 0);
3210 udelay(ACE_SHORT_DELAY
);
3212 local
= readl(®s
->LocalCtrl
);
3213 local
&= ~EEPROM_CLK_OUT
;
3214 writel(local
, ®s
->LocalCtrl
);
3215 readl(®s
->LocalCtrl
);
3216 udelay(ACE_SHORT_DELAY
);
3219 local
|= EEPROM_WRITE_ENABLE
;
3220 writel(local
, ®s
->LocalCtrl
);
3221 readl(®s
->LocalCtrl
);
3223 udelay(ACE_SHORT_DELAY
);
3227 local
|= EEPROM_DATA_OUT
;
3228 writel(local
, ®s
->LocalCtrl
);
3229 readl(®s
->LocalCtrl
);
3231 udelay(ACE_SHORT_DELAY
);
3232 writel(readl(®s
->LocalCtrl
) | EEPROM_CLK_OUT
, ®s
->LocalCtrl
);
3233 readl(®s
->LocalCtrl
);
3234 udelay(ACE_LONG_DELAY
);
3235 writel(readl(®s
->LocalCtrl
) & ~EEPROM_CLK_OUT
, ®s
->LocalCtrl
);
3236 readl(®s
->LocalCtrl
);
3238 udelay(ACE_SHORT_DELAY
);
3241 local_irq_restore(flags
);
3246 printk(KERN_ERR
"%s: Unable to read eeprom byte 0x%02lx\n",