15a62db656dee09d4fe09ec663b7b00e22152555
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / mtd / onenand / onenand_base.c
1 /*
2 * linux/drivers/mtd/onenand/onenand_base.c
3 *
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
6 *
7 * Credits:
8 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
9 * auto-placement support, read-while load support, various fixes
10 * Copyright (C) Nokia Corporation, 2007
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/sched.h>
21 #include <linux/delay.h>
22 #include <linux/interrupt.h>
23 #include <linux/jiffies.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/onenand.h>
26 #include <linux/mtd/partitions.h>
27
28 #include <asm/io.h>
29
30 /**
31 * onenand_oob_64 - oob info for large (2KB) page
32 */
33 static struct nand_ecclayout onenand_oob_64 = {
34 .eccbytes = 20,
35 .eccpos = {
36 8, 9, 10, 11, 12,
37 24, 25, 26, 27, 28,
38 40, 41, 42, 43, 44,
39 56, 57, 58, 59, 60,
40 },
41 .oobfree = {
42 {2, 3}, {14, 2}, {18, 3}, {30, 2},
43 {34, 3}, {46, 2}, {50, 3}, {62, 2}
44 }
45 };
46
47 /**
48 * onenand_oob_32 - oob info for middle (1KB) page
49 */
50 static struct nand_ecclayout onenand_oob_32 = {
51 .eccbytes = 10,
52 .eccpos = {
53 8, 9, 10, 11, 12,
54 24, 25, 26, 27, 28,
55 },
56 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
57 };
58
59 static const unsigned char ffchars[] = {
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
62 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
63 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
64 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
65 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
66 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
67 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
68 };
69
70 /**
71 * onenand_readw - [OneNAND Interface] Read OneNAND register
72 * @param addr address to read
73 *
74 * Read OneNAND register
75 */
76 static unsigned short onenand_readw(void __iomem *addr)
77 {
78 return readw(addr);
79 }
80
81 /**
82 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
83 * @param value value to write
84 * @param addr address to write
85 *
86 * Write OneNAND register with value
87 */
88 static void onenand_writew(unsigned short value, void __iomem *addr)
89 {
90 writew(value, addr);
91 }
92
93 /**
94 * onenand_block_address - [DEFAULT] Get block address
95 * @param this onenand chip data structure
96 * @param block the block
97 * @return translated block address if DDP, otherwise same
98 *
99 * Setup Start Address 1 Register (F100h)
100 */
101 static int onenand_block_address(struct onenand_chip *this, int block)
102 {
103 /* Device Flash Core select, NAND Flash Block Address */
104 if (block & this->density_mask)
105 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
106
107 return block;
108 }
109
110 /**
111 * onenand_bufferram_address - [DEFAULT] Get bufferram address
112 * @param this onenand chip data structure
113 * @param block the block
114 * @return set DBS value if DDP, otherwise 0
115 *
116 * Setup Start Address 2 Register (F101h) for DDP
117 */
118 static int onenand_bufferram_address(struct onenand_chip *this, int block)
119 {
120 /* Device BufferRAM Select */
121 if (block & this->density_mask)
122 return ONENAND_DDP_CHIP1;
123
124 return ONENAND_DDP_CHIP0;
125 }
126
127 /**
128 * onenand_page_address - [DEFAULT] Get page address
129 * @param page the page address
130 * @param sector the sector address
131 * @return combined page and sector address
132 *
133 * Setup Start Address 8 Register (F107h)
134 */
135 static int onenand_page_address(int page, int sector)
136 {
137 /* Flash Page Address, Flash Sector Address */
138 int fpa, fsa;
139
140 fpa = page & ONENAND_FPA_MASK;
141 fsa = sector & ONENAND_FSA_MASK;
142
143 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
144 }
145
146 /**
147 * onenand_buffer_address - [DEFAULT] Get buffer address
148 * @param dataram1 DataRAM index
149 * @param sectors the sector address
150 * @param count the number of sectors
151 * @return the start buffer value
152 *
153 * Setup Start Buffer Register (F200h)
154 */
155 static int onenand_buffer_address(int dataram1, int sectors, int count)
156 {
157 int bsa, bsc;
158
159 /* BufferRAM Sector Address */
160 bsa = sectors & ONENAND_BSA_MASK;
161
162 if (dataram1)
163 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
164 else
165 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
166
167 /* BufferRAM Sector Count */
168 bsc = count & ONENAND_BSC_MASK;
169
170 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
171 }
172
173 /**
174 * onenand_get_density - [DEFAULT] Get OneNAND density
175 * @param dev_id OneNAND device ID
176 *
177 * Get OneNAND density from device ID
178 */
179 static inline int onenand_get_density(int dev_id)
180 {
181 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
182 return (density & ONENAND_DEVICE_DENSITY_MASK);
183 }
184
185 /**
186 * onenand_command - [DEFAULT] Send command to OneNAND device
187 * @param mtd MTD device structure
188 * @param cmd the command to be sent
189 * @param addr offset to read from or write to
190 * @param len number of bytes to read or write
191 *
192 * Send command to OneNAND device. This function is used for middle/large page
193 * devices (1KB/2KB Bytes per page)
194 */
195 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
196 {
197 struct onenand_chip *this = mtd->priv;
198 int value, block, page;
199
200 /* Address translation */
201 switch (cmd) {
202 case ONENAND_CMD_UNLOCK:
203 case ONENAND_CMD_LOCK:
204 case ONENAND_CMD_LOCK_TIGHT:
205 case ONENAND_CMD_UNLOCK_ALL:
206 block = -1;
207 page = -1;
208 break;
209
210 case ONENAND_CMD_ERASE:
211 case ONENAND_CMD_BUFFERRAM:
212 case ONENAND_CMD_OTP_ACCESS:
213 block = (int) (addr >> this->erase_shift);
214 page = -1;
215 break;
216
217 default:
218 block = (int) (addr >> this->erase_shift);
219 page = (int) (addr >> this->page_shift);
220
221 if (ONENAND_IS_2PLANE(this)) {
222 /* Make the even block number */
223 block &= ~1;
224 /* Is it the odd plane? */
225 if (addr & this->writesize)
226 block++;
227 page >>= 1;
228 }
229 page &= this->page_mask;
230 break;
231 }
232
233 /* NOTE: The setting order of the registers is very important! */
234 if (cmd == ONENAND_CMD_BUFFERRAM) {
235 /* Select DataRAM for DDP */
236 value = onenand_bufferram_address(this, block);
237 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
238
239 if (ONENAND_IS_2PLANE(this))
240 /* It is always BufferRAM0 */
241 ONENAND_SET_BUFFERRAM0(this);
242 else
243 /* Switch to the next data buffer */
244 ONENAND_SET_NEXT_BUFFERRAM(this);
245
246 return 0;
247 }
248
249 if (block != -1) {
250 /* Write 'DFS, FBA' of Flash */
251 value = onenand_block_address(this, block);
252 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
253
254 /* Select DataRAM for DDP */
255 value = onenand_bufferram_address(this, block);
256 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
257 }
258
259 if (page != -1) {
260 /* Now we use page size operation */
261 int sectors = 4, count = 4;
262 int dataram;
263
264 switch (cmd) {
265 case ONENAND_CMD_READ:
266 case ONENAND_CMD_READOOB:
267 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
268 break;
269
270 default:
271 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
272 cmd = ONENAND_CMD_2X_PROG;
273 dataram = ONENAND_CURRENT_BUFFERRAM(this);
274 break;
275 }
276
277 /* Write 'FPA, FSA' of Flash */
278 value = onenand_page_address(page, sectors);
279 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
280
281 /* Write 'BSA, BSC' of DataRAM */
282 value = onenand_buffer_address(dataram, sectors, count);
283 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
284 }
285
286 /* Interrupt clear */
287 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
288
289 /* Write command */
290 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
291
292 return 0;
293 }
294
295 /**
296 * onenand_wait - [DEFAULT] wait until the command is done
297 * @param mtd MTD device structure
298 * @param state state to select the max. timeout value
299 *
300 * Wait for command done. This applies to all OneNAND command
301 * Read can take up to 30us, erase up to 2ms and program up to 350us
302 * according to general OneNAND specs
303 */
304 static int onenand_wait(struct mtd_info *mtd, int state)
305 {
306 struct onenand_chip * this = mtd->priv;
307 unsigned long timeout;
308 unsigned int flags = ONENAND_INT_MASTER;
309 unsigned int interrupt = 0;
310 unsigned int ctrl;
311
312 /* The 20 msec is enough */
313 timeout = jiffies + msecs_to_jiffies(20);
314 while (time_before(jiffies, timeout)) {
315 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
316
317 if (interrupt & flags)
318 break;
319
320 if (state != FL_READING)
321 cond_resched();
322 }
323 /* To get correct interrupt status in timeout case */
324 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
325
326 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
327
328 if (ctrl & ONENAND_CTRL_ERROR) {
329 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
330 if (ctrl & ONENAND_CTRL_LOCK)
331 printk(KERN_ERR "onenand_wait: it's locked error.\n");
332 return -EIO;
333 }
334
335 if (interrupt & ONENAND_INT_READ) {
336 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
337 if (ecc) {
338 if (ecc & ONENAND_ECC_2BIT_ALL) {
339 printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
340 mtd->ecc_stats.failed++;
341 return -EBADMSG;
342 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
343 printk(KERN_INFO "onenand_wait: correctable ECC error = 0x%04x\n", ecc);
344 mtd->ecc_stats.corrected++;
345 }
346 }
347 } else if (state == FL_READING) {
348 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
349 return -EIO;
350 }
351
352 return 0;
353 }
354
355 /*
356 * onenand_interrupt - [DEFAULT] onenand interrupt handler
357 * @param irq onenand interrupt number
358 * @param dev_id interrupt data
359 *
360 * complete the work
361 */
362 static irqreturn_t onenand_interrupt(int irq, void *data)
363 {
364 struct onenand_chip *this = data;
365
366 /* To handle shared interrupt */
367 if (!this->complete.done)
368 complete(&this->complete);
369
370 return IRQ_HANDLED;
371 }
372
373 /*
374 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
375 * @param mtd MTD device structure
376 * @param state state to select the max. timeout value
377 *
378 * Wait for command done.
379 */
380 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
381 {
382 struct onenand_chip *this = mtd->priv;
383
384 wait_for_completion(&this->complete);
385
386 return onenand_wait(mtd, state);
387 }
388
389 /*
390 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
391 * @param mtd MTD device structure
392 * @param state state to select the max. timeout value
393 *
394 * Try interrupt based wait (It is used one-time)
395 */
396 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
397 {
398 struct onenand_chip *this = mtd->priv;
399 unsigned long remain, timeout;
400
401 /* We use interrupt wait first */
402 this->wait = onenand_interrupt_wait;
403
404 timeout = msecs_to_jiffies(100);
405 remain = wait_for_completion_timeout(&this->complete, timeout);
406 if (!remain) {
407 printk(KERN_INFO "OneNAND: There's no interrupt. "
408 "We use the normal wait\n");
409
410 /* Release the irq */
411 free_irq(this->irq, this);
412
413 this->wait = onenand_wait;
414 }
415
416 return onenand_wait(mtd, state);
417 }
418
419 /*
420 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
421 * @param mtd MTD device structure
422 *
423 * There's two method to wait onenand work
424 * 1. polling - read interrupt status register
425 * 2. interrupt - use the kernel interrupt method
426 */
427 static void onenand_setup_wait(struct mtd_info *mtd)
428 {
429 struct onenand_chip *this = mtd->priv;
430 int syscfg;
431
432 init_completion(&this->complete);
433
434 if (this->irq <= 0) {
435 this->wait = onenand_wait;
436 return;
437 }
438
439 if (request_irq(this->irq, &onenand_interrupt,
440 IRQF_SHARED, "onenand", this)) {
441 /* If we can't get irq, use the normal wait */
442 this->wait = onenand_wait;
443 return;
444 }
445
446 /* Enable interrupt */
447 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
448 syscfg |= ONENAND_SYS_CFG1_IOBE;
449 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
450
451 this->wait = onenand_try_interrupt_wait;
452 }
453
454 /**
455 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
456 * @param mtd MTD data structure
457 * @param area BufferRAM area
458 * @return offset given area
459 *
460 * Return BufferRAM offset given area
461 */
462 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
463 {
464 struct onenand_chip *this = mtd->priv;
465
466 if (ONENAND_CURRENT_BUFFERRAM(this)) {
467 /* Note: the 'this->writesize' is a real page size */
468 if (area == ONENAND_DATARAM)
469 return this->writesize;
470 if (area == ONENAND_SPARERAM)
471 return mtd->oobsize;
472 }
473
474 return 0;
475 }
476
477 /**
478 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
479 * @param mtd MTD data structure
480 * @param area BufferRAM area
481 * @param buffer the databuffer to put/get data
482 * @param offset offset to read from or write to
483 * @param count number of bytes to read/write
484 *
485 * Read the BufferRAM area
486 */
487 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
488 unsigned char *buffer, int offset, size_t count)
489 {
490 struct onenand_chip *this = mtd->priv;
491 void __iomem *bufferram;
492
493 bufferram = this->base + area;
494
495 bufferram += onenand_bufferram_offset(mtd, area);
496
497 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
498 unsigned short word;
499
500 /* Align with word(16-bit) size */
501 count--;
502
503 /* Read word and save byte */
504 word = this->read_word(bufferram + offset + count);
505 buffer[count] = (word & 0xff);
506 }
507
508 memcpy(buffer, bufferram + offset, count);
509
510 return 0;
511 }
512
513 /**
514 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
515 * @param mtd MTD data structure
516 * @param area BufferRAM area
517 * @param buffer the databuffer to put/get data
518 * @param offset offset to read from or write to
519 * @param count number of bytes to read/write
520 *
521 * Read the BufferRAM area with Sync. Burst Mode
522 */
523 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
524 unsigned char *buffer, int offset, size_t count)
525 {
526 struct onenand_chip *this = mtd->priv;
527 void __iomem *bufferram;
528
529 bufferram = this->base + area;
530
531 bufferram += onenand_bufferram_offset(mtd, area);
532
533 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
534
535 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
536 unsigned short word;
537
538 /* Align with word(16-bit) size */
539 count--;
540
541 /* Read word and save byte */
542 word = this->read_word(bufferram + offset + count);
543 buffer[count] = (word & 0xff);
544 }
545
546 memcpy(buffer, bufferram + offset, count);
547
548 this->mmcontrol(mtd, 0);
549
550 return 0;
551 }
552
553 /**
554 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
555 * @param mtd MTD data structure
556 * @param area BufferRAM area
557 * @param buffer the databuffer to put/get data
558 * @param offset offset to read from or write to
559 * @param count number of bytes to read/write
560 *
561 * Write the BufferRAM area
562 */
563 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
564 const unsigned char *buffer, int offset, size_t count)
565 {
566 struct onenand_chip *this = mtd->priv;
567 void __iomem *bufferram;
568
569 bufferram = this->base + area;
570
571 bufferram += onenand_bufferram_offset(mtd, area);
572
573 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
574 unsigned short word;
575 int byte_offset;
576
577 /* Align with word(16-bit) size */
578 count--;
579
580 /* Calculate byte access offset */
581 byte_offset = offset + count;
582
583 /* Read word and save byte */
584 word = this->read_word(bufferram + byte_offset);
585 word = (word & ~0xff) | buffer[count];
586 this->write_word(word, bufferram + byte_offset);
587 }
588
589 memcpy(bufferram + offset, buffer, count);
590
591 return 0;
592 }
593
594 /**
595 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
596 * @param mtd MTD data structure
597 * @param addr address to check
598 * @return blockpage address
599 *
600 * Get blockpage address at 2x program mode
601 */
602 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
603 {
604 struct onenand_chip *this = mtd->priv;
605 int blockpage, block, page;
606
607 /* Calculate the even block number */
608 block = (int) (addr >> this->erase_shift) & ~1;
609 /* Is it the odd plane? */
610 if (addr & this->writesize)
611 block++;
612 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
613 blockpage = (block << 7) | page;
614
615 return blockpage;
616 }
617
618 /**
619 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
620 * @param mtd MTD data structure
621 * @param addr address to check
622 * @return 1 if there are valid data, otherwise 0
623 *
624 * Check bufferram if there is data we required
625 */
626 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
627 {
628 struct onenand_chip *this = mtd->priv;
629 int blockpage, found = 0;
630 unsigned int i;
631
632 if (ONENAND_IS_2PLANE(this))
633 blockpage = onenand_get_2x_blockpage(mtd, addr);
634 else
635 blockpage = (int) (addr >> this->page_shift);
636
637 /* Is there valid data? */
638 i = ONENAND_CURRENT_BUFFERRAM(this);
639 if (this->bufferram[i].blockpage == blockpage)
640 found = 1;
641 else {
642 /* Check another BufferRAM */
643 i = ONENAND_NEXT_BUFFERRAM(this);
644 if (this->bufferram[i].blockpage == blockpage) {
645 ONENAND_SET_NEXT_BUFFERRAM(this);
646 found = 1;
647 }
648 }
649
650 if (found && ONENAND_IS_DDP(this)) {
651 /* Select DataRAM for DDP */
652 int block = (int) (addr >> this->erase_shift);
653 int value = onenand_bufferram_address(this, block);
654 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
655 }
656
657 return found;
658 }
659
660 /**
661 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
662 * @param mtd MTD data structure
663 * @param addr address to update
664 * @param valid valid flag
665 *
666 * Update BufferRAM information
667 */
668 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
669 int valid)
670 {
671 struct onenand_chip *this = mtd->priv;
672 int blockpage;
673 unsigned int i;
674
675 if (ONENAND_IS_2PLANE(this))
676 blockpage = onenand_get_2x_blockpage(mtd, addr);
677 else
678 blockpage = (int) (addr >> this->page_shift);
679
680 /* Invalidate another BufferRAM */
681 i = ONENAND_NEXT_BUFFERRAM(this);
682 if (this->bufferram[i].blockpage == blockpage)
683 this->bufferram[i].blockpage = -1;
684
685 /* Update BufferRAM */
686 i = ONENAND_CURRENT_BUFFERRAM(this);
687 if (valid)
688 this->bufferram[i].blockpage = blockpage;
689 else
690 this->bufferram[i].blockpage = -1;
691 }
692
693 /**
694 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
695 * @param mtd MTD data structure
696 * @param addr start address to invalidate
697 * @param len length to invalidate
698 *
699 * Invalidate BufferRAM information
700 */
701 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
702 unsigned int len)
703 {
704 struct onenand_chip *this = mtd->priv;
705 int i;
706 loff_t end_addr = addr + len;
707
708 /* Invalidate BufferRAM */
709 for (i = 0; i < MAX_BUFFERRAM; i++) {
710 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
711 if (buf_addr >= addr && buf_addr < end_addr)
712 this->bufferram[i].blockpage = -1;
713 }
714 }
715
716 /**
717 * onenand_get_device - [GENERIC] Get chip for selected access
718 * @param mtd MTD device structure
719 * @param new_state the state which is requested
720 *
721 * Get the device and lock it for exclusive access
722 */
723 static int onenand_get_device(struct mtd_info *mtd, int new_state)
724 {
725 struct onenand_chip *this = mtd->priv;
726 DECLARE_WAITQUEUE(wait, current);
727
728 /*
729 * Grab the lock and see if the device is available
730 */
731 while (1) {
732 spin_lock(&this->chip_lock);
733 if (this->state == FL_READY) {
734 this->state = new_state;
735 spin_unlock(&this->chip_lock);
736 break;
737 }
738 if (new_state == FL_PM_SUSPENDED) {
739 spin_unlock(&this->chip_lock);
740 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
741 }
742 set_current_state(TASK_UNINTERRUPTIBLE);
743 add_wait_queue(&this->wq, &wait);
744 spin_unlock(&this->chip_lock);
745 schedule();
746 remove_wait_queue(&this->wq, &wait);
747 }
748
749 return 0;
750 }
751
752 /**
753 * onenand_release_device - [GENERIC] release chip
754 * @param mtd MTD device structure
755 *
756 * Deselect, release chip lock and wake up anyone waiting on the device
757 */
758 static void onenand_release_device(struct mtd_info *mtd)
759 {
760 struct onenand_chip *this = mtd->priv;
761
762 /* Release the chip */
763 spin_lock(&this->chip_lock);
764 this->state = FL_READY;
765 wake_up(&this->wq);
766 spin_unlock(&this->chip_lock);
767 }
768
769 /**
770 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
771 * @param mtd MTD device structure
772 * @param buf destination address
773 * @param column oob offset to read from
774 * @param thislen oob length to read
775 */
776 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
777 int thislen)
778 {
779 struct onenand_chip *this = mtd->priv;
780 struct nand_oobfree *free;
781 int readcol = column;
782 int readend = column + thislen;
783 int lastgap = 0;
784 unsigned int i;
785 uint8_t *oob_buf = this->oob_buf;
786
787 free = this->ecclayout->oobfree;
788 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
789 if (readcol >= lastgap)
790 readcol += free->offset - lastgap;
791 if (readend >= lastgap)
792 readend += free->offset - lastgap;
793 lastgap = free->offset + free->length;
794 }
795 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
796 free = this->ecclayout->oobfree;
797 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
798 int free_end = free->offset + free->length;
799 if (free->offset < readend && free_end > readcol) {
800 int st = max_t(int,free->offset,readcol);
801 int ed = min_t(int,free_end,readend);
802 int n = ed - st;
803 memcpy(buf, oob_buf + st, n);
804 buf += n;
805 } else if (column == 0)
806 break;
807 }
808 return 0;
809 }
810
811 /**
812 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
813 * @param mtd MTD device structure
814 * @param from offset to read from
815 * @param ops: oob operation description structure
816 *
817 * OneNAND read main and/or out-of-band data
818 */
819 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
820 struct mtd_oob_ops *ops)
821 {
822 struct onenand_chip *this = mtd->priv;
823 struct mtd_ecc_stats stats;
824 size_t len = ops->len;
825 size_t ooblen = ops->ooblen;
826 u_char *buf = ops->datbuf;
827 u_char *oobbuf = ops->oobbuf;
828 int read = 0, column, thislen;
829 int oobread = 0, oobcolumn, thisooblen, oobsize;
830 int ret = 0, boundary = 0;
831 int writesize = this->writesize;
832
833 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
834
835 if (ops->mode == MTD_OOB_AUTO)
836 oobsize = this->ecclayout->oobavail;
837 else
838 oobsize = mtd->oobsize;
839
840 oobcolumn = from & (mtd->oobsize - 1);
841
842 /* Do not allow reads past end of device */
843 if ((from + len) > mtd->size) {
844 printk(KERN_ERR "onenand_read_ops_nolock: Attempt read beyond end of device\n");
845 ops->retlen = 0;
846 ops->oobretlen = 0;
847 return -EINVAL;
848 }
849
850 stats = mtd->ecc_stats;
851
852 /* Read-while-load method */
853
854 /* Do first load to bufferRAM */
855 if (read < len) {
856 if (!onenand_check_bufferram(mtd, from)) {
857 this->command(mtd, ONENAND_CMD_READ, from, writesize);
858 ret = this->wait(mtd, FL_READING);
859 onenand_update_bufferram(mtd, from, !ret);
860 if (ret == -EBADMSG)
861 ret = 0;
862 }
863 }
864
865 thislen = min_t(int, writesize, len - read);
866 column = from & (writesize - 1);
867 if (column + thislen > writesize)
868 thislen = writesize - column;
869
870 while (!ret) {
871 /* If there is more to load then start next load */
872 from += thislen;
873 if (read + thislen < len) {
874 this->command(mtd, ONENAND_CMD_READ, from, writesize);
875 /*
876 * Chip boundary handling in DDP
877 * Now we issued chip 1 read and pointed chip 1
878 * bufferam so we have to point chip 0 bufferam.
879 */
880 if (ONENAND_IS_DDP(this) &&
881 unlikely(from == (this->chipsize >> 1))) {
882 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
883 boundary = 1;
884 } else
885 boundary = 0;
886 ONENAND_SET_PREV_BUFFERRAM(this);
887 }
888 /* While load is going, read from last bufferRAM */
889 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
890
891 /* Read oob area if needed */
892 if (oobbuf) {
893 thisooblen = oobsize - oobcolumn;
894 thisooblen = min_t(int, thisooblen, ooblen - oobread);
895
896 if (ops->mode == MTD_OOB_AUTO)
897 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
898 else
899 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
900 oobread += thisooblen;
901 oobbuf += thisooblen;
902 oobcolumn = 0;
903 }
904
905 /* See if we are done */
906 read += thislen;
907 if (read == len)
908 break;
909 /* Set up for next read from bufferRAM */
910 if (unlikely(boundary))
911 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
912 ONENAND_SET_NEXT_BUFFERRAM(this);
913 buf += thislen;
914 thislen = min_t(int, writesize, len - read);
915 column = 0;
916 cond_resched();
917 /* Now wait for load */
918 ret = this->wait(mtd, FL_READING);
919 onenand_update_bufferram(mtd, from, !ret);
920 if (ret == -EBADMSG)
921 ret = 0;
922 }
923
924 /*
925 * Return success, if no ECC failures, else -EBADMSG
926 * fs driver will take care of that, because
927 * retlen == desired len and result == -EBADMSG
928 */
929 ops->retlen = read;
930 ops->oobretlen = oobread;
931
932 if (ret)
933 return ret;
934
935 if (mtd->ecc_stats.failed - stats.failed)
936 return -EBADMSG;
937
938 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
939 }
940
941 /**
942 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
943 * @param mtd MTD device structure
944 * @param from offset to read from
945 * @param ops: oob operation description structure
946 *
947 * OneNAND read out-of-band data from the spare area
948 */
949 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
950 struct mtd_oob_ops *ops)
951 {
952 struct onenand_chip *this = mtd->priv;
953 struct mtd_ecc_stats stats;
954 int read = 0, thislen, column, oobsize;
955 size_t len = ops->ooblen;
956 mtd_oob_mode_t mode = ops->mode;
957 u_char *buf = ops->oobbuf;
958 int ret = 0;
959
960 from += ops->ooboffs;
961
962 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob_nolock: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
963
964 /* Initialize return length value */
965 ops->oobretlen = 0;
966
967 if (mode == MTD_OOB_AUTO)
968 oobsize = this->ecclayout->oobavail;
969 else
970 oobsize = mtd->oobsize;
971
972 column = from & (mtd->oobsize - 1);
973
974 if (unlikely(column >= oobsize)) {
975 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to start read outside oob\n");
976 return -EINVAL;
977 }
978
979 /* Do not allow reads past end of device */
980 if (unlikely(from >= mtd->size ||
981 column + len > ((mtd->size >> this->page_shift) -
982 (from >> this->page_shift)) * oobsize)) {
983 printk(KERN_ERR "onenand_read_oob_nolock: Attempted to read beyond end of device\n");
984 return -EINVAL;
985 }
986
987 stats = mtd->ecc_stats;
988
989 while (read < len) {
990 cond_resched();
991
992 thislen = oobsize - column;
993 thislen = min_t(int, thislen, len);
994
995 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
996
997 onenand_update_bufferram(mtd, from, 0);
998
999 ret = this->wait(mtd, FL_READING);
1000 if (ret && ret != -EBADMSG) {
1001 printk(KERN_ERR "onenand_read_oob_nolock: read failed = 0x%x\n", ret);
1002 break;
1003 }
1004
1005 if (mode == MTD_OOB_AUTO)
1006 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1007 else
1008 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1009
1010 read += thislen;
1011
1012 if (read == len)
1013 break;
1014
1015 buf += thislen;
1016
1017 /* Read more? */
1018 if (read < len) {
1019 /* Page size */
1020 from += mtd->writesize;
1021 column = 0;
1022 }
1023 }
1024
1025 ops->oobretlen = read;
1026
1027 if (ret)
1028 return ret;
1029
1030 if (mtd->ecc_stats.failed - stats.failed)
1031 return -EBADMSG;
1032
1033 return 0;
1034 }
1035
1036 /**
1037 * onenand_read - [MTD Interface] Read data from flash
1038 * @param mtd MTD device structure
1039 * @param from offset to read from
1040 * @param len number of bytes to read
1041 * @param retlen pointer to variable to store the number of read bytes
1042 * @param buf the databuffer to put data
1043 *
1044 * Read with ecc
1045 */
1046 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1047 size_t *retlen, u_char *buf)
1048 {
1049 struct mtd_oob_ops ops = {
1050 .len = len,
1051 .ooblen = 0,
1052 .datbuf = buf,
1053 .oobbuf = NULL,
1054 };
1055 int ret;
1056
1057 onenand_get_device(mtd, FL_READING);
1058 ret = onenand_read_ops_nolock(mtd, from, &ops);
1059 onenand_release_device(mtd);
1060
1061 *retlen = ops.retlen;
1062 return ret;
1063 }
1064
1065 /**
1066 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1067 * @param mtd: MTD device structure
1068 * @param from: offset to read from
1069 * @param ops: oob operation description structure
1070
1071 * Read main and/or out-of-band
1072 */
1073 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1074 struct mtd_oob_ops *ops)
1075 {
1076 int ret;
1077
1078 switch (ops->mode) {
1079 case MTD_OOB_PLACE:
1080 case MTD_OOB_AUTO:
1081 break;
1082 case MTD_OOB_RAW:
1083 /* Not implemented yet */
1084 default:
1085 return -EINVAL;
1086 }
1087
1088 onenand_get_device(mtd, FL_READING);
1089 if (ops->datbuf)
1090 ret = onenand_read_ops_nolock(mtd, from, ops);
1091 else
1092 ret = onenand_read_oob_nolock(mtd, from, ops);
1093 onenand_release_device(mtd);
1094
1095 return ret;
1096 }
1097
1098 /**
1099 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1100 * @param mtd MTD device structure
1101 * @param state state to select the max. timeout value
1102 *
1103 * Wait for command done.
1104 */
1105 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1106 {
1107 struct onenand_chip *this = mtd->priv;
1108 unsigned long timeout;
1109 unsigned int interrupt;
1110 unsigned int ctrl;
1111
1112 /* The 20 msec is enough */
1113 timeout = jiffies + msecs_to_jiffies(20);
1114 while (time_before(jiffies, timeout)) {
1115 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1116 if (interrupt & ONENAND_INT_MASTER)
1117 break;
1118 }
1119 /* To get correct interrupt status in timeout case */
1120 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1121 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1122
1123 /* Initial bad block case: 0x2400 or 0x0400 */
1124 if (ctrl & ONENAND_CTRL_ERROR) {
1125 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
1126 return ONENAND_BBT_READ_ERROR;
1127 }
1128
1129 if (interrupt & ONENAND_INT_READ) {
1130 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1131 if (ecc & ONENAND_ECC_2BIT_ALL)
1132 return ONENAND_BBT_READ_ERROR;
1133 } else {
1134 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1135 "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1136 return ONENAND_BBT_READ_FATAL_ERROR;
1137 }
1138
1139 return 0;
1140 }
1141
1142 /**
1143 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1144 * @param mtd MTD device structure
1145 * @param from offset to read from
1146 * @param ops oob operation description structure
1147 *
1148 * OneNAND read out-of-band data from the spare area for bbt scan
1149 */
1150 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1151 struct mtd_oob_ops *ops)
1152 {
1153 struct onenand_chip *this = mtd->priv;
1154 int read = 0, thislen, column;
1155 int ret = 0;
1156 size_t len = ops->ooblen;
1157 u_char *buf = ops->oobbuf;
1158
1159 DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1160
1161 /* Initialize return value */
1162 ops->oobretlen = 0;
1163
1164 /* Do not allow reads past end of device */
1165 if (unlikely((from + len) > mtd->size)) {
1166 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1167 return ONENAND_BBT_READ_FATAL_ERROR;
1168 }
1169
1170 /* Grab the lock and see if the device is available */
1171 onenand_get_device(mtd, FL_READING);
1172
1173 column = from & (mtd->oobsize - 1);
1174
1175 while (read < len) {
1176 cond_resched();
1177
1178 thislen = mtd->oobsize - column;
1179 thislen = min_t(int, thislen, len);
1180
1181 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1182
1183 onenand_update_bufferram(mtd, from, 0);
1184
1185 ret = onenand_bbt_wait(mtd, FL_READING);
1186 if (ret)
1187 break;
1188
1189 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1190 read += thislen;
1191 if (read == len)
1192 break;
1193
1194 buf += thislen;
1195
1196 /* Read more? */
1197 if (read < len) {
1198 /* Update Page size */
1199 from += this->writesize;
1200 column = 0;
1201 }
1202 }
1203
1204 /* Deselect and wake up anyone waiting on the device */
1205 onenand_release_device(mtd);
1206
1207 ops->oobretlen = read;
1208 return ret;
1209 }
1210
1211 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1212 /**
1213 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1214 * @param mtd MTD device structure
1215 * @param buf the databuffer to verify
1216 * @param to offset to read from
1217 */
1218 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1219 {
1220 struct onenand_chip *this = mtd->priv;
1221 u_char *oob_buf = this->oob_buf;
1222 int status, i;
1223
1224 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1225 onenand_update_bufferram(mtd, to, 0);
1226 status = this->wait(mtd, FL_READING);
1227 if (status)
1228 return status;
1229
1230 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1231 for (i = 0; i < mtd->oobsize; i++)
1232 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1233 return -EBADMSG;
1234
1235 return 0;
1236 }
1237
1238 /**
1239 * onenand_verify - [GENERIC] verify the chip contents after a write
1240 * @param mtd MTD device structure
1241 * @param buf the databuffer to verify
1242 * @param addr offset to read from
1243 * @param len number of bytes to read and compare
1244 */
1245 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1246 {
1247 struct onenand_chip *this = mtd->priv;
1248 void __iomem *dataram;
1249 int ret = 0;
1250 int thislen, column;
1251
1252 while (len != 0) {
1253 thislen = min_t(int, this->writesize, len);
1254 column = addr & (this->writesize - 1);
1255 if (column + thislen > this->writesize)
1256 thislen = this->writesize - column;
1257
1258 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1259
1260 onenand_update_bufferram(mtd, addr, 0);
1261
1262 ret = this->wait(mtd, FL_READING);
1263 if (ret)
1264 return ret;
1265
1266 onenand_update_bufferram(mtd, addr, 1);
1267
1268 dataram = this->base + ONENAND_DATARAM;
1269 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1270
1271 if (memcmp(buf, dataram + column, thislen))
1272 return -EBADMSG;
1273
1274 len -= thislen;
1275 buf += thislen;
1276 addr += thislen;
1277 }
1278
1279 return 0;
1280 }
1281 #else
1282 #define onenand_verify(...) (0)
1283 #define onenand_verify_oob(...) (0)
1284 #endif
1285
1286 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1287
1288 static void onenand_panic_wait(struct mtd_info *mtd)
1289 {
1290 struct onenand_chip *this = mtd->priv;
1291 unsigned int interrupt;
1292 int i;
1293
1294 for (i = 0; i < 2000; i++) {
1295 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1296 if (interrupt & ONENAND_INT_MASTER)
1297 break;
1298 udelay(10);
1299 }
1300 }
1301
1302 /**
1303 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1304 * @param mtd MTD device structure
1305 * @param to offset to write to
1306 * @param len number of bytes to write
1307 * @param retlen pointer to variable to store the number of written bytes
1308 * @param buf the data to write
1309 *
1310 * Write with ECC
1311 */
1312 static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1313 size_t *retlen, const u_char *buf)
1314 {
1315 struct onenand_chip *this = mtd->priv;
1316 int column, subpage;
1317 int written = 0;
1318 int ret = 0;
1319
1320 if (this->state == FL_PM_SUSPENDED)
1321 return -EBUSY;
1322
1323 /* Wait for any existing operation to clear */
1324 onenand_panic_wait(mtd);
1325
1326 DEBUG(MTD_DEBUG_LEVEL3, "onenand_panic_write: to = 0x%08x, len = %i\n",
1327 (unsigned int) to, (int) len);
1328
1329 /* Initialize retlen, in case of early exit */
1330 *retlen = 0;
1331
1332 /* Do not allow writes past end of device */
1333 if (unlikely((to + len) > mtd->size)) {
1334 printk(KERN_ERR "onenand_panic_write: Attempt write to past end of device\n");
1335 return -EINVAL;
1336 }
1337
1338 /* Reject writes, which are not page aligned */
1339 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1340 printk(KERN_ERR "onenand_panic_write: Attempt to write not page aligned data\n");
1341 return -EINVAL;
1342 }
1343
1344 column = to & (mtd->writesize - 1);
1345
1346 /* Loop until all data write */
1347 while (written < len) {
1348 int thislen = min_t(int, mtd->writesize - column, len - written);
1349 u_char *wbuf = (u_char *) buf;
1350
1351 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1352
1353 /* Partial page write */
1354 subpage = thislen < mtd->writesize;
1355 if (subpage) {
1356 memset(this->page_buf, 0xff, mtd->writesize);
1357 memcpy(this->page_buf + column, buf, thislen);
1358 wbuf = this->page_buf;
1359 }
1360
1361 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1362 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1363
1364 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1365
1366 onenand_panic_wait(mtd);
1367
1368 /* In partial page write we don't update bufferram */
1369 onenand_update_bufferram(mtd, to, !ret && !subpage);
1370 if (ONENAND_IS_2PLANE(this)) {
1371 ONENAND_SET_BUFFERRAM1(this);
1372 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1373 }
1374
1375 if (ret) {
1376 printk(KERN_ERR "onenand_panic_write: write failed %d\n", ret);
1377 break;
1378 }
1379
1380 written += thislen;
1381
1382 if (written == len)
1383 break;
1384
1385 column = 0;
1386 to += thislen;
1387 buf += thislen;
1388 }
1389
1390 *retlen = written;
1391 return ret;
1392 }
1393
1394 /**
1395 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1396 * @param mtd MTD device structure
1397 * @param oob_buf oob buffer
1398 * @param buf source address
1399 * @param column oob offset to write to
1400 * @param thislen oob length to write
1401 */
1402 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1403 const u_char *buf, int column, int thislen)
1404 {
1405 struct onenand_chip *this = mtd->priv;
1406 struct nand_oobfree *free;
1407 int writecol = column;
1408 int writeend = column + thislen;
1409 int lastgap = 0;
1410 unsigned int i;
1411
1412 free = this->ecclayout->oobfree;
1413 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1414 if (writecol >= lastgap)
1415 writecol += free->offset - lastgap;
1416 if (writeend >= lastgap)
1417 writeend += free->offset - lastgap;
1418 lastgap = free->offset + free->length;
1419 }
1420 free = this->ecclayout->oobfree;
1421 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1422 int free_end = free->offset + free->length;
1423 if (free->offset < writeend && free_end > writecol) {
1424 int st = max_t(int,free->offset,writecol);
1425 int ed = min_t(int,free_end,writeend);
1426 int n = ed - st;
1427 memcpy(oob_buf + st, buf, n);
1428 buf += n;
1429 } else if (column == 0)
1430 break;
1431 }
1432 return 0;
1433 }
1434
1435 /**
1436 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1437 * @param mtd MTD device structure
1438 * @param to offset to write to
1439 * @param ops oob operation description structure
1440 *
1441 * Write main and/or oob with ECC
1442 */
1443 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1444 struct mtd_oob_ops *ops)
1445 {
1446 struct onenand_chip *this = mtd->priv;
1447 int written = 0, column, thislen, subpage;
1448 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1449 size_t len = ops->len;
1450 size_t ooblen = ops->ooblen;
1451 const u_char *buf = ops->datbuf;
1452 const u_char *oob = ops->oobbuf;
1453 u_char *oobbuf;
1454 int ret = 0;
1455
1456 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ops_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1457
1458 /* Initialize retlen, in case of early exit */
1459 ops->retlen = 0;
1460 ops->oobretlen = 0;
1461
1462 /* Do not allow writes past end of device */
1463 if (unlikely((to + len) > mtd->size)) {
1464 printk(KERN_ERR "onenand_write_ops_nolock: Attempt write to past end of device\n");
1465 return -EINVAL;
1466 }
1467
1468 /* Reject writes, which are not page aligned */
1469 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1470 printk(KERN_ERR "onenand_write_ops_nolock: Attempt to write not page aligned data\n");
1471 return -EINVAL;
1472 }
1473
1474 if (ops->mode == MTD_OOB_AUTO)
1475 oobsize = this->ecclayout->oobavail;
1476 else
1477 oobsize = mtd->oobsize;
1478
1479 oobcolumn = to & (mtd->oobsize - 1);
1480
1481 column = to & (mtd->writesize - 1);
1482
1483 /* Loop until all data write */
1484 while (written < len) {
1485 u_char *wbuf = (u_char *) buf;
1486
1487 thislen = min_t(int, mtd->writesize - column, len - written);
1488 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1489
1490 cond_resched();
1491
1492 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1493
1494 /* Partial page write */
1495 subpage = thislen < mtd->writesize;
1496 if (subpage) {
1497 memset(this->page_buf, 0xff, mtd->writesize);
1498 memcpy(this->page_buf + column, buf, thislen);
1499 wbuf = this->page_buf;
1500 }
1501
1502 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1503
1504 if (oob) {
1505 oobbuf = this->oob_buf;
1506
1507 /* We send data to spare ram with oobsize
1508 * to prevent byte access */
1509 memset(oobbuf, 0xff, mtd->oobsize);
1510 if (ops->mode == MTD_OOB_AUTO)
1511 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1512 else
1513 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1514
1515 oobwritten += thisooblen;
1516 oob += thisooblen;
1517 oobcolumn = 0;
1518 } else
1519 oobbuf = (u_char *) ffchars;
1520
1521 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1522
1523 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1524
1525 ret = this->wait(mtd, FL_WRITING);
1526
1527 /* In partial page write we don't update bufferram */
1528 onenand_update_bufferram(mtd, to, !ret && !subpage);
1529 if (ONENAND_IS_2PLANE(this)) {
1530 ONENAND_SET_BUFFERRAM1(this);
1531 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1532 }
1533
1534 if (ret) {
1535 printk(KERN_ERR "onenand_write_ops_nolock: write filaed %d\n", ret);
1536 break;
1537 }
1538
1539 /* Only check verify write turn on */
1540 ret = onenand_verify(mtd, buf, to, thislen);
1541 if (ret) {
1542 printk(KERN_ERR "onenand_write_ops_nolock: verify failed %d\n", ret);
1543 break;
1544 }
1545
1546 written += thislen;
1547
1548 if (written == len)
1549 break;
1550
1551 column = 0;
1552 to += thislen;
1553 buf += thislen;
1554 }
1555
1556 ops->retlen = written;
1557
1558 return ret;
1559 }
1560
1561
1562 /**
1563 * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
1564 * @param mtd MTD device structure
1565 * @param to offset to write to
1566 * @param len number of bytes to write
1567 * @param retlen pointer to variable to store the number of written bytes
1568 * @param buf the data to write
1569 * @param mode operation mode
1570 *
1571 * OneNAND write out-of-band
1572 */
1573 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
1574 struct mtd_oob_ops *ops)
1575 {
1576 struct onenand_chip *this = mtd->priv;
1577 int column, ret = 0, oobsize;
1578 int written = 0;
1579 u_char *oobbuf;
1580 size_t len = ops->ooblen;
1581 const u_char *buf = ops->oobbuf;
1582 mtd_oob_mode_t mode = ops->mode;
1583
1584 to += ops->ooboffs;
1585
1586 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob_nolock: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1587
1588 /* Initialize retlen, in case of early exit */
1589 ops->oobretlen = 0;
1590
1591 if (mode == MTD_OOB_AUTO)
1592 oobsize = this->ecclayout->oobavail;
1593 else
1594 oobsize = mtd->oobsize;
1595
1596 column = to & (mtd->oobsize - 1);
1597
1598 if (unlikely(column >= oobsize)) {
1599 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to start write outside oob\n");
1600 return -EINVAL;
1601 }
1602
1603 /* For compatibility with NAND: Do not allow write past end of page */
1604 if (unlikely(column + len > oobsize)) {
1605 printk(KERN_ERR "onenand_write_oob_nolock: "
1606 "Attempt to write past end of page\n");
1607 return -EINVAL;
1608 }
1609
1610 /* Do not allow reads past end of device */
1611 if (unlikely(to >= mtd->size ||
1612 column + len > ((mtd->size >> this->page_shift) -
1613 (to >> this->page_shift)) * oobsize)) {
1614 printk(KERN_ERR "onenand_write_oob_nolock: Attempted to write past end of device\n");
1615 return -EINVAL;
1616 }
1617
1618 oobbuf = this->oob_buf;
1619
1620 /* Loop until all data write */
1621 while (written < len) {
1622 int thislen = min_t(int, oobsize, len - written);
1623
1624 cond_resched();
1625
1626 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1627
1628 /* We send data to spare ram with oobsize
1629 * to prevent byte access */
1630 memset(oobbuf, 0xff, mtd->oobsize);
1631 if (mode == MTD_OOB_AUTO)
1632 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1633 else
1634 memcpy(oobbuf + column, buf, thislen);
1635 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1636
1637 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1638
1639 onenand_update_bufferram(mtd, to, 0);
1640 if (ONENAND_IS_2PLANE(this)) {
1641 ONENAND_SET_BUFFERRAM1(this);
1642 onenand_update_bufferram(mtd, to + this->writesize, 0);
1643 }
1644
1645 ret = this->wait(mtd, FL_WRITING);
1646 if (ret) {
1647 printk(KERN_ERR "onenand_write_oob_nolock: write failed %d\n", ret);
1648 break;
1649 }
1650
1651 ret = onenand_verify_oob(mtd, oobbuf, to);
1652 if (ret) {
1653 printk(KERN_ERR "onenand_write_oob_nolock: verify failed %d\n", ret);
1654 break;
1655 }
1656
1657 written += thislen;
1658 if (written == len)
1659 break;
1660
1661 to += mtd->writesize;
1662 buf += thislen;
1663 column = 0;
1664 }
1665
1666 ops->oobretlen = written;
1667
1668 return ret;
1669 }
1670
1671 /**
1672 * onenand_write - [MTD Interface] write buffer to FLASH
1673 * @param mtd MTD device structure
1674 * @param to offset to write to
1675 * @param len number of bytes to write
1676 * @param retlen pointer to variable to store the number of written bytes
1677 * @param buf the data to write
1678 *
1679 * Write with ECC
1680 */
1681 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1682 size_t *retlen, const u_char *buf)
1683 {
1684 struct mtd_oob_ops ops = {
1685 .len = len,
1686 .ooblen = 0,
1687 .datbuf = (u_char *) buf,
1688 .oobbuf = NULL,
1689 };
1690 int ret;
1691
1692 onenand_get_device(mtd, FL_WRITING);
1693 ret = onenand_write_ops_nolock(mtd, to, &ops);
1694 onenand_release_device(mtd);
1695
1696 *retlen = ops.retlen;
1697 return ret;
1698 }
1699
1700 /**
1701 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1702 * @param mtd: MTD device structure
1703 * @param to: offset to write
1704 * @param ops: oob operation description structure
1705 */
1706 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1707 struct mtd_oob_ops *ops)
1708 {
1709 int ret;
1710
1711 switch (ops->mode) {
1712 case MTD_OOB_PLACE:
1713 case MTD_OOB_AUTO:
1714 break;
1715 case MTD_OOB_RAW:
1716 /* Not implemented yet */
1717 default:
1718 return -EINVAL;
1719 }
1720
1721 onenand_get_device(mtd, FL_WRITING);
1722 if (ops->datbuf)
1723 ret = onenand_write_ops_nolock(mtd, to, ops);
1724 else
1725 ret = onenand_write_oob_nolock(mtd, to, ops);
1726 onenand_release_device(mtd);
1727
1728 return ret;
1729 }
1730
1731 /**
1732 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
1733 * @param mtd MTD device structure
1734 * @param ofs offset from device start
1735 * @param allowbbt 1, if its allowed to access the bbt area
1736 *
1737 * Check, if the block is bad. Either by reading the bad block table or
1738 * calling of the scan function.
1739 */
1740 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
1741 {
1742 struct onenand_chip *this = mtd->priv;
1743 struct bbm_info *bbm = this->bbm;
1744
1745 /* Return info from the table */
1746 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1747 }
1748
1749 /**
1750 * onenand_erase - [MTD Interface] erase block(s)
1751 * @param mtd MTD device structure
1752 * @param instr erase instruction
1753 *
1754 * Erase one ore more blocks
1755 */
1756 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1757 {
1758 struct onenand_chip *this = mtd->priv;
1759 unsigned int block_size;
1760 loff_t addr;
1761 int len;
1762 int ret = 0;
1763
1764 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1765
1766 block_size = (1 << this->erase_shift);
1767
1768 /* Start address must align on block boundary */
1769 if (unlikely(instr->addr & (block_size - 1))) {
1770 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1771 return -EINVAL;
1772 }
1773
1774 /* Length must align on block boundary */
1775 if (unlikely(instr->len & (block_size - 1))) {
1776 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1777 return -EINVAL;
1778 }
1779
1780 /* Do not allow erase past end of device */
1781 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1782 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1783 return -EINVAL;
1784 }
1785
1786 instr->fail_addr = 0xffffffff;
1787
1788 /* Grab the lock and see if the device is available */
1789 onenand_get_device(mtd, FL_ERASING);
1790
1791 /* Loop throught the pages */
1792 len = instr->len;
1793 addr = instr->addr;
1794
1795 instr->state = MTD_ERASING;
1796
1797 while (len) {
1798 cond_resched();
1799
1800 /* Check if we have a bad block, we do not erase bad blocks */
1801 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
1802 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1803 instr->state = MTD_ERASE_FAILED;
1804 goto erase_exit;
1805 }
1806
1807 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1808
1809 onenand_invalidate_bufferram(mtd, addr, block_size);
1810
1811 ret = this->wait(mtd, FL_ERASING);
1812 /* Check, if it is write protected */
1813 if (ret) {
1814 printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1815 instr->state = MTD_ERASE_FAILED;
1816 instr->fail_addr = addr;
1817 goto erase_exit;
1818 }
1819
1820 len -= block_size;
1821 addr += block_size;
1822 }
1823
1824 instr->state = MTD_ERASE_DONE;
1825
1826 erase_exit:
1827
1828 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1829
1830 /* Deselect and wake up anyone waiting on the device */
1831 onenand_release_device(mtd);
1832
1833 /* Do call back function */
1834 if (!ret)
1835 mtd_erase_callback(instr);
1836
1837 return ret;
1838 }
1839
1840 /**
1841 * onenand_sync - [MTD Interface] sync
1842 * @param mtd MTD device structure
1843 *
1844 * Sync is actually a wait for chip ready function
1845 */
1846 static void onenand_sync(struct mtd_info *mtd)
1847 {
1848 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1849
1850 /* Grab the lock and see if the device is available */
1851 onenand_get_device(mtd, FL_SYNCING);
1852
1853 /* Release it and go back */
1854 onenand_release_device(mtd);
1855 }
1856
1857 /**
1858 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1859 * @param mtd MTD device structure
1860 * @param ofs offset relative to mtd start
1861 *
1862 * Check whether the block is bad
1863 */
1864 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1865 {
1866 int ret;
1867
1868 /* Check for invalid offset */
1869 if (ofs > mtd->size)
1870 return -EINVAL;
1871
1872 onenand_get_device(mtd, FL_READING);
1873 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
1874 onenand_release_device(mtd);
1875 return ret;
1876 }
1877
1878 /**
1879 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1880 * @param mtd MTD device structure
1881 * @param ofs offset from device start
1882 *
1883 * This is the default implementation, which can be overridden by
1884 * a hardware specific driver.
1885 */
1886 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1887 {
1888 struct onenand_chip *this = mtd->priv;
1889 struct bbm_info *bbm = this->bbm;
1890 u_char buf[2] = {0, 0};
1891 struct mtd_oob_ops ops = {
1892 .mode = MTD_OOB_PLACE,
1893 .ooblen = 2,
1894 .oobbuf = buf,
1895 .ooboffs = 0,
1896 };
1897 int block;
1898
1899 /* Get block number */
1900 block = ((int) ofs) >> bbm->bbt_erase_shift;
1901 if (bbm->bbt)
1902 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1903
1904 /* We write two bytes, so we dont have to mess with 16 bit access */
1905 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1906 return onenand_write_oob_nolock(mtd, ofs, &ops);
1907 }
1908
1909 /**
1910 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1911 * @param mtd MTD device structure
1912 * @param ofs offset relative to mtd start
1913 *
1914 * Mark the block as bad
1915 */
1916 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1917 {
1918 struct onenand_chip *this = mtd->priv;
1919 int ret;
1920
1921 ret = onenand_block_isbad(mtd, ofs);
1922 if (ret) {
1923 /* If it was bad already, return success and do nothing */
1924 if (ret > 0)
1925 return 0;
1926 return ret;
1927 }
1928
1929 onenand_get_device(mtd, FL_WRITING);
1930 ret = this->block_markbad(mtd, ofs);
1931 onenand_release_device(mtd);
1932 return ret;
1933 }
1934
1935 /**
1936 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1937 * @param mtd MTD device structure
1938 * @param ofs offset relative to mtd start
1939 * @param len number of bytes to lock or unlock
1940 * @param cmd lock or unlock command
1941 *
1942 * Lock or unlock one or more blocks
1943 */
1944 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1945 {
1946 struct onenand_chip *this = mtd->priv;
1947 int start, end, block, value, status;
1948 int wp_status_mask;
1949
1950 start = ofs >> this->erase_shift;
1951 end = len >> this->erase_shift;
1952
1953 if (cmd == ONENAND_CMD_LOCK)
1954 wp_status_mask = ONENAND_WP_LS;
1955 else
1956 wp_status_mask = ONENAND_WP_US;
1957
1958 /* Continuous lock scheme */
1959 if (this->options & ONENAND_HAS_CONT_LOCK) {
1960 /* Set start block address */
1961 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1962 /* Set end block address */
1963 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1964 /* Write lock command */
1965 this->command(mtd, cmd, 0, 0);
1966
1967 /* There's no return value */
1968 this->wait(mtd, FL_LOCKING);
1969
1970 /* Sanity check */
1971 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1972 & ONENAND_CTRL_ONGO)
1973 continue;
1974
1975 /* Check lock status */
1976 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1977 if (!(status & wp_status_mask))
1978 printk(KERN_ERR "wp status = 0x%x\n", status);
1979
1980 return 0;
1981 }
1982
1983 /* Block lock scheme */
1984 for (block = start; block < start + end; block++) {
1985 /* Set block address */
1986 value = onenand_block_address(this, block);
1987 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1988 /* Select DataRAM for DDP */
1989 value = onenand_bufferram_address(this, block);
1990 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1991 /* Set start block address */
1992 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1993 /* Write lock command */
1994 this->command(mtd, cmd, 0, 0);
1995
1996 /* There's no return value */
1997 this->wait(mtd, FL_LOCKING);
1998
1999 /* Sanity check */
2000 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2001 & ONENAND_CTRL_ONGO)
2002 continue;
2003
2004 /* Check lock status */
2005 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2006 if (!(status & wp_status_mask))
2007 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
2008 }
2009
2010 return 0;
2011 }
2012
2013 /**
2014 * onenand_lock - [MTD Interface] Lock block(s)
2015 * @param mtd MTD device structure
2016 * @param ofs offset relative to mtd start
2017 * @param len number of bytes to unlock
2018 *
2019 * Lock one or more blocks
2020 */
2021 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
2022 {
2023 int ret;
2024
2025 onenand_get_device(mtd, FL_LOCKING);
2026 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2027 onenand_release_device(mtd);
2028 return ret;
2029 }
2030
2031 /**
2032 * onenand_unlock - [MTD Interface] Unlock block(s)
2033 * @param mtd MTD device structure
2034 * @param ofs offset relative to mtd start
2035 * @param len number of bytes to unlock
2036 *
2037 * Unlock one or more blocks
2038 */
2039 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
2040 {
2041 int ret;
2042
2043 onenand_get_device(mtd, FL_LOCKING);
2044 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2045 onenand_release_device(mtd);
2046 return ret;
2047 }
2048
2049 /**
2050 * onenand_check_lock_status - [OneNAND Interface] Check lock status
2051 * @param this onenand chip data structure
2052 *
2053 * Check lock status
2054 */
2055 static int onenand_check_lock_status(struct onenand_chip *this)
2056 {
2057 unsigned int value, block, status;
2058 unsigned int end;
2059
2060 end = this->chipsize >> this->erase_shift;
2061 for (block = 0; block < end; block++) {
2062 /* Set block address */
2063 value = onenand_block_address(this, block);
2064 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2065 /* Select DataRAM for DDP */
2066 value = onenand_bufferram_address(this, block);
2067 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2068 /* Set start block address */
2069 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2070
2071 /* Check lock status */
2072 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2073 if (!(status & ONENAND_WP_US)) {
2074 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
2075 return 0;
2076 }
2077 }
2078
2079 return 1;
2080 }
2081
2082 /**
2083 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2084 * @param mtd MTD device structure
2085 *
2086 * Unlock all blocks
2087 */
2088 static void onenand_unlock_all(struct mtd_info *mtd)
2089 {
2090 struct onenand_chip *this = mtd->priv;
2091 loff_t ofs = 0;
2092 size_t len = this->chipsize;
2093
2094 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
2095 /* Set start block address */
2096 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2097 /* Write unlock command */
2098 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2099
2100 /* There's no return value */
2101 this->wait(mtd, FL_LOCKING);
2102
2103 /* Sanity check */
2104 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2105 & ONENAND_CTRL_ONGO)
2106 continue;
2107
2108 /* Check lock status */
2109 if (onenand_check_lock_status(this))
2110 return;
2111
2112 /* Workaround for all block unlock in DDP */
2113 if (ONENAND_IS_DDP(this)) {
2114 /* All blocks on another chip */
2115 ofs = this->chipsize >> 1;
2116 len = this->chipsize >> 1;
2117 }
2118 }
2119
2120 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2121 }
2122
2123 #ifdef CONFIG_MTD_ONENAND_OTP
2124
2125 /* Interal OTP operation */
2126 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
2127 size_t *retlen, u_char *buf);
2128
2129 /**
2130 * do_otp_read - [DEFAULT] Read OTP block area
2131 * @param mtd MTD device structure
2132 * @param from The offset to read
2133 * @param len number of bytes to read
2134 * @param retlen pointer to variable to store the number of readbytes
2135 * @param buf the databuffer to put/get data
2136 *
2137 * Read OTP block area.
2138 */
2139 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
2140 size_t *retlen, u_char *buf)
2141 {
2142 struct onenand_chip *this = mtd->priv;
2143 struct mtd_oob_ops ops = {
2144 .len = len,
2145 .ooblen = 0,
2146 .datbuf = buf,
2147 .oobbuf = NULL,
2148 };
2149 int ret;
2150
2151 /* Enter OTP access mode */
2152 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2153 this->wait(mtd, FL_OTPING);
2154
2155 ret = onenand_read_ops_nolock(mtd, from, &ops);
2156
2157 /* Exit OTP access mode */
2158 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2159 this->wait(mtd, FL_RESETING);
2160
2161 return ret;
2162 }
2163
2164 /**
2165 * do_otp_write - [DEFAULT] Write OTP block area
2166 * @param mtd MTD device structure
2167 * @param to The offset to write
2168 * @param len number of bytes to write
2169 * @param retlen pointer to variable to store the number of write bytes
2170 * @param buf the databuffer to put/get data
2171 *
2172 * Write OTP block area.
2173 */
2174 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
2175 size_t *retlen, u_char *buf)
2176 {
2177 struct onenand_chip *this = mtd->priv;
2178 unsigned char *pbuf = buf;
2179 int ret;
2180 struct mtd_oob_ops ops;
2181
2182 /* Force buffer page aligned */
2183 if (len < mtd->writesize) {
2184 memcpy(this->page_buf, buf, len);
2185 memset(this->page_buf + len, 0xff, mtd->writesize - len);
2186 pbuf = this->page_buf;
2187 len = mtd->writesize;
2188 }
2189
2190 /* Enter OTP access mode */
2191 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2192 this->wait(mtd, FL_OTPING);
2193
2194 ops.len = len;
2195 ops.ooblen = 0;
2196 ops.datbuf = pbuf;
2197 ops.oobbuf = NULL;
2198 ret = onenand_write_ops_nolock(mtd, to, &ops);
2199 *retlen = ops.retlen;
2200
2201 /* Exit OTP access mode */
2202 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2203 this->wait(mtd, FL_RESETING);
2204
2205 return ret;
2206 }
2207
2208 /**
2209 * do_otp_lock - [DEFAULT] Lock OTP block area
2210 * @param mtd MTD device structure
2211 * @param from The offset to lock
2212 * @param len number of bytes to lock
2213 * @param retlen pointer to variable to store the number of lock bytes
2214 * @param buf the databuffer to put/get data
2215 *
2216 * Lock OTP block area.
2217 */
2218 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2219 size_t *retlen, u_char *buf)
2220 {
2221 struct onenand_chip *this = mtd->priv;
2222 struct mtd_oob_ops ops = {
2223 .mode = MTD_OOB_PLACE,
2224 .ooblen = len,
2225 .oobbuf = buf,
2226 .ooboffs = 0,
2227 };
2228 int ret;
2229
2230 /* Enter OTP access mode */
2231 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2232 this->wait(mtd, FL_OTPING);
2233
2234 ret = onenand_write_oob_nolock(mtd, from, &ops);
2235
2236 *retlen = ops.oobretlen;
2237
2238 /* Exit OTP access mode */
2239 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2240 this->wait(mtd, FL_RESETING);
2241
2242 return ret;
2243 }
2244
2245 /**
2246 * onenand_otp_walk - [DEFAULT] Handle OTP operation
2247 * @param mtd MTD device structure
2248 * @param from The offset to read/write
2249 * @param len number of bytes to read/write
2250 * @param retlen pointer to variable to store the number of read bytes
2251 * @param buf the databuffer to put/get data
2252 * @param action do given action
2253 * @param mode specify user and factory
2254 *
2255 * Handle OTP operation.
2256 */
2257 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2258 size_t *retlen, u_char *buf,
2259 otp_op_t action, int mode)
2260 {
2261 struct onenand_chip *this = mtd->priv;
2262 int otp_pages;
2263 int density;
2264 int ret = 0;
2265
2266 *retlen = 0;
2267
2268 density = onenand_get_density(this->device_id);
2269 if (density < ONENAND_DEVICE_DENSITY_512Mb)
2270 otp_pages = 20;
2271 else
2272 otp_pages = 10;
2273
2274 if (mode == MTD_OTP_FACTORY) {
2275 from += mtd->writesize * otp_pages;
2276 otp_pages = 64 - otp_pages;
2277 }
2278
2279 /* Check User/Factory boundary */
2280 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
2281 return 0;
2282
2283 onenand_get_device(mtd, FL_OTPING);
2284 while (len > 0 && otp_pages > 0) {
2285 if (!action) { /* OTP Info functions */
2286 struct otp_info *otpinfo;
2287
2288 len -= sizeof(struct otp_info);
2289 if (len <= 0) {
2290 ret = -ENOSPC;
2291 break;
2292 }
2293
2294 otpinfo = (struct otp_info *) buf;
2295 otpinfo->start = from;
2296 otpinfo->length = mtd->writesize;
2297 otpinfo->locked = 0;
2298
2299 from += mtd->writesize;
2300 buf += sizeof(struct otp_info);
2301 *retlen += sizeof(struct otp_info);
2302 } else {
2303 size_t tmp_retlen;
2304 int size = len;
2305
2306 ret = action(mtd, from, len, &tmp_retlen, buf);
2307
2308 buf += size;
2309 len -= size;
2310 *retlen += size;
2311
2312 if (ret)
2313 break;
2314 }
2315 otp_pages--;
2316 }
2317 onenand_release_device(mtd);
2318
2319 return ret;
2320 }
2321
2322 /**
2323 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2324 * @param mtd MTD device structure
2325 * @param buf the databuffer to put/get data
2326 * @param len number of bytes to read
2327 *
2328 * Read factory OTP info.
2329 */
2330 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2331 struct otp_info *buf, size_t len)
2332 {
2333 size_t retlen;
2334 int ret;
2335
2336 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2337
2338 return ret ? : retlen;
2339 }
2340
2341 /**
2342 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2343 * @param mtd MTD device structure
2344 * @param from The offset to read
2345 * @param len number of bytes to read
2346 * @param retlen pointer to variable to store the number of read bytes
2347 * @param buf the databuffer to put/get data
2348 *
2349 * Read factory OTP area.
2350 */
2351 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2352 size_t len, size_t *retlen, u_char *buf)
2353 {
2354 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2355 }
2356
2357 /**
2358 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2359 * @param mtd MTD device structure
2360 * @param buf the databuffer to put/get data
2361 * @param len number of bytes to read
2362 *
2363 * Read user OTP info.
2364 */
2365 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2366 struct otp_info *buf, size_t len)
2367 {
2368 size_t retlen;
2369 int ret;
2370
2371 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2372
2373 return ret ? : retlen;
2374 }
2375
2376 /**
2377 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2378 * @param mtd MTD device structure
2379 * @param from The offset to read
2380 * @param len number of bytes to read
2381 * @param retlen pointer to variable to store the number of read bytes
2382 * @param buf the databuffer to put/get data
2383 *
2384 * Read user OTP area.
2385 */
2386 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2387 size_t len, size_t *retlen, u_char *buf)
2388 {
2389 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2390 }
2391
2392 /**
2393 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2394 * @param mtd MTD device structure
2395 * @param from The offset to write
2396 * @param len number of bytes to write
2397 * @param retlen pointer to variable to store the number of write bytes
2398 * @param buf the databuffer to put/get data
2399 *
2400 * Write user OTP area.
2401 */
2402 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2403 size_t len, size_t *retlen, u_char *buf)
2404 {
2405 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2406 }
2407
2408 /**
2409 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2410 * @param mtd MTD device structure
2411 * @param from The offset to lock
2412 * @param len number of bytes to unlock
2413 *
2414 * Write lock mark on spare area in page 0 in OTP block
2415 */
2416 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2417 size_t len)
2418 {
2419 struct onenand_chip *this = mtd->priv;
2420 u_char *oob_buf = this->oob_buf;
2421 size_t retlen;
2422 int ret;
2423
2424 memset(oob_buf, 0xff, mtd->oobsize);
2425 /*
2426 * Note: OTP lock operation
2427 * OTP block : 0xXXFC
2428 * 1st block : 0xXXF3 (If chip support)
2429 * Both : 0xXXF0 (If chip support)
2430 */
2431 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2432
2433 /*
2434 * Write lock mark to 8th word of sector0 of page0 of the spare0.
2435 * We write 16 bytes spare area instead of 2 bytes.
2436 */
2437 from = 0;
2438 len = 16;
2439
2440 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2441
2442 return ret ? : retlen;
2443 }
2444 #endif /* CONFIG_MTD_ONENAND_OTP */
2445
2446 /**
2447 * onenand_check_features - Check and set OneNAND features
2448 * @param mtd MTD data structure
2449 *
2450 * Check and set OneNAND features
2451 * - lock scheme
2452 * - two plane
2453 */
2454 static void onenand_check_features(struct mtd_info *mtd)
2455 {
2456 struct onenand_chip *this = mtd->priv;
2457 unsigned int density, process;
2458
2459 /* Lock scheme depends on density and process */
2460 density = onenand_get_density(this->device_id);
2461 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2462
2463 /* Lock scheme */
2464 switch (density) {
2465 case ONENAND_DEVICE_DENSITY_4Gb:
2466 this->options |= ONENAND_HAS_2PLANE;
2467
2468 case ONENAND_DEVICE_DENSITY_2Gb:
2469 /* 2Gb DDP don't have 2 plane */
2470 if (!ONENAND_IS_DDP(this))
2471 this->options |= ONENAND_HAS_2PLANE;
2472 this->options |= ONENAND_HAS_UNLOCK_ALL;
2473
2474 case ONENAND_DEVICE_DENSITY_1Gb:
2475 /* A-Die has all block unlock */
2476 if (process)
2477 this->options |= ONENAND_HAS_UNLOCK_ALL;
2478 break;
2479
2480 default:
2481 /* Some OneNAND has continuous lock scheme */
2482 if (!process)
2483 this->options |= ONENAND_HAS_CONT_LOCK;
2484 break;
2485 }
2486
2487 if (this->options & ONENAND_HAS_CONT_LOCK)
2488 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
2489 if (this->options & ONENAND_HAS_UNLOCK_ALL)
2490 printk(KERN_DEBUG "Chip support all block unlock\n");
2491 if (this->options & ONENAND_HAS_2PLANE)
2492 printk(KERN_DEBUG "Chip has 2 plane\n");
2493 }
2494
2495 /**
2496 * onenand_print_device_info - Print device & version ID
2497 * @param device device ID
2498 * @param version version ID
2499 *
2500 * Print device & version ID
2501 */
2502 static void onenand_print_device_info(int device, int version)
2503 {
2504 int vcc, demuxed, ddp, density;
2505
2506 vcc = device & ONENAND_DEVICE_VCC_MASK;
2507 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2508 ddp = device & ONENAND_DEVICE_IS_DDP;
2509 density = onenand_get_density(device);
2510 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2511 demuxed ? "" : "Muxed ",
2512 ddp ? "(DDP)" : "",
2513 (16 << density),
2514 vcc ? "2.65/3.3" : "1.8",
2515 device);
2516 printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
2517 }
2518
2519 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2520 {ONENAND_MFR_SAMSUNG, "Samsung"},
2521 };
2522
2523 /**
2524 * onenand_check_maf - Check manufacturer ID
2525 * @param manuf manufacturer ID
2526 *
2527 * Check manufacturer ID
2528 */
2529 static int onenand_check_maf(int manuf)
2530 {
2531 int size = ARRAY_SIZE(onenand_manuf_ids);
2532 char *name;
2533 int i;
2534
2535 for (i = 0; i < size; i++)
2536 if (manuf == onenand_manuf_ids[i].id)
2537 break;
2538
2539 if (i < size)
2540 name = onenand_manuf_ids[i].name;
2541 else
2542 name = "Unknown";
2543
2544 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2545
2546 return (i == size);
2547 }
2548
2549 /**
2550 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2551 * @param mtd MTD device structure
2552 *
2553 * OneNAND detection method:
2554 * Compare the values from command with ones from register
2555 */
2556 static int onenand_probe(struct mtd_info *mtd)
2557 {
2558 struct onenand_chip *this = mtd->priv;
2559 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2560 int density;
2561 int syscfg;
2562
2563 /* Save system configuration 1 */
2564 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2565 /* Clear Sync. Burst Read mode to read BootRAM */
2566 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2567
2568 /* Send the command for reading device ID from BootRAM */
2569 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2570
2571 /* Read manufacturer and device IDs from BootRAM */
2572 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2573 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2574
2575 /* Reset OneNAND to read default register values */
2576 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2577 /* Wait reset */
2578 this->wait(mtd, FL_RESETING);
2579
2580 /* Restore system configuration 1 */
2581 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2582
2583 /* Check manufacturer ID */
2584 if (onenand_check_maf(bram_maf_id))
2585 return -ENXIO;
2586
2587 /* Read manufacturer and device IDs from Register */
2588 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2589 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2590 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2591
2592 /* Check OneNAND device */
2593 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2594 return -ENXIO;
2595
2596 /* Flash device information */
2597 onenand_print_device_info(dev_id, ver_id);
2598 this->device_id = dev_id;
2599 this->version_id = ver_id;
2600
2601 density = onenand_get_density(dev_id);
2602 this->chipsize = (16 << density) << 20;
2603 /* Set density mask. it is used for DDP */
2604 if (ONENAND_IS_DDP(this))
2605 this->density_mask = (1 << (density + 6));
2606 else
2607 this->density_mask = 0;
2608
2609 /* OneNAND page size & block size */
2610 /* The data buffer size is equal to page size */
2611 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2612 mtd->oobsize = mtd->writesize >> 5;
2613 /* Pages per a block are always 64 in OneNAND */
2614 mtd->erasesize = mtd->writesize << 6;
2615
2616 this->erase_shift = ffs(mtd->erasesize) - 1;
2617 this->page_shift = ffs(mtd->writesize) - 1;
2618 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2619 /* It's real page size */
2620 this->writesize = mtd->writesize;
2621
2622 /* REVIST: Multichip handling */
2623
2624 mtd->size = this->chipsize;
2625
2626 /* Check OneNAND features */
2627 onenand_check_features(mtd);
2628
2629 /*
2630 * We emulate the 4KiB page and 256KiB erase block size
2631 * But oobsize is still 64 bytes.
2632 * It is only valid if you turn on 2X program support,
2633 * Otherwise it will be ignored by compiler.
2634 */
2635 if (ONENAND_IS_2PLANE(this)) {
2636 mtd->writesize <<= 1;
2637 mtd->erasesize <<= 1;
2638 }
2639
2640 return 0;
2641 }
2642
2643 /**
2644 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2645 * @param mtd MTD device structure
2646 */
2647 static int onenand_suspend(struct mtd_info *mtd)
2648 {
2649 return onenand_get_device(mtd, FL_PM_SUSPENDED);
2650 }
2651
2652 /**
2653 * onenand_resume - [MTD Interface] Resume the OneNAND flash
2654 * @param mtd MTD device structure
2655 */
2656 static void onenand_resume(struct mtd_info *mtd)
2657 {
2658 struct onenand_chip *this = mtd->priv;
2659
2660 if (this->state == FL_PM_SUSPENDED)
2661 onenand_release_device(mtd);
2662 else
2663 printk(KERN_ERR "resume() called for the chip which is not"
2664 "in suspended state\n");
2665 }
2666
2667 /**
2668 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2669 * @param mtd MTD device structure
2670 * @param maxchips Number of chips to scan for
2671 *
2672 * This fills out all the not initialized function pointers
2673 * with the defaults.
2674 * The flash ID is read and the mtd/chip structures are
2675 * filled with the appropriate values.
2676 */
2677 int onenand_scan(struct mtd_info *mtd, int maxchips)
2678 {
2679 int i;
2680 struct onenand_chip *this = mtd->priv;
2681
2682 if (!this->read_word)
2683 this->read_word = onenand_readw;
2684 if (!this->write_word)
2685 this->write_word = onenand_writew;
2686
2687 if (!this->command)
2688 this->command = onenand_command;
2689 if (!this->wait)
2690 onenand_setup_wait(mtd);
2691
2692 if (!this->read_bufferram)
2693 this->read_bufferram = onenand_read_bufferram;
2694 if (!this->write_bufferram)
2695 this->write_bufferram = onenand_write_bufferram;
2696
2697 if (!this->block_markbad)
2698 this->block_markbad = onenand_default_block_markbad;
2699 if (!this->scan_bbt)
2700 this->scan_bbt = onenand_default_bbt;
2701
2702 if (onenand_probe(mtd))
2703 return -ENXIO;
2704
2705 /* Set Sync. Burst Read after probing */
2706 if (this->mmcontrol) {
2707 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2708 this->read_bufferram = onenand_sync_read_bufferram;
2709 }
2710
2711 /* Allocate buffers, if necessary */
2712 if (!this->page_buf) {
2713 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2714 if (!this->page_buf) {
2715 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2716 return -ENOMEM;
2717 }
2718 this->options |= ONENAND_PAGEBUF_ALLOC;
2719 }
2720 if (!this->oob_buf) {
2721 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2722 if (!this->oob_buf) {
2723 printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2724 if (this->options & ONENAND_PAGEBUF_ALLOC) {
2725 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2726 kfree(this->page_buf);
2727 }
2728 return -ENOMEM;
2729 }
2730 this->options |= ONENAND_OOBBUF_ALLOC;
2731 }
2732
2733 this->state = FL_READY;
2734 init_waitqueue_head(&this->wq);
2735 spin_lock_init(&this->chip_lock);
2736
2737 /*
2738 * Allow subpage writes up to oobsize.
2739 */
2740 switch (mtd->oobsize) {
2741 case 64:
2742 this->ecclayout = &onenand_oob_64;
2743 mtd->subpage_sft = 2;
2744 break;
2745
2746 case 32:
2747 this->ecclayout = &onenand_oob_32;
2748 mtd->subpage_sft = 1;
2749 break;
2750
2751 default:
2752 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2753 mtd->oobsize);
2754 mtd->subpage_sft = 0;
2755 /* To prevent kernel oops */
2756 this->ecclayout = &onenand_oob_32;
2757 break;
2758 }
2759
2760 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2761
2762 /*
2763 * The number of bytes available for a client to place data into
2764 * the out of band area
2765 */
2766 this->ecclayout->oobavail = 0;
2767 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2768 this->ecclayout->oobfree[i].length; i++)
2769 this->ecclayout->oobavail +=
2770 this->ecclayout->oobfree[i].length;
2771 mtd->oobavail = this->ecclayout->oobavail;
2772
2773 mtd->ecclayout = this->ecclayout;
2774
2775 /* Fill in remaining MTD driver data */
2776 mtd->type = MTD_NANDFLASH;
2777 mtd->flags = MTD_CAP_NANDFLASH;
2778 mtd->erase = onenand_erase;
2779 mtd->point = NULL;
2780 mtd->unpoint = NULL;
2781 mtd->read = onenand_read;
2782 mtd->write = onenand_write;
2783 mtd->read_oob = onenand_read_oob;
2784 mtd->write_oob = onenand_write_oob;
2785 mtd->panic_write = onenand_panic_write;
2786 #ifdef CONFIG_MTD_ONENAND_OTP
2787 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2788 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2789 mtd->get_user_prot_info = onenand_get_user_prot_info;
2790 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2791 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2792 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2793 #endif
2794 mtd->sync = onenand_sync;
2795 mtd->lock = onenand_lock;
2796 mtd->unlock = onenand_unlock;
2797 mtd->suspend = onenand_suspend;
2798 mtd->resume = onenand_resume;
2799 mtd->block_isbad = onenand_block_isbad;
2800 mtd->block_markbad = onenand_block_markbad;
2801 mtd->owner = THIS_MODULE;
2802
2803 /* Unlock whole block */
2804 onenand_unlock_all(mtd);
2805
2806 return this->scan_bbt(mtd);
2807 }
2808
2809 /**
2810 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2811 * @param mtd MTD device structure
2812 */
2813 void onenand_release(struct mtd_info *mtd)
2814 {
2815 struct onenand_chip *this = mtd->priv;
2816
2817 #ifdef CONFIG_MTD_PARTITIONS
2818 /* Deregister partitions */
2819 del_mtd_partitions (mtd);
2820 #endif
2821 /* Deregister the device */
2822 del_mtd_device (mtd);
2823
2824 /* Free bad block table memory, if allocated */
2825 if (this->bbm) {
2826 struct bbm_info *bbm = this->bbm;
2827 kfree(bbm->bbt);
2828 kfree(this->bbm);
2829 }
2830 /* Buffers allocated by onenand_scan */
2831 if (this->options & ONENAND_PAGEBUF_ALLOC)
2832 kfree(this->page_buf);
2833 if (this->options & ONENAND_OOBBUF_ALLOC)
2834 kfree(this->oob_buf);
2835 }
2836
2837 EXPORT_SYMBOL_GPL(onenand_scan);
2838 EXPORT_SYMBOL_GPL(onenand_release);
2839
2840 MODULE_LICENSE("GPL");
2841 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2842 MODULE_DESCRIPTION("Generic OneNAND flash driver code");