drivers/mtd/devices/m25p80.c

   1 /*
   2  * MTD SPI driver for ST M25Pxx (and similar) serial flash chips
   3  *
   4  * Author: Mike Lavender, mike@steroidmicros.com
   5  *
   6  * Copyright (c) 2005, Intec Automation Inc.
   7  *
   8  * Some parts are based on lart.c by Abraham Van Der Merwe
   9  *
  10  * Cleaned up and generalized based on mtd_dataflash.c
  11  *
  12  * This code is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  *
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/module.h>
  20 #include <linux/device.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/mutex.h>
  23 #include <linux/math64.h>
  24
  25 #include <linux/mtd/mtd.h>
  26 #include <linux/mtd/partitions.h>
  27
  28 #include <linux/spi/spi.h>
  29 #include <linux/spi/flash.h>
  30
  31
  32 #define FLASH_PAGESIZE          256
  33
  34 /* Flash opcodes. */
  35 #define OPCODE_WREN             0x06    /* Write enable */
  36 #define OPCODE_RDSR             0x05    /* Read status register */
  37 #define OPCODE_WRSR             0x01    /* Write status register 1 byte */
  38 #define OPCODE_NORM_READ        0x03    /* Read data bytes (low frequency) */
  39 #define OPCODE_FAST_READ        0x0b    /* Read data bytes (high frequency) */
  40 #define OPCODE_PP               0x02    /* Page program (up to 256 bytes) */
  41 #define OPCODE_BE_4K            0x20    /* Erase 4KiB block */
  42 #define OPCODE_BE_32K           0x52    /* Erase 32KiB block */
  43 #define OPCODE_CHIP_ERASE       0xc7    /* Erase whole flash chip */
  44 #define OPCODE_SE               0xd8    /* Sector erase (usually 64KiB) */
  45 #define OPCODE_RDID             0x9f    /* Read JEDEC ID */
  46
  47 /* Status Register bits. */
  48 #define SR_WIP                  1       /* Write in progress */
  49 #define SR_WEL                  2       /* Write enable latch */
  50 /* meaning of other SR_* bits may differ between vendors */
  51 #define SR_BP0                  4       /* Block protect 0 */
  52 #define SR_BP1                  8       /* Block protect 1 */
  53 #define SR_BP2                  0x10    /* Block protect 2 */
  54 #define SR_SRWD                 0x80    /* SR write protect */
  55
  56 /* Define max times to check status register before we give up. */
  57 #define MAX_READY_WAIT_JIFFIES  (10 * HZ)       /* eg. M25P128 specs 6s max sector erase */
  58 #define CMD_SIZE                4
  59
  60 #ifdef CONFIG_M25PXX_USE_FAST_READ
  61 #define OPCODE_READ     OPCODE_FAST_READ
  62 #define FAST_READ_DUMMY_BYTE 1
  63 #else
  64 #define OPCODE_READ     OPCODE_NORM_READ
  65 #define FAST_READ_DUMMY_BYTE 0
  66 #endif
  67
  68 /****************************************************************************/
  69
  70 struct m25p {
  71         struct spi_device       *spi;
  72         struct mutex            lock;
  73         struct mtd_info         mtd;
  74         unsigned                partitioned:1;
  75         u8                      erase_opcode;
  76         u8                      command[CMD_SIZE + FAST_READ_DUMMY_BYTE];
  77 };
  78
  79 static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
  80 {
  81         return container_of(mtd, struct m25p, mtd);
  82 }
  83
  84 /****************************************************************************/
  85
  86 /*
  87  * Internal helper functions
  88  */
  89
  90 /*
  91  * Read the status register, returning its value in the location
  92  * Return the status register value.
  93  * Returns negative if error occurred.
  94  */
  95 static int read_sr(struct m25p *flash)
  96 {
  97         ssize_t retval;
  98         u8 code = OPCODE_RDSR;
  99         u8 val;
 100
 101         retval = spi_write_then_read(flash->spi, &code, 1, &val, 1);
 102
 103         if (retval < 0) {
 104                 dev_err(&flash->spi->dev, "error %d reading SR\n",
 105                                 (int) retval);
 106                 return retval;
 107         }
 108
 109         return val;
 110 }
 111
 112 /*
 113  * Write status register 1 byte
 114  * Returns negative if error occurred.
 115  */
 116 static int write_sr(struct m25p *flash, u8 val)
 117 {
 118         flash->command[0] = OPCODE_WRSR;
 119         flash->command[1] = val;
 120
 121         return spi_write(flash->spi, flash->command, 2);
 122 }
 123
 124 /*
 125  * Set write enable latch with Write Enable command.
 126  * Returns negative if error occurred.
 127  */
 128 static inline int write_enable(struct m25p *flash)
 129 {
 130         u8      code = OPCODE_WREN;
 131
 132         return spi_write_then_read(flash->spi, &code, 1, NULL, 0);
 133 }
 134
 135
 136 /*
 137  * Service routine to read status register until ready, or timeout occurs.
 138  * Returns non-zero if error.
 139  */
 140 static int wait_till_ready(struct m25p *flash)
 141 {
 142         unsigned long deadline;
 143         int sr;
 144
 145         deadline = jiffies + MAX_READY_WAIT_JIFFIES;
 146
 147         do {
 148                 if ((sr = read_sr(flash)) < 0)
 149                         break;
 150                 else if (!(sr & SR_WIP))
 151                         return 0;
 152
 153                 cond_resched();
 154
 155         } while (!time_after_eq(jiffies, deadline));
 156
 157         return 1;
 158 }
 159
 160 /*
 161  * Erase the whole flash memory
 162  *
 163  * Returns 0 if successful, non-zero otherwise.
 164  */
 165 static int erase_chip(struct m25p *flash)
 166 {
 167         DEBUG(MTD_DEBUG_LEVEL3, "%s: %s %lldKiB\n",
 168               dev_name(&flash->spi->dev), __func__,
 169               (long long)(flash->mtd.size >> 10));
 170
 171         /* Wait until finished previous write command. */
 172         if (wait_till_ready(flash))
 173                 return 1;
 174
 175         /* Send write enable, then erase commands. */
 176         write_enable(flash);
 177
 178         /* Set up command buffer. */
 179         flash->command[0] = OPCODE_CHIP_ERASE;
 180
 181         spi_write(flash->spi, flash->command, 1);
 182
 183         return 0;
 184 }
 185
 186 /*
 187  * Erase one sector of flash memory at offset ``offset'' which is any
 188  * address within the sector which should be erased.
 189  *
 190  * Returns 0 if successful, non-zero otherwise.
 191  */
 192 static int erase_sector(struct m25p *flash, u32 offset)
 193 {
 194         DEBUG(MTD_DEBUG_LEVEL3, "%s: %s %dKiB at 0x%08x\n",
 195                         dev_name(&flash->spi->dev), __func__,
 196                         flash->mtd.erasesize / 1024, offset);
 197
 198         /* Wait until finished previous write command. */
 199         if (wait_till_ready(flash))
 200                 return 1;
 201
 202         /* Send write enable, then erase commands. */
 203         write_enable(flash);
 204
 205         /* Set up command buffer. */
 206         flash->command[0] = flash->erase_opcode;
 207         flash->command[1] = offset >> 16;
 208         flash->command[2] = offset >> 8;
 209         flash->command[3] = offset;
 210
 211         spi_write(flash->spi, flash->command, CMD_SIZE);
 212
 213         return 0;
 214 }
 215
 216 /****************************************************************************/
 217
 218 /*
 219  * MTD implementation
 220  */
 221
 222 /*
 223  * Erase an address range on the flash chip.  The address range may extend
 224  * one or more erase sectors.  Return an error is there is a problem erasing.
 225  */
 226 static int m25p80_erase(struct mtd_info *mtd, struct erase_info *instr)
 227 {
 228         struct m25p *flash = mtd_to_m25p(mtd);
 229         u32 addr,len;
 230         uint32_t rem;
 231
 232         DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%llx, len %lld\n",
 233               dev_name(&flash->spi->dev), __func__, "at",
 234               (long long)instr->addr, (long long)instr->len);
 235
 236         /* sanity checks */
 237         if (instr->addr + instr->len > flash->mtd.size)
 238                 return -EINVAL;
 239         div_u64_rem(instr->len, mtd->erasesize, &rem);
 240         if (rem)
 241                 return -EINVAL;
 242
 243         addr = instr->addr;
 244         len = instr->len;
 245
 246         mutex_lock(&flash->lock);
 247
 248         /* whole-chip erase? */
 249         if (len == flash->mtd.size) {
 250                 if (erase_chip(flash)) {
 251                         instr->state = MTD_ERASE_FAILED;
 252                         mutex_unlock(&flash->lock);
 253                         return -EIO;
 254                 }
 255
 256         /* REVISIT in some cases we could speed up erasing large regions
 257          * by using OPCODE_SE instead of OPCODE_BE_4K.  We may have set up
 258          * to use "small sector erase", but that's not always optimal.
 259          */
 260
 261         /* "sector"-at-a-time erase */
 262         } else {
 263                 while (len) {
 264                         if (erase_sector(flash, addr)) {
 265                                 instr->state = MTD_ERASE_FAILED;
 266                                 mutex_unlock(&flash->lock);
 267                                 return -EIO;
 268                         }
 269
 270                         addr += mtd->erasesize;
 271                         len -= mtd->erasesize;
 272                 }
 273         }
 274
 275         mutex_unlock(&flash->lock);
 276
 277         instr->state = MTD_ERASE_DONE;
 278         mtd_erase_callback(instr);
 279
 280         return 0;
 281 }
 282
 283 /*
 284  * Read an address range from the flash chip.  The address range
 285  * may be any size provided it is within the physical boundaries.
 286  */
 287 static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
 288         size_t *retlen, u_char *buf)
 289 {
 290         struct m25p *flash = mtd_to_m25p(mtd);
 291         struct spi_transfer t[2];
 292         struct spi_message m;
 293
 294         DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
 295                         dev_name(&flash->spi->dev), __func__, "from",
 296                         (u32)from, len);
 297
 298         /* sanity checks */
 299         if (!len)
 300                 return 0;
 301
 302         if (from + len > flash->mtd.size)
 303                 return -EINVAL;
 304
 305         spi_message_init(&m);
 306         memset(t, 0, (sizeof t));
 307
 308         /* NOTE:
 309          * OPCODE_FAST_READ (if available) is faster.
 310          * Should add 1 byte DUMMY_BYTE.
 311          */
 312         t[0].tx_buf = flash->command;
 313         t[0].len = CMD_SIZE + FAST_READ_DUMMY_BYTE;
 314         spi_message_add_tail(&t[0], &m);
 315
 316         t[1].rx_buf = buf;
 317         t[1].len = len;
 318         spi_message_add_tail(&t[1], &m);
 319
 320         /* Byte count starts at zero. */
 321         if (retlen)
 322                 *retlen = 0;
 323
 324         mutex_lock(&flash->lock);
 325
 326         /* Wait till previous write/erase is done. */
 327         if (wait_till_ready(flash)) {
 328                 /* REVISIT status return?? */
 329                 mutex_unlock(&flash->lock);
 330                 return 1;
 331         }
 332
 333         /* FIXME switch to OPCODE_FAST_READ.  It's required for higher
 334          * clocks; and at this writing, every chip this driver handles
 335          * supports that opcode.
 336          */
 337
 338         /* Set up the write data buffer. */
 339         flash->command[0] = OPCODE_READ;
 340         flash->command[1] = from >> 16;
 341         flash->command[2] = from >> 8;
 342         flash->command[3] = from;
 343
 344         spi_sync(flash->spi, &m);
 345
 346         *retlen = m.actual_length - CMD_SIZE - FAST_READ_DUMMY_BYTE;
 347
 348         mutex_unlock(&flash->lock);
 349
 350         return 0;
 351 }
 352
 353 /*
 354  * Write an address range to the flash chip.  Data must be written in
 355  * FLASH_PAGESIZE chunks.  The address range may be any size provided
 356  * it is within the physical boundaries.
 357  */
 358 static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len,
 359         size_t *retlen, const u_char *buf)
 360 {
 361         struct m25p *flash = mtd_to_m25p(mtd);
 362         u32 page_offset, page_size;
 363         struct spi_transfer t[2];
 364         struct spi_message m;
 365
 366         DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
 367                         dev_name(&flash->spi->dev), __func__, "to",
 368                         (u32)to, len);
 369
 370         if (retlen)
 371                 *retlen = 0;
 372
 373         /* sanity checks */
 374         if (!len)
 375                 return(0);
 376
 377         if (to + len > flash->mtd.size)
 378                 return -EINVAL;
 379
 380         spi_message_init(&m);
 381         memset(t, 0, (sizeof t));
 382
 383         t[0].tx_buf = flash->command;
 384         t[0].len = CMD_SIZE;
 385         spi_message_add_tail(&t[0], &m);
 386
 387         t[1].tx_buf = buf;
 388         spi_message_add_tail(&t[1], &m);
 389
 390         mutex_lock(&flash->lock);
 391
 392         /* Wait until finished previous write command. */
 393         if (wait_till_ready(flash)) {
 394                 mutex_unlock(&flash->lock);
 395                 return 1;
 396         }
 397
 398         write_enable(flash);
 399
 400         /* Set up the opcode in the write buffer. */
 401         flash->command[0] = OPCODE_PP;
 402         flash->command[1] = to >> 16;
 403         flash->command[2] = to >> 8;
 404         flash->command[3] = to;
 405
 406         /* what page do we start with? */
 407         page_offset = to % FLASH_PAGESIZE;
 408
 409         /* do all the bytes fit onto one page? */
 410         if (page_offset + len <= FLASH_PAGESIZE) {
 411                 t[1].len = len;
 412
 413                 spi_sync(flash->spi, &m);
 414
 415                 *retlen = m.actual_length - CMD_SIZE;
 416         } else {
 417                 u32 i;
 418
 419                 /* the size of data remaining on the first page */
 420                 page_size = FLASH_PAGESIZE - page_offset;
 421
 422                 t[1].len = page_size;
 423                 spi_sync(flash->spi, &m);
 424
 425                 *retlen = m.actual_length - CMD_SIZE;
 426
 427                 /* write everything in PAGESIZE chunks */
 428                 for (i = page_size; i < len; i += page_size) {
 429                         page_size = len - i;
 430                         if (page_size > FLASH_PAGESIZE)
 431                                 page_size = FLASH_PAGESIZE;
 432
 433                         /* write the next page to flash */
 434                         flash->command[1] = (to + i) >> 16;
 435                         flash->command[2] = (to + i) >> 8;
 436                         flash->command[3] = (to + i);
 437
 438                         t[1].tx_buf = buf + i;
 439                         t[1].len = page_size;
 440
 441                         wait_till_ready(flash);
 442
 443                         write_enable(flash);
 444
 445                         spi_sync(flash->spi, &m);
 446
 447                         if (retlen)
 448                                 *retlen += m.actual_length - CMD_SIZE;
 449                 }
 450         }
 451
 452         mutex_unlock(&flash->lock);
 453
 454         return 0;
 455 }
 456
 457
 458 /****************************************************************************/
 459
 460 /*
 461  * SPI device driver setup and teardown
 462  */
 463
 464 struct flash_info {
 465         char            *name;
 466
 467         /* JEDEC id zero means "no ID" (most older chips); otherwise it has
 468          * a high byte of zero plus three data bytes: the manufacturer id,
 469          * then a two byte device id.
 470          */
 471         u32             jedec_id;
 472         u16             ext_id;
 473
 474         /* The size listed here is what works with OPCODE_SE, which isn't
 475          * necessarily called a "sector" by the vendor.
 476          */
 477         unsigned        sector_size;
 478         u16             n_sectors;
 479
 480         u16             flags;
 481 #define SECT_4K         0x01            /* OPCODE_BE_4K works uniformly */
 482 };
 483
 484
 485 /* NOTE: double check command sets and memory organization when you add
 486  * more flash chips.  This current list focusses on newer chips, which
 487  * have been converging on command sets which including JEDEC ID.
 488  */
 489 static struct flash_info __devinitdata m25p_data [] = {
 490
 491         /* Atmel -- some are (confusingly) marketed as "DataFlash" */
 492         { "at25fs010",  0x1f6601, 0, 32 * 1024, 4, SECT_4K, },
 493         { "at25fs040",  0x1f6604, 0, 64 * 1024, 8, SECT_4K, },
 494
 495         { "at25df041a", 0x1f4401, 0, 64 * 1024, 8, SECT_4K, },
 496         { "at25df641",  0x1f4800, 0, 64 * 1024, 128, SECT_4K, },
 497
 498         { "at26f004",   0x1f0400, 0, 64 * 1024, 8, SECT_4K, },
 499         { "at26df081a", 0x1f4501, 0, 64 * 1024, 16, SECT_4K, },
 500         { "at26df161a", 0x1f4601, 0, 64 * 1024, 32, SECT_4K, },
 501         { "at26df321",  0x1f4701, 0, 64 * 1024, 64, SECT_4K, },
 502
 503         /* Macronix */
 504         { "mx25l12805d", 0xc22018, 0, 64 * 1024, 256, },
 505
 506         /* Spansion -- single (large) sector size only, at least
 507          * for the chips listed here (without boot sectors).
 508          */
 509         { "s25sl004a", 0x010212, 0, 64 * 1024, 8, },
 510         { "s25sl008a", 0x010213, 0, 64 * 1024, 16, },
 511         { "s25sl016a", 0x010214, 0, 64 * 1024, 32, },
 512         { "s25sl032a", 0x010215, 0, 64 * 1024, 64, },
 513         { "s25sl064a", 0x010216, 0, 64 * 1024, 128, },
 514         { "s25sl12800", 0x012018, 0x0300, 256 * 1024, 64, },
 515         { "s25sl12801", 0x012018, 0x0301, 64 * 1024, 256, },
 516
 517         /* SST -- large erase sizes are "overlays", "sectors" are 4K */
 518         { "sst25vf040b", 0xbf258d, 0, 64 * 1024, 8, SECT_4K, },
 519         { "sst25vf080b", 0xbf258e, 0, 64 * 1024, 16, SECT_4K, },
 520         { "sst25vf016b", 0xbf2541, 0, 64 * 1024, 32, SECT_4K, },
 521         { "sst25vf032b", 0xbf254a, 0, 64 * 1024, 64, SECT_4K, },
 522
 523         /* ST Microelectronics -- newer production may have feature updates */
 524         { "m25p05",  0x202010,  0, 32 * 1024, 2, },
 525         { "m25p10",  0x202011,  0, 32 * 1024, 4, },
 526         { "m25p20",  0x202012,  0, 64 * 1024, 4, },
 527         { "m25p40",  0x202013,  0, 64 * 1024, 8, },
 528         { "m25p80",         0,  0, 64 * 1024, 16, },
 529         { "m25p16",  0x202015,  0, 64 * 1024, 32, },
 530         { "m25p32",  0x202016,  0, 64 * 1024, 64, },
 531         { "m25p64",  0x202017,  0, 64 * 1024, 128, },
 532         { "m25p128", 0x202018, 0, 256 * 1024, 64, },
 533
 534         { "m45pe10", 0x204011,  0, 64 * 1024, 2, },
 535         { "m45pe80", 0x204014,  0, 64 * 1024, 16, },
 536         { "m45pe16", 0x204015,  0, 64 * 1024, 32, },
 537
 538         { "m25pe80", 0x208014,  0, 64 * 1024, 16, },
 539         { "m25pe16", 0x208015,  0, 64 * 1024, 32, SECT_4K, },
 540
 541         /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */
 542         { "w25x10", 0xef3011, 0, 64 * 1024, 2, SECT_4K, },
 543         { "w25x20", 0xef3012, 0, 64 * 1024, 4, SECT_4K, },
 544         { "w25x40", 0xef3013, 0, 64 * 1024, 8, SECT_4K, },
 545         { "w25x80", 0xef3014, 0, 64 * 1024, 16, SECT_4K, },
 546         { "w25x16", 0xef3015, 0, 64 * 1024, 32, SECT_4K, },
 547         { "w25x32", 0xef3016, 0, 64 * 1024, 64, SECT_4K, },
 548         { "w25x64", 0xef3017, 0, 64 * 1024, 128, SECT_4K, },
 549 };
 550
 551 static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
 552 {
 553         int                     tmp;
 554         u8                      code = OPCODE_RDID;
 555         u8                      id[5];
 556         u32                     jedec;
 557         u16                     ext_jedec;
 558         struct flash_info       *info;
 559
 560         /* JEDEC also defines an optional "extended device information"
 561          * string for after vendor-specific data, after the three bytes
 562          * we use here.  Supporting some chips might require using it.
 563          */
 564         tmp = spi_write_then_read(spi, &code, 1, id, 5);
 565         if (tmp < 0) {
 566                 DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n",
 567                         dev_name(&spi->dev), tmp);
 568                 return NULL;
 569         }
 570         jedec = id[0];
 571         jedec = jedec << 8;
 572         jedec |= id[1];
 573         jedec = jedec << 8;
 574         jedec |= id[2];
 575
 576         ext_jedec = id[3] << 8 | id[4];
 577
 578         for (tmp = 0, info = m25p_data;
 579                         tmp < ARRAY_SIZE(m25p_data);
 580                         tmp++, info++) {
 581                 if (info->jedec_id == jedec) {
 582                         if (info->ext_id != 0 && info->ext_id != ext_jedec)
 583                                 continue;
 584                         return info;
 585                 }
 586         }
 587         dev_err(&spi->dev, "unrecognized JEDEC id %06x\n", jedec);
 588         return NULL;
 589 }
 590
 591
 592 /*
 593  * board specific setup should have ensured the SPI clock used here
 594  * matches what the READ command supports, at least until this driver
 595  * understands FAST_READ (for clocks over 25 MHz).
 596  */
 597 static int __devinit m25p_probe(struct spi_device *spi)
 598 {
 599         struct flash_platform_data      *data;
 600         struct m25p                     *flash;
 601         struct flash_info               *info;
 602         unsigned                        i;
 603
 604         /* Platform data helps sort out which chip type we have, as
 605          * well as how this board partitions it.  If we don't have
 606          * a chip ID, try the JEDEC id commands; they'll work for most
 607          * newer chips, even if we don't recognize the particular chip.
 608          */
 609         data = spi->dev.platform_data;
 610         if (data && data->type) {
 611                 for (i = 0, info = m25p_data;
 612                                 i < ARRAY_SIZE(m25p_data);
 613                                 i++, info++) {
 614                         if (strcmp(data->type, info->name) == 0)
 615                                 break;
 616                 }
 617
 618                 /* unrecognized chip? */
 619                 if (i == ARRAY_SIZE(m25p_data)) {
 620                         DEBUG(MTD_DEBUG_LEVEL0, "%s: unrecognized id %s\n",
 621                                         dev_name(&spi->dev), data->type);
 622                         info = NULL;
 623
 624                 /* recognized; is that chip really what's there? */
 625                 } else if (info->jedec_id) {
 626                         struct flash_info       *chip = jedec_probe(spi);
 627
 628                         if (!chip || chip != info) {
 629                                 dev_warn(&spi->dev, "found %s, expected %s\n",
 630                                                 chip ? chip->name : "UNKNOWN",
 631                                                 info->name);
 632                                 info = NULL;
 633                         }
 634                 }
 635         } else
 636                 info = jedec_probe(spi);
 637
 638         if (!info)
 639                 return -ENODEV;
 640
 641         flash = kzalloc(sizeof *flash, GFP_KERNEL);
 642         if (!flash)
 643                 return -ENOMEM;
 644
 645         flash->spi = spi;
 646         mutex_init(&flash->lock);
 647         dev_set_drvdata(&spi->dev, flash);
 648
 649         /*
 650          * Atmel serial flash tend to power up
 651          * with the software protection bits set
 652          */
 653
 654         if (info->jedec_id >> 16 == 0x1f) {
 655                 write_enable(flash);
 656                 write_sr(flash, 0);
 657         }
 658
 659         if (data && data->name)
 660                 flash->mtd.name = data->name;
 661         else
 662                 flash->mtd.name = dev_name(&spi->dev);
 663
 664         flash->mtd.type = MTD_NORFLASH;
 665         flash->mtd.writesize = 1;
 666         flash->mtd.flags = MTD_CAP_NORFLASH;
 667         flash->mtd.size = info->sector_size * info->n_sectors;
 668         flash->mtd.erase = m25p80_erase;
 669         flash->mtd.read = m25p80_read;
 670         flash->mtd.write = m25p80_write;
 671
 672         /* prefer "small sector" erase if possible */
 673         if (info->flags & SECT_4K) {
 674                 flash->erase_opcode = OPCODE_BE_4K;
 675                 flash->mtd.erasesize = 4096;
 676         } else {
 677                 flash->erase_opcode = OPCODE_SE;
 678                 flash->mtd.erasesize = info->sector_size;
 679         }
 680
 681         flash->mtd.dev.parent = &spi->dev;
 682
 683         dev_info(&spi->dev, "%s (%lld Kbytes)\n", info->name,
 684                         (long long)flash->mtd.size >> 10);
 685
 686         DEBUG(MTD_DEBUG_LEVEL2,
 687                 "mtd .name = %s, .size = 0x%llx (%lldMiB) "
 688                         ".erasesize = 0x%.8x (%uKiB) .numeraseregions = %d\n",
 689                 flash->mtd.name,
 690                 (long long)flash->mtd.size, (long long)(flash->mtd.size >> 20),
 691                 flash->mtd.erasesize, flash->mtd.erasesize / 1024,
 692                 flash->mtd.numeraseregions);
 693
 694         if (flash->mtd.numeraseregions)
 695                 for (i = 0; i < flash->mtd.numeraseregions; i++)
 696                         DEBUG(MTD_DEBUG_LEVEL2,
 697                                 "mtd.eraseregions[%d] = { .offset = 0x%llx, "
 698                                 ".erasesize = 0x%.8x (%uKiB), "
 699                                 ".numblocks = %d }\n",
 700                                 i, (long long)flash->mtd.eraseregions[i].offset,
 701                                 flash->mtd.eraseregions[i].erasesize,
 702                                 flash->mtd.eraseregions[i].erasesize / 1024,
 703                                 flash->mtd.eraseregions[i].numblocks);
 704
 705
 706         /* partitions should match sector boundaries; and it may be good to
 707          * use readonly partitions for writeprotected sectors (BP2..BP0).
 708          */
 709         if (mtd_has_partitions()) {
 710                 struct mtd_partition    *parts = NULL;
 711                 int                     nr_parts = 0;
 712
 713                 if (mtd_has_cmdlinepart()) {
 714                         static const char *part_probes[]
 715                                         = { "cmdlinepart", NULL, };
 716
 717                         nr_parts = parse_mtd_partitions(&flash->mtd,
 718                                         part_probes, &parts, 0);
 719                 }
 720
 721                 if (nr_parts <= 0 && data && data->parts) {
 722                         parts = data->parts;
 723                         nr_parts = data->nr_parts;
 724                 }
 725
 726                 if (nr_parts > 0) {
 727                         for (i = 0; i < nr_parts; i++) {
 728                                 DEBUG(MTD_DEBUG_LEVEL2, "partitions[%d] = "
 729                                         "{.name = %s, .offset = 0x%llx, "
 730                                                 ".size = 0x%llx (%lldKiB) }\n",
 731                                         i, parts[i].name,
 732                                         (long long)parts[i].offset,
 733                                         (long long)parts[i].size,
 734                                         (long long)(parts[i].size >> 10));
 735                         }
 736                         flash->partitioned = 1;
 737                         return add_mtd_partitions(&flash->mtd, parts, nr_parts);
 738                 }
 739         } else if (data->nr_parts)
 740                 dev_warn(&spi->dev, "ignoring %d default partitions on %s\n",
 741                                 data->nr_parts, data->name);
 742
 743         return add_mtd_device(&flash->mtd) == 1 ? -ENODEV : 0;
 744 }
 745
 746
 747 static int __devexit m25p_remove(struct spi_device *spi)
 748 {
 749         struct m25p     *flash = dev_get_drvdata(&spi->dev);
 750         int             status;
 751
 752         /* Clean up MTD stuff. */
 753         if (mtd_has_partitions() && flash->partitioned)
 754                 status = del_mtd_partitions(&flash->mtd);
 755         else
 756                 status = del_mtd_device(&flash->mtd);
 757         if (status == 0)
 758                 kfree(flash);
 759         return 0;
 760 }
 761
 762
 763 static struct spi_driver m25p80_driver = {
 764         .driver = {
 765                 .name   = "m25p80",
 766                 .bus    = &spi_bus_type,
 767                 .owner  = THIS_MODULE,
 768         },
 769         .probe  = m25p_probe,
 770         .remove = __devexit_p(m25p_remove),
 771
 772         /* REVISIT: many of these chips have deep power-down modes, which
 773          * should clearly be entered on suspend() to minimize power use.
 774          * And also when they're otherwise idle...
 775          */
 776 };
 777
 778
 779 static int m25p80_init(void)
 780 {
 781         return spi_register_driver(&m25p80_driver);
 782 }
 783
 784
 785 static void m25p80_exit(void)
 786 {
 787         spi_unregister_driver(&m25p80_driver);
 788 }
 789
 790
 791 module_init(m25p80_init);
 792 module_exit(m25p80_exit);
 793
 794 MODULE_LICENSE("GPL");
 795 MODULE_AUTHOR("Mike Lavender");
 796 MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");