drivers/mtd/chips/Kconfig

   1 menu "RAM/ROM/Flash chip drivers"
   2         depends on MTD!=n
   3
   4 config MTD_CFI
   5         tristate "Detect flash chips by Common Flash Interface (CFI) probe"
   6         select MTD_GEN_PROBE
   7         select MTD_CFI_UTIL
   8         help
   9           The Common Flash Interface specification was developed by Intel,
  10           AMD and other flash manufactures that provides a universal method
  11           for probing the capabilities of flash devices. If you wish to
  12           support any device that is CFI-compliant, you need to enable this
  13           option. Visit <http://www.amd.com/products/nvd/overview/cfi.html>
  14           for more information on CFI.
  15
  16 config MTD_JEDECPROBE
  17         tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
  18         select MTD_GEN_PROBE
  19         help
  20           This option enables JEDEC-style probing of flash chips which are not
  21           compatible with the Common Flash Interface, but will use the common
  22           CFI-targetted flash drivers for any chips which are identified which
  23           are in fact compatible in all but the probe method. This actually
  24           covers most AMD/Fujitsu-compatible chips and also non-CFI
  25           Intel chips.
  26
  27 config MTD_GEN_PROBE
  28         tristate
  29
  30 config MTD_CFI_ADV_OPTIONS
  31         bool "Flash chip driver advanced configuration options"
  32         depends on MTD_GEN_PROBE
  33         help
  34           If you need to specify a specific endianness for access to flash
  35           chips, or if you wish to reduce the size of the kernel by including
  36           support for only specific arrangements of flash chips, say 'Y'. This
  37           option does not directly affect the code, but will enable other
  38           configuration options which allow you to do so.
  39
  40           If unsure, say 'N'.
  41
  42 choice
  43         prompt "Flash cmd/query data swapping"
  44         depends on MTD_CFI_ADV_OPTIONS
  45         default MTD_CFI_NOSWAP
  46
  47 config MTD_CFI_NOSWAP
  48         bool "NO"
  49         ---help---
  50           This option defines the way in which the CPU attempts to arrange
  51           data bits when writing the 'magic' commands to the chips. Saying
  52           'NO', which is the default when CONFIG_MTD_CFI_ADV_OPTIONS isn't
  53           enabled, means that the CPU will not do any swapping; the chips
  54           are expected to be wired to the CPU in 'host-endian' form.
  55           Specific arrangements are possible with the BIG_ENDIAN_BYTE and
  56           LITTLE_ENDIAN_BYTE, if the bytes are reversed.
  57
  58           If you have a LART, on which the data (and address) lines were
  59           connected in a fashion which ensured that the nets were as short
  60           as possible, resulting in a bit-shuffling which seems utterly
  61           random to the untrained eye, you need the LART_ENDIAN_BYTE option.
  62
  63           Yes, there really exists something sicker than PDP-endian :)
  64
  65 config MTD_CFI_BE_BYTE_SWAP
  66         bool "BIG_ENDIAN_BYTE"
  67
  68 config MTD_CFI_LE_BYTE_SWAP
  69         bool "LITTLE_ENDIAN_BYTE"
  70
  71 endchoice
  72
  73 config MTD_CFI_GEOMETRY
  74         bool "Specific CFI Flash geometry selection"
  75         depends on MTD_CFI_ADV_OPTIONS
  76         help
  77           This option does not affect the code directly, but will enable
  78           some other configuration options which would allow you to reduce
  79           the size of the kernel by including support for only certain
  80           arrangements of CFI chips. If unsure, say 'N' and all options
  81           which are supported by the current code will be enabled.
  82
  83 config MTD_MAP_BANK_WIDTH_1
  84         bool "Support  8-bit buswidth" if MTD_CFI_GEOMETRY
  85         default y
  86         help
  87           If you wish to support CFI devices on a physical bus which is
  88           8 bits wide, say 'Y'.
  89
  90 config MTD_MAP_BANK_WIDTH_2
  91         bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
  92         default y
  93         help
  94           If you wish to support CFI devices on a physical bus which is
  95           16 bits wide, say 'Y'.
  96
  97 config MTD_MAP_BANK_WIDTH_4
  98         bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
  99         default y
 100         help
 101           If you wish to support CFI devices on a physical bus which is
 102           32 bits wide, say 'Y'.
 103
 104 config MTD_MAP_BANK_WIDTH_8
 105         bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY
 106         default n
 107         help
 108           If you wish to support CFI devices on a physical bus which is
 109           64 bits wide, say 'Y'.
 110
 111 config MTD_MAP_BANK_WIDTH_16
 112         bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY
 113         default n
 114         help
 115           If you wish to support CFI devices on a physical bus which is
 116           128 bits wide, say 'Y'.
 117
 118 config MTD_MAP_BANK_WIDTH_32
 119         bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY
 120         default n
 121         help
 122           If you wish to support CFI devices on a physical bus which is
 123           256 bits wide, say 'Y'.
 124
 125 config MTD_CFI_I1
 126         bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY
 127         default y
 128         help
 129           If your flash chips are not interleaved - i.e. you only have one
 130           flash chip addressed by each bus cycle, then say 'Y'.
 131
 132 config MTD_CFI_I2
 133         bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY
 134         default y
 135         help
 136           If your flash chips are interleaved in pairs - i.e. you have two
 137           flash chips addressed by each bus cycle, then say 'Y'.
 138
 139 config MTD_CFI_I4
 140         bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY
 141         default n
 142         help
 143           If your flash chips are interleaved in fours - i.e. you have four
 144           flash chips addressed by each bus cycle, then say 'Y'.
 145
 146 config MTD_CFI_I8
 147         bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY
 148         default n
 149         help
 150           If your flash chips are interleaved in eights - i.e. you have eight
 151           flash chips addressed by each bus cycle, then say 'Y'.
 152
 153 config MTD_OTP
 154         bool "Protection Registers aka one-time programmable (OTP) bits"
 155         depends on MTD_CFI_ADV_OPTIONS
 156         select HAVE_MTD_OTP
 157         default n
 158         help
 159           This enables support for reading, writing and locking so called
 160           "Protection Registers" present on some flash chips.
 161           A subset of them are pre-programmed at the factory with a
 162           unique set of values. The rest is user-programmable.
 163
 164           The user-programmable Protection Registers contain one-time
 165           programmable (OTP) bits; when programmed, register bits cannot be
 166           erased. Each Protection Register can be accessed multiple times to
 167           program individual bits, as long as the register remains unlocked.
 168
 169           Each Protection Register has an associated Lock Register bit. When a
 170           Lock Register bit is programmed, the associated Protection Register
 171           can only be read; it can no longer be programmed. Additionally,
 172           because the Lock Register bits themselves are OTP, when programmed,
 173           Lock Register bits cannot be erased. Therefore, when a Protection
 174           Register is locked, it cannot be unlocked.
 175
 176           This feature should therefore be used with extreme care. Any mistake
 177           in the programming of OTP bits will waste them.
 178
 179 config MTD_CFI_INTELEXT
 180         tristate "Support for Intel/Sharp flash chips"
 181         depends on MTD_GEN_PROBE
 182         select MTD_CFI_UTIL
 183         help
 184           The Common Flash Interface defines a number of different command
 185           sets which a CFI-compliant chip may claim to implement. This code
 186           provides support for one of those command sets, used on Intel
 187           StrataFlash and other parts.
 188
 189 config MTD_CFI_AMDSTD
 190         tristate "Support for AMD/Fujitsu/Spansion flash chips"
 191         depends on MTD_GEN_PROBE
 192         select MTD_CFI_UTIL
 193         help
 194           The Common Flash Interface defines a number of different command
 195           sets which a CFI-compliant chip may claim to implement. This code
 196           provides support for one of those command sets, used on chips
 197           including the AMD Am29LV320.
 198
 199 config MTD_CFI_STAA
 200         tristate "Support for ST (Advanced Architecture) flash chips"
 201         depends on MTD_GEN_PROBE
 202         select MTD_CFI_UTIL
 203         help
 204           The Common Flash Interface defines a number of different command
 205           sets which a CFI-compliant chip may claim to implement. This code
 206           provides support for one of those command sets.
 207
 208 config MTD_CFI_UTIL
 209         tristate
 210
 211 config MTD_RAM
 212         tristate "Support for RAM chips in bus mapping"
 213         help
 214           This option enables basic support for RAM chips accessed through
 215           a bus mapping driver.
 216
 217 config MTD_ROM
 218         tristate "Support for ROM chips in bus mapping"
 219         help
 220           This option enables basic support for ROM chips accessed through
 221           a bus mapping driver.
 222
 223 config MTD_ABSENT
 224         tristate "Support for absent chips in bus mapping"
 225         help
 226           This option enables support for a dummy probing driver used to
 227           allocated placeholder MTD devices on systems that have socketed
 228           or removable media.  Use of this driver as a fallback chip probe
 229           preserves the expected registration order of MTD device nodes on
 230           the system regardless of media presence.  Device nodes created
 231           with this driver will return -ENODEV upon access.
 232
 233 config MTD_XIP
 234         bool "XIP aware MTD support"
 235         depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && EXPERIMENTAL && ARCH_MTD_XIP
 236         default y if XIP_KERNEL
 237         help
 238           This allows MTD support to work with flash memory which is also
 239           used for XIP purposes.  If you're not sure what this is all about
 240           then say N.
 241
 242 endmenu