drivers/mmc/host/sdhci-pci.h

   1 #ifndef __SDHCI_PCI_H
   2 #define __SDHCI_PCI_H
   3
   4 /*
   5  * PCI device IDs
   6  */
   7
   8 #define PCI_DEVICE_ID_INTEL_PCH_SDIO0   0x8809
   9 #define PCI_DEVICE_ID_INTEL_PCH_SDIO1   0x880a
  10 #define PCI_DEVICE_ID_INTEL_BYT_EMMC    0x0f14
  11 #define PCI_DEVICE_ID_INTEL_BYT_SDIO    0x0f15
  12 #define PCI_DEVICE_ID_INTEL_BYT_SD      0x0f16
  13 #define PCI_DEVICE_ID_INTEL_BYT_EMMC2   0x0f50
  14 #define PCI_DEVICE_ID_INTEL_BSW_EMMC    0x2294
  15 #define PCI_DEVICE_ID_INTEL_BSW_SDIO    0x2295
  16 #define PCI_DEVICE_ID_INTEL_BSW_SD      0x2296
  17 #define PCI_DEVICE_ID_INTEL_MRFLD_MMC   0x1190
  18 #define PCI_DEVICE_ID_INTEL_CLV_SDIO0   0x08f9
  19 #define PCI_DEVICE_ID_INTEL_CLV_SDIO1   0x08fa
  20 #define PCI_DEVICE_ID_INTEL_CLV_SDIO2   0x08fb
  21 #define PCI_DEVICE_ID_INTEL_CLV_EMMC0   0x08e5
  22 #define PCI_DEVICE_ID_INTEL_CLV_EMMC1   0x08e6
  23 #define PCI_DEVICE_ID_INTEL_QRK_SD      0x08A7
  24 #define PCI_DEVICE_ID_INTEL_SPT_EMMC    0x9d2b
  25 #define PCI_DEVICE_ID_INTEL_SPT_SDIO    0x9d2c
  26 #define PCI_DEVICE_ID_INTEL_SPT_SD      0x9d2d
  27 #define PCI_DEVICE_ID_INTEL_DNV_EMMC    0x19db
  28 #define PCI_DEVICE_ID_INTEL_BXT_SD      0x0aca
  29 #define PCI_DEVICE_ID_INTEL_BXT_EMMC    0x0acc
  30 #define PCI_DEVICE_ID_INTEL_BXT_SDIO    0x0ad0
  31 #define PCI_DEVICE_ID_INTEL_BXTM_SD     0x1aca
  32 #define PCI_DEVICE_ID_INTEL_BXTM_EMMC   0x1acc
  33 #define PCI_DEVICE_ID_INTEL_BXTM_SDIO   0x1ad0
  34 #define PCI_DEVICE_ID_INTEL_APL_SD      0x5aca
  35 #define PCI_DEVICE_ID_INTEL_APL_EMMC    0x5acc
  36 #define PCI_DEVICE_ID_INTEL_APL_SDIO    0x5ad0
  37 #define PCI_DEVICE_ID_INTEL_GLK_SD      0x31ca
  38 #define PCI_DEVICE_ID_INTEL_GLK_EMMC    0x31cc
  39 #define PCI_DEVICE_ID_INTEL_GLK_SDIO    0x31d0
  40
  41 /*
  42  * PCI registers
  43  */
  44
  45 #define PCI_SDHCI_IFPIO                 0x00
  46 #define PCI_SDHCI_IFDMA                 0x01
  47 #define PCI_SDHCI_IFVENDOR              0x02
  48
  49 #define PCI_SLOT_INFO                   0x40    /* 8 bits */
  50 #define  PCI_SLOT_INFO_SLOTS(x)         ((x >> 4) & 7)
  51 #define  PCI_SLOT_INFO_FIRST_BAR_MASK   0x07
  52
  53 #define MAX_SLOTS                       8
  54
  55 struct sdhci_pci_chip;
  56 struct sdhci_pci_slot;
  57
  58 struct sdhci_pci_fixes {
  59         unsigned int            quirks;
  60         unsigned int            quirks2;
  61         bool                    allow_runtime_pm;
  62         bool                    own_cd_for_runtime_pm;
  63
  64         int                     (*probe) (struct sdhci_pci_chip *);
  65
  66         int                     (*probe_slot) (struct sdhci_pci_slot *);
  67         int                     (*add_host) (struct sdhci_pci_slot *);
  68         void                    (*remove_slot) (struct sdhci_pci_slot *, int);
  69
  70 #ifdef CONFIG_PM_SLEEP
  71         int                     (*suspend) (struct sdhci_pci_chip *);
  72         int                     (*resume) (struct sdhci_pci_chip *);
  73 #endif
  74 #ifdef CONFIG_PM
  75         int                     (*runtime_suspend) (struct sdhci_pci_chip *);
  76         int                     (*runtime_resume) (struct sdhci_pci_chip *);
  77 #endif
  78
  79         const struct sdhci_ops  *ops;
  80         size_t                  priv_size;
  81 };
  82
  83 struct sdhci_pci_slot {
  84         struct sdhci_pci_chip   *chip;
  85         struct sdhci_host       *host;
  86         struct sdhci_pci_data   *data;
  87
  88         int                     rst_n_gpio;
  89         int                     cd_gpio;
  90         int                     cd_irq;
  91
  92         int                     cd_idx;
  93         bool                    cd_override_level;
  94
  95         void (*hw_reset)(struct sdhci_host *host);
  96         unsigned long           private[0] ____cacheline_aligned;
  97 };
  98
  99 struct sdhci_pci_chip {
 100         struct pci_dev          *pdev;
 101
 102         unsigned int            quirks;
 103         unsigned int            quirks2;
 104         bool                    allow_runtime_pm;
 105         bool                    pm_retune;
 106         bool                    rpm_retune;
 107         const struct sdhci_pci_fixes *fixes;
 108
 109         int                     num_slots;      /* Slots on controller */
 110         struct sdhci_pci_slot   *slots[MAX_SLOTS]; /* Pointers to host slots */
 111 };
 112
 113 static inline void *sdhci_pci_priv(struct sdhci_pci_slot *slot)
 114 {
 115         return (void *)slot->private;
 116 }
 117
 118 #ifdef CONFIG_PM_SLEEP
 119 int sdhci_pci_resume_host(struct sdhci_pci_chip *chip);
 120 #endif
 121
 122 #endif /* __SDHCI_PCI_H */