drivers/misc/samsung/scsc/scsc_mif_abs.h

   1 /****************************************************************************
   2 *
   3 * Copyright (c) 2014 - 2018 Samsung Electronics Co., Ltd. All rights reserved
   4 *
   5 ****************************************************************************/
   6
   7 #ifndef __SCSC_MIF_ABS_H
   8 #define __SCSC_MIF_ABS_H
   9
  10 #ifdef CONFIG_SCSC_QOS
  11 #include <linux/pm_qos.h>
  12 #endif
  13 #include <linux/types.h>
  14 #include <scsc/scsc_mifram.h>
  15 #include <scsc/scsc_mx.h>
  16
  17 struct device;
  18
  19 /* To R4/M4 */
  20 enum scsc_mif_abs_target {
  21         SCSC_MIF_ABS_TARGET_R4 = 0,
  22         SCSC_MIF_ABS_TARGET_M4 = 1,
  23 #ifdef CONFIG_SCSC_MX450_GDB_SUPPORT
  24         SCSC_MIF_ABS_TARGET_M4_1 = 2
  25 #endif
  26 };
  27
  28 #ifdef CONFIG_SCSC_SMAPPER
  29 #define SCSC_MIF_SMAPPER_MAX_BANKS 32
  30
  31 struct scsc_mif_smapper_info {
  32         u32 num_entries;
  33         u32 mem_range_bytes;
  34 };
  35
  36 enum scsc_mif_abs_bank_type {
  37         SCSC_MIF_ABS_NO_BANK = 0,
  38         SCSC_MIF_ABS_SMALL_BANK = 1,
  39         SCSC_MIF_ABS_LARGE_BANK = 2
  40 };
  41 #endif
  42
  43 #ifdef CONFIG_SCSC_QOS
  44 struct scsc_mifqos_request {
  45         struct pm_qos_request pm_qos_req_mif;
  46         struct pm_qos_request pm_qos_req_int;
  47         struct pm_qos_request pm_qos_req_cl0;
  48         struct pm_qos_request pm_qos_req_cl1;
  49 };
  50 #endif
  51
  52 #define SCSC_REG_READ_WLBT_STAT         0
  53
  54 /**
  55  * Abstraction of the Maxwell "Memory Interface" aka  MIF.
  56  *
  57  * There will be at least two implementations of this
  58  * interface - The native AXI one and a PCIe based emulation.
  59  *
  60  * A reference to an interface will be passed to the
  61  * scsc_mx driver when the system startsup.
  62  */
  63 struct scsc_mif_abs {
  64 /**
  65  * Destroy this interface.
  66  *
  67  * This should be called when the underlying device is
  68  * removed.
  69  */
  70         void (*destroy)(struct scsc_mif_abs *interface);
  71         /* Return an unique id for this host, and prefreabrly identifies specific device (example pcie0, pcie1) */
  72         char *(*get_uid)(struct scsc_mif_abs *interface);
  73 /**
  74  * Controls the hardware "reset" state of the Maxwell
  75  * subsystem.
  76  *
  77  * Setting reset=TRUE places the subsystem in its low
  78  * power "reset" state. This function is called
  79  * by the Maxwell Manager near the end of the subsystem
  80  * shutdown process, before "unmapping" the interface.
  81  *
  82  * Setting reset=FALSE release the subsystem reset state.
  83  * The subystem will then start its cold boot sequence. This
  84  * function is called
  85  * by the Subsystem Manager near the end of the subsystem
  86  * startup process after installing the maxwell firmware and
  87  * other resources in MIF RAM.
  88  */
  89         int (*reset)(struct scsc_mif_abs *interface, bool reset);
  90 /**
  91  * This function maps the Maxwell interface hardware (MIF
  92  * DRAM) into kernel memory space.
  93  *
  94  * Amount of memory allocated must be defined and returned
  95  * on (*allocated) by the abstraction layer implemenation.
  96  *
  97  * This returns kernel-space pointer to the start of the
  98  * shared MIF DRAM. The Maxwell Manager will load firmware
  99  * to this location and configure the MIF Heap Manager to
 100  * manage any unused memory at the end of the DRAM region.
 101  *
 102  * The scsc_mx driver should call this when the Maxwell
 103  * subsystem is required by any service client.
 104  *
 105  * The mailbox, irq and dram functions are only usable once
 106  * this call has returned. HERE: Should we rename this to
 107  * "open" and return a handle to these conditional methods?
 108  */
 109         void *(*map)(struct scsc_mif_abs *interface, size_t *allocated);
 110 /**
 111  * The inverse of "map". Should be called once the maxwell
 112  * subsystem is no longer required and has been placed into
 113  * "reset" state (see reset method).
 114  */
 115         void (*unmap)(struct scsc_mif_abs *interface, void *mem);
 116
 117 /**
 118  * The Mailbox pointer returned can be used for direct access
 119  * to the hardware register for efficiency.
 120  * The pointer is guaranteed to remain valid between map and unmap calls.
 121  * HERE: If we are not assuming AP v R4 same-endianess then this
 122  * should be explicitly leu32 or u8[4] (or something equivalent).
 123  */
 124         u32  *(*get_mbox_ptr)(struct scsc_mif_abs *interface, u32 mbox_index);
 125 /**
 126  * Incoming MIF Interrupt Hardware Controls
 127  */
 128         /** Get the incoming interrupt source mask */
 129         u32 (*irq_bit_mask_status_get)(struct scsc_mif_abs *interface);
 130
 131         /** Get the incoming interrupt pending (waiting  *AND* not masked) mask */
 132         u32 (*irq_get)(struct scsc_mif_abs *interface);
 133
 134         void (*irq_bit_clear)(struct scsc_mif_abs *interface, int bit_num);
 135         void (*irq_bit_mask)(struct scsc_mif_abs *interface, int bit_num);
 136         void (*irq_bit_unmask)(struct scsc_mif_abs *interface, int bit_num);
 137
 138 /**
 139  * Outgoing MIF Interrupt Hardware Controls
 140  */
 141         void (*irq_bit_set)(struct scsc_mif_abs *interface, int bit_num, enum scsc_mif_abs_target target);
 142
 143 /**
 144  * Register handler for the interrupt from the
 145  * MIF Interrupt Hardware.
 146  *
 147  * This is used by the MIF Interrupt Manager to
 148  * register a handler that demultiplexes the
 149  * individual interrupt sources (MIF Interrupt Bits)
 150  * to source-specific handlers.
 151  */
 152         void (*irq_reg_handler)(struct scsc_mif_abs *interface, void (*handler)(int irq, void *data), void *dev);
 153         void (*irq_unreg_handler)(struct scsc_mif_abs *interface);
 154
 155         /* Clear HW interrupt line */
 156         void (*irq_clear)(void);
 157         void (*irq_reg_reset_request_handler)(struct scsc_mif_abs *interface, void (*handler)(int irq, void *data), void *dev);
 158         void (*irq_unreg_reset_request_handler)(struct scsc_mif_abs *interface);
 159
 160 /**
 161  * Install suspend/resume handlers for the MIF abstraction driver
 162  */
 163         void (*suspend_reg_handler)(struct scsc_mif_abs *abs,
 164                                     int (*suspend)(struct scsc_mif_abs *abs, void *data),
 165                                     void (*resume)(struct scsc_mif_abs *abs, void *data),
 166                                     void *data);
 167         void (*suspend_unreg_handler)(struct scsc_mif_abs *abs);
 168
 169 /**
 170  * Return kernel-space pointer to MIF ram.
 171  * The pointer is guaranteed to remain valid between map and unmap calls.
 172  */
 173         void      *(*get_mifram_ptr)(struct scsc_mif_abs *interface, scsc_mifram_ref ref);
 174 /* Maps kernel-space pointer to MIF RAM to portable reference */
 175         int (*get_mifram_ref)(struct scsc_mif_abs *interface, void *ptr, scsc_mifram_ref *ref);
 176
 177 /* Return physical page frame number corresponding to the physical addres to which
 178  * the virtual address is mapped . Needed in mmap file operations*/
 179         uintptr_t (*get_mifram_pfn)(struct scsc_mif_abs *interface);
 180
 181 /**
 182  * Return physical address from MIF ram address.
 183  */
 184         void      *(*get_mifram_phy_ptr)(struct scsc_mif_abs *interface, scsc_mifram_ref ref);
 185 /** Return a kernel device associated 1:1 with the Maxwell instance.
 186  * This is published only for the purpose of associating service drivers with a Maxwell instance
 187  * for logging purposes. Clients should not make any assumptions about the device type.
 188  * In some configurations this may be the associated host-interface device (AXI/PCIe),
 189  * but this may change in future.
 190  */
 191         struct device *(*get_mif_device)(struct scsc_mif_abs *interface);
 192
 193
 194         void (*mif_dump_registers)(struct scsc_mif_abs *interface);
 195         void (*mif_cleanup)(struct scsc_mif_abs *interface);
 196         void (*mif_restart)(struct scsc_mif_abs *interface);
 197
 198 #ifdef CONFIG_SCSC_SMAPPER
 199 /* SMAPPER */
 200         int  (*mif_smapper_get_mapping)(struct scsc_mif_abs *interface, u8 *phy_map, u16 *align);
 201         int  (*mif_smapper_get_bank_info)(struct scsc_mif_abs *interface, u8 bank, struct scsc_mif_smapper_info *bank_info);
 202         int  (*mif_smapper_write_sram)(struct scsc_mif_abs *interface, u8 bank, u8 num_entries, u8 first_entry, dma_addr_t *addr);
 203         void (*mif_smapper_configure)(struct scsc_mif_abs *interface, u32 granularity);
 204         u32  (*mif_smapper_get_bank_base_address)(struct scsc_mif_abs *interface, u8 bank);
 205 #endif
 206 #ifdef CONFIG_SCSC_QOS
 207         int  (*mif_pm_qos_add_request)(struct scsc_mif_abs *interface, struct scsc_mifqos_request *qos_req, enum scsc_qos_config config);
 208         int  (*mif_pm_qos_update_request)(struct scsc_mif_abs *interface, struct scsc_mifqos_request *qos_req, enum scsc_qos_config config);
 209         int  (*mif_pm_qos_remove_request)(struct scsc_mif_abs *interface, struct scsc_mifqos_request *qos_req);
 210 #endif
 211         int (*mif_read_register)(struct scsc_mif_abs *interface, u64 id, u32 *val);
 212 };
 213
 214 struct device;
 215
 216 struct scsc_mif_abs_driver {
 217         char *name;
 218         void (*probe)(struct scsc_mif_abs_driver *abs_driver, struct scsc_mif_abs *abs);
 219         void (*remove)(struct scsc_mif_abs *abs);
 220 };
 221
 222 extern void scsc_mif_abs_register(struct scsc_mif_abs_driver *driver);
 223 extern void scsc_mif_abs_unregister(struct scsc_mif_abs_driver *driver);
 224
 225 /* mmap-debug driver */
 226 struct scsc_mif_mmap_driver {
 227         char *name;
 228         void (*probe)(struct scsc_mif_mmap_driver *mmap_driver, struct scsc_mif_abs *abs);
 229         void (*remove)(struct scsc_mif_abs *abs);
 230 };
 231
 232 extern void scsc_mif_mmap_register(struct scsc_mif_mmap_driver *mmap_driver);
 233 extern void scsc_mif_mmap_unregister(struct scsc_mif_mmap_driver *mmap_driver);
 234 #endif