import PULS_20160108
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / misc / mediatek / lcm / r63419_wqhd_truly_phantom_2k_cmd_ok / r63419_wqhd_truly_phantom_2k_cmd_ok.c
1 #ifndef BUILD_LK
2 #include <linux/string.h>
3 #include <linux/kernel.h>
4 #endif
5 #include "lcm_drv.h"
6
7 #ifdef BUILD_LK
8 #include <platform/upmu_common.h>
9 #include <platform/mt_gpio.h>
10 #include <platform/mt_i2c.h>
11 #include <platform/mt_pmic.h>
12 #include <string.h>
13 #elif defined(BUILD_UBOOT)
14 #include <asm/arch/mt_gpio.h>
15 #else
16 #include <mach/mt_pm_ldo.h>
17 #include <mach/mt_gpio.h>
18 #endif
19 #include <cust_gpio_usage.h>
20 #include <cust_i2c.h>
21 #ifdef BUILD_LK
22 #define LCD_DEBUG(fmt) dprintf(CRITICAL,fmt)
23 #else
24 #define LCD_DEBUG(fmt) printk(fmt)
25 #endif
26
27 //static unsigned char lcd_id_pins_value = 0xFF;
28 static const unsigned char LCD_MODULE_ID = 0x01; // haobing modified 2013.07.11
29 // ---------------------------------------------------------------------------
30 // Local Constants
31 // ---------------------------------------------------------------------------
32 #define LCM_DSI_CMD_MODE 1
33 #define FRAME_WIDTH (1440)
34 #define FRAME_HEIGHT (2560)
35 #define GPIO_65132_EN GPIO_LCD_BIAS_ENP_PIN
36
37 #define REGFLAG_PORT_SWAP 0xFFFA
38 #define REGFLAG_DELAY 0xFFFC
39 #define REGFLAG_END_OF_TABLE 0xFFFD // END OF REGISTERS MARKER
40
41 #ifndef TRUE
42 #define TRUE 1
43 #endif
44
45 #ifndef FALSE
46 #define FALSE 0
47 #endif
48 //static unsigned int lcm_esd_test = FALSE; ///only for ESD test
49 // ---------------------------------------------------------------------------
50 // Local Variables
51 // ---------------------------------------------------------------------------
52
53 static const unsigned int BL_MIN_LEVEL =20;
54 static LCM_UTIL_FUNCS lcm_util;
55
56 #define SET_RESET_PIN(v) (lcm_util.set_reset_pin((v)))
57 #define MDELAY(n) (lcm_util.mdelay(n))
58
59 // ---------------------------------------------------------------------------
60 // Local Functions
61 // ---------------------------------------------------------------------------
62
63 #define dsi_set_cmdq_V2(cmd, count, ppara, force_update) lcm_util.dsi_set_cmdq_V2(cmd, count, ppara, force_update)
64 #define dsi_set_cmdq(pdata, queue_size, force_update) lcm_util.dsi_set_cmdq(pdata, queue_size, force_update)
65 #define wrtie_cmd(cmd) lcm_util.dsi_write_cmd(cmd)
66 #define write_regs(addr, pdata, byte_nums) lcm_util.dsi_write_regs(addr, pdata, byte_nums)
67 #define read_reg(cmd) lcm_util.dsi_dcs_read_lcm_reg(cmd)
68 #define read_reg_v2(cmd, buffer, buffer_size) lcm_util.dsi_dcs_read_lcm_reg_v2(cmd, buffer, buffer_size)
69 #define dsi_swap_port(swap) lcm_util.dsi_swap_port(swap)
70
71 #ifndef BUILD_LK
72 #include <linux/kernel.h>
73 #include <linux/module.h>
74 #include <linux/fs.h>
75 #include <linux/slab.h>
76 #include <linux/init.h>
77 #include <linux/list.h>
78 #include <linux/i2c.h>
79 #include <linux/irq.h>
80 //#include <linux/jiffies.h>
81 #include <linux/uaccess.h>
82 //#include <linux/delay.h>
83 #include <linux/interrupt.h>
84 #include <linux/io.h>
85 #include <linux/platform_device.h>
86 /*****************************************************************************
87 * Define
88 *****************************************************************************/
89
90 #define TPS_I2C_BUSNUM I2C_I2C_LCD_BIAS_CHANNEL//for I2C channel 0
91 #define I2C_ID_NAME "tps65132"
92 #define TPS_ADDR 0x3E
93
94 /*****************************************************************************
95 * GLobal Variable
96 *****************************************************************************/
97 static struct i2c_board_info __initdata tps65132_board_info = {I2C_BOARD_INFO(I2C_ID_NAME, TPS_ADDR)};
98 static struct i2c_client *tps65132_i2c_client = NULL;
99
100
101 /*****************************************************************************
102 * Function Prototype
103 *****************************************************************************/
104 static int tps65132_probe(struct i2c_client *client, const struct i2c_device_id *id);
105 static int tps65132_remove(struct i2c_client *client);
106 /*****************************************************************************
107 * Data Structure
108 *****************************************************************************/
109
110 struct tps65132_dev {
111 struct i2c_client *client;
112
113 };
114
115 static const struct i2c_device_id tps65132_id[] = {
116 { I2C_ID_NAME, 0 },
117 { }
118 };
119
120 //#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36))
121 //static struct i2c_client_address_data addr_data = { .forces = forces,};
122 //#endif
123 static struct i2c_driver tps65132_iic_driver = {
124 .id_table = tps65132_id,
125 .probe = tps65132_probe,
126 .remove = tps65132_remove,
127 .driver = {
128 .owner = THIS_MODULE,
129 .name = "tps65132",
130 },
131 };
132 /*****************************************************************************
133 * Extern Area
134 *****************************************************************************/
135
136 /*****************************************************************************
137 * Function
138 *****************************************************************************/
139 static int tps65132_probe(struct i2c_client *client, const struct i2c_device_id *id)
140 {
141 printk( "tps65132_iic_probe\n");
142 printk("TPS: info==>name=%s addr=0x%x\n",client->name,client->addr);
143 tps65132_i2c_client = client;
144 return 0;
145 }
146
147
148 static int tps65132_remove(struct i2c_client *client)
149 {
150 printk( "tps65132_remove\n");
151 tps65132_i2c_client = NULL;
152 i2c_unregister_device(client);
153 return 0;
154 }
155
156
157 int tps65132_write_bytes(unsigned char addr, unsigned char value)
158 {
159 int ret = 0;
160 struct i2c_client *client = tps65132_i2c_client;
161
162 if(client == NULL)
163 {
164 printk("ERROR!!tps65132_i2c_client is null\n");
165 return 0;
166 }
167
168 char write_data[2]={0};
169 write_data[0]= addr;
170 write_data[1] = value;
171 ret=i2c_master_send(client, write_data, 2);
172 if(ret<0)
173 printk("tps65132 write data fail !!\n");
174 return ret ;
175 }
176 EXPORT_SYMBOL_GPL(tps65132_write_bytes);
177
178
179 /*
180 * module load/unload record keeping
181 */
182
183 static int __init tps65132_iic_init(void)
184 {
185 printk( "tps65132_iic_init\n");
186 i2c_register_board_info(TPS_I2C_BUSNUM, &tps65132_board_info, 1);
187 printk( "tps65132_iic_init2\n");
188 i2c_add_driver(&tps65132_iic_driver);
189 printk( "tps65132_iic_init success\n");
190 return 0;
191 }
192
193 static void __exit tps65132_iic_exit(void)
194 {
195 printk( "tps65132_iic_exit\n");
196 i2c_del_driver(&tps65132_iic_driver);
197 }
198
199 module_init(tps65132_iic_init);
200 module_exit(tps65132_iic_exit);
201
202 MODULE_AUTHOR("Xiaokuan Shi");
203 MODULE_DESCRIPTION("MTK TPS65132 I2C Driver");
204 MODULE_LICENSE("GPL");
205
206 #endif
207
208 struct LCM_setting_table {
209 unsigned int cmd;
210 unsigned char count;
211 unsigned char para_list[64];
212 };
213
214 static struct LCM_setting_table lcm_initialization_setting[] =
215 {
216 {0x36, 1, {0x40}},//LCD Pannel position and display
217 {0xB0, 1, {0x00}},
218 {0xD6, 1, {0x01}},
219 #if (LCM_DSI_CMD_MODE)
220 {0xB3, 3,{0x00,0x00,0x00}},//Command mode
221 #else
222 //{0xB3, 3,{0x18,0x00,0x00}},//Video Mode
223 //{0xB3,3,{0x00,0x00,0x00}},//Video RAM Mode
224 #endif
225 {0xB4, 1, {0x00}},
226 {0xB6, 2, {0x3A,0xC3}},
227 {0xBE, 1, {0x04}},//This register controls DSI virtual channel of PortA setting.
228 {0xC3, 3, {0x00,0x00,0x00}},//This register set to enable VSOUT, HSOUT output
229 {0xC5, 1, {0x00}},
230 {0xC0, 4, {0x00,0x00,0x00,0x00}},//#SOUT Slew rate adjustment
231 //#Display setting 1
232 //{0xC1, 35, {0x00,0x61,0x00,0x20,0x8C,0xA4,0x16,0xFB,0xBF,0x98,0x83,0xDC,0x7B,0xCF,0x35,0x74,0x4C,0xF9,0x9F,0x2D,0x95,0x88,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x60,0x23,0x03,0x00,0xFF,0x11}},
233 {0xC1, 35, {0x00,0x61,0x00,0x20,0x8C,0xA4,0x16,0xFB,0xBF,0x98,0x83,0x9A,0x7B,0xCF,0x35,0x74,0x4C,0xF9,0x9F,0x2D,0x95,0x88,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x63,0x23,0x03,0x00,0xFF,0x11}},
234 //#Display setting 2
235 {0xC2, 8, {0x0A,0x0A,0x00,0x04,0x04,0xF0,0x00,0x04}},
236 //#Source timing setting
237 {0xC4, 14, {0x70,0x00,0x00,0x33,0x33,0x033,0x33,0x33,0x33,0x33,0x33,0x01,0x05,0x01}},
238 //#LTPS timing setting
239 {0xC6, 21, {0x5A,0x29,0x29,0x01,0x01,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x15,0x08,0x5A}},
240 //#Panel pin control
241 {0xCB, 15, {0x7F,0xE0,0x07,0xFF,0x00,0x00,0x00,0x00,0x54,0xE0,0x07,0x2A,0xC8,0x00,0x00}},
242 //#Panel intreface control
243 {0xCC, 1, {0x11}},
244 //#Sequencer timing control
245 {0xD7, 13, {0x82,0xFF,0x21,0x8E,0x8C,0xF1,0x87,0x3F,0x7E,0x10,0x00,0x00,0x8F}},
246 //#Sequencer control
247 {0xD9, 2, {0x00,0x00}},
248 //#Power setting(Charge pump setting
249 {0xD0, 4, {0x11,0x17,0x17,0xFD}},
250 //#Power setting for internal Power
251 {0xD2, 16, {0xCD,0x2B,0x2B,0x33,0x12,0x33,0x33,0x33,0x77,0x77,0x33,0x33,0x33,0x00,0x00,0x00}},
252 //vplvl 2b 4v vnlvl 2b -4v 12 4.02V ENTER ABNORMAL SEQUENCE
253 //#VCOM setting
254 {0xD5, 7, {0x06,0x00,0x00,0x01,0x1E,0x01,0x1E}},
255 //Gamma Setting with RGB separated setting ON
256 {0xC7, 30, {0x00,0x0C,0x14,0x1D,0x2C,0x3A,0x44,0x54,0x38,0x40,0x4C,0x59,0x63,0x6B,0x7F,0x00,0x0C,0x14,0x1D,0x2C,0x3A,0x44,0x54,0x38,0x40,0x4C,0x59,0x63,0x6B,0x7F}},
257 {0xC8, 19, {0x01,0x00,0x00,0x00,0x00,0xFC,0xEF,0x00,0x00,0x00,0x00,0xFC,0xEF,0x00,0x00,0x00,0x00,0xFC,0x0F}},
258 {0xB8, 7, {0x57,0x3D,0x19,0x1E,0x0A,0x50,0x50}},
259 {0xB9, 7, {0x6F,0x3D,0x28,0x3C,0x14,0xC8,0xC8}},
260 {0xBA, 7, {0xB5,0x33,0x41,0x64,0x23,0xA0,0xA0}},
261 {0xCE, 25, {0x55,0x40,0x49,0x53,0x59,0x5E,0x63,0x68,0x6E,0x74,0x7E,0x8A,0x98,0xA8,0xBB,0xD0,0xFF,0x04,0x00,0x04,0x04,0x00,0x00,0x69,0x5A}},
262 //self check module
263 {0xB0, 1, {0x03}},//Manufacturer Command Access Protect
264 {0x35,1,{0x00}},
265 //{0x51, 1, {0xFF}},
266 //{0x53, 1, {0x0C}},//BL=1h
267 //{0x55, 1, {0x00}},//Write CABC
268
269 //{0xDE, 4, {0x01,0x3F,0xFF,0x10}}, //display the test screen
270 //{0xE5, 4, {0x01,0x3F,0xFF,0x10}},
271 //{0xB3, 3, {0x00,0x00,0x00}},
272 //{0xB0, 1, {0x03}},
273
274 //{0x2A, 4, {0x00,0x00,0x05,0x9F}},// GRAM setting
275 //{0x2B, 4, {0x00,0x00,0x09,0xFF}},
276 //{0x2C, 0, {}},
277 //{REGFLAG_PORT_SWAP, 0, {}},
278 {0x29, 0,{}},
279 {REGFLAG_DELAY, 20, {}},
280 {0x11, 0,{},},
281 {REGFLAG_DELAY, 120, {}},
282 {REGFLAG_END_OF_TABLE, 0x00, {}}
283 };
284
285 #if 0
286 static struct LCM_setting_table lcm_set_window[] = {
287 {0x2A, 4, {0x00, 0x00, (FRAME_WIDTH>>8), (FRAME_WIDTH&0xFF)}},
288 {0x2B, 4, {0x00, 0x00, (FRAME_HEIGHT>>8), (FRAME_HEIGHT&0xFF)}},
289 {REGFLAG_END_OF_TABLE, 0x00, {}}
290 };
291 static struct LCM_setting_table lcm_sleep_out_setting[] = {
292 {0x29, 1, {0x00}},
293 {REGFLAG_DELAY, 120, {}},
294
295 {0x11, 1, {0x00}},
296 {REGFLAG_DELAY, 20, {}},
297 {REGFLAG_END_OF_TABLE, 0x00, {}}
298 };
299
300 static struct LCM_setting_table lcm_normal_sleep_mode_in_setting[] = {
301 // Display off sequence
302 {0x28, 1, {0x00}},
303 {REGFLAG_DELAY, 20, {}},
304
305 // Sleep Mode On
306 {0x10, 1, {0x00}},
307 {REGFLAG_DELAY, 120, {}},
308 {REGFLAG_END_OF_TABLE, 0x00, {}}
309 };
310
311 #endif
312
313 static struct LCM_setting_table lcm_deep_sleep_mode_in_setting[] = {
314 // Display off sequence
315 {0x28, 1, {0x00}},
316 {REGFLAG_DELAY, 20, {}},
317
318 // Sleep Mode On
319 {0x10, 1, {0x00}},
320 {REGFLAG_DELAY, 120, {}},
321
322 {0xB0, 1, {0x00}},
323 {0xB1, 1, {0x01}},
324 {REGFLAG_DELAY, 20, {}},
325
326 {REGFLAG_END_OF_TABLE, 0x00, {}}
327 };
328 static struct LCM_setting_table lcm_suspend_setting[] = {
329 {0x28,0,{}},
330 {0x10,0,{}},
331 {REGFLAG_DELAY, 120, {}}
332 };
333
334 static void push_table(struct LCM_setting_table *table, unsigned int count, unsigned char force_update)
335 {
336 unsigned int i;
337
338 for(i = 0; i < count; i++)
339 {
340 unsigned cmd;
341 cmd = table[i].cmd;
342
343 switch (cmd) {
344 case REGFLAG_DELAY :
345 #ifdef BUILD_LK
346 dprintf(0, "[LK]REGFLAG_DELAY\n");
347 #endif
348 if(table[i].count <= 10)
349 MDELAY(table[i].count);
350 else
351 MDELAY(table[i].count);
352 break;
353
354 case REGFLAG_END_OF_TABLE :
355 break;
356 case REGFLAG_PORT_SWAP:
357 #ifdef BUILD_LK
358 dprintf(0, "[LK]push_table end\n");
359 #endif
360 dsi_swap_port(1);
361 break;
362 default:
363 dsi_set_cmdq_V2(cmd, table[i].count, table[i].para_list, force_update);
364 }
365 }
366 }
367
368 // ---------------------------------------------------------------------------
369 // LCM Driver Implementations
370 // ---------------------------------------------------------------------------
371
372 static void lcm_set_util_funcs(const LCM_UTIL_FUNCS *util)
373 {
374 memcpy(&lcm_util, util, sizeof(LCM_UTIL_FUNCS));
375 }
376
377
378 static void lcm_get_params(LCM_PARAMS *params)
379 {
380 memset(params, 0, sizeof(LCM_PARAMS));
381
382 params->type = LCM_TYPE_DSI;
383
384 params->width = FRAME_WIDTH;
385 params->height = FRAME_HEIGHT;
386 params->lcm_if = LCM_INTERFACE_DSI_DUAL;
387 params->lcm_cmd_if = LCM_INTERFACE_DSI0;
388
389 #if (LCM_DSI_CMD_MODE)
390 params->dsi.mode = CMD_MODE;
391 #else
392 params->dsi.mode = SYNC_PULSE_VDO_MODE;
393 #endif
394 params->dsi.dual_dsi_type = DUAL_DSI_CMD;
395 // DSI
396 /* Command mode setting */
397 params->dsi.LANE_NUM = LCM_FOUR_LANE;
398 //The following defined the fomat for data coming from LCD engine.
399 params->dsi.data_format.color_order = LCM_COLOR_ORDER_RGB;
400 params->dsi.data_format.trans_seq = LCM_DSI_TRANS_SEQ_MSB_FIRST;
401 params->dsi.data_format.padding = LCM_DSI_PADDING_ON_LSB;
402 params->dsi.data_format.format = LCM_DSI_FORMAT_RGB888;
403
404 // Highly depends on LCD driver capability.
405 params->dsi.packet_size=256;
406 params->dsi.ssc_disable=1;
407 //video mode timing
408
409 params->dsi.PS=LCM_PACKED_PS_24BIT_RGB888;
410
411 params->dsi.vertical_sync_active = 1;
412 params->dsi.vertical_backporch = 7;
413 params->dsi.vertical_frontporch = 7;
414 params->dsi.vertical_active_line = FRAME_HEIGHT;
415
416 params->dsi.horizontal_sync_active = 40;
417 params->dsi.horizontal_backporch = 80;
418 params->dsi.horizontal_frontporch = 100;
419 params->dsi.horizontal_active_pixel = FRAME_WIDTH;
420 params->dsi.PLL_CLOCK = 450; //this value must be in MTK suggested table
421 params->dsi.ufoe_enable = 1;
422 params->dsi.ufoe_params.lr_mode_en = 1;
423
424 params->dsi.esd_check_enable = 1;
425 params->dsi.customization_esd_check_enable = 0;
426 params->dsi.lcm_esd_check_table[2].cmd = 0xb0;
427 params->dsi.lcm_esd_check_table[2].count = 1;
428 params->dsi.lcm_esd_check_table[2].para_list[0] = 0x04;
429 params->dsi.lcm_esd_check_table[1].cmd = 0x36;
430 params->dsi.lcm_esd_check_table[1].count = 1;
431 params->dsi.lcm_esd_check_table[1].para_list[0] = 0x40;
432 params->dsi.lcm_esd_check_table[0].cmd = 0xd6;
433 params->dsi.lcm_esd_check_table[0].count = 1;
434 params->dsi.lcm_esd_check_table[0].para_list[0] = 0x01;
435 //begin:haobing modified
436 /*BEGIN PN:DTS2013013101431 modified by s00179437 , 2013-01-31*/
437 //improve clk quality
438
439 //params->dsi.pll_div1=0; // div1=0,1,2,3;div1_real=1,2,4,4 ----0: 546Mbps 1:273Mbps
440 //params->dsi.pll_div2=1; // div2=0,1,2,3;div1_real=1,2,4,4
441 //params->dsi.fbk_div =21; // fref=26MHz, fvco=fref*(fbk_div)*2/(div1_real*div2_real)
442 /*END PN:DTS2013013101431 modified by s00179437 , 2013-01-31*/
443 //end:haobing modified
444
445
446 // for R63419A Lane Swap
447 params->dsi.lane_swap_en = 1;
448 params->dsi.lane_swap[MIPITX_PHY_PORT_1][MIPITX_PHY_LANE_0] = MIPITX_PHY_LANE_2;
449 params->dsi.lane_swap[MIPITX_PHY_PORT_1][MIPITX_PHY_LANE_1] = MIPITX_PHY_LANE_CK;
450 params->dsi.lane_swap[MIPITX_PHY_PORT_1][MIPITX_PHY_LANE_2] = MIPITX_PHY_LANE_0;
451 params->dsi.lane_swap[MIPITX_PHY_PORT_1][MIPITX_PHY_LANE_3] = MIPITX_PHY_LANE_1;
452 params->dsi.lane_swap[MIPITX_PHY_PORT_1][MIPITX_PHY_LANE_CK] = MIPITX_PHY_LANE_3;
453 params->dsi.lane_swap[MIPITX_PHY_PORT_1][MIPITX_PHY_LANE_RX] = MIPITX_PHY_LANE_2;
454
455 params->dsi.lane_swap[MIPITX_PHY_PORT_0][MIPITX_PHY_LANE_0] = MIPITX_PHY_LANE_0;
456 params->dsi.lane_swap[MIPITX_PHY_PORT_0][MIPITX_PHY_LANE_1] = MIPITX_PHY_LANE_3;
457 params->dsi.lane_swap[MIPITX_PHY_PORT_0][MIPITX_PHY_LANE_2] = MIPITX_PHY_LANE_2;
458 params->dsi.lane_swap[MIPITX_PHY_PORT_0][MIPITX_PHY_LANE_3] = MIPITX_PHY_LANE_1;
459 params->dsi.lane_swap[MIPITX_PHY_PORT_0][MIPITX_PHY_LANE_CK] = MIPITX_PHY_LANE_CK;
460 params->dsi.lane_swap[MIPITX_PHY_PORT_0][MIPITX_PHY_LANE_RX] = MIPITX_PHY_LANE_0;
461 }
462
463 #ifdef BUILD_LK
464
465 #define TPS65132_SLAVE_ADDR_WRITE 0x7C
466 static struct mt_i2c_t TPS65132_i2c;
467
468 static int TPS65132_write_byte(kal_uint8 addr, kal_uint8 value)
469 {
470 kal_uint32 ret_code = I2C_OK;
471 kal_uint8 write_data[2];
472 kal_uint16 len;
473
474 write_data[0]= addr;
475 write_data[1] = value;
476
477 TPS65132_i2c.id = I2C_I2C_LCD_BIAS_CHANNEL;//I2C2;
478 /* Since i2c will left shift 1 bit, we need to set FAN5405 I2C address to >>1 */
479 TPS65132_i2c.addr = (TPS65132_SLAVE_ADDR_WRITE >> 1);
480 TPS65132_i2c.mode = ST_MODE;
481 TPS65132_i2c.speed = 100;
482 len = 2;
483
484 ret_code = i2c_write(&TPS65132_i2c, write_data, len);
485 //printf("%s: i2c_write: ret_code: %d\n", __func__, ret_code);
486
487 return ret_code;
488 }
489
490 #else
491
492 // extern int mt8193_i2c_write(u16 addr, u32 data);
493 // extern int mt8193_i2c_read(u16 addr, u32 *data);
494
495 // #define TPS65132_write_byte(add, data) mt8193_i2c_write(add, data)
496 //#define TPS65132_read_byte(add) mt8193_i2c_read(add)
497
498
499 #endif
500
501 static void lcm_init_power(void)
502 {
503 #ifdef BUILD_LK
504 mt6331_upmu_set_rg_vgp1_en(1);
505 #else
506 printk("%s, begin\n", __func__);
507 hwPowerOn(MT6331_POWER_LDO_VGP1, VOL_DEFAULT, "LCM_DRV");
508 printk("%s, end\n", __func__);
509 #endif
510 }
511
512
513 static void lcm_resume_power(void)
514 {
515 #ifdef BUILD_LK
516 mt6331_upmu_set_rg_vgp1_en(1);
517 #else
518 printk("%s, begin\n", __func__);
519 hwPowerOn(MT6331_POWER_LDO_VGP1, VOL_DEFAULT, "LCM_DRV");
520 printk("%s, end\n", __func__);
521 #endif
522 }
523
524
525 static void lcm_suspend_power(void)
526 {
527 #ifdef BUILD_LK
528 mt6331_upmu_set_rg_vgp1_en(0);
529 #else
530 printk("%s, begin\n", __func__);
531 hwPowerDown(MT6331_POWER_LDO_VGP1, "LCM_DRV");
532 printk("%s, end\n", __func__);
533 #endif
534 }
535
536
537 static void lcm_init(void)
538 {
539 unsigned char cmd = 0x0;
540 unsigned char data = 0xFF;
541 int ret=0;
542 cmd=0x00;
543 data=0x0E;
544
545 mt_set_gpio_mode(GPIO_65132_EN, GPIO_MODE_00);
546 mt_set_gpio_dir(GPIO_65132_EN, GPIO_DIR_OUT);
547 mt_set_gpio_out(GPIO_65132_EN, GPIO_OUT_ONE);
548
549 #ifdef BUILD_LK
550 ret=TPS65132_write_byte(cmd,data);
551 if(ret)
552 dprintf(0, "[LK]r63419----tps6132----cmd=%0x--i2c write error----\n",cmd);
553 else
554 dprintf(0, "[LK]r63419----tps6132----cmd=%0x--i2c write success----\n",cmd);
555 #else
556 ret=tps65132_write_bytes(cmd,data);
557 if(ret<0)
558 printk("[KERNEL]r63419----tps6132---cmd=%0x-- i2c write error-----\n",cmd);
559 else
560 printk("[KERNEL]r63419----tps6132---cmd=%0x-- i2c write success-----\n",cmd);
561 #endif
562
563 cmd=0x01;
564 data=0x0E;
565 #ifdef BUILD_LK
566 ret=TPS65132_write_byte(cmd,data);
567 if(ret)
568 dprintf(0, "[LK]r63419----tps6132----cmd=%0x--i2c write error----\n",cmd);
569 else
570 dprintf(0, "[LK]r63419----tps6132----cmd=%0x--i2c write success----\n",cmd);
571 #else
572 ret=tps65132_write_bytes(cmd,data);
573 if(ret<0)
574 printk("[KERNEL]r63419----tps6132---cmd=%0x-- i2c write error-----\n",cmd);
575 else
576 printk("[KERNEL]r63419----tps6132---cmd=%0x-- i2c write success-----\n",cmd);
577 #endif
578
579 SET_RESET_PIN(1);
580 MDELAY(1);
581 //MDELAY(10);
582 SET_RESET_PIN(0);
583 MDELAY(10);
584 SET_RESET_PIN(1);
585 MDELAY(10);
586
587 // when phone initial , config output high, enable backlight drv chip
588 push_table(lcm_initialization_setting, sizeof(lcm_initialization_setting) / sizeof(struct LCM_setting_table), 1);
589
590 #ifdef BUILD_LK
591 dprintf(0, "[LK]push_table end\n");
592 #endif
593 }
594
595 static void lcm_suspend(void)
596 {
597 mt_set_gpio_mode(GPIO_65132_EN, GPIO_MODE_00);
598 mt_set_gpio_dir(GPIO_65132_EN, GPIO_DIR_OUT);
599 mt_set_gpio_out(GPIO_65132_EN, GPIO_OUT_ZERO);
600 push_table(lcm_suspend_setting, sizeof(lcm_suspend_setting) / sizeof(struct LCM_setting_table), 1);
601 SET_RESET_PIN(0);
602 }
603
604 static void lcm_resume(void)
605 {
606 SET_RESET_PIN(1);
607 SET_RESET_PIN(0);
608 MDELAY(10);
609 SET_RESET_PIN(1);
610 MDELAY(10);
611 lcm_init();
612 }
613 static void lcm_update(unsigned int x, unsigned int y,
614 unsigned int width, unsigned int height)
615 {
616 unsigned int x0 = x;
617 unsigned int y0 = y;
618 unsigned int x1 = x0 + width - 1;
619 unsigned int y1 = y0 + height - 1;
620
621 unsigned char x0_MSB = ((x0>>8)&0xFF);
622 unsigned char x0_LSB = (x0&0xFF);
623 unsigned char x1_MSB = ((x1>>8)&0xFF);
624 unsigned char x1_LSB = (x1&0xFF);
625 unsigned char y0_MSB = ((y0>>8)&0xFF);
626 unsigned char y0_LSB = (y0&0xFF);
627 unsigned char y1_MSB = ((y1>>8)&0xFF);
628 unsigned char y1_LSB = (y1&0xFF);
629
630 unsigned int data_array[16];
631
632 data_array[0]= 0x00053902;
633 data_array[1]= (x1_MSB<<24)|(x0_LSB<<16)|(x0_MSB<<8)|0x2a;
634 data_array[2]= (x1_LSB);
635 dsi_set_cmdq(data_array, 3, 1);
636
637 data_array[0]= 0x00053902;
638 data_array[1]= (y1_MSB<<24)|(y0_LSB<<16)|(y0_MSB<<8)|0x2b;
639 data_array[2]= (y1_LSB);
640 dsi_set_cmdq(data_array, 3, 1);
641 /*BEGIN PN:DTS2013013101431 modified by s00179437 , 2013-01-31*/
642 //delete high speed packet
643 //data_array[0]=0x00290508;
644 //dsi_set_cmdq(data_array, 1, 1);
645 /*END PN:DTS2013013101431 modified by s00179437 , 2013-01-31*/
646
647 data_array[0]= 0x002c3909;
648 dsi_set_cmdq(data_array, 1, 0);
649 }
650
651 #define LCM_ID_R63419 (0x3419)
652
653 static unsigned int lcm_compare_id(void)
654 {
655 unsigned int id=0;
656 unsigned char buffer[5];
657 unsigned int array[16];
658 int i;
659 unsigned int lcd_id = 0;
660 SET_RESET_PIN(1);
661 MDELAY(10);
662 SET_RESET_PIN(0);
663 MDELAY(10);
664 SET_RESET_PIN(1);
665 MDELAY(10);
666 array[0] = 0x00053700;// read id return two byte,version and id
667 dsi_set_cmdq(array, 1, 1);
668
669 read_reg_v2(0xBF, buffer, 5);
670 MDELAY(20);
671 lcd_id = (buffer[2] << 8 )| buffer[3];
672
673 #ifdef BUILD_LK
674 dprintf(0, "%s, LK r63419 debug: r63419 id = 0x%08x\n", __func__, id);
675 #else
676 printk("%s, kernel r63419 horse debug: r63419 id = 0x%08x\n", __func__, id);
677 #endif
678
679 //if(id == LCM_ID_R63419)
680 return 1;
681 // else
682 // return 0;
683
684 }
685
686 LCM_DRIVER r63419_wqhd_truly_phantom_lcm_drv=
687 {
688 .name = "r63419_wqhd_truly_phantom",
689 .set_util_funcs = lcm_set_util_funcs,
690 .get_params = lcm_get_params,
691 .init = lcm_init,
692 .suspend = lcm_suspend,
693 .resume = lcm_resume,
694 .compare_id = lcm_compare_id,
695 .init_power = lcm_init_power,
696 .resume_power = lcm_resume_power,
697 .suspend_power = lcm_suspend_power,
698 #if (LCM_DSI_CMD_MODE)
699 .update = lcm_update,
700 #endif
701
702 };
703 /* END PN:DTS2013053103858 , Added by d00238048, 2013.05.31*/