drivers/misc/mediatek/lcm/nt35598_wqhd_dsi_vdo_truly/nt35598_wqhd_dsi_vdo_truly.c

   1 /* BEGIN PN:DTS2013053103858 , Added by d00238048, 2013.05.31*/
   2 #ifndef BUILD_LK
   3 #include <linux/string.h>
   4 #endif
   5 #include "lcm_drv.h"
   6
   7 #ifdef BUILD_LK
   8         #include <platform/mt_gpio.h>
   9         #include <platform/mt_i2c.h>
  10         #include <platform/mt_pmic.h>
  11 #elif defined(BUILD_UBOOT)
  12     #include <asm/arch/mt_gpio.h>
  13 #else
  14     //#include <linux/delay.h>
  15     #include <mach/mt_gpio.h>
  16 #endif
  17 #include <cust_gpio_usage.h>
  18 #include <cust_i2c.h>
  19 #ifdef BUILD_LK
  20 #define LCD_DEBUG(fmt)  dprintf(CRITICAL,fmt)
  21 #else
  22 #define LCD_DEBUG(fmt)  printk(fmt)
  23 #endif
  24 //static unsigned char lcd_id_pins_value = 0xFF;
  25 static const unsigned char LCD_MODULE_ID = 0x01; //  haobing modified 2013.07.11
  26 // ---------------------------------------------------------------------------
  27 //  Local Constants
  28 // ---------------------------------------------------------------------------
  29 #define LCM_DSI_CMD_MODE                                                                        0
  30 #define FRAME_WIDTH                                                                             (1440)
  31 #define FRAME_HEIGHT                                                                            (2560)
  32 #define GPIO_65132_EN GPIO_LCD_BIAS_ENP_PIN
  33
  34 #define REGFLAG_PORT_SWAP                                                                       0xFFFA
  35 #define REGFLAG_DELAY                                                                   0xFFFC
  36 #define REGFLAG_END_OF_TABLE                                                            0xFFFD   // END OF REGISTERS MARKER
  37
  38
  39 #ifndef TRUE
  40     #define TRUE 1
  41 #endif
  42
  43 #ifndef FALSE
  44     #define FALSE 0
  45 #endif
  46 //static unsigned int lcm_esd_test = FALSE;      ///only for ESD test
  47 // ---------------------------------------------------------------------------
  48 //  Local Variables
  49 // ---------------------------------------------------------------------------
  50
  51 static const unsigned int BL_MIN_LEVEL =20;
  52 static LCM_UTIL_FUNCS lcm_util;
  53
  54 #define SET_RESET_PIN(v)                                                                (lcm_util.set_reset_pin((v)))
  55 #define MDELAY(n)                                                                                       (lcm_util.mdelay(n))
  56
  57 // ---------------------------------------------------------------------------
  58 //  Local Functions
  59 // ---------------------------------------------------------------------------
  60
  61 #define dsi_set_cmdq_V2(cmd, count, ppara, force_update)        lcm_util.dsi_set_cmdq_V2(cmd, count, ppara, force_update)
  62 #define dsi_set_cmdq(pdata, queue_size, force_update)           lcm_util.dsi_set_cmdq(pdata, queue_size, force_update)
  63 #define wrtie_cmd(cmd)                                                                          lcm_util.dsi_write_cmd(cmd)
  64 #define write_regs(addr, pdata, byte_nums)                                      lcm_util.dsi_write_regs(addr, pdata, byte_nums)
  65 #define read_reg(cmd)                                                                           lcm_util.dsi_dcs_read_lcm_reg(cmd)
  66 #define read_reg_v2(cmd, buffer, buffer_size)                           lcm_util.dsi_dcs_read_lcm_reg_v2(cmd, buffer, buffer_size)
  67 #define dsi_swap_port(swap)                                                             lcm_util.dsi_swap_port(swap)
  68
  69 #if 1
  70 #ifndef BUILD_LK
  71 #include <linux/kernel.h>
  72 #include <linux/module.h>
  73 #include <linux/fs.h>
  74 #include <linux/slab.h>
  75 #include <linux/init.h>
  76 #include <linux/list.h>
  77 #include <linux/i2c.h>
  78 #include <linux/irq.h>
  79 //#include <linux/jiffies.h>
  80 #include <linux/uaccess.h>
  81 //#include <linux/delay.h>
  82 #include <linux/interrupt.h>
  83 #include <linux/io.h>
  84 #include <linux/platform_device.h>
  85 /*****************************************************************************
  86  * Define
  87  *****************************************************************************/
  88
  89 #define TPS_I2C_BUSNUM  I2C_I2C_LCD_BIAS_CHANNEL//for I2C channel 0
  90 #define I2C_ID_NAME "tps65132"
  91 #define TPS_ADDR 0x3E
  92
  93 /*****************************************************************************
  94  * GLobal Variable
  95  *****************************************************************************/
  96 static struct i2c_board_info __initdata tps65132_board_info = {I2C_BOARD_INFO(I2C_ID_NAME, TPS_ADDR)};
  97 static struct i2c_client *tps65132_i2c_client = NULL;
  98
  99
 100 /*****************************************************************************
 101  * Function Prototype
 102  *****************************************************************************/
 103 static int tps65132_probe(struct i2c_client *client, const struct i2c_device_id *id);
 104 static int tps65132_remove(struct i2c_client *client);
 105 /*****************************************************************************
 106  * Data Structure
 107  *****************************************************************************/
 108
 109  struct tps65132_dev    {
 110         struct i2c_client       *client;
 111
 112 };
 113
 114 static const struct i2c_device_id tps65132_id[] = {
 115         { I2C_ID_NAME, 0 },
 116         { }
 117 };
 118
 119 //#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36))
 120 //static struct i2c_client_address_data addr_data = { .forces = forces,};
 121 //#endif
 122 static struct i2c_driver tps65132_iic_driver = {
 123         .id_table       = tps65132_id,
 124         .probe          = tps65132_probe,
 125         .remove         = tps65132_remove,
 126         //.detect               = mt6605_detect,
 127         .driver         = {
 128                 .owner  = THIS_MODULE,
 129                 .name   = "tps65132",
 130         },
 131
 132 };
 133 /*****************************************************************************
 134  * Extern Area
 135  *****************************************************************************/
 136
 137
 138
 139 /*****************************************************************************
 140  * Function
 141  *****************************************************************************/
 142 static int tps65132_probe(struct i2c_client *client, const struct i2c_device_id *id)
 143 {
 144         printk( "tps65132_iic_probe\n");
 145         printk("TPS: info==>name=%s addr=0x%x\n",client->name,client->addr);
 146         tps65132_i2c_client  = client;
 147         return 0;
 148 }
 149
 150
 151 static int tps65132_remove(struct i2c_client *client)
 152 {
 153   printk( "tps65132_remove\n");
 154   tps65132_i2c_client = NULL;
 155    i2c_unregister_device(client);
 156   return 0;
 157 }
 158
 159
 160  static int tps65132_write_bytes(unsigned char addr, unsigned char value)
 161 {
 162         int ret = 0;
 163         struct i2c_client *client = tps65132_i2c_client;
 164         char write_data[2]={0};
 165         write_data[0]= addr;
 166         write_data[1] = value;
 167     ret=i2c_master_send(client, write_data, 2);
 168         if(ret<0)
 169         printk("tps65132 write data fail !!\n");
 170         return ret ;
 171 }
 172
 173
 174
 175 /*
 176  * module load/unload record keeping
 177  */
 178
 179 static int __init tps65132_iic_init(void)
 180 {
 181
 182    printk( "tps65132_iic_init\n");
 183    i2c_register_board_info(TPS_I2C_BUSNUM, &tps65132_board_info, 1);
 184    printk( "tps65132_iic_init2\n");
 185    i2c_add_driver(&tps65132_iic_driver);
 186    printk( "tps65132_iic_init success\n");
 187    return 0;
 188 }
 189
 190 static void __exit tps65132_iic_exit(void)
 191 {
 192   printk( "tps65132_iic_exit\n");
 193   i2c_del_driver(&tps65132_iic_driver);
 194 }
 195
 196
 197 module_init(tps65132_iic_init);
 198 module_exit(tps65132_iic_exit);
 199
 200 MODULE_AUTHOR("Xiaokuan Shi");
 201 MODULE_DESCRIPTION("MTK TPS65132 I2C Driver");
 202 MODULE_LICENSE("GPL");
 203
 204 #endif
 205 #endif
 206 struct LCM_setting_table {
 207     unsigned int cmd;
 208     unsigned char count;
 209     unsigned char para_list[64];
 210 };
 211 //update initial param for IC nt35520 0.01
 212 static struct LCM_setting_table lcm_initialization_setting[] =
 213 {
 214 {REGFLAG_DELAY, 200, {}},
 215 {0xFF, 3,  {0x12,0x82,0x01}},
 216 {0xFF, 4,  {0xAA,0x55,0xA5,0x80}},
 217 {0xF0, 5,{0x55,0xAA,0x52,0x08,0x00}},                                           //---------------Page 0 Enable-----------------------------------------------------------------------
 218 {0xB1, 1,{0x21}},                                                                                       //Display Option Control: 1440xRGB
 219 {0xB2, 2,{0x10, 0x82}},                                                                 // Configuration for GPO Pins: GP01=PWM, GPO2=TE, GPO3=HS
 220 {0xB2, 2,{0x87, 0x22}},                                                                 // Configuration for GPO Pins: GP00=VS, GPO1=HS, GPO3=TE
 221 {0xB4, 3,{0x25,0x02,0x8C}},                                                             //MIPI DET ON
 222 {0xB5, 2,{0x0A, 0x00}},                                                                 // Display Scan Line Control: 2560 line
 223 {0xB8, 3,{0x00, 0x04, 0x02}},                                                           // EQ Control Function for Source Driver
 224 {0xB9, 9,{0x03,0x00,0x18,0x11,0x31,0x44,0x03,0x51,0x00}},       //      MUX Signal Control (11/12 updated)
 225 {0xBA, 2,{0x00, 0x32}},                                                                 // Source Control in Vertical Porch Time
 226 {0xBC, 2,{0x4F, 0x00}},                                                                 // Inversion Driving Control
 227 {0xBD, 4,{0x00,0xB6,0x10,0x10}},                                                        //Display timing control
 228 {0xC6, 2,{0x11, 0x10}},                                                                 // Source Chopper Control
 229 {0xF0, 5,{0x55,0xAA,0x52,0x08,0x01}},                                           //---------------Page 1 Enable-----------------------------------------------------------------------
 230 {0xB1, 2,{0x11, 0x11}},                                                                 //Setting AVDDR=4.6V and AVEER=-4.6V Voltage
 231 {0xB2, 6,{0x0D, 0x0D, 0x0D, 0x0D, 0x0D, 0x0D}},                         //Setting VGH= 8.5 + 1= 9.5V and VGLX=-8.5 - 1 = -9.5V Voltage
 232 {0xB3, 6,{0x19, 0x23, 0x19, 0x23, 0x19, 0x23}},                         //Setting VRGH=8.5 and VGL_REG=-8.5  Voltage
 233 {0xB6, 6,{0x15, 0x14, 0x15, 0x14, 0x15, 0x14}},                         // BT4 and BT5 Power Control for VGH=AVDD-AVEE and VGLX=AVEE-AVDD
 234 {0xBC, 2,{0x69, 0x00}},                                                                 // Setting VGMP=4.1V and VGSP=0V Voltage
 235 {0xBD, 2,{0x69, 0x00}},                                                                 // Setting VGMN=-4.1V and VGSN=0V Voltage
 236 {0xBE, 2,{0x00, 0xC8}},                                                                 // Setting VCOM=0 Offset Voltage
 237 {0xCA, 1,{0x0F}},                                                                                       // Gate Signal Voltages Control: Enable VRGH/VGL_REG regulator
 238 {0xF0, 5,{0x55,0xAA,0x52,0x08,0x02}},                                           //---------------Page 2 Enable-----------------------------------------------------------------------
 239 {0xB0, 14,{0x00, 0x09,0x1B,0x28,0x33,0x3D,0x45,0x30,0x2D,0x32,0x31,0x47,0x56,0x56}},//Positive ?\83Red??
 240 {0xB1, 15,{0x4E, 0x60,0x74,0x74,0x86,0x8E,0x9C,0x9C,0xA5,0xAD,0xB7,0xC2,0xCE,0xDA,0xFF}},
 241 {0xB2, 14,{0x00, 0x09,0x1B,0x28,0x33,0x3D,0x45,0x30,0x2D,0x32,0x31,0x47,0x56,0x56}},//Positive ?\83Green??
 242 {0xB3, 15,{0x4E, 0x60,0x74,0x74,0x86,0x8E,0x9C,0x9C,0xA5,0xAD,0xB7,0xC2,0xCE,0xDA,0xFF}},
 243 {0xB4, 14,{0x00, 0x09,0x1B,0x28,0x33,0x3D,0x45,0x30,0x2D,0x32,0x31,0x47,0x56,0x56}},//Positive ?\83Blue??
 244 {0xB5, 15,{0x4E, 0x60,0x74,0x74,0x86,0x8E,0x9C,0x9C,0xA5,0xAD,0xB7,0xC2,0xCE,0xDA,0xFF}},
 245 {0xB6, 14,{0x00, 0x09,0x1B,0x28,0x33,0x3D,0x45,0x30,0x2D,0x32,0x31,0x47,0x56,0x56}},//Negative ?\83Red??
 246 {0xB7, 15,{0x4E, 0x60,0x74,0x74,0x86,0x8E,0x9C,0x9C,0xA5,0xAD,0xB7,0xC2,0xCE,0xDA,0xFF}},
 247 {0xB8, 14,{0x00, 0x09,0x1B,0x28,0x33,0x3D,0x45,0x30,0x2D,0x32,0x31,0x47,0x56,0x56}},//Negative ?\83Green??
 248 {0xB9, 15,{0x4E, 0x60,0x74,0x74,0x86,0x8E,0x9C,0x9C,0xA5,0xAD,0xB7,0xC2,0xCE,0xDA,0xFF}},
 249 {0xBA, 14,{0x00, 0x09,0x1B,0x28,0x33,0x3D,0x45,0x30,0x2D,0x32,0x31,0x47,0x56,0x56}},//Negative ?\83Blue??
 250 {0xBB, 15,{0x4E, 0x60,0x74,0x74,0x86,0x8E,0x9C,0x9C,0xA5,0xAD,0xB7,0xC2,0xCE,0xDA,0xFF}},
 251 {0xF0, 5,{0x55,0xAA,0x52,0x08,0x03}},                                           //---------------Page 3 Enable-----------------------------------------------------------------------
 252 {0xB0, 4,{0x00,0x00,0x00,0x00}},                                                        // EQ Control for Signal Group CLK (10/26 updated)
 253 {0xB1, 4,{0x03,0x00,0x00,0x03}},                                                        // EQ Control for Signal Group MUX
 254 {0xB2, 7,{0x00,0x00,0x64,0x00,0x64,0x05,0x02}},                         //Control for Signal Type STV01 (10/26 updated)
 255 {0xB4, 2,{0x00,0x08}},                                                                  // Control for Signal Type PRECH (10/26 updated)
 256 {0xB5, 4,{0x12,0x28,0x06,0x06}},                                                        // Control for Signal Type MUX (10/31 Update)
 257 {0xBA, 5,{0x31,0x00,0x00,0x00,0x03}},                                           // Control for Signal Type CLK01 (10/26 Update)
 258 {0xBB, 5,{0x31,0x00,0x00,0x00,0x03}},                                           // Control for Signal Type CLK02 (10/26 Update)
 259 {0xF0, 5,{0x55,0xAA,0x52,0x08,0x05}},                                           //---------------Page 5 Enable-----------------------------------------------------------------------
 260 {0xB0, 3,{0x03,0x11,0x3F}},                                                             //Gate Signal Output Control
 261 {0xB2, 2,{0x06,0x60}},                                                                  // Power On/Off Control for MUX Signal Type
 262 {0xB3, 2,{0x10,0x33}},                                                                  // Power On/Off Control for VCOM Output
 263 {0xB4, 1,{0x26}},                                                                                       // Power On/Off Control for STV Signal Type
 264 {0xB5,3,{ 0x06,0x20,0x00}},                                                             // Power On/Off Control for CLK01 & CLK02 Signal Type
 265 {0xB6,3,{ 0x86,0xE0,0x00}},
 266 {0xBA, 5,{0x8E,0x00,0x00,0xA4,0x00}},                                           // Power On/Off Control for VDC01~ VDC06 Signal Type(10/3 Update)
 267 {0xBB, 5,{0x06,0x00,0x00,0x20,0x00}},
 268 {0xBC, 5,{0x8E,0x00,0x00,0xA4,0x00}},
 269 {0xBD, 5,{0x2E,0x00,0x00,0xA4,0x00}},
 270 {0xBE, 5,{0x8E,0x00,0x00,0xA0,0x00}},
 271 {0xBF, 5,{0x06,0x00,0x00,0x24,0x00}},
 272 {0xC1, 1,{0x00}},                                                                                       // Operation Initial Control
 273 {0xC8, 2,{0x05,0x10}},                                                                  // CLK01 & CLK02 Pulse Waveform Control(10/26 Update)
 274 {0xC9, 2,{0x03,0x10}},
 275 {0xD0, 3,{0x00,0x0A,0x02}},                                                             // CLK01 & CLK02 Status Control in Vertical Porch Area(10/26 Update)
 276 {0xD1, 3,{0x00,0x0A,0x04}},
 277 {0xEC, 1,{0x12}},                                                                                       // Power Stop Control in Power Off: End of 3nd frame
 278 {0xED, 1,{0x00}},                                                                                       // Display Off Status Control: Source:Vmin
 279 {0xEE, 2,{0x03, 0x00}},                                                                 // Source Control in Different Status: on clear:1-frame, off clear:1-frame , Source:Vmin
 280 {0xF0, 5,{0x55,0xAA,0x52,0x08,0x06}},                                           //---------------Page 6 Enable-----------------------------------------------------------------------
 281 {0xB0, 5,{0x00,0x04,0x08,0x11,0x12}},                                           // GOUT1_L~GOUT28_L Signal Type Select for Forward Scan
 282 {0xB1, 5,{0x1F,0x15,0x16,0x1F,0x1F}},
 283 {0xB2, 5,{0x1F,0x13,0x1F,0x1F,0x1F}},
 284 {0xB3, 5,{0x1F,0x19,0x19,0x19,0x19}},
 285 {0xB4, 5,{0x1B,0x1B,0x1B,0x1B,0x1D}},
 286 {0xB5, 3,{0x1D,0x1D,0x1D}},
 287 {0xB6, 5,{0x00,0x05,0x09,0x11,0x12}},                                           // GOUT1_R~GOUT28_R Signal Type Select for Forward Scan
 288 {0xB7, 5,{0x1F,0x15,0x16,0x1F,0x1F}},
 289 {0xB8, 5,{0x1F,0x13,0x1F,0x1F,0x1F}},
 290 {0xB9, 5,{0x1F,0x19,0x19,0x19,0x19}},
 291 {0xBA, 5,{0x1B,0x1B,0x1B,0x1B,0x1D}},
 292 {0xBB, 3,{0x1D,0x1D,0x1D}},
 293 {0xC0, 5,{0x00,0x09,0x05,0x12,0x11}},                                           // GOUT1_L~GOUT28_L Signal Type Select for Backward Scan
 294 {0xC1, 5,{0x1F,0x15,0x16,0x1F,0x1F}},
 295 {0xC2, 5,{0x1F,0x13,0x1F,0x1F,0x1F}},
 296 {0xC3, 5,{0x1F,0x19,0x19,0x19,0x19}},
 297 {0xC4, 5,{0x1B,0x1B,0x1B,0x1B,0x1D}},
 298 {0xC5, 3,{0x1D,0x1D,0x1D}},
 299 {0xC6, 5,{0x00,0x08,0x04,0x12,0x11}},                                           // GOUT1_R~GOUT5_R Signal Type Select for Backward Scan
 300 {0xC7, 5,{0x1F,0x15,0x16,0x1F,0x1F}},
 301 {0xC8, 5,{0x1F,0x13,0x1F,0x1F,0x1F}},
 302 {0xC9, 5,{0x1F,0x19,0x19,0x19,0x19}},
 303 {0xCA, 5,{0x1B,0x1B,0x1B,0x1B,0x1D}},
 304 {0xCB, 3,{0x1D,0x1D,0x1D}},
 305 {0xD0, 3,{0x00, 0xAA, 0x0A}},                                                           // MUX Signal L/R Output Level Swap
 306 #if 1
 307 {0xFF, 4,{0xAA, 0x55, 0xA5, 0x80}},
 308 {0xFE, 1,{0x01}},
 309 {REGFLAG_PORT_SWAP, 0, {}},
 310 {0xFF, 4,{0xAA, 0x55, 0xA5, 0x00}},
 311 #endif
 312 {0x35, 1,{0x00}},                                                                                       //TE ON
 313 {0x11, 0,{}},                                                                                           // Sleep Out
 314 {REGFLAG_DELAY, 120, {}},
 315 {0x29, 0,{}},                                                                                           // Display On
 316 {REGFLAG_DELAY, 40, {}}
 317 };
 318 static struct LCM_setting_table lcm_suspend_setting[] = {
 319         {0x28,0,{}},
 320         {0x10,0,{}},
 321         {REGFLAG_DELAY, 120, {}}
 322 };
 323 #if 0
 324 static struct LCM_setting_table lcm_set_window[] = {
 325         {0x2A,  4,      {0x00, 0x00, (FRAME_WIDTH>>8), (FRAME_WIDTH&0xFF)}},
 326         {0x2B,  4,      {0x00, 0x00, (FRAME_HEIGHT>>8), (FRAME_HEIGHT&0xFF)}},
 327         {REGFLAG_END_OF_TABLE, 0x00, {}}
 328 };
 329 #endif
 330 #if 0
 331 static struct LCM_setting_table lcm_sleep_out_setting[] = {
 332     //Sleep Out
 333     {0x11, 1, {0x00}},
 334     {REGFLAG_DELAY, 120, {}},
 335
 336     // Display ON
 337     {0x29, 1, {0x00}},
 338     {REGFLAG_DELAY, 20, {}},
 339     {REGFLAG_END_OF_TABLE, 0x00, {}}
 340 };
 341 #endif
 342
 343 static struct LCM_setting_table lcm_deep_sleep_mode_in_setting[] = {
 344     // Display off sequence
 345     {0x28, 1, {0x00}},
 346     {REGFLAG_DELAY, 20, {}},
 347
 348     // Sleep Mode On
 349     {0x10, 1, {0x00}},
 350     {REGFLAG_DELAY, 120, {}},
 351     {REGFLAG_END_OF_TABLE, 0x00, {}}
 352 };
 353
 354 static void push_table(struct LCM_setting_table *table, unsigned int count, unsigned char force_update)
 355 {
 356     unsigned int i;
 357
 358     for(i = 0; i < count; i++)
 359     {
 360         unsigned int cmd;
 361         cmd = table[i].cmd;
 362
 363         switch (cmd) {
 364
 365             case REGFLAG_DELAY :
 366                 if(table[i].count <= 10)
 367                     MDELAY(table[i].count);
 368                 else
 369                     MDELAY(table[i].count);
 370                 break;
 371
 372             case REGFLAG_END_OF_TABLE :
 373                 break;
 374                         case REGFLAG_PORT_SWAP:
 375                                 dsi_swap_port(1);
 376                                 break;
 377
 378             default:
 379                 dsi_set_cmdq_V2(cmd, table[i].count, table[i].para_list, force_update);
 380         }
 381     }
 382 }
 383
 384 // ---------------------------------------------------------------------------
 385 //  LCM Driver Implementations
 386 // ---------------------------------------------------------------------------
 387
 388 static void lcm_set_util_funcs(const LCM_UTIL_FUNCS *util)
 389 {
 390     memcpy(&lcm_util, util, sizeof(LCM_UTIL_FUNCS));
 391 }
 392
 393 #ifdef BUILD_LK
 394
 395 #define TPS65132_SLAVE_ADDR_WRITE  0x7C
 396 static struct mt_i2c_t TPS65132_i2c;
 397
 398 static int TPS65132_write_byte(kal_uint8 addr, kal_uint8 value)
 399 {
 400     kal_uint32 ret_code = I2C_OK;
 401     kal_uint8 write_data[2];
 402     kal_uint16 len;
 403
 404     write_data[0]= addr;
 405     write_data[1] = value;
 406
 407     TPS65132_i2c.id = I2C_I2C_LCD_BIAS_CHANNEL;//I2C2;
 408     /* Since i2c will left shift 1 bit, we need to set FAN5405 I2C address to >>1 */
 409     TPS65132_i2c.addr = (TPS65132_SLAVE_ADDR_WRITE >> 1);
 410     TPS65132_i2c.mode = ST_MODE;
 411     TPS65132_i2c.speed = 100;
 412     len = 2;
 413
 414     ret_code = i2c_write(&TPS65132_i2c, write_data, len);
 415     //printf("%s: i2c_write: ret_code: %d\n", __func__, ret_code);
 416
 417     return ret_code;
 418 }
 419
 420 #else
 421
 422 //      extern int mt8193_i2c_write(u16 addr, u32 data);
 423 //      extern int mt8193_i2c_read(u16 addr, u32 *data);
 424
 425 //      #define TPS65132_write_byte(add, data)  mt8193_i2c_write(add, data)
 426         //#define TPS65132_read_byte(add)  mt8193_i2c_read(add)
 427
 428
 429 #endif
 430
 431 static void lcm_init_power(void)
 432 {
 433 #if 1
 434         unsigned char cmd = 0x0;
 435         unsigned char data = 0xFF;
 436         int ret=0;
 437         cmd=0x00;
 438         data=0x0a;
 439         mt_set_gpio_mode(GPIO_65132_EN, GPIO_MODE_00);
 440         mt_set_gpio_dir(GPIO_65132_EN, GPIO_DIR_OUT);
 441         mt_set_gpio_out(GPIO_65132_EN, GPIO_OUT_ONE);
 442
 443 #ifdef BUILD_LK
 444         mt6331_upmu_set_rg_vgp1_en(1);
 445         mt6331_upmu_set_rg_vcam_io_en(1);
 446         ret=TPS65132_write_byte(cmd,data);
 447         if(ret)
 448         dprintf(0, "[LK]nt35598----tps6132----cmd=%0x--i2c write error----\n",cmd);
 449         else
 450         dprintf(0, "[LK]nt35598----tps6132----cmd=%0x--i2c write success----\n",cmd);
 451 #else
 452         ret=tps65132_write_bytes(cmd,data);
 453         if(ret<0)
 454         printk("[KERNEL]nt35598----tps6132---cmd=%0x-- i2c write error-----\n",cmd);
 455         else
 456         printk("[KERNEL]nt35598----tps6132---cmd=%0x-- i2c write success-----\n",cmd);
 457 #endif
 458         cmd=0x01;
 459         data=0x0a;
 460 #ifdef BUILD_LK
 461         ret=TPS65132_write_byte(cmd,data);
 462         if(ret)
 463                 dprintf(0, "[LK]nt35598----tps6132----cmd=%0x--i2c write error----\n",cmd);
 464         else
 465                 dprintf(0, "[LK]nt35598----tps6132----cmd=%0x--i2c write success----\n",cmd);
 466 #else
 467         ret=tps65132_write_bytes(cmd,data);
 468         if(ret<0)
 469         printk("[KERNEL]nt35598----tps6132---cmd=%0x-- i2c write error-----\n",cmd);
 470         else
 471         printk("[KERNEL]nt35598----tps6132---cmd=%0x-- i2c write success-----\n",cmd);
 472 #endif
 473 #endif
 474
 475 }
 476
 477 static void lcm_resume_power(void)
 478 {
 479 #if 1
 480         unsigned char cmd = 0x0;
 481         unsigned char data = 0xFF;
 482         int ret=0;
 483         cmd=0x00;
 484         data=0x0a;
 485         mt_set_gpio_mode(GPIO_65132_EN, GPIO_MODE_00);
 486         mt_set_gpio_dir(GPIO_65132_EN, GPIO_DIR_OUT);
 487         mt_set_gpio_out(GPIO_65132_EN, GPIO_OUT_ONE);
 488
 489 #ifdef BUILD_LK
 490         mt6331_upmu_set_rg_vgp1_en(1);
 491         mt6331_upmu_set_rg_vcam_io_en(1);
 492         ret=TPS65132_write_byte(cmd,data);
 493         if(ret)
 494         dprintf(0, "[LK]nt35598----tps6132----cmd=%0x--i2c write error----\n",cmd);
 495         else
 496         dprintf(0, "[LK]nt35598----tps6132----cmd=%0x--i2c write success----\n",cmd);
 497 #else
 498         ret=tps65132_write_bytes(cmd,data);
 499         if(ret<0)
 500         printk("[KERNEL]nt35598----tps6132---cmd=%0x-- i2c write error-----\n",cmd);
 501         else
 502         printk("[KERNEL]nt35598----tps6132---cmd=%0x-- i2c write success-----\n",cmd);
 503 #endif
 504         cmd=0x01;
 505         data=0x0a;
 506 #ifdef BUILD_LK
 507         ret=TPS65132_write_byte(cmd,data);
 508         if(ret)
 509                 dprintf(0, "[LK]nt35598----tps6132----cmd=%0x--i2c write error----\n",cmd);
 510         else
 511                 dprintf(0, "[LK]nt35598----tps6132----cmd=%0x--i2c write success----\n",cmd);
 512 #else
 513         ret=tps65132_write_bytes(cmd,data);
 514         if(ret<0)
 515         printk("[KERNEL]nt35598----tps6132---cmd=%0x-- i2c write error-----\n",cmd);
 516         else
 517         printk("[KERNEL]nt35598----tps6132---cmd=%0x-- i2c write success-----\n",cmd);
 518 #endif
 519 #endif
 520
 521 }
 522
 523 static void lcm_suspend_power(void)
 524 {
 525         mt_set_gpio_mode(GPIO_65132_EN, GPIO_MODE_00);
 526         mt_set_gpio_dir(GPIO_65132_EN, GPIO_DIR_OUT);
 527         mt_set_gpio_out(GPIO_65132_EN, GPIO_OUT_ZERO);
 528 }
 529
 530 static void lcm_init(void)
 531 {
 532 #if 0
 533         unsigned char cmd = 0x0;
 534         unsigned char data = 0xFF;
 535         int ret=0;
 536         cmd=0x00;
 537         data=0x0a;
 538         mt_set_gpio_mode(GPIO_65132_EN, GPIO_MODE_00);
 539     mt_set_gpio_dir(GPIO_65132_EN, GPIO_DIR_OUT);
 540     mt_set_gpio_out(GPIO_65132_EN, GPIO_OUT_ONE);
 541
 542         #ifdef BUILD_LK
 543         mt6331_upmu_set_rg_vgp1_en(1);
 544         mt6331_upmu_set_rg_vcam_io_en(1);
 545         ret=TPS65132_write_byte(cmd,data);
 546     if(ret)
 547     dprintf(0, "[LK]nt35598----tps6132----cmd=%0x--i2c write error----\n",cmd);
 548         else
 549         dprintf(0, "[LK]nt35598----tps6132----cmd=%0x--i2c write success----\n",cmd);
 550         #else
 551         ret=tps65132_write_bytes(cmd,data);
 552         if(ret<0)
 553         printk("[KERNEL]nt35598----tps6132---cmd=%0x-- i2c write error-----\n",cmd);
 554         else
 555         printk("[KERNEL]nt35598----tps6132---cmd=%0x-- i2c write success-----\n",cmd);
 556         #endif
 557         MDELAY(500);
 558         cmd=0x01;
 559         data=0x0a;
 560 #ifdef BUILD_LK
 561         ret=TPS65132_write_byte(cmd,data);
 562     if(ret)
 563             dprintf(0, "[LK]nt35598----tps6132----cmd=%0x--i2c write error----\n",cmd);
 564         else
 565                 dprintf(0, "[LK]nt35598----tps6132----cmd=%0x--i2c write success----\n",cmd);
 566 #else
 567         ret=tps65132_write_bytes(cmd,data);
 568         if(ret<0)
 569         printk("[KERNEL]nt35598----tps6132---cmd=%0x-- i2c write error-----\n",cmd);
 570         else
 571         printk("[KERNEL]nt35598----tps6132---cmd=%0x-- i2c write success-----\n",cmd);
 572 #endif
 573 #endif
 574
 575         SET_RESET_PIN(1);
 576     MDELAY(10);
 577     SET_RESET_PIN(0);
 578     MDELAY(10);
 579     SET_RESET_PIN(1);
 580     MDELAY(10);
 581
 582         // when phone initial , config output high, enable backlight drv chip
 583     push_table(lcm_initialization_setting, sizeof(lcm_initialization_setting) / sizeof(struct LCM_setting_table), 1);
 584
 585
 586
 587 }
 588
 589
 590 static void lcm_suspend(void)
 591 {
 592  push_table(lcm_suspend_setting, sizeof(lcm_suspend_setting) / sizeof(struct LCM_setting_table), 1);
 593 }
 594 static void lcm_resume(void)
 595 {
 596         lcm_init();
 597 }
 598 static void lcm_update(unsigned int x, unsigned int y,
 599                        unsigned int width, unsigned int height)
 600 {
 601         unsigned int x0 = x;
 602         unsigned int y0 = y;
 603         unsigned int x1 = x0 + width - 1;
 604         unsigned int y1 = y0 + height - 1;
 605
 606         unsigned char x0_MSB = ((x0>>8)&0xFF);
 607         unsigned char x0_LSB = (x0&0xFF);
 608         unsigned char x1_MSB = ((x1>>8)&0xFF);
 609         unsigned char x1_LSB = (x1&0xFF);
 610         unsigned char y0_MSB = ((y0>>8)&0xFF);
 611         unsigned char y0_LSB = (y0&0xFF);
 612         unsigned char y1_MSB = ((y1>>8)&0xFF);
 613         unsigned char y1_LSB = (y1&0xFF);
 614
 615         unsigned int data_array[16];
 616
 617         data_array[0]= 0x00053902;
 618         data_array[1]= (x1_MSB<<24)|(x0_LSB<<16)|(x0_MSB<<8)|0x2a;
 619         data_array[2]= (x1_LSB);
 620         dsi_set_cmdq(data_array, 3, 1);
 621
 622         data_array[0]= 0x00053902;
 623         data_array[1]= (y1_MSB<<24)|(y0_LSB<<16)|(y0_MSB<<8)|0x2b;
 624         data_array[2]= (y1_LSB);
 625         dsi_set_cmdq(data_array, 3, 1);
 626          /*BEGIN PN:DTS2013013101431 modified by s00179437 , 2013-01-31*/
 627          //delete high speed packet
 628         //data_array[0]=0x00290508;
 629         //dsi_set_cmdq(data_array, 1, 1);
 630          /*END PN:DTS2013013101431 modified by s00179437 , 2013-01-31*/
 631
 632         data_array[0]= 0x002c3909;
 633         dsi_set_cmdq(data_array, 1, 0);
 634 }
 635
 636
 637 static void lcm_get_params(LCM_PARAMS *params)
 638 {
 639         memset(params, 0, sizeof(LCM_PARAMS));
 640
 641         params->type   = LCM_TYPE_DSI;
 642
 643         params->width  = FRAME_WIDTH;
 644         params->height = FRAME_HEIGHT;
 645         params->lcm_if = LCM_INTERFACE_DSI_DUAL;
 646         params->lcm_cmd_if = LCM_INTERFACE_DSI0;
 647
 648 #if (LCM_DSI_CMD_MODE)
 649         params->dsi.mode   = CMD_MODE;
 650 #else
 651     params->dsi.mode   = SYNC_PULSE_VDO_MODE;
 652 #endif
 653
 654         // DSI
 655         /* Command mode setting */
 656         params->dsi.LANE_NUM                            = LCM_FOUR_LANE;
 657         //The following defined the fomat for data coming from LCD engine.
 658         params->dsi.data_format.color_order     = LCM_COLOR_ORDER_RGB;
 659         params->dsi.data_format.trans_seq       = LCM_DSI_TRANS_SEQ_MSB_FIRST;
 660         params->dsi.data_format.padding         = LCM_DSI_PADDING_ON_LSB;
 661         params->dsi.data_format.format                  = LCM_DSI_FORMAT_RGB888;
 662
 663         // Highly depends on LCD driver capability.
 664         params->dsi.packet_size=256;
 665         //video mode timing
 666
 667         params->dsi.PS=LCM_PACKED_PS_24BIT_RGB888;
 668
 669         params->dsi.vertical_sync_active                                = 4;
 670         params->dsi.vertical_backporch                                  = 4;
 671         params->dsi.vertical_frontporch                                 = 8;
 672         params->dsi.vertical_active_line                                        = FRAME_HEIGHT;
 673
 674         params->dsi.horizontal_sync_active                              = 8;
 675         params->dsi.horizontal_backporch                                = 60;
 676         params->dsi.horizontal_frontporch                               = 60;
 677         params->dsi.horizontal_active_pixel                             = FRAME_WIDTH;
 678         params->dsi.PLL_CLOCK = 450; //this value must be in MTK suggested table
 679         params->dsi.ufoe_enable  = 1;
 680         params->dsi.ufoe_params.lr_mode_en = 1;
 681         params->dsi.ssc_disable=1;
 682
 683         params->dsi.HS_PRPR=5;
 684         params->dsi.cont_clock=1;
 685         //begin:haobing modified
 686         /*BEGIN PN:DTS2013013101431 modified by s00179437 , 2013-01-31*/
 687         //improve clk quality
 688
 689         //params->dsi.pll_div1=0;               // div1=0,1,2,3;div1_real=1,2,4,4 ----0: 546Mbps  1:273Mbps
 690         //params->dsi.pll_div2=1;               // div2=0,1,2,3;div1_real=1,2,4,4
 691         //params->dsi.fbk_div =21;      // fref=26MHz, fvco=fref*(fbk_div)*2/(div1_real*div2_real)
 692         /*END PN:DTS2013013101431 modified by s00179437 , 2013-01-31*/
 693         //end:haobing modified
 694
 695 }
 696
 697 #define LCM_ID_NT35598 (0x98)
 698
 699 static unsigned int lcm_compare_id(void)
 700 {
 701         unsigned int id=0;
 702         unsigned char buffer[2];
 703         unsigned int array[16];
 704
 705         SET_RESET_PIN(1);
 706     MDELAY(10);
 707     SET_RESET_PIN(0);
 708     MDELAY(10);
 709     SET_RESET_PIN(1);
 710     MDELAY(10);
 711
 712         array[0] = 0x00023700;// read id return two byte,version and id
 713         dsi_set_cmdq(array, 1, 1);
 714
 715         array[0] = 0x00063902;
 716         array[1] = 0x52AA55F0;
 717         array[2] = 0x0108;
 718         dsi_set_cmdq(array, 3, 1);
 719
 720         read_reg_v2(0xC5, buffer, 2);
 721         id = buffer[1]; //we only need ID
 722 #ifdef BUILD_LK
 723                 dprintf(0, "%s, LK nt35598 debug: nt35598 id = 0x%08x\n", __func__, id);
 724 #else
 725                 printk("%s, kernel nt35598 horse debug: nt35598 id = 0x%08x\n", __func__, id);
 726 #endif
 727
 728         if(id == LCM_ID_NT35598)
 729                 return 1;
 730         else
 731                 return 0;
 732
 733 }
 734
 735 LCM_DRIVER nt35598_wqhd_dsi_vdo_truly_lcm_drv=
 736 {
 737     .name           = "nt35598_wqhd_dsi_vdo_truly",
 738     .set_util_funcs = lcm_set_util_funcs,
 739     .get_params     = lcm_get_params,
 740     .init           = lcm_init,/*tianma init fun.*/
 741     .suspend        = lcm_suspend,
 742     .resume         = lcm_resume,
 743      .compare_id     = lcm_compare_id,
 744      .init_power                = lcm_init_power,
 745           .resume_power = lcm_resume_power,
 746      .suspend_power = lcm_suspend_power,
 747 #if (LCM_DSI_CMD_MODE)
 748     .update         = lcm_update,
 749 #endif
 750
 751 };
 752 /* END PN:DTS2013053103858 , Added by d00238048, 2013.05.31*/