drivers/misc/mediatek/gpu/mt8127/mediatek/mtk_mali_kernel.c

   1 #include "mtk_mali_kernel.h"
   2 #include "mali_kernel_common.h" /*for mali printf*/
   3 #include <mach/mt_clkmgr.h>     /*For MFG sub-system clock control API*/
   4 #include <linux/earlysuspend.h> /*For early suspend*/
   5 #include <mach/mt_clkmgr.h>
   6
   7 void MTKMALI_DumpRegister( void )
   8 {
   9 #define DUMP_REG_INFO( addr )   MALIK_MSG("REG: %s = 0x%08x\n", #addr, M_READ32( addr, 0 ))
  10     unsigned long dummy;
  11
  12     MALIK_MSG("MTKMALI_DumpRegister-------:\n");
  13     MALIK_MSG("MT_CG_MFG_G3D is %d\n", clock_is_on(MT_CG_MFG_G3D));
  14     MALIK_MSG("MT_CG_DISP0_SMI_COMMON is %d\n", clock_is_on(MT_CG_DISP0_SMI_COMMON));
  15
  16     /*Dump Clock Gating Register*/
  17     DUMP_REG_INFO( REG_SMI_CG_TEMP );
  18     DUMP_REG_INFO( REG_MFG_CG_CON );
  19     DUMP_REG_INFO( REG_MFG_RESET );
  20     DUMP_REG_INFO( REG_MFG_DEBUG_SEL );
  21
  22     /*Test Mali Register*/
  23     dummy = ( 0x1F-M_READ32( REG_MFG_DEBUG_SEL, 0x0 ) );
  24     MALIK_MSG("Write 0x%02X  to  REG_MFG_DEBUG_SEL\n", (unsigned int)dummy );
  25     M_WRITE32( REG_MFG_DEBUG_SEL, 0x0, dummy );
  26     DUMP_REG_INFO( REG_MFG_DEBUG_SEL );
  27
  28     MALIK_MSG("---------------------------:\n");
  29
  30
  31    /*Dump Call stack*/
  32     dump_stack();
  33
  34 }
  35