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import PULS_20160108
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / misc / mediatek / fmradio / mt6627 / pub / mt6627_fm_cmd.c
1 #include <linux/kernel.h>
2 #include <linux/types.h>
3
4 #include "fm_typedef.h"
5 #include "fm_dbg.h"
6 #include "fm_err.h"
7 #include "fm_rds.h"
8 #include "fm_config.h"
9 #include "fm_link.h"
10
11 #include "mt6627_fm_reg.h"
12 /* #include "mt6627_fm_link.h" */
13 #include "mt6627_fm.h"
14 #include "mt6627_fm_cmd.h"
15 #include "mt6627_fm_cust_cfg.h"
16
17 extern fm_cust_cfg mt6627_fm_config;
18
19 static fm_s32 fm_bop_write(fm_u8 addr, fm_u16 value, fm_u8 *buf, fm_s32 size)
20 {
21 if (size < (FM_WRITE_BASIC_OP_SIZE + 2)) {
22 return (-1);
23 }
24
25 if (buf == NULL) {
26 return (-2);
27 }
28
29 buf[0] = FM_WRITE_BASIC_OP;
30 buf[1] = FM_WRITE_BASIC_OP_SIZE;
31 buf[2] = addr;
32 buf[3] = (fm_u8) ((value) & 0x00FF);
33 buf[4] = (fm_u8) ((value >> 8) & 0x00FF);
34
35 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x\n", buf[0], buf[1], buf[2], buf[3],
36 buf[4]);
37
38 return (FM_WRITE_BASIC_OP_SIZE + 2);
39 }
40
41
42 static fm_s32 fm_bop_udelay(fm_u32 value, fm_u8 *buf, fm_s32 size)
43 {
44 if (size < (FM_UDELAY_BASIC_OP_SIZE + 2)) {
45 return (-1);
46 }
47
48 if (buf == NULL) {
49 return (-2);
50 }
51
52 buf[0] = FM_UDELAY_BASIC_OP;
53 buf[1] = FM_UDELAY_BASIC_OP_SIZE;
54 buf[2] = (fm_u8) ((value) & 0x000000FF);
55 buf[3] = (fm_u8) ((value >> 8) & 0x000000FF);
56 buf[4] = (fm_u8) ((value >> 16) & 0x000000FF);
57 buf[5] = (fm_u8) ((value >> 24) & 0x000000FF);
58
59 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x %02x\n", buf[0], buf[1], buf[2], buf[3],
60 buf[4], buf[5]);
61
62 return (FM_UDELAY_BASIC_OP_SIZE + 2);
63 }
64
65
66 static fm_s32 fm_bop_rd_until(fm_u8 addr, fm_u16 mask, fm_u16 value, fm_u8 *buf, fm_s32 size)
67 {
68 if (size < (FM_RD_UNTIL_BASIC_OP_SIZE + 2)) {
69 return (-1);
70 }
71
72 if (buf == NULL) {
73 return (-2);
74 }
75
76 buf[0] = FM_RD_UNTIL_BASIC_OP;
77 buf[1] = FM_RD_UNTIL_BASIC_OP_SIZE;
78 buf[2] = addr;
79 buf[3] = (fm_u8) ((mask) & 0x00FF);
80 buf[4] = (fm_u8) ((mask >> 8) & 0x00FF);
81 buf[5] = (fm_u8) ((value) & 0x00FF);
82 buf[6] = (fm_u8) ((value >> 8) & 0x00FF);
83
84 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x %02x %02x\n", buf[0], buf[1], buf[2],
85 buf[3], buf[4], buf[5], buf[6]);
86
87 return (FM_RD_UNTIL_BASIC_OP_SIZE + 2);
88 }
89
90
91 static fm_s32 fm_bop_modify(fm_u8 addr, fm_u16 mask_and, fm_u16 mask_or, fm_u8 *buf, fm_s32 size)
92 {
93 if (size < (FM_MODIFY_BASIC_OP_SIZE + 2)) {
94 return (-1);
95 }
96
97 if (buf == NULL) {
98 return (-2);
99 }
100
101 buf[0] = FM_MODIFY_BASIC_OP;
102 buf[1] = FM_MODIFY_BASIC_OP_SIZE;
103 buf[2] = addr;
104 buf[3] = (fm_u8) ((mask_and) & 0x00FF);
105 buf[4] = (fm_u8) ((mask_and >> 8) & 0x00FF);
106 buf[5] = (fm_u8) ((mask_or) & 0x00FF);
107 buf[6] = (fm_u8) ((mask_or >> 8) & 0x00FF);
108
109 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x %02x %02x\n", buf[0], buf[1], buf[2],
110 buf[3], buf[4], buf[5], buf[6]);
111
112 return (FM_MODIFY_BASIC_OP_SIZE + 2);
113 }
114
115
116 static fm_s32 fm_bop_top_write(fm_u16 addr, fm_u32 value, fm_u8 *buf, fm_s32 size)
117 {
118 if (size < (FM_TOP_WRITE_BOP_SIZE + 2)) {
119 return (-1);
120 }
121
122 if (buf == NULL) {
123 return (-2);
124 }
125
126 buf[0] = FM_TOP_WRITE_BASIC_OP;
127 buf[1] = FM_TOP_WRITE_BOP_SIZE;
128 buf[2] = 04;
129 buf[3] = (fm_u8) ((addr) & 0x00FF);
130 buf[4] = (fm_u8) ((addr >> 8) & 0x00FF);
131 buf[5] = (fm_u8) ((value) & 0x00FF);
132 buf[6] = (fm_u8) ((value >> 8) & 0x00FF);
133 buf[7] = (fm_u8) ((value >> 16) & 0x00FF);
134 buf[8] = (fm_u8) ((value >> 24) & 0x00FF);
135
136 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x %02x %02x %02x %02x\n", buf[0], buf[1],
137 buf[2], buf[3], buf[4], buf[5], buf[6], buf[7], buf[8]);
138
139 return (FM_TOP_WRITE_BOP_SIZE + 2);
140 }
141
142
143 static fm_s32 fm_bop_top_rd_until(fm_u16 addr, fm_u32 mask, fm_u32 value, fm_u8 *buf, fm_s32 size)
144 {
145 if (size < (FM_TOP_RD_UNTIL_BOP_SIZE + 2)) {
146 return (-1);
147 }
148
149 if (buf == NULL) {
150 return (-2);
151 }
152
153 buf[0] = FM_TOP_RD_UNTIL_BASIC_OP;
154 buf[1] = FM_TOP_RD_UNTIL_BOP_SIZE;
155 buf[2] = 04;
156 buf[3] = (fm_u8) ((addr) & 0x00FF);
157 buf[4] = (fm_u8) ((addr >> 8) & 0x00FF);
158 buf[5] = (fm_u8) ((mask) & 0x00FF);
159 buf[6] = (fm_u8) ((mask >> 8) & 0x00FF);
160 buf[7] = (fm_u8) ((mask >> 16) & 0x00FF);
161 buf[8] = (fm_u8) ((mask >> 24) & 0x00FF);
162 buf[9] = (fm_u8) ((value) & 0x00FF);
163 buf[10] = (fm_u8) ((value >> 8) & 0x00FF);
164 buf[11] = (fm_u8) ((value >> 16) & 0x00FF);
165 buf[12] = (fm_u8) ((value >> 24) & 0x00FF);
166
167 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
168 buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7], buf[8], buf[9],
169 buf[10], buf[11], buf[12]);
170
171 return (FM_TOP_RD_UNTIL_BOP_SIZE + 2);
172 }
173
174 /*
175 * mt6627_pwrup_clock_on - Wholechip FM Power Up: step 1, FM Digital Clock enable
176 * @buf - target buf
177 * @buf_size - buffer size
178 * return package size
179 */
180 fm_s32 mt6627_pwrup_clock_on(fm_u8 *buf, fm_s32 buf_size)
181 {
182 fm_s32 pkt_size = 0;
183 fm_u16 de_emphasis;
184 /* fm_u16 osc_freq; */
185
186 if (buf_size < TX_BUF_SIZE) {
187 return (-1);
188 }
189
190 de_emphasis = mt6627_fm_config.rx_cfg.deemphasis; /* MT6627fm_cust_config_fetch(FM_CFG_RX_DEEMPHASIS); */
191 de_emphasis &= 0x0001; /* rang 0~1 */
192 /* osc_freq = mt6627_fm_config.rx_cfg.osc_freq;//MT6628fm_cust_config_fetch(FM_CFG_RX_OSC_FREQ); */
193 /* osc_freq &= 0x0007; //rang 0~5 */
194
195 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
196 buf[1] = FM_ENABLE_OPCODE;
197 pkt_size = 4;
198
199 /* 2,turn on top clock */
200 pkt_size += fm_bop_top_write(0xA10, 0xFFFFFFFF, &buf[pkt_size], buf_size - pkt_size); /* wr a10 ffffffff */
201 /* 3,enable MTCMOS */
202 pkt_size += fm_bop_top_write(0x60, 0x00000030, &buf[pkt_size], buf_size - pkt_size); /* wr 60 30 */
203 pkt_size += fm_bop_top_write(0x60, 0x00000035, &buf[pkt_size], buf_size - pkt_size); /* wr 60 35 */
204 pkt_size += fm_bop_top_rd_until(0x60, 0x0000000A, 0xA, &buf[pkt_size], buf_size - pkt_size); /* Poll 60[1]=1,[3]= 1 */
205 pkt_size += fm_bop_top_write(0x60, 0x00000015, &buf[pkt_size], buf_size - pkt_size); /* wr 60 15 */
206 pkt_size += fm_bop_top_write(0x60, 0x00000005, &buf[pkt_size], buf_size - pkt_size); /* wr 60 5 */
207 pkt_size += fm_bop_udelay(10, &buf[pkt_size], buf_size - pkt_size); /* delay 10us */
208 pkt_size += fm_bop_top_write(0x60, 0x00000045, &buf[pkt_size], buf_size - pkt_size); /* wr 60 45 */
209 /* 4,set CSPI fm slave dummy count */
210 pkt_size += fm_bop_top_write(0x68, 0x0000003F, &buf[pkt_size], buf_size - pkt_size); /* wr 68 3F */
211
212 /* a1 enable digital OSC */
213 pkt_size += fm_bop_top_write(0x50, 0x00000001, &buf[pkt_size], buf_size - pkt_size); /* wr 50 1 */
214 pkt_size += fm_bop_udelay(3000, &buf[pkt_size], buf_size - pkt_size); /* delay 3ms */
215 /* a3 set OSC clock output to fm */
216 pkt_size += fm_bop_top_write(0x50, 0x00000003, &buf[pkt_size], buf_size - pkt_size); /* wr 50 3 */
217 /* a4 release HW clock gating */
218 pkt_size += fm_bop_top_write(0x50, 0x00000007, &buf[pkt_size], buf_size - pkt_size); /* wr 50 7 */
219 /* set I2S current driving */
220 pkt_size += fm_bop_top_write(0x000, 0x00000000, &buf[pkt_size], buf_size - pkt_size); /* wr 0 0 */
221 /* a5 enable DSP auto clock gating */
222 pkt_size += fm_bop_write(0x70, 0x0040, &buf[pkt_size], buf_size - pkt_size); /* wr 70 0040 */
223 /* a7 deemphasis setting */
224 pkt_size +=
225 fm_bop_modify(0x61, ~DE_EMPHASIS, (de_emphasis << 12), &buf[pkt_size],
226 buf_size - pkt_size);
227
228 /* pkt_size += fm_bop_modify(0x60, OSC_FREQ_MASK, (osc_freq << 4), &buf[pkt_size], buf_size - pkt_size); */
229
230 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
231 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
232
233 return pkt_size;
234 }
235
236
237 /*
238 * mt6627_patch_download - Wholechip FM Power Up: step 3, download patch to f/w,
239 * @buf - target buf
240 * @buf_size - buffer size
241 * @seg_num - total segments that this patch divided into
242 * @seg_id - No. of Segments: segment that will now be sent
243 * @src - patch source buffer
244 * @seg_len - segment size: segment that will now be sent
245 * return package size
246 */
247 fm_s32 mt6627_patch_download(fm_u8 *buf, fm_s32 buf_size, fm_u8 seg_num, fm_u8 seg_id,
248 const fm_u8 *src, fm_s32 seg_len)
249 {
250 fm_s32 pkt_size = 0;
251 fm_u8 *dst = NULL;
252
253 if (buf_size < TX_BUF_SIZE) {
254 return (-1);
255 }
256
257 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
258 buf[1] = FM_PATCH_DOWNLOAD_OPCODE;
259 pkt_size = 4;
260
261 buf[pkt_size++] = seg_num;
262 buf[pkt_size++] = seg_id;
263
264 if (seg_len > (buf_size - pkt_size)) {
265 return -1;
266 }
267
268 dst = &buf[pkt_size];
269 pkt_size += seg_len;
270
271 /* copy patch to tx buffer */
272 while (seg_len--) {
273 *dst = *src;
274 /* pr_debug("%02x ", *dst); */
275 src++;
276 dst++;
277 }
278
279 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
280 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
281 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x %02x %02x\n", buf[0], buf[1], buf[2],
282 buf[3], buf[4], buf[5], buf[6]);
283
284 return pkt_size;
285 }
286
287
288 /*
289 * mt6627_coeff_download - Wholechip FM Power Up: step 3,download coeff to f/w,
290 * @buf - target buf
291 * @buf_size - buffer size
292 * @seg_num - total segments that this patch divided into
293 * @seg_id - No. of Segments: segment that will now be sent
294 * @src - patch source buffer
295 * @seg_len - segment size: segment that will now be sent
296 * return package size
297 */
298 fm_s32 mt6627_coeff_download(fm_u8 *buf, fm_s32 buf_size, fm_u8 seg_num, fm_u8 seg_id,
299 const fm_u8 *src, fm_s32 seg_len)
300 {
301 fm_s32 pkt_size = 0;
302 fm_u8 *dst = NULL;
303
304 if (buf_size < TX_BUF_SIZE) {
305 return (-1);
306 }
307
308 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
309 buf[1] = FM_COEFF_DOWNLOAD_OPCODE;
310 pkt_size = 4;
311
312 buf[pkt_size++] = seg_num;
313 buf[pkt_size++] = seg_id;
314
315 if (seg_len > (buf_size - pkt_size)) {
316 return -1;
317 }
318
319 dst = &buf[pkt_size];
320 pkt_size += seg_len;
321
322 /* copy patch to tx buffer */
323 while (seg_len--) {
324 *dst = *src;
325 /* pr_debug("%02x ", *dst); */
326 src++;
327 dst++;
328 }
329
330 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
331 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
332 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x %02x %02x\n", buf[0], buf[1], buf[2],
333 buf[3], buf[4], buf[5], buf[6]);
334
335 return pkt_size;
336 }
337
338 #if 0
339 /*
340 * mt6627_hwcoeff_download - Wholechip FM Power Up: step 3,download hwcoeff to f/w,
341 * @buf - target buf
342 * @buf_size - buffer size
343 * @seg_num - total segments that this patch divided into
344 * @seg_id - No. of Segments: segment that will now be sent
345 * @src - patch source buffer
346 * @seg_len - segment size: segment that will now be sent
347 * return package size
348 */
349 fm_s32 mt6627_hwcoeff_download(fm_u8 *buf, fm_s32 buf_size, fm_u8 seg_num, fm_u8 seg_id,
350 const fm_u8 *src, fm_s32 seg_len)
351 {
352 fm_s32 pkt_size = 0;
353 fm_u8 *dst = NULL;
354
355 if (buf_size < TX_BUF_SIZE) {
356 return (-1);
357 }
358
359 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
360 buf[1] = FM_HWCOEFF_DOWNLOAD_OPCODE;
361 pkt_size = 4;
362
363 buf[pkt_size++] = seg_num;
364 buf[pkt_size++] = seg_id;
365
366 if (seg_len > (buf_size - pkt_size)) {
367 return -1;
368 }
369
370 dst = &buf[pkt_size];
371 pkt_size += seg_len;
372
373 /* copy patch to tx buffer */
374 while (seg_len--) {
375 *dst = *src;
376 /* pr_debug("%02x ", *dst); */
377 src++;
378 dst++;
379 }
380
381 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
382 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
383 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x %02x %02x\n", buf[0], buf[1], buf[2],
384 buf[3], buf[4], buf[5], buf[6]);
385
386 return pkt_size;
387 }
388
389
390 /*
391 * mt6627_rom_download - Wholechip FM Power Up: step 3,download rom to f/w,
392 * @buf - target buf
393 * @buf_size - buffer size
394 * @seg_num - total segments that this patch divided into
395 * @seg_id - No. of Segments: segment that will now be sent
396 * @src - patch source buffer
397 * @seg_len - segment size: segment that will now be sent
398 * return package size
399 */
400 fm_s32 mt6627_rom_download(fm_u8 *buf, fm_s32 buf_size, fm_u8 seg_num, fm_u8 seg_id,
401 const fm_u8 *src, fm_s32 seg_len)
402 {
403 fm_s32 pkt_size = 0;
404 fm_u8 *dst = NULL;
405
406 if (buf_size < TX_BUF_SIZE) {
407 return (-1);
408 }
409
410 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
411 buf[1] = FM_ROM_DOWNLOAD_OPCODE;
412 pkt_size = 4;
413
414 buf[pkt_size++] = seg_num;
415 buf[pkt_size++] = seg_id;
416
417 if (seg_len > (buf_size - pkt_size)) {
418 return -1;
419 }
420
421 dst = &buf[pkt_size];
422 pkt_size += seg_len;
423
424 /* copy patch to tx buffer */
425 while (seg_len--) {
426 *dst = *src;
427 /* pr_debug("%02x ", *dst); */
428 src++;
429 dst++;
430 }
431
432 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
433 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
434 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x %02x %02x\n", buf[0], buf[1], buf[2],
435 buf[3], buf[4], buf[5], buf[6]);
436
437 return pkt_size;
438 }
439 #endif
440
441 /*
442 * mt6627_pwrup_digital_init - Wholechip FM Power Up: step 4, FM Digital Init: fm_rgf_maincon
443 * @buf - target buf
444 * @buf_size - buffer size
445 * return package size
446 */
447 fm_s32 mt6627_pwrup_digital_init(fm_u8 *buf, fm_s32 buf_size)
448 {
449 fm_s32 pkt_size = 0;
450
451 if (buf_size < TX_BUF_SIZE) {
452 return (-1);
453 }
454
455 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
456 buf[1] = FM_ENABLE_OPCODE;
457 pkt_size = 4;
458 /* FM RF&ADPLL divider setting */
459 /* D2.1 set cell mode */
460 /* wr 30 D3:D2 00:FDD(default),01:both.10: TDD, 11 FDD */
461 /* pkt_size += fm_bop_modify(0x30, 0xFFF3, 0x0000, &buf[pkt_size], buf_size - pkt_size); */
462 /* D2.2 set ADPLL divider */
463 pkt_size += fm_bop_write(0x21, 0xE000, &buf[pkt_size], buf_size - pkt_size); /* wr 21 E000 */
464 /* D2.3 set SDM coeff0_H */
465 pkt_size += fm_bop_write(0xD8, 0x03F0, &buf[pkt_size], buf_size - pkt_size); /* wr D8 0x03F0 */
466 /* D2.4 set SDM coeff0_L */
467 pkt_size += fm_bop_write(0xD9, 0x3F04, &buf[pkt_size], buf_size - pkt_size); /* wr D9 0x3F04 */
468 /* D2.5 set SDM coeff1_H */
469 pkt_size += fm_bop_write(0xDA, 0x0014, &buf[pkt_size], buf_size - pkt_size); /* wr DA 0x0014 */
470 /* D2.6 set SDM coeff1_L */
471 pkt_size += fm_bop_write(0xDB, 0x2A38, &buf[pkt_size], buf_size - pkt_size); /* wr DB 0x2A38 */
472 /* D2.7 set 26M clock */
473 pkt_size += fm_bop_write(0x23, 0x4000, &buf[pkt_size], buf_size - pkt_size); /* wr 23 4000 */
474
475 /* FM Digital Init: fm_rgf_maincon */
476 /* E4 */
477 pkt_size += fm_bop_write(0x6A, 0x0021, &buf[pkt_size], buf_size - pkt_size); /* wr 6A 0021 */
478 pkt_size += fm_bop_write(0x6B, 0x0021, &buf[pkt_size], buf_size - pkt_size); /* wr 6B 0021 */
479 /* E5 */
480 pkt_size += fm_bop_top_write(0x50, 0x0000000F, &buf[pkt_size], buf_size - pkt_size); /* wr 50 f */
481 /* E6 */
482 pkt_size += fm_bop_modify(0x61, 0xFFFD, 0x0002, &buf[pkt_size], buf_size - pkt_size); /* wr 61 D1=1 */
483 /* E7 */
484 pkt_size += fm_bop_modify(0x61, 0xFFFE, 0x0000, &buf[pkt_size], buf_size - pkt_size); /* wr 61 D0=0 */
485 /* E8 */
486 pkt_size += fm_bop_udelay(100000, &buf[pkt_size], buf_size - pkt_size); /* delay 100ms */
487 /* E9 */
488 pkt_size += fm_bop_rd_until(0x64, 0x001F, 0x0002, &buf[pkt_size], buf_size - pkt_size); /* Poll 64[0~4] = 2 */
489
490 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
491 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
492
493 return pkt_size;
494 }
495
496 /*
497 * mt6627_pwrup_fine_tune - Wholechip FM Power Up: step 5, FM RF fine tune setting
498 * @buf - target buf
499 * @buf_size - buffer size
500 * return package size
501 */
502 fm_s32 mt6627_pwrup_fine_tune(fm_u8 *buf, fm_s32 buf_size)
503 {
504 fm_s32 pkt_size = 0;
505
506 if (buf_size < TX_BUF_SIZE) {
507 return (-1);
508 }
509
510 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
511 buf[1] = FM_ENABLE_OPCODE;
512 pkt_size = 4;
513
514 /* F1 set host control RF register */
515 pkt_size += fm_bop_top_write(0x50, 0x00000007, &buf[pkt_size], buf_size - pkt_size); /* wr 50 7 */
516 /* F2 fine tune RF setting */
517 pkt_size += fm_bop_write(0x01, 0xBEE8, &buf[pkt_size], buf_size - pkt_size); /* wr 01 0xBEE8 */
518 pkt_size += fm_bop_write(0x03, 0xF6ED, &buf[pkt_size], buf_size - pkt_size); /* wr 03 0xF6ED mdy 0315 version */
519 pkt_size += fm_bop_write(0x15, 0x0D80, &buf[pkt_size], buf_size - pkt_size); /* wr 15 0x0D80 */
520 pkt_size += fm_bop_write(0x16, 0x0068, &buf[pkt_size], buf_size - pkt_size); /* wr 16 0x0068 */
521 pkt_size += fm_bop_write(0x17, 0x092A, &buf[pkt_size], buf_size - pkt_size); /* wr 17 0x092A */
522 pkt_size += fm_bop_write(0x34, 0x807F, &buf[pkt_size], buf_size - pkt_size); /* wr 34 0x807F */
523 pkt_size += fm_bop_write(0x35, 0x311E, &buf[pkt_size], buf_size - pkt_size); /* wr 35 0x311E */
524 /* F1 set DSP control RF register */
525 pkt_size += fm_bop_top_write(0x50, 0x0000000F, &buf[pkt_size], buf_size - pkt_size); /* wr 50 F */
526
527 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
528 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
529
530 return pkt_size;
531 }
532
533
534 /*
535 * mt6627_pwrdown - Wholechip FM Power down: Digital Modem Power Down
536 * @buf - target buf
537 * @buf_size - buffer size
538 * return package size
539 */
540 fm_s32 mt6627_pwrdown(fm_u8 *buf, fm_s32 buf_size)
541 {
542 fm_s32 pkt_size = 0;
543
544 if (buf_size < TX_BUF_SIZE) {
545 return (-1);
546 }
547
548 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
549 buf[1] = FM_ENABLE_OPCODE;
550 pkt_size = 4;
551 /* A1:set audio output I2S Tx mode: */
552 pkt_size += fm_bop_modify(0x9B, 0xFFF8, 0x0000, &buf[pkt_size], buf_size - pkt_size); /* wr 9B[0~2] 0 */
553
554 /* B0:Disable HW clock control */
555 pkt_size += fm_bop_top_write(0x50, 0x330F, &buf[pkt_size], buf_size - pkt_size); /* wr top50 330F */
556 /* B1:Reset ASIP */
557 pkt_size += fm_bop_write(0x61, 0x0001, &buf[pkt_size], buf_size - pkt_size); /* wr 61 0001 */
558 /* B2:digital core + digital rgf reset */
559 pkt_size += fm_bop_modify(0x6E, 0xFFF8, 0x0000, &buf[pkt_size], buf_size - pkt_size); /* wr 6E[0~2] 0 */
560 pkt_size += fm_bop_modify(0x6E, 0xFFF8, 0x0000, &buf[pkt_size], buf_size - pkt_size); /* wr 6E[0~2] 0 */
561 pkt_size += fm_bop_modify(0x6E, 0xFFF8, 0x0000, &buf[pkt_size], buf_size - pkt_size); /* wr 6E[0~2] 0 */
562 pkt_size += fm_bop_modify(0x6E, 0xFFF8, 0x0000, &buf[pkt_size], buf_size - pkt_size); /* wr 6E[0~2] 0 */
563 /* B3:Disable all clock */
564 pkt_size += fm_bop_top_write(0x50, 0x0000, &buf[pkt_size], buf_size - pkt_size); /* wr top50 0000 */
565 /* B4:Reset rgfrf */
566 pkt_size += fm_bop_top_write(0x50, 0x4000, &buf[pkt_size], buf_size - pkt_size); /* wr top50 4000 */
567 pkt_size += fm_bop_top_write(0x50, 0x0000, &buf[pkt_size], buf_size - pkt_size); /* wr top50 0000 */
568 /* MTCMOS power off */
569 /* C0:disable MTCMOS */
570 pkt_size += fm_bop_top_write(0x60, 0x0005, &buf[pkt_size], buf_size - pkt_size); /* wr top60 0005 */
571 pkt_size += fm_bop_top_write(0x60, 0x0015, &buf[pkt_size], buf_size - pkt_size); /* wr top60 0015 */
572 pkt_size += fm_bop_top_write(0x60, 0x0035, &buf[pkt_size], buf_size - pkt_size); /* wr top60 0035 */
573 pkt_size += fm_bop_top_write(0x60, 0x0030, &buf[pkt_size], buf_size - pkt_size); /* wr top60 0030 */
574 pkt_size += fm_bop_top_rd_until(0x60, 0x0000000A, 0x0, &buf[pkt_size], buf_size - pkt_size); /* Poll 60[1]=0,[3]= 0 */
575
576 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
577 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
578
579 return pkt_size;
580 }
581
582
583 /*
584 * mt6627_rampdown - f/w will wait for STC_DONE interrupt
585 * @buf - target buf
586 * @buf_size - buffer size
587 * return package size
588 */
589 fm_s32 mt6627_rampdown(fm_u8 *buf, fm_s32 buf_size)
590 {
591 fm_s32 pkt_size = 0;
592
593 if (buf_size < TX_BUF_SIZE) {
594 return (-1);
595 }
596
597 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
598 buf[1] = FM_RAMPDOWN_OPCODE;
599 pkt_size = 4;
600
601 /* Clear DSP state */
602 pkt_size += fm_bop_modify(FM_MAIN_CTRL, 0xFFF0, 0x0000, &buf[pkt_size], buf_size - pkt_size); /* wr 63[3:0] = 0 */
603 /* Set DSP ramp down state */
604 pkt_size += fm_bop_modify(FM_MAIN_CTRL, 0xFFFF, RAMP_DOWN, &buf[pkt_size], buf_size - pkt_size); /* wr 63[8] = 1 */
605 /* @Wait for STC_DONE interrupt@ */
606 pkt_size += fm_bop_rd_until(FM_MAIN_INTR, FM_INTR_STC_DONE, FM_INTR_STC_DONE, &buf[pkt_size], buf_size - pkt_size); /* Poll 69[0] = b'1 */
607 /* Clear DSP ramp down state */
608 pkt_size += fm_bop_modify(FM_MAIN_CTRL, (~RAMP_DOWN), 0x0000, &buf[pkt_size], buf_size - pkt_size); /* wr 63[8] = 0 */
609 /* Write 1 clear the STC_DONE interrupt status flag */
610 pkt_size += fm_bop_modify(FM_MAIN_INTR, 0xFFFF, FM_INTR_STC_DONE, &buf[pkt_size], buf_size - pkt_size); /* wr 69[0] = 1 */
611
612 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
613 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
614
615 return pkt_size;
616 }
617
618
619 /*
620 * mt6627_tune - execute tune action,
621 * @buf - target buf
622 * @buf_size - buffer size
623 * @freq - 760 ~ 1080, 100KHz unit
624 * return package size
625 */
626 fm_s32 mt6627_tune(fm_u8 *buf, fm_s32 buf_size, fm_u16 freq, fm_u16 chan_para)
627 {
628 /* #define FM_TUNE_USE_POLL */
629 fm_s32 pkt_size = 0;
630
631 if (buf_size < TX_BUF_SIZE) {
632 return (-1);
633 }
634 /*
635 if (0 == fm_get_channel_space(freq)) {
636 freq *= 10;
637 }
638
639 freq = (freq - 6400) * 2 / 10;
640 */
641 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
642 buf[1] = FM_TUNE_OPCODE;
643 pkt_size = 4;
644
645 /* Set desired channel & channel parameter */
646 #ifdef FM_TUNE_USE_POLL
647 pkt_size += fm_bop_write(0x6A, 0x0000, &buf[pkt_size], buf_size - pkt_size);
648 pkt_size += fm_bop_write(0x6B, 0x0000, &buf[pkt_size], buf_size - pkt_size);
649 #endif
650 /* pkt_size += fm_bop_modify(FM_CHANNEL_SET, 0xFC00, freq, &buf[pkt_size], buf_size - pkt_size);// set 0x65[9:0] = 0x029e, => ((97.5 - 64) * 20) */
651 /* channel para setting, D15~D12, D15: ATJ, D13: HL, D12: FA */
652 /* pkt_size += fm_bop_modify(FM_CHANNEL_SET, 0x0FFF, (chan_para << 12), &buf[pkt_size], buf_size - pkt_size); */
653 /* Enable hardware controlled tuning sequence */
654 pkt_size += fm_bop_modify(FM_MAIN_CTRL, 0xFFF8, TUNE, &buf[pkt_size], buf_size - pkt_size); /* set 0x63[0] = 1 */
655 /* Wait for STC_DONE interrupt */
656 #ifdef FM_TUNE_USE_POLL
657 pkt_size += fm_bop_rd_until(FM_MAIN_INTR, FM_INTR_STC_DONE, FM_INTR_STC_DONE, &buf[pkt_size], buf_size - pkt_size); /* Poll 69[0] = b'1 */
658 /* Write 1 clear the STC_DONE interrupt status flag */
659 pkt_size += fm_bop_modify(FM_MAIN_INTR, 0xFFFF, FM_INTR_STC_DONE, &buf[pkt_size], buf_size - pkt_size); /* wr 69[0] = 1 */
660 #endif
661 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
662 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
663
664 return pkt_size;
665 }
666
667
668 /*
669 * mt6627_full_cqi_req - execute request cqi info action,
670 * @buf - target buf
671 * @buf_size - buffer size
672 * @freq - 7600 ~ 10800, freq array
673 * @cnt - channel count
674 * @type - request type, 1: a single channel; 2: multi channel; 3:multi channel with 100Khz step; 4: multi channel with 50Khz step
675 *
676 * return package size
677 */
678 fm_s32 mt6627_full_cqi_req(fm_u8 *buf, fm_s32 buf_size, fm_u16 *freq, fm_s32 cnt, fm_s32 type)
679 {
680 fm_s32 pkt_size = 0;
681
682 if (buf_size < TX_BUF_SIZE) {
683 return (-1);
684 }
685
686 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
687 buf[1] = FM_SOFT_MUTE_TUNE_OPCODE;
688 pkt_size = 4;
689
690 switch (type) {
691 case 1:
692 buf[pkt_size] = 0x0001;
693 pkt_size++;
694 buf[pkt_size] = (fm_u8) ((*freq) & 0x00FF);
695 pkt_size++;
696 buf[pkt_size] = (fm_u8) ((*freq >> 8) & 0x00FF);
697 pkt_size++;
698 break;
699 case 2:
700 buf[pkt_size] = 0x0002;
701 pkt_size++;
702 break;
703 case 3:
704 buf[pkt_size] = 0x0003;
705 pkt_size++;
706 break;
707 case 4:
708 buf[pkt_size] = 0x0004;
709 pkt_size++;
710 break;
711 default:
712 buf[pkt_size] = (fm_u16) type;
713 pkt_size++;
714 break;
715 }
716
717 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
718 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
719
720 return pkt_size;
721 }
722
723
724 /*
725 * mt6627_seek - execute seek action,
726 * @buf - target buf
727 * @buf_size - buffer size
728 * @seekdir - 0=seek up, 1=seek down
729 * @space - step, 50KHz:001, 100KHz:010, 200KHz:100
730 * @max_freq - upper bound
731 * @min_freq - lower bound
732 * return package size
733 */
734 fm_s32 mt6627_seek(fm_u8 *buf, fm_s32 buf_size, fm_u16 seekdir, fm_u16 space, fm_u16 max_freq,
735 fm_u16 min_freq)
736 {
737 fm_s32 pkt_size = 0;
738
739 if (buf_size < TX_BUF_SIZE) {
740 return (-1);
741 }
742
743 if (0 == fm_get_channel_space(max_freq)) {
744 max_freq *= 10;
745 }
746
747 if (0 == fm_get_channel_space(min_freq)) {
748 min_freq *= 10;
749 }
750
751 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
752 buf[1] = FM_SEEK_OPCODE;
753 pkt_size = 4;
754
755 /* Program seek direction */
756 if (seekdir == 0) {
757 pkt_size += fm_bop_modify(FM_MAIN_CFG1, 0xFBFF, 0x0000, &buf[pkt_size], buf_size - pkt_size); /* 0x66[10] = 0, seek up */
758 } else {
759 pkt_size += fm_bop_modify(FM_MAIN_CFG1, 0xFBFF, 0x0400, &buf[pkt_size], buf_size - pkt_size); /* 0x66[10] = 1, seek down */
760 }
761
762 /* Program scan channel spacing */
763 if (space == 1) {
764 pkt_size += fm_bop_modify(FM_MAIN_CFG1, 0x8FFF, 0x1000, &buf[pkt_size], buf_size - pkt_size); /* clear 0x66[14:12] then 0x66[14:12]=001 */
765 } else if (space == 2) {
766 pkt_size += fm_bop_modify(FM_MAIN_CFG1, 0x8FFF, 0x2000, &buf[pkt_size], buf_size - pkt_size); /* clear 0x66[14:12] then 0x66[14:12]=010 */
767 } else if (space == 4) {
768 pkt_size += fm_bop_modify(FM_MAIN_CFG1, 0x8FFF, 0x4000, &buf[pkt_size], buf_size - pkt_size); /* clear 0x66[14:12] then 0x66[14:12]=100 */
769 }
770 /* enable wrap , if it is not auto scan function, 0x66[11] 0=no wrarp, 1=wrap */
771 pkt_size += fm_bop_modify(FM_MAIN_CFG1, 0xF7FF, 0x0800, &buf[pkt_size], buf_size - pkt_size); /* 0x66[11] = 1, wrap */
772 /* 0x66[9:0] freq upper bound */
773
774 max_freq = (max_freq - 6400) * 2 / 10;
775
776 pkt_size +=
777 fm_bop_modify(FM_MAIN_CFG1, 0xFC00, max_freq, &buf[pkt_size], buf_size - pkt_size);
778 /* 0x67[9:0] freq lower bound */
779
780 min_freq = (min_freq - 6400) * 2 / 10;
781
782 pkt_size +=
783 fm_bop_modify(FM_MAIN_CFG2, 0xFC00, min_freq, &buf[pkt_size], buf_size - pkt_size);
784 /* Enable hardware controlled seeking sequence */
785 pkt_size += fm_bop_modify(FM_MAIN_CTRL, 0xFFF8, SEEK, &buf[pkt_size], buf_size - pkt_size); /* 0x63[1] = 1 */
786 /* Wait for STC_DONE interrupt */
787 /* pkt_size += fm_bop_rd_until(FM_MAIN_INTR, FM_INTR_STC_DONE, FM_INTR_STC_DONE, &buf[pkt_size], buf_size - pkt_size);//Poll 69[0] = b'1 */
788 /* Write 1 clear the STC_DONE interrupt status flag */
789 /* pkt_size += fm_bop_modify(FM_MAIN_INTR, 0xFFFF, FM_INTR_STC_DONE, &buf[pkt_size], buf_size - pkt_size);//wr 69[0] = 1 */
790
791 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
792 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
793
794 return pkt_size;
795 }
796
797
798 /*
799 * mt6627_scan - execute scan action,
800 * @buf - target buf
801 * @buf_size - buffer size
802 * @scandir - 0=seek up, 1=seek down
803 * @space - step, 50KHz:001, 100KHz:010, 200KHz:100
804 * @max_freq - upper bound
805 * @min_freq - lower bound
806 * return package size
807 */
808 fm_s32 mt6627_scan(fm_u8 *buf, fm_s32 buf_size, fm_u16 scandir, fm_u16 space, fm_u16 max_freq,
809 fm_u16 min_freq)
810 {
811 fm_s32 pkt_size = 0;
812
813 if (buf_size < TX_BUF_SIZE) {
814 return (-1);
815 }
816
817 if (0 == fm_get_channel_space(max_freq)) {
818 max_freq *= 10;
819 }
820 if (0 == fm_get_channel_space(min_freq)) {
821 min_freq *= 10;
822 }
823
824 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
825 buf[1] = FM_SCAN_OPCODE;
826 pkt_size = 4;
827
828 /* Program seek direction */
829 if (scandir == 0) {
830 pkt_size += fm_bop_modify(FM_MAIN_CFG1, 0xFBFF, 0x0000, &buf[pkt_size], buf_size - pkt_size); /* 0x66[10] = 0, seek up */
831 } else {
832 pkt_size += fm_bop_modify(FM_MAIN_CFG1, 0xFFFF, 0x0400, &buf[pkt_size], buf_size - pkt_size); /* 0x66[10] = 1, seek down */
833 }
834
835 /* Program scan channel spacing */
836 if (space == 1) {
837 pkt_size += fm_bop_modify(FM_MAIN_CFG1, 0x8FFF, 0x1000, &buf[pkt_size], buf_size - pkt_size); /* clear 0x66[14:12] then 0x66[14:12]=001 */
838 } else if (space == 2) {
839 pkt_size += fm_bop_modify(FM_MAIN_CFG1, 0x8FFF, 0x2000, &buf[pkt_size], buf_size - pkt_size); /* clear 0x66[14:12] then 0x66[14:12]=010 */
840 } else if (space == 4) {
841 pkt_size += fm_bop_modify(FM_MAIN_CFG1, 0x8FFF, 0x4000, &buf[pkt_size], buf_size - pkt_size); /* clear 0x66[14:12] then 0x66[14:12]=100 */
842 }
843 /* disable wrap , if it is auto scan function, 0x66[11] 0=no wrarp, 1=wrap */
844 pkt_size += fm_bop_modify(FM_MAIN_CFG1, 0xF7FF, 0x0000, &buf[pkt_size], buf_size - pkt_size); /* 0x66[11] = 0, no wrap */
845 /* 0x66[9:0] freq upper bound */
846
847 max_freq = (max_freq - 6400) * 2 / 10;
848
849 pkt_size +=
850 fm_bop_modify(FM_MAIN_CFG1, 0xFC00, max_freq, &buf[pkt_size], buf_size - pkt_size);
851 /* 0x67[9:0] freq lower bound */
852
853 min_freq = (min_freq - 6400) * 2 / 10;
854
855 pkt_size +=
856 fm_bop_modify(FM_MAIN_CFG2, 0xFC00, min_freq, &buf[pkt_size], buf_size - pkt_size);
857 /* Enable hardware controlled scanning sequence */
858 pkt_size += fm_bop_modify(FM_MAIN_CTRL, 0xFFF8, SCAN, &buf[pkt_size], buf_size - pkt_size); /* 0x63[1] = 1 */
859 /* Wait for STC_DONE interrupt */
860 /* pkt_size += fm_bop_rd_until(FM_MAIN_INTR, FM_INTR_STC_DONE, FM_INTR_STC_DONE, &buf[pkt_size], buf_size - pkt_size);//Poll 69[0] = b'1 */
861 /* Write 1 clear the STC_DONE interrupt status flag */
862 /* pkt_size += fm_bop_modify(FM_MAIN_INTR, 0xFFFF, FM_INTR_STC_DONE, &buf[pkt_size], buf_size - pkt_size);//wr 69[0] = 1 */
863
864 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
865 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
866
867 return pkt_size;
868 }
869
870
871 fm_s32 mt6627_cqi_get(fm_u8 *buf, fm_s32 buf_size)
872 {
873 fm_s32 pkt_size = 0;
874
875 if (buf_size < TX_BUF_SIZE) {
876 return (-1);
877 }
878
879 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
880 buf[1] = FM_SCAN_OPCODE;
881 pkt_size = 4;
882
883 pkt_size += fm_bop_modify(FM_MAIN_CTRL, 0xFFF0, 0x0000, &buf[pkt_size], buf_size - pkt_size); /* wr 63 bit0~2 0 */
884 pkt_size += fm_bop_modify(FM_MAIN_CTRL, ~CQI_READ, CQI_READ, &buf[pkt_size], buf_size - pkt_size); /* wr 63 bit3 1 */
885
886 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
887 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
888
889 return pkt_size;
890 }
891
892
893 fm_s32 mt6627_get_reg(fm_u8 *buf, fm_s32 buf_size, fm_u8 addr)
894 {
895 if (buf_size < TX_BUF_SIZE) {
896 return (-1);
897 }
898
899 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
900 buf[1] = FSPI_READ_OPCODE;
901 buf[2] = 0x01;
902 buf[3] = 0x00;
903 buf[4] = addr;
904
905 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x\n", buf[0], buf[1], buf[2], buf[3],
906 buf[4]);
907 return 5;
908 }
909
910
911 fm_s32 mt6627_set_reg(fm_u8 *buf, fm_s32 buf_size, fm_u8 addr, fm_u16 value)
912 {
913 if (buf_size < TX_BUF_SIZE) {
914 return (-1);
915 }
916
917 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
918 buf[1] = FSPI_WRITE_OPCODE;
919 buf[2] = 0x03;
920 buf[3] = 0x00;
921 buf[4] = addr;
922 buf[5] = (fm_u8) ((value) & 0x00FF);
923 buf[6] = (fm_u8) ((value >> 8) & 0x00FF);
924
925 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x %02x %02x\n", buf[0], buf[1], buf[2],
926 buf[3], buf[4], buf[5], buf[6]);
927 return 7;
928 }
929
930
931 fm_s32 mt6627_set_bits_reg(fm_u8 *buf, fm_s32 buf_size, fm_u8 addr, fm_u16 bits, fm_u16 mask)
932 {
933 fm_s32 pkt_size = 0;
934 if (buf_size < TX_BUF_SIZE) {
935 return (-1);
936 }
937
938 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
939 buf[1] = 0x11; /* 0x11 this opcode won't be parsed as an opcode, so set here as spcial case. */
940 pkt_size = 4;
941 pkt_size += fm_bop_modify(addr, mask, bits, &buf[pkt_size], buf_size - pkt_size);
942
943 buf[2] = (fm_u8) ((pkt_size - 4) & 0x00FF);
944 buf[3] = (fm_u8) (((pkt_size - 4) >> 8) & 0x00FF);
945
946 return pkt_size;
947 }
948
949 /*top register read*/
950 fm_s32 mt6627_top_get_reg(fm_u8 *buf, fm_s32 buf_size, fm_u16 addr)
951 {
952 if (buf_size < TX_BUF_SIZE) {
953 return (-1);
954 }
955
956 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
957 buf[1] = CSPI_READ_OPCODE;
958 buf[2] = 0x03;
959 buf[3] = 0x00;
960 buf[4] = 0x04; /* top 04,fm 02 */
961 buf[5] = (fm_u8) ((addr) & 0x00FF);
962 buf[6] = (fm_u8) ((addr >> 8) & 0x00FF);
963
964 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x %02x %02x\n", buf[0], buf[1], buf[2],
965 buf[3], buf[4], buf[5], buf[6]);
966 return 7;
967 }
968
969
970 fm_s32 mt6627_top_set_reg(fm_u8 *buf, fm_s32 buf_size, fm_u16 addr, fm_u32 value)
971 {
972 if (buf_size < TX_BUF_SIZE) {
973 return (-1);
974 }
975
976 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
977 buf[1] = CSPI_WRITE_OPCODE;
978 buf[2] = 0x07;
979 buf[3] = 0x00;
980 buf[4] = 0x04; /* top 04,fm 02 */
981 buf[5] = (fm_u8) ((addr) & 0x00FF);
982 buf[6] = (fm_u8) ((addr >> 8) & 0x00FF);
983 buf[7] = (fm_u8) ((value) & 0x00FF);
984 buf[8] = (fm_u8) ((value >> 8) & 0x00FF);
985 buf[9] = (fm_u8) ((value >> 16) & 0x00FF);
986 buf[10] = (fm_u8) ((value >> 24) & 0x00FF);
987
988 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n", buf[0],
989 buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7], buf[8], buf[9], buf[10]);
990 return 11;
991 }
992
993 /*host register read*/
994 fm_s32 mt6627_host_get_reg(fm_u8 *buf, fm_s32 buf_size, fm_u32 addr)
995 {
996 if (buf_size < TX_BUF_SIZE) {
997 return (-1);
998 }
999
1000 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
1001 buf[1] = FM_HOST_READ_OPCODE;
1002 buf[2] = 0x04;
1003 buf[3] = 0x00;
1004 buf[4] = (fm_u8) ((addr) & 0x00FF);
1005 buf[5] = (fm_u8) ((addr >> 8) & 0x00FF);
1006 buf[6] = (fm_u8) ((addr >> 16) & 0x00FF);
1007 buf[7] = (fm_u8) ((addr >> 24) & 0x00FF);
1008
1009 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x %02x %02x %02x\n", buf[0], buf[1], buf[2],
1010 buf[3], buf[4], buf[5], buf[6], buf[7]);
1011 return 8;
1012 }
1013
1014
1015 fm_s32 mt6627_host_set_reg(fm_u8 *buf, fm_s32 buf_size, fm_u32 addr, fm_u32 value)
1016 {
1017 if (buf_size < TX_BUF_SIZE) {
1018 return (-1);
1019 }
1020
1021 buf[0] = FM_TASK_COMMAND_PKT_TYPE;
1022 buf[1] = FM_HOST_WRITE_OPCODE;
1023 buf[2] = 0x08;
1024 buf[3] = 0x00;
1025 buf[4] = (fm_u8) ((addr) & 0x00FF);
1026 buf[5] = (fm_u8) ((addr >> 8) & 0x00FF);
1027 buf[6] = (fm_u8) ((addr >> 16) & 0x00FF);
1028 buf[7] = (fm_u8) ((addr >> 24) & 0x00FF);
1029 buf[8] = (fm_u8) ((value) & 0x00FF);
1030 buf[9] = (fm_u8) ((value >> 8) & 0x00FF);
1031 buf[10] = (fm_u8) ((value >> 16) & 0x00FF);
1032 buf[11] = (fm_u8) ((value >> 24) & 0x00FF);
1033
1034 WCN_DBG(FM_DBG | CHIP, "%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
1035 buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7], buf[8], buf[9],
1036 buf[10], buf[11]);
1037 return 12;
1038 }
kernel source for telekom puls (alcatel/mediatek)