Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / tvp7002.c
1 /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
2 * Digitizer with Horizontal PLL registers
3 *
4 * Copyright (C) 2009 Texas Instruments Inc
5 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
6 *
7 * This code is partially based upon the TVP5150 driver
8 * written by Mauro Carvalho Chehab (mchehab@infradead.org),
9 * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
10 * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
11 * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27 #include <linux/delay.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/videodev2.h>
31 #include <media/tvp7002.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-chip-ident.h>
34 #include <media/v4l2-common.h>
35 #include "tvp7002_reg.h"
36
37 MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
38 MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>");
39 MODULE_LICENSE("GPL");
40
41 /* Module Name */
42 #define TVP7002_MODULE_NAME "tvp7002"
43
44 /* I2C retry attempts */
45 #define I2C_RETRY_COUNT (5)
46
47 /* End of registers */
48 #define TVP7002_EOR 0x5c
49
50 /* Read write definition for registers */
51 #define TVP7002_READ 0
52 #define TVP7002_WRITE 1
53 #define TVP7002_RESERVED 2
54
55 /* Interlaced vs progressive mask and shift */
56 #define TVP7002_IP_SHIFT 5
57 #define TVP7002_INPR_MASK (0x01 << TVP7002_IP_SHIFT)
58
59 /* Shift for CPL and LPF registers */
60 #define TVP7002_CL_SHIFT 8
61 #define TVP7002_CL_MASK 0x0f
62
63 /* Debug functions */
64 static int debug;
65 module_param(debug, bool, 0644);
66 MODULE_PARM_DESC(debug, "Debug level (0-2)");
67
68 /* Structure for register values */
69 struct i2c_reg_value {
70 u8 reg;
71 u8 value;
72 u8 type;
73 };
74
75 /*
76 * Register default values (according to tvp7002 datasheet)
77 * In the case of read-only registers, the value (0xff) is
78 * never written. R/W functionality is controlled by the
79 * writable bit in the register struct definition.
80 */
81 static const struct i2c_reg_value tvp7002_init_default[] = {
82 { TVP7002_CHIP_REV, 0xff, TVP7002_READ },
83 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
84 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
85 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
86 { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
87 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
88 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
89 { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
90 { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
91 { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
92 { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
93 { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
94 { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
95 { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
96 { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
97 { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
98 { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
99 { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
100 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
101 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
102 { TVP7002_SYNC_DETECT_STAT, 0xff, TVP7002_READ },
103 { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE },
104 { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE },
105 { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE },
106 { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE },
107 { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE },
108 { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE },
109 { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE },
110 { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE },
111 { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE },
112 { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE },
113 { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE },
114 { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE },
115 { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE },
116 { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE },
117 { TVP7002_B_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
118 { TVP7002_G_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
119 { TVP7002_R_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
120 { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE },
121 { TVP7002_DGTL_ALC_OUT_MSBS, 0xff, TVP7002_READ },
122 { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE },
123 { 0x29, 0x08, TVP7002_RESERVED },
124 { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE },
125 /* PWR_CTL is controlled only by the probe and reset functions */
126 { TVP7002_PWR_CTL, 0x00, TVP7002_RESERVED },
127 { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE },
128 { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
129 { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE },
130 { TVP7002_RGB_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
131 { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE },
132 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
133 { 0x32, 0x18, TVP7002_RESERVED },
134 { 0x33, 0x60, TVP7002_RESERVED },
135 { TVP7002_MVIS_STRIPPER_W, 0xff, TVP7002_RESERVED },
136 { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE },
137 { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE },
138 { TVP7002_L_FRAME_STAT_LSBS, 0xff, TVP7002_READ },
139 { TVP7002_L_FRAME_STAT_MSBS, 0xff, TVP7002_READ },
140 { TVP7002_CLK_L_STAT_LSBS, 0xff, TVP7002_READ },
141 { TVP7002_CLK_L_STAT_MSBS, 0xff, TVP7002_READ },
142 { TVP7002_HSYNC_W, 0xff, TVP7002_READ },
143 { TVP7002_VSYNC_W, 0xff, TVP7002_READ },
144 { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE },
145 { 0x3e, 0x60, TVP7002_RESERVED },
146 { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE },
147 { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE },
148 { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
149 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE },
150 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
151 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
152 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
153 { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE },
154 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
155 { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
156 { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
157 { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE },
158 { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE },
159 { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE },
160 { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE },
161 { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE },
162 { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE },
163 { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE },
164 { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE },
165 { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE },
166 { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE },
167 { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE },
168 { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE },
169 { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE },
170 { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE },
171 { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE },
172 { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE },
173 { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE },
174 { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE },
175 /* This signals end of register values */
176 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
177 };
178
179 /* Register parameters for 480P */
180 static const struct i2c_reg_value tvp7002_parms_480P[] = {
181 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
182 { TVP7002_HPLL_FDBK_DIV_LSBS, 0xa0, TVP7002_WRITE },
183 { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
184 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
185 { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
186 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
187 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE },
188 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
189 { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE },
190 { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE },
191 { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE },
192 { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE },
193 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
194 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
195 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
196 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
197 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
198 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
199 };
200
201 /* Register parameters for 576P */
202 static const struct i2c_reg_value tvp7002_parms_576P[] = {
203 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE },
204 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
205 { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE },
206 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
207 { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE },
208 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
209 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE },
210 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
211 { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
212 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
213 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
214 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
215 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
216 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
217 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
218 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
219 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
220 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
221 };
222
223 /* Register parameters for 1080I60 */
224 static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
225 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
226 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
227 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
228 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
229 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
230 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
231 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
232 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
233 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
234 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
235 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
236 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
237 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
238 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
239 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
240 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
241 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
242 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
243 };
244
245 /* Register parameters for 1080P60 */
246 static const struct i2c_reg_value tvp7002_parms_1080P60[] = {
247 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
248 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
249 { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
250 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
251 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
252 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
253 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
254 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
255 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
256 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
257 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
258 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
259 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
260 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
261 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
262 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
263 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
264 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
265 };
266
267 /* Register parameters for 1080I50 */
268 static const struct i2c_reg_value tvp7002_parms_1080I50[] = {
269 { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE },
270 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
271 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
272 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
273 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
274 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
275 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
276 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
277 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
278 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
279 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
280 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
281 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
282 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
283 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
284 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
285 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
286 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
287 };
288
289 /* Register parameters for 720P60 */
290 static const struct i2c_reg_value tvp7002_parms_720P60[] = {
291 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
292 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
293 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
294 { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
295 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
296 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
297 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
298 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
299 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
300 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
301 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
302 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
303 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
304 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
305 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
306 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
307 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
308 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
309 };
310
311 /* Register parameters for 720P50 */
312 static const struct i2c_reg_value tvp7002_parms_720P50[] = {
313 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
314 { TVP7002_HPLL_FDBK_DIV_LSBS, 0xc0, TVP7002_WRITE },
315 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
316 { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
317 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
318 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
319 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
320 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
321 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
322 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
323 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
324 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
325 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
326 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
327 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
328 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
329 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
330 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
331 };
332
333 /* Preset definition for handling device operation */
334 struct tvp7002_preset_definition {
335 u32 preset;
336 const struct i2c_reg_value *p_settings;
337 enum v4l2_colorspace color_space;
338 enum v4l2_field scanmode;
339 u16 progressive;
340 u16 lines_per_frame;
341 u16 cpl_min;
342 u16 cpl_max;
343 };
344
345 /* Struct list for digital video presets */
346 static const struct tvp7002_preset_definition tvp7002_presets[] = {
347 {
348 V4L2_DV_720P60,
349 tvp7002_parms_720P60,
350 V4L2_COLORSPACE_REC709,
351 V4L2_FIELD_NONE,
352 1,
353 0x2EE,
354 135,
355 153
356 },
357 {
358 V4L2_DV_1080I60,
359 tvp7002_parms_1080I60,
360 V4L2_COLORSPACE_REC709,
361 V4L2_FIELD_INTERLACED,
362 0,
363 0x465,
364 181,
365 205
366 },
367 {
368 V4L2_DV_1080I50,
369 tvp7002_parms_1080I50,
370 V4L2_COLORSPACE_REC709,
371 V4L2_FIELD_INTERLACED,
372 0,
373 0x465,
374 217,
375 245
376 },
377 {
378 V4L2_DV_720P50,
379 tvp7002_parms_720P50,
380 V4L2_COLORSPACE_REC709,
381 V4L2_FIELD_NONE,
382 1,
383 0x2EE,
384 163,
385 183
386 },
387 {
388 V4L2_DV_1080P60,
389 tvp7002_parms_1080P60,
390 V4L2_COLORSPACE_REC709,
391 V4L2_FIELD_NONE,
392 1,
393 0x465,
394 90,
395 102
396 },
397 {
398 V4L2_DV_480P59_94,
399 tvp7002_parms_480P,
400 V4L2_COLORSPACE_SMPTE170M,
401 V4L2_FIELD_NONE,
402 1,
403 0x20D,
404 0xffff,
405 0xffff
406 },
407 {
408 V4L2_DV_576P50,
409 tvp7002_parms_576P,
410 V4L2_COLORSPACE_SMPTE170M,
411 V4L2_FIELD_NONE,
412 1,
413 0x271,
414 0xffff,
415 0xffff
416 }
417 };
418
419 #define NUM_PRESETS ARRAY_SIZE(tvp7002_presets)
420
421 /* Device definition */
422 struct tvp7002 {
423 struct v4l2_subdev sd;
424 const struct tvp7002_config *pdata;
425
426 int ver;
427 int streaming;
428
429 const struct tvp7002_preset_definition *current_preset;
430 u8 gain;
431 };
432
433 /*
434 * to_tvp7002 - Obtain device handler TVP7002
435 * @sd: ptr to v4l2_subdev struct
436 *
437 * Returns device handler tvp7002.
438 */
439 static inline struct tvp7002 *to_tvp7002(struct v4l2_subdev *sd)
440 {
441 return container_of(sd, struct tvp7002, sd);
442 }
443
444 /*
445 * tvp7002_read - Read a value from a register in an TVP7002
446 * @sd: ptr to v4l2_subdev struct
447 * @addr: TVP7002 register address
448 * @dst: pointer to 8-bit destination
449 *
450 * Returns value read if successful, or non-zero (-1) otherwise.
451 */
452 static int tvp7002_read(struct v4l2_subdev *sd, u8 addr, u8 *dst)
453 {
454 struct i2c_client *c = v4l2_get_subdevdata(sd);
455 int retry;
456 int error;
457
458 for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
459 error = i2c_smbus_read_byte_data(c, addr);
460
461 if (error >= 0) {
462 *dst = (u8)error;
463 return 0;
464 }
465
466 msleep_interruptible(10);
467 }
468 v4l2_err(sd, "TVP7002 read error %d\n", error);
469 return error;
470 }
471
472 /*
473 * tvp7002_read_err() - Read a register value with error code
474 * @sd: pointer to standard V4L2 sub-device structure
475 * @reg: destination register
476 * @val: value to be read
477 * @err: pointer to error value
478 *
479 * Read a value in a register and save error value in pointer.
480 * Also update the register table if successful
481 */
482 static inline void tvp7002_read_err(struct v4l2_subdev *sd, u8 reg,
483 u8 *dst, int *err)
484 {
485 if (!*err)
486 *err = tvp7002_read(sd, reg, dst);
487 }
488
489 /*
490 * tvp7002_write() - Write a value to a register in TVP7002
491 * @sd: ptr to v4l2_subdev struct
492 * @addr: TVP7002 register address
493 * @value: value to be written to the register
494 *
495 * Write a value to a register in an TVP7002 decoder device.
496 * Returns zero if successful, or non-zero otherwise.
497 */
498 static int tvp7002_write(struct v4l2_subdev *sd, u8 addr, u8 value)
499 {
500 struct i2c_client *c;
501 int retry;
502 int error;
503
504 c = v4l2_get_subdevdata(sd);
505
506 for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
507 error = i2c_smbus_write_byte_data(c, addr, value);
508
509 if (error >= 0)
510 return 0;
511
512 v4l2_warn(sd, "Write: retry ... %d\n", retry);
513 msleep_interruptible(10);
514 }
515 v4l2_err(sd, "TVP7002 write error %d\n", error);
516 return error;
517 }
518
519 /*
520 * tvp7002_write_err() - Write a register value with error code
521 * @sd: pointer to standard V4L2 sub-device structure
522 * @reg: destination register
523 * @val: value to be written
524 * @err: pointer to error value
525 *
526 * Write a value in a register and save error value in pointer.
527 * Also update the register table if successful
528 */
529 static inline void tvp7002_write_err(struct v4l2_subdev *sd, u8 reg,
530 u8 val, int *err)
531 {
532 if (!*err)
533 *err = tvp7002_write(sd, reg, val);
534 }
535
536 /*
537 * tvp7002_g_chip_ident() - Get chip identification number
538 * @sd: ptr to v4l2_subdev struct
539 * @chip: ptr to v4l2_dbg_chip_ident struct
540 *
541 * Obtains the chip's identification number.
542 * Returns zero or -EINVAL if read operation fails.
543 */
544 static int tvp7002_g_chip_ident(struct v4l2_subdev *sd,
545 struct v4l2_dbg_chip_ident *chip)
546 {
547 u8 rev;
548 int error;
549 struct i2c_client *client = v4l2_get_subdevdata(sd);
550
551 error = tvp7002_read(sd, TVP7002_CHIP_REV, &rev);
552
553 if (error < 0)
554 return error;
555
556 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP7002, rev);
557 }
558
559 /*
560 * tvp7002_write_inittab() - Write initialization values
561 * @sd: ptr to v4l2_subdev struct
562 * @regs: ptr to i2c_reg_value struct
563 *
564 * Write initialization values.
565 * Returns zero or -EINVAL if read operation fails.
566 */
567 static int tvp7002_write_inittab(struct v4l2_subdev *sd,
568 const struct i2c_reg_value *regs)
569 {
570 int error = 0;
571
572 /* Initialize the first (defined) registers */
573 while (TVP7002_EOR != regs->reg) {
574 if (TVP7002_WRITE == regs->type)
575 tvp7002_write_err(sd, regs->reg, regs->value, &error);
576 regs++;
577 }
578
579 return error;
580 }
581
582 /*
583 * tvp7002_s_dv_preset() - Set digital video preset
584 * @sd: ptr to v4l2_subdev struct
585 * @dv_preset: ptr to v4l2_dv_preset struct
586 *
587 * Set the digital video preset for a TVP7002 decoder device.
588 * Returns zero when successful or -EINVAL if register access fails.
589 */
590 static int tvp7002_s_dv_preset(struct v4l2_subdev *sd,
591 struct v4l2_dv_preset *dv_preset)
592 {
593 struct tvp7002 *device = to_tvp7002(sd);
594 u32 preset;
595 int i;
596
597 for (i = 0; i < NUM_PRESETS; i++) {
598 preset = tvp7002_presets[i].preset;
599 if (preset == dv_preset->preset) {
600 device->current_preset = &tvp7002_presets[i];
601 return tvp7002_write_inittab(sd, tvp7002_presets[i].p_settings);
602 }
603 }
604
605 return -EINVAL;
606 }
607
608 /*
609 * tvp7002_g_ctrl() - Get a control
610 * @sd: ptr to v4l2_subdev struct
611 * @ctrl: ptr to v4l2_control struct
612 *
613 * Get a control for a TVP7002 decoder device.
614 * Returns zero when successful or -EINVAL if register access fails.
615 */
616 static int tvp7002_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
617 {
618 struct tvp7002 *device = to_tvp7002(sd);
619
620 switch (ctrl->id) {
621 case V4L2_CID_GAIN:
622 ctrl->value = device->gain;
623 return 0;
624 default:
625 return -EINVAL;
626 }
627 }
628
629 /*
630 * tvp7002_s_ctrl() - Set a control
631 * @sd: ptr to v4l2_subdev struct
632 * @ctrl: ptr to v4l2_control struct
633 *
634 * Set a control in TVP7002 decoder device.
635 * Returns zero when successful or -EINVAL if register access fails.
636 */
637 static int tvp7002_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
638 {
639 struct tvp7002 *device = to_tvp7002(sd);
640 int error = 0;
641
642 switch (ctrl->id) {
643 case V4L2_CID_GAIN:
644 tvp7002_write_err(sd, TVP7002_R_FINE_GAIN,
645 ctrl->value & 0xff, &error);
646 tvp7002_write_err(sd, TVP7002_G_FINE_GAIN,
647 ctrl->value & 0xff, &error);
648 tvp7002_write_err(sd, TVP7002_B_FINE_GAIN,
649 ctrl->value & 0xff, &error);
650
651 if (error < 0)
652 return error;
653
654 /* Set only after knowing there is no error */
655 device->gain = ctrl->value & 0xff;
656 return 0;
657 default:
658 return -EINVAL;
659 }
660 }
661
662 /*
663 * tvp7002_queryctrl() - Query a control
664 * @sd: ptr to v4l2_subdev struct
665 * @qc: ptr to v4l2_queryctrl struct
666 *
667 * Query a control of a TVP7002 decoder device.
668 * Returns zero when successful or -EINVAL if register read fails.
669 */
670 static int tvp7002_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
671 {
672 switch (qc->id) {
673 case V4L2_CID_GAIN:
674 /*
675 * Gain is supported [0-255, default=0, step=1]
676 */
677 return v4l2_ctrl_query_fill(qc, 0, 255, 1, 0);
678 default:
679 return -EINVAL;
680 }
681 }
682
683 /*
684 * tvp7002_mbus_fmt() - V4L2 decoder interface handler for try/s/g_mbus_fmt
685 * @sd: pointer to standard V4L2 sub-device structure
686 * @f: pointer to mediabus format structure
687 *
688 * Negotiate the image capture size and mediabus format.
689 * There is only one possible format, so this single function works for
690 * get, set and try.
691 */
692 static int tvp7002_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *f)
693 {
694 struct tvp7002 *device = to_tvp7002(sd);
695 struct v4l2_dv_enum_preset e_preset;
696 int error;
697
698 /* Calculate height and width based on current standard */
699 error = v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset);
700 if (error)
701 return error;
702
703 f->width = e_preset.width;
704 f->height = e_preset.height;
705 f->code = V4L2_MBUS_FMT_YUYV10_1X20;
706 f->field = device->current_preset->scanmode;
707 f->colorspace = device->current_preset->color_space;
708
709 v4l2_dbg(1, debug, sd, "MBUS_FMT: Width - %d, Height - %d",
710 f->width, f->height);
711 return 0;
712 }
713
714 /*
715 * tvp7002_query_dv_preset() - query DV preset
716 * @sd: pointer to standard V4L2 sub-device structure
717 * @qpreset: standard V4L2 v4l2_dv_preset structure
718 *
719 * Returns the current DV preset by TVP7002. If no active input is
720 * detected, returns -EINVAL
721 */
722 static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,
723 struct v4l2_dv_preset *qpreset)
724 {
725 const struct tvp7002_preset_definition *presets = tvp7002_presets;
726 struct tvp7002 *device;
727 u8 progressive;
728 u32 lpfr;
729 u32 cpln;
730 int error = 0;
731 u8 lpf_lsb;
732 u8 lpf_msb;
733 u8 cpl_lsb;
734 u8 cpl_msb;
735 int index;
736
737 device = to_tvp7002(sd);
738
739 /* Read standards from device registers */
740 tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &lpf_lsb, &error);
741 tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_MSBS, &lpf_msb, &error);
742
743 if (error < 0)
744 return error;
745
746 tvp7002_read_err(sd, TVP7002_CLK_L_STAT_LSBS, &cpl_lsb, &error);
747 tvp7002_read_err(sd, TVP7002_CLK_L_STAT_MSBS, &cpl_msb, &error);
748
749 if (error < 0)
750 return error;
751
752 /* Get lines per frame, clocks per line and interlaced/progresive */
753 lpfr = lpf_lsb | ((TVP7002_CL_MASK & lpf_msb) << TVP7002_CL_SHIFT);
754 cpln = cpl_lsb | ((TVP7002_CL_MASK & cpl_msb) << TVP7002_CL_SHIFT);
755 progressive = (lpf_msb & TVP7002_INPR_MASK) >> TVP7002_IP_SHIFT;
756
757 /* Do checking of video modes */
758 for (index = 0; index < NUM_PRESETS; index++, presets++)
759 if (lpfr == presets->lines_per_frame &&
760 progressive == presets->progressive) {
761 if (presets->cpl_min == 0xffff)
762 break;
763 if (cpln >= presets->cpl_min && cpln <= presets->cpl_max)
764 break;
765 }
766
767 if (index == NUM_PRESETS) {
768 v4l2_dbg(1, debug, sd, "detection failed: lpf = %x, cpl = %x\n",
769 lpfr, cpln);
770 /* Could not detect a signal, so return the 'invalid' preset */
771 qpreset->preset = V4L2_DV_INVALID;
772 return 0;
773 }
774
775 /* Set values in found preset */
776 qpreset->preset = presets->preset;
777
778 /* Update lines per frame and clocks per line info */
779 v4l2_dbg(1, debug, sd, "detected preset: %d\n", presets->preset);
780 return 0;
781 }
782
783 #ifdef CONFIG_VIDEO_ADV_DEBUG
784 /*
785 * tvp7002_g_register() - Get the value of a register
786 * @sd: ptr to v4l2_subdev struct
787 * @reg: ptr to v4l2_dbg_register struct
788 *
789 * Get the value of a TVP7002 decoder device register.
790 * Returns zero when successful, -EINVAL if register read fails or
791 * access to I2C client fails, -EPERM if the call is not allowed
792 * by diabled CAP_SYS_ADMIN.
793 */
794 static int tvp7002_g_register(struct v4l2_subdev *sd,
795 struct v4l2_dbg_register *reg)
796 {
797 struct i2c_client *client = v4l2_get_subdevdata(sd);
798 u8 val;
799 int ret;
800
801 if (!v4l2_chip_match_i2c_client(client, &reg->match))
802 return -EINVAL;
803 if (!capable(CAP_SYS_ADMIN))
804 return -EPERM;
805
806 ret = tvp7002_read(sd, reg->reg & 0xff, &val);
807 reg->val = val;
808 return ret;
809 }
810
811 /*
812 * tvp7002_s_register() - set a control
813 * @sd: ptr to v4l2_subdev struct
814 * @reg: ptr to v4l2_dbg_register struct
815 *
816 * Get the value of a TVP7002 decoder device register.
817 * Returns zero when successful, -EINVAL if register read fails or
818 * -EPERM if call not allowed.
819 */
820 static int tvp7002_s_register(struct v4l2_subdev *sd,
821 struct v4l2_dbg_register *reg)
822 {
823 struct i2c_client *client = v4l2_get_subdevdata(sd);
824
825 if (!v4l2_chip_match_i2c_client(client, &reg->match))
826 return -EINVAL;
827 if (!capable(CAP_SYS_ADMIN))
828 return -EPERM;
829
830 return tvp7002_write(sd, reg->reg & 0xff, reg->val & 0xff);
831 }
832 #endif
833
834 /*
835 * tvp7002_enum_mbus_fmt() - Enum supported mediabus formats
836 * @sd: pointer to standard V4L2 sub-device structure
837 * @index: format index
838 * @code: pointer to mediabus format
839 *
840 * Enumerate supported mediabus formats.
841 */
842
843 static int tvp7002_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
844 enum v4l2_mbus_pixelcode *code)
845 {
846 /* Check requested format index is within range */
847 if (index)
848 return -EINVAL;
849 *code = V4L2_MBUS_FMT_YUYV10_1X20;
850 return 0;
851 }
852
853 /*
854 * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream
855 * @sd: pointer to standard V4L2 sub-device structure
856 * @enable: streaming enable or disable
857 *
858 * Sets streaming to enable or disable, if possible.
859 */
860 static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable)
861 {
862 struct tvp7002 *device = to_tvp7002(sd);
863 int error = 0;
864
865 if (device->streaming == enable)
866 return 0;
867
868 if (enable) {
869 /* Set output state on (low impedance means stream on) */
870 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x00);
871 device->streaming = enable;
872 } else {
873 /* Set output state off (high impedance means stream off) */
874 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x03);
875 if (error)
876 v4l2_dbg(1, debug, sd, "Unable to stop streaming\n");
877
878 device->streaming = enable;
879 }
880
881 return error;
882 }
883
884 /*
885 * tvp7002_log_status() - Print information about register settings
886 * @sd: ptr to v4l2_subdev struct
887 *
888 * Log register values of a TVP7002 decoder device.
889 * Returns zero or -EINVAL if read operation fails.
890 */
891 static int tvp7002_log_status(struct v4l2_subdev *sd)
892 {
893 const struct tvp7002_preset_definition *presets = tvp7002_presets;
894 struct tvp7002 *device = to_tvp7002(sd);
895 struct v4l2_dv_enum_preset e_preset;
896 struct v4l2_dv_preset detected;
897 int i;
898
899 detected.preset = V4L2_DV_INVALID;
900 /* Find my current standard*/
901 tvp7002_query_dv_preset(sd, &detected);
902
903 /* Print standard related code values */
904 for (i = 0; i < NUM_PRESETS; i++, presets++)
905 if (presets->preset == detected.preset)
906 break;
907
908 if (v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset))
909 return -EINVAL;
910
911 v4l2_info(sd, "Selected DV Preset: %s\n", e_preset.name);
912 v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
913 v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
914 if (i == NUM_PRESETS) {
915 v4l2_info(sd, "Detected DV Preset: None\n");
916 } else {
917 if (v4l_fill_dv_preset_info(presets->preset, &e_preset))
918 return -EINVAL;
919 v4l2_info(sd, "Detected DV Preset: %s\n", e_preset.name);
920 v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
921 v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
922 }
923 v4l2_info(sd, "Streaming enabled: %s\n",
924 device->streaming ? "yes" : "no");
925
926 /* Print the current value of the gain control */
927 v4l2_info(sd, "Gain: %u\n", device->gain);
928
929 return 0;
930 }
931
932 /*
933 * tvp7002_enum_dv_presets() - Enum supported digital video formats
934 * @sd: pointer to standard V4L2 sub-device structure
935 * @preset: pointer to format struct
936 *
937 * Enumerate supported digital video formats.
938 */
939 static int tvp7002_enum_dv_presets(struct v4l2_subdev *sd,
940 struct v4l2_dv_enum_preset *preset)
941 {
942 /* Check requested format index is within range */
943 if (preset->index >= NUM_PRESETS)
944 return -EINVAL;
945
946 return v4l_fill_dv_preset_info(tvp7002_presets[preset->index].preset, preset);
947 }
948
949 /* V4L2 core operation handlers */
950 static const struct v4l2_subdev_core_ops tvp7002_core_ops = {
951 .g_chip_ident = tvp7002_g_chip_ident,
952 .log_status = tvp7002_log_status,
953 .g_ctrl = tvp7002_g_ctrl,
954 .s_ctrl = tvp7002_s_ctrl,
955 .queryctrl = tvp7002_queryctrl,
956 #ifdef CONFIG_VIDEO_ADV_DEBUG
957 .g_register = tvp7002_g_register,
958 .s_register = tvp7002_s_register,
959 #endif
960 };
961
962 /* Specific video subsystem operation handlers */
963 static const struct v4l2_subdev_video_ops tvp7002_video_ops = {
964 .enum_dv_presets = tvp7002_enum_dv_presets,
965 .s_dv_preset = tvp7002_s_dv_preset,
966 .query_dv_preset = tvp7002_query_dv_preset,
967 .s_stream = tvp7002_s_stream,
968 .g_mbus_fmt = tvp7002_mbus_fmt,
969 .try_mbus_fmt = tvp7002_mbus_fmt,
970 .s_mbus_fmt = tvp7002_mbus_fmt,
971 .enum_mbus_fmt = tvp7002_enum_mbus_fmt,
972 };
973
974 /* V4L2 top level operation handlers */
975 static const struct v4l2_subdev_ops tvp7002_ops = {
976 .core = &tvp7002_core_ops,
977 .video = &tvp7002_video_ops,
978 };
979
980 static struct tvp7002 tvp7002_dev = {
981 .streaming = 0,
982 .current_preset = tvp7002_presets,
983 .gain = 0,
984 };
985
986 /*
987 * tvp7002_probe - Probe a TVP7002 device
988 * @c: ptr to i2c_client struct
989 * @id: ptr to i2c_device_id struct
990 *
991 * Initialize the TVP7002 device
992 * Returns zero when successful, -EINVAL if register read fails or
993 * -EIO if i2c access is not available.
994 */
995 static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
996 {
997 struct v4l2_subdev *sd;
998 struct tvp7002 *device;
999 struct v4l2_dv_preset preset;
1000 int polarity_a;
1001 int polarity_b;
1002 u8 revision;
1003
1004 int error;
1005
1006 /* Check if the adapter supports the needed features */
1007 if (!i2c_check_functionality(c->adapter,
1008 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
1009 return -EIO;
1010
1011 if (!c->dev.platform_data) {
1012 v4l_err(c, "No platform data!!\n");
1013 return -ENODEV;
1014 }
1015
1016 device = kmalloc(sizeof(struct tvp7002), GFP_KERNEL);
1017
1018 if (!device)
1019 return -ENOMEM;
1020
1021 *device = tvp7002_dev;
1022 sd = &device->sd;
1023 device->pdata = c->dev.platform_data;
1024
1025 /* Tell v4l2 the device is ready */
1026 v4l2_i2c_subdev_init(sd, c, &tvp7002_ops);
1027 v4l_info(c, "tvp7002 found @ 0x%02x (%s)\n",
1028 c->addr, c->adapter->name);
1029
1030 error = tvp7002_read(sd, TVP7002_CHIP_REV, &revision);
1031 if (error < 0)
1032 goto found_error;
1033
1034 /* Get revision number */
1035 v4l2_info(sd, "Rev. %02x detected.\n", revision);
1036 if (revision != 0x02)
1037 v4l2_info(sd, "Unknown revision detected.\n");
1038
1039 /* Initializes TVP7002 to its default values */
1040 error = tvp7002_write_inittab(sd, tvp7002_init_default);
1041
1042 if (error < 0)
1043 goto found_error;
1044
1045 /* Set polarity information after registers have been set */
1046 polarity_a = 0x20 | device->pdata->hs_polarity << 5
1047 | device->pdata->vs_polarity << 2;
1048 error = tvp7002_write(sd, TVP7002_SYNC_CTL_1, polarity_a);
1049 if (error < 0)
1050 goto found_error;
1051
1052 polarity_b = 0x01 | device->pdata->fid_polarity << 2
1053 | device->pdata->sog_polarity << 1
1054 | device->pdata->clk_polarity;
1055 error = tvp7002_write(sd, TVP7002_MISC_CTL_3, polarity_b);
1056 if (error < 0)
1057 goto found_error;
1058
1059 /* Set registers according to default video mode */
1060 preset.preset = device->current_preset->preset;
1061 error = tvp7002_s_dv_preset(sd, &preset);
1062
1063 found_error:
1064 if (error < 0)
1065 kfree(device);
1066
1067 return error;
1068 }
1069
1070 /*
1071 * tvp7002_remove - Remove TVP7002 device support
1072 * @c: ptr to i2c_client struct
1073 *
1074 * Reset the TVP7002 device
1075 * Returns zero.
1076 */
1077 static int tvp7002_remove(struct i2c_client *c)
1078 {
1079 struct v4l2_subdev *sd = i2c_get_clientdata(c);
1080 struct tvp7002 *device = to_tvp7002(sd);
1081
1082 v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter"
1083 "on address 0x%x\n", c->addr);
1084
1085 v4l2_device_unregister_subdev(sd);
1086 kfree(device);
1087 return 0;
1088 }
1089
1090 /* I2C Device ID table */
1091 static const struct i2c_device_id tvp7002_id[] = {
1092 { "tvp7002", 0 },
1093 { }
1094 };
1095 MODULE_DEVICE_TABLE(i2c, tvp7002_id);
1096
1097 /* I2C driver data */
1098 static struct i2c_driver tvp7002_driver = {
1099 .driver = {
1100 .owner = THIS_MODULE,
1101 .name = TVP7002_MODULE_NAME,
1102 },
1103 .probe = tvp7002_probe,
1104 .remove = tvp7002_remove,
1105 .id_table = tvp7002_id,
1106 };
1107
1108 /*
1109 * tvp7002_init - Initialize driver via I2C interface
1110 *
1111 * Register the TVP7002 driver.
1112 * Return 0 on success or error code on failure.
1113 */
1114 static int __init tvp7002_init(void)
1115 {
1116 return i2c_add_driver(&tvp7002_driver);
1117 }
1118
1119 /*
1120 * tvp7002_exit - Remove driver via I2C interface
1121 *
1122 * Unregister the TVP7002 driver.
1123 * Returns nothing.
1124 */
1125 static void __exit tvp7002_exit(void)
1126 {
1127 i2c_del_driver(&tvp7002_driver);
1128 }
1129
1130 module_init(tvp7002_init);
1131 module_exit(tvp7002_exit);