2 * saa7114 - Philips SAA7114H video decoder driver version 0.0.1
4 * Copyright (C) 2002 Maxim Yevtyushkin <max@linuxmedialabs.com>
6 * Based on saa7111 driver by Dave Perks
8 * Copyright (C) 1998 Dave Perks <dperks@ibm.net>
10 * Slight changes for video timing and attachment output by
11 * Wolfgang Scherr <scherr@net4you.net>
13 * Changes by Ronald Bultje <rbultje@ronald.bitfreak.net>
14 * - moved over to linux>=2.4.x i2c protocol (1/1/2003)
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 #include <linux/module.h>
32 #include <linux/types.h>
33 #include <linux/ioctl.h>
34 #include <asm/uaccess.h>
35 #include <linux/i2c.h>
36 #include <linux/i2c-id.h>
37 #include <linux/videodev.h>
38 #include <linux/video_decoder.h>
39 #include <media/v4l2-common.h>
40 #include <media/v4l2-i2c-drv-legacy.h>
42 MODULE_DESCRIPTION("Philips SAA7114H video decoder driver");
43 MODULE_AUTHOR("Maxim Yevtyushkin");
44 MODULE_LICENSE("GPL");
47 module_param(debug
, int, 0);
48 MODULE_PARM_DESC(debug
, "Debug level (0-1)");
50 /* ----------------------------------------------------------------------- */
53 unsigned char reg
[0xf0 * 2];
68 //#define SAA_7114_NTSC_HSYNC_START (-3)
69 //#define SAA_7114_NTSC_HSYNC_STOP (-18)
71 #define SAA_7114_NTSC_HSYNC_START (-17)
72 #define SAA_7114_NTSC_HSYNC_STOP (-32)
74 //#define SAA_7114_NTSC_HOFFSET (5)
75 #define SAA_7114_NTSC_HOFFSET (6)
76 #define SAA_7114_NTSC_VOFFSET (10)
77 #define SAA_7114_NTSC_WIDTH (720)
78 #define SAA_7114_NTSC_HEIGHT (250)
80 #define SAA_7114_SECAM_HSYNC_START (-17)
81 #define SAA_7114_SECAM_HSYNC_STOP (-32)
83 #define SAA_7114_SECAM_HOFFSET (2)
84 #define SAA_7114_SECAM_VOFFSET (10)
85 #define SAA_7114_SECAM_WIDTH (720)
86 #define SAA_7114_SECAM_HEIGHT (300)
88 #define SAA_7114_PAL_HSYNC_START (-17)
89 #define SAA_7114_PAL_HSYNC_STOP (-32)
91 #define SAA_7114_PAL_HOFFSET (2)
92 #define SAA_7114_PAL_VOFFSET (10)
93 #define SAA_7114_PAL_WIDTH (720)
94 #define SAA_7114_PAL_HEIGHT (300)
98 #define SAA_7114_VERTICAL_CHROMA_OFFSET 0 //0x50504040
99 #define SAA_7114_VERTICAL_LUMA_OFFSET 0
101 #define REG_ADDR(x) (((x) << 1) + 1)
102 #define LOBYTE(x) ((unsigned char)((x) & 0xff))
103 #define HIBYTE(x) ((unsigned char)(((x) >> 8) & 0xff))
104 #define LOWORD(x) ((unsigned short int)((x) & 0xffff))
105 #define HIWORD(x) ((unsigned short int)(((x) >> 16) & 0xffff))
108 /* ----------------------------------------------------------------------- */
110 static inline int saa7114_write(struct i2c_client
*client
, u8 reg
, u8 value
)
112 return i2c_smbus_write_byte_data(client
, reg
, value
);
115 static int saa7114_write_block(struct i2c_client
*client
, const u8
*data
, unsigned int len
)
120 /* the saa7114 has an autoincrement function, use it if
121 * the adapter understands raw I2C */
122 if (i2c_check_functionality(client
->adapter
, I2C_FUNC_I2C
)) {
123 /* do raw I2C, not smbus compatible */
129 block_data
[block_len
++] = reg
= data
[0];
131 block_data
[block_len
++] = data
[1];
135 } while (len
>= 2 && data
[0] == reg
&& block_len
< 32);
136 ret
= i2c_master_send(client
, block_data
, block_len
);
141 /* do some slow I2C emulation kind of thing */
144 ret
= saa7114_write(client
, reg
, *data
++);
154 static inline int saa7114_read(struct i2c_client
*client
, u8 reg
)
156 return i2c_smbus_read_byte_data(client
, reg
);
159 /* ----------------------------------------------------------------------- */
161 // initially set NTSC, composite
164 static const unsigned char init
[] = {
165 0x00, 0x00, /* 00 - ID byte , chip version,
167 0x01, 0x08, /* 01 - X,X,X,X, IDEL3 to IDEL0 -
168 * horizontal increment delay,
169 * recommended position */
170 0x02, 0x00, /* 02 - FUSE=3, GUDL=2, MODE=0 ;
172 0x03, 0x10, /* 03 - HLNRS=0, VBSL=1, WPOFF=0,
173 * HOLDG=0, GAFIX=0, GAI1=256, GAI2=256 */
174 0x04, 0x90, /* 04 - GAI1=256 */
175 0x05, 0x90, /* 05 - GAI2=256 */
176 0x06, SAA_7114_NTSC_HSYNC_START
, /* 06 - HSB: hsync start,
177 * depends on the video standard */
178 0x07, SAA_7114_NTSC_HSYNC_STOP
, /* 07 - HSS: hsync stop, depends
179 *on the video standard */
180 0x08, 0xb8, /* 08 - AUFD=1, FSEL=1, EXFIL=0, VTRC=1,
181 * HPLL: free running in playback, locked
182 * in capture, VNOI=0 */
183 0x09, 0x80, /* 09 - BYPS=0, PREF=0, BPSS=0, VBLB=0,
184 * UPTCV=0, APER=1; depends from input */
185 0x0a, 0x80, /* 0a - BRIG=128 */
186 0x0b, 0x44, /* 0b - CONT=1.109 */
187 0x0c, 0x40, /* 0c - SATN=1.0 */
188 0x0d, 0x00, /* 0d - HUE=0 */
189 0x0e, 0x84, /* 0e - CDTO, CSTD2 to 0, DCVF, FCTC,
190 * CCOMB; depends from video standard */
191 0x0f, 0x24, /* 0f - ACGC,CGAIN6 to CGAIN0; depends
192 * from video standard */
193 0x10, 0x03, /* 10 - OFFU1 to 0, OFFV1 to 0, CHBW,
195 0x11, 0x59, /* 11 - COLO, RTP1, HEDL1 to 0, RTP0,
197 0x12, 0xc9, /* 12 - RT signal control RTSE13 to 10
199 0x13, 0x80, /* 13 - RT/X port output control */
200 0x14, 0x00, /* 14 - analog, ADC, compatibility control */
201 0x15, 0x00, /* 15 - VGATE start FID change */
202 0x16, 0xfe, /* 16 - VGATE stop */
203 0x17, 0x00, /* 17 - Misc., VGATE MSBs */
204 0x18, 0x40, /* RAWG */
205 0x19, 0x80, /* RAWO */
211 0x1f, 0x00, /* status byte, read only */
212 0x20, 0x00, /* video decoder reserved part */
228 0x30, 0xbc, /* audio clock generator */
244 0x40, 0x00, /* VBI data slicer */
268 0x58, 0x40, // framing code
269 0x59, 0x47, // horizontal offset
270 0x5a, 0x06, // vertical offset
271 0x5b, 0x83, // field offset
272 0x5c, 0x00, // reserved
273 0x5d, 0x3e, // header and data
274 0x5e, 0x00, // sliced data
275 0x5f, 0x00, // reserved
276 0x60, 0x00, /* video decoder reserved part */
292 0x70, 0x00, /* video decoder reserved part */
308 0x80, 0x00, /* X-port, I-port and scaler */
313 0x85, 0x0d, // hsync and vsync ?
324 0x90, 0x03, /* Task A definition */
328 0x94, 0x00, // window settings
340 0xa0, 0x01, /* horizontal integer prescaling ratio */
341 0xa1, 0x00, /* horizontal prescaler accumulation
343 0xa2, 0x00, /* UV FIR filter, Y FIR filter, prescaler
346 0xa4, 0x80, // luminance brightness
347 0xa5, 0x40, // luminance gain
348 0xa6, 0x40, // chrominance saturation
350 0xa8, 0x00, // horizontal luminance scaling increment
352 0xaa, 0x00, // horizontal luminance phase offset
354 0xac, 0x00, // horizontal chrominance scaling increment
356 0xae, 0x00, // horizontal chrominance phase offset
358 0xb0, 0x00, // vertical luminance scaling increment
360 0xb2, 0x00, // vertical chrominance scaling increment
374 0xc0, 0x02, // Task B definition
378 0xc4, 0x00, // window settings
390 0xd0, 0x01, // horizontal integer prescaling ratio
391 0xd1, 0x00, // horizontal prescaler accumulation sequence length
392 0xd2, 0x00, // UV FIR filter, Y FIR filter, prescaler DC gain
394 0xd4, 0x80, // luminance brightness
395 0xd5, 0x40, // luminance gain
396 0xd6, 0x40, // chrominance saturation
398 0xd8, 0x00, // horizontal luminance scaling increment
400 0xda, 0x00, // horizontal luminance phase offset
402 0xdc, 0x00, // horizontal chrominance scaling increment
404 0xde, 0x00, // horizontal chrominance phase offset
406 0xe0, 0x00, // vertical luminance scaling increment
408 0xe2, 0x00, // vertical chrominance scaling increment
424 static int saa7114_command(struct i2c_client
*client
, unsigned cmd
, void *arg
)
426 struct saa7114
*decoder
= i2c_get_clientdata(client
);
430 //dprintk(1, KERN_INFO "%s: writing init\n", I2C_NAME(client));
431 //saa7114_write_block(client, init, sizeof(init));
440 v4l_info(client
, "decoder dump\n");
442 for (i
= 0; i
< 32; i
+= 16) {
445 v4l_info(client
, "%03x", i
);
446 for (j
= 0; j
< 16; ++j
) {
447 printk(KERN_CONT
" %02x",
448 saa7114_read(client
, i
+ j
));
450 printk(KERN_CONT
"\n");
455 case DECODER_GET_CAPABILITIES
:
457 struct video_decoder_capability
*cap
= arg
;
459 v4l_dbg(1, debug
, client
, "get capabilities\n");
461 cap
->flags
= VIDEO_DECODER_PAL
|
470 case DECODER_GET_STATUS
:
476 status
= saa7114_read(client
, 0x1f);
478 v4l_dbg(1, debug
, client
, "status: 0x%02x\n", status
);
480 if ((status
& (1 << 6)) == 0) {
481 res
|= DECODER_STATUS_GOOD
;
483 switch (decoder
->norm
) {
484 case VIDEO_MODE_NTSC
:
485 res
|= DECODER_STATUS_NTSC
;
488 res
|= DECODER_STATUS_PAL
;
490 case VIDEO_MODE_SECAM
:
491 res
|= DECODER_STATUS_SECAM
;
494 case VIDEO_MODE_AUTO
:
495 if ((status
& (1 << 5)) != 0) {
496 res
|= DECODER_STATUS_NTSC
;
498 res
|= DECODER_STATUS_PAL
;
502 if ((status
& (1 << 0)) != 0) {
503 res
|= DECODER_STATUS_COLOR
;
509 case DECODER_SET_NORM
:
513 short int hoff
= 0, voff
= 0, w
= 0, h
= 0;
515 v4l_dbg(1, debug
, client
, "set norm\n");
518 case VIDEO_MODE_NTSC
:
519 v4l_dbg(1, debug
, client
, "NTSC\n");
520 decoder
->reg
[REG_ADDR(0x06)] =
521 SAA_7114_NTSC_HSYNC_START
;
522 decoder
->reg
[REG_ADDR(0x07)] =
523 SAA_7114_NTSC_HSYNC_STOP
;
525 decoder
->reg
[REG_ADDR(0x08)] = decoder
->playback
? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
527 decoder
->reg
[REG_ADDR(0x0e)] = 0x85;
528 decoder
->reg
[REG_ADDR(0x0f)] = 0x24;
530 hoff
= SAA_7114_NTSC_HOFFSET
;
531 voff
= SAA_7114_NTSC_VOFFSET
;
532 w
= SAA_7114_NTSC_WIDTH
;
533 h
= SAA_7114_NTSC_HEIGHT
;
538 v4l_dbg(1, debug
, client
, "PAL\n");
539 decoder
->reg
[REG_ADDR(0x06)] =
540 SAA_7114_PAL_HSYNC_START
;
541 decoder
->reg
[REG_ADDR(0x07)] =
542 SAA_7114_PAL_HSYNC_STOP
;
544 decoder
->reg
[REG_ADDR(0x08)] = decoder
->playback
? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
546 decoder
->reg
[REG_ADDR(0x0e)] = 0x81;
547 decoder
->reg
[REG_ADDR(0x0f)] = 0x24;
549 hoff
= SAA_7114_PAL_HOFFSET
;
550 voff
= SAA_7114_PAL_VOFFSET
;
551 w
= SAA_7114_PAL_WIDTH
;
552 h
= SAA_7114_PAL_HEIGHT
;
557 v4l_dbg(1, debug
, client
, "Unknown video mode\n");
562 decoder
->reg
[REG_ADDR(0x94)] = LOBYTE(hoff
); // hoffset low
563 decoder
->reg
[REG_ADDR(0x95)] = HIBYTE(hoff
) & 0x0f; // hoffset high
564 decoder
->reg
[REG_ADDR(0x96)] = LOBYTE(w
); // width low
565 decoder
->reg
[REG_ADDR(0x97)] = HIBYTE(w
) & 0x0f; // width high
566 decoder
->reg
[REG_ADDR(0x98)] = LOBYTE(voff
); // voffset low
567 decoder
->reg
[REG_ADDR(0x99)] = HIBYTE(voff
) & 0x0f; // voffset high
568 decoder
->reg
[REG_ADDR(0x9a)] = LOBYTE(h
+ 2); // height low
569 decoder
->reg
[REG_ADDR(0x9b)] = HIBYTE(h
+ 2) & 0x0f; // height high
570 decoder
->reg
[REG_ADDR(0x9c)] = LOBYTE(w
); // out width low
571 decoder
->reg
[REG_ADDR(0x9d)] = HIBYTE(w
) & 0x0f; // out width high
572 decoder
->reg
[REG_ADDR(0x9e)] = LOBYTE(h
); // out height low
573 decoder
->reg
[REG_ADDR(0x9f)] = HIBYTE(h
) & 0x0f; // out height high
575 decoder
->reg
[REG_ADDR(0xc4)] = LOBYTE(hoff
); // hoffset low
576 decoder
->reg
[REG_ADDR(0xc5)] = HIBYTE(hoff
) & 0x0f; // hoffset high
577 decoder
->reg
[REG_ADDR(0xc6)] = LOBYTE(w
); // width low
578 decoder
->reg
[REG_ADDR(0xc7)] = HIBYTE(w
) & 0x0f; // width high
579 decoder
->reg
[REG_ADDR(0xc8)] = LOBYTE(voff
); // voffset low
580 decoder
->reg
[REG_ADDR(0xc9)] = HIBYTE(voff
) & 0x0f; // voffset high
581 decoder
->reg
[REG_ADDR(0xca)] = LOBYTE(h
+ 2); // height low
582 decoder
->reg
[REG_ADDR(0xcb)] = HIBYTE(h
+ 2) & 0x0f; // height high
583 decoder
->reg
[REG_ADDR(0xcc)] = LOBYTE(w
); // out width low
584 decoder
->reg
[REG_ADDR(0xcd)] = HIBYTE(w
) & 0x0f; // out width high
585 decoder
->reg
[REG_ADDR(0xce)] = LOBYTE(h
); // out height low
586 decoder
->reg
[REG_ADDR(0xcf)] = HIBYTE(h
) & 0x0f; // out height high
589 saa7114_write(client
, 0x80, 0x06); // i-port and scaler back end clock selection, task A&B off
590 saa7114_write(client
, 0x88, 0xd8); // sw reset scaler
591 saa7114_write(client
, 0x88, 0xf8); // sw reset scaler release
593 saa7114_write_block(client
, decoder
->reg
+ (0x06 << 1),
595 saa7114_write_block(client
, decoder
->reg
+ (0x0e << 1),
597 saa7114_write_block(client
, decoder
->reg
+ (0x5a << 1),
600 saa7114_write_block(client
, decoder
->reg
+ (0x94 << 1),
601 (0x9f + 1 - 0x94) << 1);
602 saa7114_write_block(client
, decoder
->reg
+ (0xc4 << 1),
603 (0xcf + 1 - 0xc4) << 1);
605 saa7114_write(client
, 0x88, 0xd8); // sw reset scaler
606 saa7114_write(client
, 0x88, 0xf8); // sw reset scaler release
607 saa7114_write(client
, 0x80, 0x36); // i-port and scaler back end clock selection
609 decoder
->norm
= *iarg
;
613 case DECODER_SET_INPUT
:
617 v4l_dbg(1, debug
, client
, "set input (%d)\n", *iarg
);
618 if (*iarg
< 0 || *iarg
> 7) {
622 if (decoder
->input
!= *iarg
) {
623 v4l_dbg(1, debug
, client
, "now setting %s input\n",
624 *iarg
>= 6 ? "S-Video" : "Composite");
625 decoder
->input
= *iarg
;
628 decoder
->reg
[REG_ADDR(0x02)] =
630 reg
[REG_ADDR(0x02)] & 0xf0) | (decoder
->
633 saa7114_write(client
, 0x02,
634 decoder
->reg
[REG_ADDR(0x02)]);
636 /* bypass chrominance trap for modes 6..9 */
637 decoder
->reg
[REG_ADDR(0x09)] =
639 reg
[REG_ADDR(0x09)] & 0x7f) | (decoder
->
643 saa7114_write(client
, 0x09,
644 decoder
->reg
[REG_ADDR(0x09)]);
646 decoder
->reg
[REG_ADDR(0x0e)] =
649 reg
[REG_ADDR(0x0e)] | 1 : decoder
->
650 reg
[REG_ADDR(0x0e)] & ~1;
651 saa7114_write(client
, 0x0e,
652 decoder
->reg
[REG_ADDR(0x0e)]);
657 case DECODER_SET_OUTPUT
:
661 v4l_dbg(1, debug
, client
, "set output\n");
663 /* not much choice of outputs */
670 case DECODER_ENABLE_OUTPUT
:
673 int enable
= (*iarg
!= 0);
675 v4l_dbg(1, debug
, client
, "%s output\n",
676 enable
? "enable" : "disable");
678 decoder
->playback
= !enable
;
680 if (decoder
->enable
!= enable
) {
681 decoder
->enable
= enable
;
683 /* RJ: If output should be disabled (for
684 * playing videos), we also need a open PLL.
685 * The input is set to 0 (where no input
686 * source is connected), although this
689 * If output should be enabled, we have to
693 if (decoder
->enable
) {
694 decoder
->reg
[REG_ADDR(0x08)] = 0xb8;
695 decoder
->reg
[REG_ADDR(0x12)] = 0xc9;
696 decoder
->reg
[REG_ADDR(0x13)] = 0x80;
697 decoder
->reg
[REG_ADDR(0x87)] = 0x01;
699 decoder
->reg
[REG_ADDR(0x08)] = 0x7c;
700 decoder
->reg
[REG_ADDR(0x12)] = 0x00;
701 decoder
->reg
[REG_ADDR(0x13)] = 0x00;
702 decoder
->reg
[REG_ADDR(0x87)] = 0x00;
705 saa7114_write_block(client
,
706 decoder
->reg
+ (0x12 << 1),
708 saa7114_write(client
, 0x08,
709 decoder
->reg
[REG_ADDR(0x08)]);
710 saa7114_write(client
, 0x87,
711 decoder
->reg
[REG_ADDR(0x87)]);
712 saa7114_write(client
, 0x88, 0xd8); // sw reset scaler
713 saa7114_write(client
, 0x88, 0xf8); // sw reset scaler release
714 saa7114_write(client
, 0x80, 0x36);
720 case DECODER_SET_PICTURE
:
722 struct video_picture
*pic
= arg
;
724 v4l_dbg(1, debug
, client
,
725 "decoder set picture bright=%d contrast=%d saturation=%d hue=%d\n",
726 pic
->brightness
, pic
->contrast
, pic
->colour
, pic
->hue
);
728 if (decoder
->bright
!= pic
->brightness
) {
729 /* We want 0 to 255 we get 0-65535 */
730 decoder
->bright
= pic
->brightness
;
731 saa7114_write(client
, 0x0a, decoder
->bright
>> 8);
733 if (decoder
->contrast
!= pic
->contrast
) {
734 /* We want 0 to 127 we get 0-65535 */
735 decoder
->contrast
= pic
->contrast
;
736 saa7114_write(client
, 0x0b,
737 decoder
->contrast
>> 9);
739 if (decoder
->sat
!= pic
->colour
) {
740 /* We want 0 to 127 we get 0-65535 */
741 decoder
->sat
= pic
->colour
;
742 saa7114_write(client
, 0x0c, decoder
->sat
>> 9);
744 if (decoder
->hue
!= pic
->hue
) {
745 /* We want -128 to 127 we get 0-65535 */
746 decoder
->hue
= pic
->hue
;
747 saa7114_write(client
, 0x0d,
748 (decoder
->hue
- 32768) >> 8);
760 /* ----------------------------------------------------------------------- */
762 static unsigned short normal_i2c
[] = { 0x42 >> 1, 0x40 >> 1, I2C_CLIENT_END
};
766 static int saa7114_probe(struct i2c_client
*client
,
767 const struct i2c_device_id
*id
)
770 short int hoff
= SAA_7114_NTSC_HOFFSET
;
771 short int voff
= SAA_7114_NTSC_VOFFSET
;
772 short int w
= SAA_7114_NTSC_WIDTH
;
773 short int h
= SAA_7114_NTSC_HEIGHT
;
774 struct saa7114
*decoder
;
776 /* Check if the adapter supports the needed features */
777 if (!i2c_check_functionality(client
->adapter
, I2C_FUNC_SMBUS_BYTE_DATA
))
780 v4l_info(client
, "chip found @ 0x%x (%s)\n",
781 client
->addr
<< 1, client
->adapter
->name
);
783 decoder
= kzalloc(sizeof(struct saa7114
), GFP_KERNEL
);
786 decoder
->norm
= VIDEO_MODE_NTSC
;
789 decoder
->bright
= 32768;
790 decoder
->contrast
= 32768;
791 decoder
->hue
= 32768;
792 decoder
->sat
= 32768;
793 decoder
->playback
= 0; // initially capture mode useda
794 i2c_set_clientdata(client
, decoder
);
796 memcpy(decoder
->reg
, init
, sizeof(init
));
798 decoder
->reg
[REG_ADDR(0x94)] = LOBYTE(hoff
); // hoffset low
799 decoder
->reg
[REG_ADDR(0x95)] = HIBYTE(hoff
) & 0x0f; // hoffset high
800 decoder
->reg
[REG_ADDR(0x96)] = LOBYTE(w
); // width low
801 decoder
->reg
[REG_ADDR(0x97)] = HIBYTE(w
) & 0x0f; // width high
802 decoder
->reg
[REG_ADDR(0x98)] = LOBYTE(voff
); // voffset low
803 decoder
->reg
[REG_ADDR(0x99)] = HIBYTE(voff
) & 0x0f; // voffset high
804 decoder
->reg
[REG_ADDR(0x9a)] = LOBYTE(h
+ 2); // height low
805 decoder
->reg
[REG_ADDR(0x9b)] = HIBYTE(h
+ 2) & 0x0f; // height high
806 decoder
->reg
[REG_ADDR(0x9c)] = LOBYTE(w
); // out width low
807 decoder
->reg
[REG_ADDR(0x9d)] = HIBYTE(w
) & 0x0f; // out width high
808 decoder
->reg
[REG_ADDR(0x9e)] = LOBYTE(h
); // out height low
809 decoder
->reg
[REG_ADDR(0x9f)] = HIBYTE(h
) & 0x0f; // out height high
811 decoder
->reg
[REG_ADDR(0xc4)] = LOBYTE(hoff
); // hoffset low
812 decoder
->reg
[REG_ADDR(0xc5)] = HIBYTE(hoff
) & 0x0f; // hoffset high
813 decoder
->reg
[REG_ADDR(0xc6)] = LOBYTE(w
); // width low
814 decoder
->reg
[REG_ADDR(0xc7)] = HIBYTE(w
) & 0x0f; // width high
815 decoder
->reg
[REG_ADDR(0xc8)] = LOBYTE(voff
); // voffset low
816 decoder
->reg
[REG_ADDR(0xc9)] = HIBYTE(voff
) & 0x0f; // voffset high
817 decoder
->reg
[REG_ADDR(0xca)] = LOBYTE(h
+ 2); // height low
818 decoder
->reg
[REG_ADDR(0xcb)] = HIBYTE(h
+ 2) & 0x0f; // height high
819 decoder
->reg
[REG_ADDR(0xcc)] = LOBYTE(w
); // out width low
820 decoder
->reg
[REG_ADDR(0xcd)] = HIBYTE(w
) & 0x0f; // out width high
821 decoder
->reg
[REG_ADDR(0xce)] = LOBYTE(h
); // out height low
822 decoder
->reg
[REG_ADDR(0xcf)] = HIBYTE(h
) & 0x0f; // out height high
824 decoder
->reg
[REG_ADDR(0xb8)] =
825 LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET
));
826 decoder
->reg
[REG_ADDR(0xb9)] =
827 HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET
));
828 decoder
->reg
[REG_ADDR(0xba)] =
829 LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET
));
830 decoder
->reg
[REG_ADDR(0xbb)] =
831 HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET
));
833 decoder
->reg
[REG_ADDR(0xbc)] =
834 LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET
));
835 decoder
->reg
[REG_ADDR(0xbd)] =
836 HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET
));
837 decoder
->reg
[REG_ADDR(0xbe)] =
838 LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET
));
839 decoder
->reg
[REG_ADDR(0xbf)] =
840 HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET
));
842 decoder
->reg
[REG_ADDR(0xe8)] =
843 LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET
));
844 decoder
->reg
[REG_ADDR(0xe9)] =
845 HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET
));
846 decoder
->reg
[REG_ADDR(0xea)] =
847 LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET
));
848 decoder
->reg
[REG_ADDR(0xeb)] =
849 HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET
));
851 decoder
->reg
[REG_ADDR(0xec)] =
852 LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET
));
853 decoder
->reg
[REG_ADDR(0xed)] =
854 HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET
));
855 decoder
->reg
[REG_ADDR(0xee)] =
856 LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET
));
857 decoder
->reg
[REG_ADDR(0xef)] =
858 HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET
));
861 decoder
->reg
[REG_ADDR(0x13)] = 0x80; // RTC0 on
862 decoder
->reg
[REG_ADDR(0x87)] = 0x01; // I-Port
863 decoder
->reg
[REG_ADDR(0x12)] = 0xc9; // RTS0
865 decoder
->reg
[REG_ADDR(0x02)] = 0xc0; // set composite1 input, aveasy
866 decoder
->reg
[REG_ADDR(0x09)] = 0x00; // chrominance trap
867 decoder
->reg
[REG_ADDR(0x0e)] |= 1; // combfilter on
870 v4l_dbg(1, debug
, client
, "starting init\n");
873 saa7114_write_block(client
, decoder
->reg
+ (0x20 << 1),
876 saa7114_write_block(client
, decoder
->reg
+ (0x30 << 1),
879 saa7114_write_block(client
, decoder
->reg
+ (0x63 << 1),
880 (0x7f + 1 - 0x63) << 1);
882 saa7114_write_block(client
, decoder
->reg
+ (0x89 << 1),
885 saa7114_write_block(client
, decoder
->reg
+ (0xb8 << 1),
888 saa7114_write_block(client
, decoder
->reg
+ (0xe8 << 1),
892 for (i
= 0; i
<= 5; i
++) {
894 v4l_dbg(1, debug
, client
,
895 "init error %d at stage %d, leaving attach.\n",
902 for (i
= 6; i
< 8; i
++) {
903 v4l_dbg(1, debug
, client
,
904 "reg[0x%02x] = 0x%02x (0x%02x)\n",
905 i
, saa7114_read(client
, i
),
906 decoder
->reg
[REG_ADDR(i
)]);
909 v4l_dbg(1, debug
, client
,
910 "performing decoder reset sequence\n");
912 err
[6] = saa7114_write(client
, 0x80, 0x06); // i-port and scaler backend clock selection, task A&B off
913 err
[7] = saa7114_write(client
, 0x88, 0xd8); // sw reset scaler
914 err
[8] = saa7114_write(client
, 0x88, 0xf8); // sw reset scaler release
916 for (i
= 6; i
<= 8; i
++) {
918 v4l_dbg(1, debug
, client
,
919 "init error %d at stage %d, leaving attach.\n",
926 v4l_dbg(1, debug
, client
, "performing the rest of init\n");
928 err
[9] = saa7114_write(client
, 0x01, decoder
->reg
[REG_ADDR(0x01)]);
929 err
[10] = saa7114_write_block(client
, decoder
->reg
+ (0x03 << 1), (0x1e + 1 - 0x03) << 1); // big seq
930 err
[11] = saa7114_write_block(client
, decoder
->reg
+ (0x40 << 1), (0x5f + 1 - 0x40) << 1); // slicer
931 err
[12] = saa7114_write_block(client
, decoder
->reg
+ (0x81 << 1), 2 << 1); // ?
932 err
[13] = saa7114_write_block(client
, decoder
->reg
+ (0x83 << 1), 5 << 1); // ?
933 err
[14] = saa7114_write_block(client
, decoder
->reg
+ (0x90 << 1), 4 << 1); // Task A
935 saa7114_write_block(client
, decoder
->reg
+ (0x94 << 1),
938 saa7114_write_block(client
, decoder
->reg
+ (0xa0 << 1),
941 saa7114_write_block(client
, decoder
->reg
+ (0xa8 << 1),
944 saa7114_write_block(client
, decoder
->reg
+ (0xb0 << 1),
946 err
[19] = saa7114_write_block(client
, decoder
->reg
+ (0xc0 << 1), 4 << 1); // Task B
948 saa7114_write_block(client
, decoder
->reg
+ (0xc4 << 1),
951 saa7114_write_block(client
, decoder
->reg
+ (0xd0 << 1),
954 saa7114_write_block(client
, decoder
->reg
+ (0xd8 << 1),
957 saa7114_write_block(client
, decoder
->reg
+ (0xe0 << 1),
960 for (i
= 9; i
<= 18; i
++) {
962 v4l_dbg(1, debug
, client
,
963 "init error %d at stage %d, leaving attach.\n",
971 for (i
= 6; i
< 8; i
++) {
972 v4l_dbg(1, debug
, client
,
973 "reg[0x%02x] = 0x%02x (0x%02x)\n",
974 i
, saa7114_read(client
, i
),
975 decoder
->reg
[REG_ADDR(i
)]);
979 for (i
= 0x11; i
<= 0x13; i
++) {
980 v4l_dbg(1, debug
, client
,
981 "reg[0x%02x] = 0x%02x (0x%02x)\n",
982 i
, saa7114_read(client
, i
),
983 decoder
->reg
[REG_ADDR(i
)]);
987 v4l_dbg(1, debug
, client
, "setting video input\n");
990 saa7114_write(client
, 0x02, decoder
->reg
[REG_ADDR(0x02)]);
992 saa7114_write(client
, 0x09, decoder
->reg
[REG_ADDR(0x09)]);
994 saa7114_write(client
, 0x0e, decoder
->reg
[REG_ADDR(0x0e)]);
996 for (i
= 19; i
<= 21; i
++) {
998 v4l_dbg(1, debug
, client
,
999 "init error %d at stage %d, leaving attach.\n",
1006 v4l_dbg(1, debug
, client
, "performing decoder reset sequence\n");
1008 err
[22] = saa7114_write(client
, 0x88, 0xd8); // sw reset scaler
1009 err
[23] = saa7114_write(client
, 0x88, 0xf8); // sw reset scaler release
1010 err
[24] = saa7114_write(client
, 0x80, 0x36); // i-port and scaler backend clock selection, task A&B off
1013 for (i
= 22; i
<= 24; i
++) {
1015 v4l_dbg(1, debug
, client
,
1016 "init error %d at stage %d, leaving attach.\n",
1023 err
[25] = saa7114_write(client
, 0x06, init
[REG_ADDR(0x06)]);
1024 err
[26] = saa7114_write(client
, 0x07, init
[REG_ADDR(0x07)]);
1025 err
[27] = saa7114_write(client
, 0x10, init
[REG_ADDR(0x10)]);
1027 v4l_dbg(1, debug
, client
, "chip version %x, decoder status 0x%02x\n",
1028 saa7114_read(client
, 0x00) >> 4,
1029 saa7114_read(client
, 0x1f));
1030 v4l_dbg(1, debug
, client
,
1031 "power save control: 0x%02x, scaler status: 0x%02x\n",
1032 saa7114_read(client
, 0x88),
1033 saa7114_read(client
, 0x8f));
1036 for (i
= 0x94; i
< 0x96; i
++) {
1037 v4l_dbg(1, debug
, client
,
1038 "reg[0x%02x] = 0x%02x (0x%02x)\n",
1039 i
, saa7114_read(client
, i
),
1040 decoder
->reg
[REG_ADDR(i
)]);
1043 //i = saa7114_write_block(client, init, sizeof(init));
1047 static int saa7114_remove(struct i2c_client
*client
)
1049 kfree(i2c_get_clientdata(client
));
1053 /* ----------------------------------------------------------------------- */
1055 static const struct i2c_device_id saa7114_id
[] = {
1056 { "saa7114_old", 0 }, /* "saa7114" maps to the saa7115 driver */
1059 MODULE_DEVICE_TABLE(i2c
, saa7114_id
);
1061 static struct v4l2_i2c_driver_data v4l2_i2c_data
= {
1063 .driverid
= I2C_DRIVERID_SAA7114
,
1064 .command
= saa7114_command
,
1065 .probe
= saa7114_probe
,
1066 .remove
= saa7114_remove
,
1067 .id_table
= saa7114_id
,