2 * S5P camera interface (video postprocessor) driver
4 * Copyright (c) 2010 Samsung Electronics Co., Ltd
6 * Sylwester Nawrocki, <s.nawrocki@samsung.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published
10 * by the Free Software Foundation, either version 2 of the License,
11 * or (at your option) any later version.
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/version.h>
17 #include <linux/types.h>
18 #include <linux/errno.h>
19 #include <linux/bug.h>
20 #include <linux/interrupt.h>
21 #include <linux/device.h>
22 #include <linux/platform_device.h>
23 #include <linux/list.h>
25 #include <linux/slab.h>
26 #include <linux/clk.h>
27 #include <media/v4l2-ioctl.h>
28 #include <media/videobuf2-core.h>
29 #include <media/videobuf2-dma-contig.h>
31 #include "fimc-core.h"
33 static char *fimc_clocks
[MAX_FIMC_CLOCKS
] = {
34 "sclk_fimc", "fimc", "sclk_cam"
37 static struct fimc_fmt fimc_formats
[] = {
40 .fourcc
= V4L2_PIX_FMT_RGB565X
,
42 .color
= S5P_FIMC_RGB565
,
45 .mbus_code
= V4L2_MBUS_FMT_RGB565_2X8_BE
,
46 .flags
= FMT_FLAGS_M2M
,
49 .fourcc
= V4L2_PIX_FMT_BGR666
,
51 .color
= S5P_FIMC_RGB666
,
54 .flags
= FMT_FLAGS_M2M
,
56 .name
= "XRGB-8-8-8-8, 32 bpp",
57 .fourcc
= V4L2_PIX_FMT_RGB32
,
59 .color
= S5P_FIMC_RGB888
,
62 .flags
= FMT_FLAGS_M2M
,
64 .name
= "YUV 4:2:2 packed, YCbYCr",
65 .fourcc
= V4L2_PIX_FMT_YUYV
,
67 .color
= S5P_FIMC_YCBYCR422
,
70 .mbus_code
= V4L2_MBUS_FMT_YUYV8_2X8
,
71 .flags
= FMT_FLAGS_M2M
| FMT_FLAGS_CAM
,
73 .name
= "YUV 4:2:2 packed, CbYCrY",
74 .fourcc
= V4L2_PIX_FMT_UYVY
,
76 .color
= S5P_FIMC_CBYCRY422
,
79 .mbus_code
= V4L2_MBUS_FMT_UYVY8_2X8
,
80 .flags
= FMT_FLAGS_M2M
| FMT_FLAGS_CAM
,
82 .name
= "YUV 4:2:2 packed, CrYCbY",
83 .fourcc
= V4L2_PIX_FMT_VYUY
,
85 .color
= S5P_FIMC_CRYCBY422
,
88 .mbus_code
= V4L2_MBUS_FMT_VYUY8_2X8
,
89 .flags
= FMT_FLAGS_M2M
| FMT_FLAGS_CAM
,
91 .name
= "YUV 4:2:2 packed, YCrYCb",
92 .fourcc
= V4L2_PIX_FMT_YVYU
,
94 .color
= S5P_FIMC_YCRYCB422
,
97 .mbus_code
= V4L2_MBUS_FMT_YVYU8_2X8
,
98 .flags
= FMT_FLAGS_M2M
| FMT_FLAGS_CAM
,
100 .name
= "YUV 4:2:2 planar, Y/Cb/Cr",
101 .fourcc
= V4L2_PIX_FMT_YUV422P
,
103 .color
= S5P_FIMC_YCBYCR422
,
106 .flags
= FMT_FLAGS_M2M
,
108 .name
= "YUV 4:2:2 planar, Y/CbCr",
109 .fourcc
= V4L2_PIX_FMT_NV16
,
111 .color
= S5P_FIMC_YCBYCR422
,
114 .flags
= FMT_FLAGS_M2M
,
116 .name
= "YUV 4:2:2 planar, Y/CrCb",
117 .fourcc
= V4L2_PIX_FMT_NV61
,
119 .color
= S5P_FIMC_YCRYCB422
,
122 .flags
= FMT_FLAGS_M2M
,
124 .name
= "YUV 4:2:0 planar, YCbCr",
125 .fourcc
= V4L2_PIX_FMT_YUV420
,
127 .color
= S5P_FIMC_YCBCR420
,
130 .flags
= FMT_FLAGS_M2M
,
132 .name
= "YUV 4:2:0 planar, Y/CbCr",
133 .fourcc
= V4L2_PIX_FMT_NV12
,
135 .color
= S5P_FIMC_YCBCR420
,
138 .flags
= FMT_FLAGS_M2M
,
140 .name
= "YUV 4:2:0 non-contiguous 2-planar, Y/CbCr",
141 .fourcc
= V4L2_PIX_FMT_NV12M
,
142 .color
= S5P_FIMC_YCBCR420
,
146 .flags
= FMT_FLAGS_M2M
,
148 .name
= "YUV 4:2:0 non-contiguous 3-planar, Y/Cb/Cr",
149 .fourcc
= V4L2_PIX_FMT_YUV420M
,
150 .color
= S5P_FIMC_YCBCR420
,
151 .depth
= { 8, 2, 2 },
154 .flags
= FMT_FLAGS_M2M
,
156 .name
= "YUV 4:2:0 non-contiguous 2-planar, Y/CbCr, tiled",
157 .fourcc
= V4L2_PIX_FMT_NV12MT
,
158 .color
= S5P_FIMC_YCBCR420
,
162 .flags
= FMT_FLAGS_M2M
,
166 static struct v4l2_queryctrl fimc_ctrls
[] = {
168 .id
= V4L2_CID_HFLIP
,
169 .type
= V4L2_CTRL_TYPE_BOOLEAN
,
170 .name
= "Horizontal flip",
175 .id
= V4L2_CID_VFLIP
,
176 .type
= V4L2_CTRL_TYPE_BOOLEAN
,
177 .name
= "Vertical flip",
182 .id
= V4L2_CID_ROTATE
,
183 .type
= V4L2_CTRL_TYPE_INTEGER
,
184 .name
= "Rotation (CCW)",
193 static struct v4l2_queryctrl
*get_ctrl(int id
)
197 for (i
= 0; i
< ARRAY_SIZE(fimc_ctrls
); ++i
)
198 if (id
== fimc_ctrls
[i
].id
)
199 return &fimc_ctrls
[i
];
203 int fimc_check_scaler_ratio(struct v4l2_rect
*r
, struct fimc_frame
*f
)
205 if (r
->width
> f
->width
) {
206 if (f
->width
> (r
->width
* SCALER_MAX_HRATIO
))
209 if ((f
->width
* SCALER_MAX_HRATIO
) < r
->width
)
213 if (r
->height
> f
->height
) {
214 if (f
->height
> (r
->height
* SCALER_MAX_VRATIO
))
217 if ((f
->height
* SCALER_MAX_VRATIO
) < r
->height
)
224 static int fimc_get_scaler_factor(u32 src
, u32 tar
, u32
*ratio
, u32
*shift
)
233 if (src
>= tar
* tmp
) {
234 *shift
= sh
, *ratio
= tmp
;
239 *shift
= 0, *ratio
= 1;
241 dbg("s: %d, t: %d, shift: %d, ratio: %d",
242 src
, tar
, *shift
, *ratio
);
246 int fimc_set_scaler_info(struct fimc_ctx
*ctx
)
248 struct fimc_scaler
*sc
= &ctx
->scaler
;
249 struct fimc_frame
*s_frame
= &ctx
->s_frame
;
250 struct fimc_frame
*d_frame
= &ctx
->d_frame
;
251 struct samsung_fimc_variant
*variant
= ctx
->fimc_dev
->variant
;
255 if (ctx
->rotation
== 90 || ctx
->rotation
== 270) {
257 tx
= d_frame
->height
;
260 ty
= d_frame
->height
;
262 if (tx
<= 0 || ty
<= 0) {
263 v4l2_err(&ctx
->fimc_dev
->m2m
.v4l2_dev
,
264 "invalid target size: %d x %d", tx
, ty
);
269 sy
= s_frame
->height
;
270 if (sx
<= 0 || sy
<= 0) {
271 err("invalid source size: %d x %d", sx
, sy
);
276 sc
->real_height
= sy
;
277 dbg("sx= %d, sy= %d, tx= %d, ty= %d", sx
, sy
, tx
, ty
);
279 ret
= fimc_get_scaler_factor(sx
, tx
, &sc
->pre_hratio
, &sc
->hfactor
);
283 ret
= fimc_get_scaler_factor(sy
, ty
, &sc
->pre_vratio
, &sc
->vfactor
);
287 sc
->pre_dst_width
= sx
/ sc
->pre_hratio
;
288 sc
->pre_dst_height
= sy
/ sc
->pre_vratio
;
290 if (variant
->has_mainscaler_ext
) {
291 sc
->main_hratio
= (sx
<< 14) / (tx
<< sc
->hfactor
);
292 sc
->main_vratio
= (sy
<< 14) / (ty
<< sc
->vfactor
);
294 sc
->main_hratio
= (sx
<< 8) / (tx
<< sc
->hfactor
);
295 sc
->main_vratio
= (sy
<< 8) / (ty
<< sc
->vfactor
);
299 sc
->scaleup_h
= (tx
>= sx
) ? 1 : 0;
300 sc
->scaleup_v
= (ty
>= sy
) ? 1 : 0;
302 /* check to see if input and output size/format differ */
303 if (s_frame
->fmt
->color
== d_frame
->fmt
->color
304 && s_frame
->width
== d_frame
->width
305 && s_frame
->height
== d_frame
->height
)
313 static void fimc_capture_handler(struct fimc_dev
*fimc
)
315 struct fimc_vid_cap
*cap
= &fimc
->vid_cap
;
316 struct fimc_vid_buffer
*v_buf
= NULL
;
318 if (!list_empty(&cap
->active_buf_q
)) {
319 v_buf
= active_queue_pop(cap
);
320 vb2_buffer_done(&v_buf
->vb
, VB2_BUF_STATE_DONE
);
323 if (test_and_clear_bit(ST_CAPT_SHUT
, &fimc
->state
)) {
324 wake_up(&fimc
->irq_queue
);
328 if (!list_empty(&cap
->pending_buf_q
)) {
330 v_buf
= pending_queue_pop(cap
);
331 fimc_hw_set_output_addr(fimc
, &v_buf
->paddr
, cap
->buf_index
);
332 v_buf
->index
= cap
->buf_index
;
334 dbg("hw ptr: %d, sw ptr: %d",
335 fimc_hw_get_frame_index(fimc
), cap
->buf_index
);
337 /* Move the buffer to the capture active queue */
338 active_queue_add(cap
, v_buf
);
340 dbg("next frame: %d, done frame: %d",
341 fimc_hw_get_frame_index(fimc
), v_buf
->index
);
343 if (++cap
->buf_index
>= FIMC_MAX_OUT_BUFS
)
346 } else if (test_and_clear_bit(ST_CAPT_STREAM
, &fimc
->state
) &&
347 cap
->active_buf_cnt
<= 1) {
348 fimc_deactivate_capture(fimc
);
351 dbg("frame: %d, active_buf_cnt= %d",
352 fimc_hw_get_frame_index(fimc
), cap
->active_buf_cnt
);
355 static irqreturn_t
fimc_isr(int irq
, void *priv
)
357 struct fimc_dev
*fimc
= priv
;
360 fimc_hw_clear_irq(fimc
);
362 spin_lock(&fimc
->slock
);
364 if (test_and_clear_bit(ST_M2M_PEND
, &fimc
->state
)) {
365 struct vb2_buffer
*src_vb
, *dst_vb
;
366 struct fimc_ctx
*ctx
= v4l2_m2m_get_curr_priv(fimc
->m2m
.m2m_dev
);
368 if (!ctx
|| !ctx
->m2m_ctx
)
371 src_vb
= v4l2_m2m_src_buf_remove(ctx
->m2m_ctx
);
372 dst_vb
= v4l2_m2m_dst_buf_remove(ctx
->m2m_ctx
);
373 if (src_vb
&& dst_vb
) {
374 v4l2_m2m_buf_done(src_vb
, VB2_BUF_STATE_DONE
);
375 v4l2_m2m_buf_done(dst_vb
, VB2_BUF_STATE_DONE
);
376 v4l2_m2m_job_finish(fimc
->m2m
.m2m_dev
, ctx
->m2m_ctx
);
382 if (test_bit(ST_CAPT_RUN
, &fimc
->state
))
383 fimc_capture_handler(fimc
);
385 if (test_and_clear_bit(ST_CAPT_PEND
, &fimc
->state
)) {
386 set_bit(ST_CAPT_RUN
, &fimc
->state
);
387 wake_up(&fimc
->irq_queue
);
391 spin_unlock(&fimc
->slock
);
395 /* The color format (colplanes, memplanes) must be already configured. */
396 int fimc_prepare_addr(struct fimc_ctx
*ctx
, struct vb2_buffer
*vb
,
397 struct fimc_frame
*frame
, struct fimc_addr
*paddr
)
402 if (vb
== NULL
|| frame
== NULL
)
405 pix_size
= frame
->width
* frame
->height
;
407 dbg("memplanes= %d, colplanes= %d, pix_size= %d",
408 frame
->fmt
->memplanes
, frame
->fmt
->colplanes
, pix_size
);
410 paddr
->y
= vb2_dma_contig_plane_paddr(vb
, 0);
412 if (frame
->fmt
->memplanes
== 1) {
413 switch (frame
->fmt
->colplanes
) {
419 /* decompose Y into Y/Cb */
420 paddr
->cb
= (u32
)(paddr
->y
+ pix_size
);
424 paddr
->cb
= (u32
)(paddr
->y
+ pix_size
);
425 /* decompose Y into Y/Cb/Cr */
426 if (S5P_FIMC_YCBCR420
== frame
->fmt
->color
)
427 paddr
->cr
= (u32
)(paddr
->cb
430 paddr
->cr
= (u32
)(paddr
->cb
437 if (frame
->fmt
->memplanes
>= 2)
438 paddr
->cb
= vb2_dma_contig_plane_paddr(vb
, 1);
440 if (frame
->fmt
->memplanes
== 3)
441 paddr
->cr
= vb2_dma_contig_plane_paddr(vb
, 2);
444 dbg("PHYS_ADDR: y= 0x%X cb= 0x%X cr= 0x%X ret= %d",
445 paddr
->y
, paddr
->cb
, paddr
->cr
, ret
);
450 /* Set order for 1 and 2 plane YCBCR 4:2:2 formats. */
451 static void fimc_set_yuv_order(struct fimc_ctx
*ctx
)
453 /* The one only mode supported in SoC. */
454 ctx
->in_order_2p
= S5P_FIMC_LSB_CRCB
;
455 ctx
->out_order_2p
= S5P_FIMC_LSB_CRCB
;
457 /* Set order for 1 plane input formats. */
458 switch (ctx
->s_frame
.fmt
->color
) {
459 case S5P_FIMC_YCRYCB422
:
460 ctx
->in_order_1p
= S5P_MSCTRL_ORDER422_CBYCRY
;
462 case S5P_FIMC_CBYCRY422
:
463 ctx
->in_order_1p
= S5P_MSCTRL_ORDER422_YCRYCB
;
465 case S5P_FIMC_CRYCBY422
:
466 ctx
->in_order_1p
= S5P_MSCTRL_ORDER422_YCBYCR
;
468 case S5P_FIMC_YCBYCR422
:
470 ctx
->in_order_1p
= S5P_MSCTRL_ORDER422_CRYCBY
;
473 dbg("ctx->in_order_1p= %d", ctx
->in_order_1p
);
475 switch (ctx
->d_frame
.fmt
->color
) {
476 case S5P_FIMC_YCRYCB422
:
477 ctx
->out_order_1p
= S5P_CIOCTRL_ORDER422_CBYCRY
;
479 case S5P_FIMC_CBYCRY422
:
480 ctx
->out_order_1p
= S5P_CIOCTRL_ORDER422_YCRYCB
;
482 case S5P_FIMC_CRYCBY422
:
483 ctx
->out_order_1p
= S5P_CIOCTRL_ORDER422_YCBYCR
;
485 case S5P_FIMC_YCBYCR422
:
487 ctx
->out_order_1p
= S5P_CIOCTRL_ORDER422_CRYCBY
;
490 dbg("ctx->out_order_1p= %d", ctx
->out_order_1p
);
493 static void fimc_prepare_dma_offset(struct fimc_ctx
*ctx
, struct fimc_frame
*f
)
495 struct samsung_fimc_variant
*variant
= ctx
->fimc_dev
->variant
;
498 for (i
= 0; i
< f
->fmt
->colplanes
; i
++)
499 depth
+= f
->fmt
->depth
[i
];
501 f
->dma_offset
.y_h
= f
->offs_h
;
502 if (!variant
->pix_hoff
)
503 f
->dma_offset
.y_h
*= (depth
>> 3);
505 f
->dma_offset
.y_v
= f
->offs_v
;
507 f
->dma_offset
.cb_h
= f
->offs_h
;
508 f
->dma_offset
.cb_v
= f
->offs_v
;
510 f
->dma_offset
.cr_h
= f
->offs_h
;
511 f
->dma_offset
.cr_v
= f
->offs_v
;
513 if (!variant
->pix_hoff
) {
514 if (f
->fmt
->colplanes
== 3) {
515 f
->dma_offset
.cb_h
>>= 1;
516 f
->dma_offset
.cr_h
>>= 1;
518 if (f
->fmt
->color
== S5P_FIMC_YCBCR420
) {
519 f
->dma_offset
.cb_v
>>= 1;
520 f
->dma_offset
.cr_v
>>= 1;
524 dbg("in_offset: color= %d, y_h= %d, y_v= %d",
525 f
->fmt
->color
, f
->dma_offset
.y_h
, f
->dma_offset
.y_v
);
529 * fimc_prepare_config - check dimensions, operation and color mode
530 * and pre-calculate offset and the scaling coefficients.
532 * @ctx: hardware context information
533 * @flags: flags indicating which parameters to check/update
535 * Return: 0 if dimensions are valid or non zero otherwise.
537 int fimc_prepare_config(struct fimc_ctx
*ctx
, u32 flags
)
539 struct fimc_frame
*s_frame
, *d_frame
;
540 struct vb2_buffer
*vb
= NULL
;
543 s_frame
= &ctx
->s_frame
;
544 d_frame
= &ctx
->d_frame
;
546 if (flags
& FIMC_PARAMS
) {
547 /* Prepare the DMA offset ratios for scaler. */
548 fimc_prepare_dma_offset(ctx
, &ctx
->s_frame
);
549 fimc_prepare_dma_offset(ctx
, &ctx
->d_frame
);
551 if (s_frame
->height
> (SCALER_MAX_VRATIO
* d_frame
->height
) ||
552 s_frame
->width
> (SCALER_MAX_HRATIO
* d_frame
->width
)) {
553 err("out of scaler range");
556 fimc_set_yuv_order(ctx
);
559 /* Input DMA mode is not allowed when the scaler is disabled. */
560 ctx
->scaler
.enabled
= 1;
562 if (flags
& FIMC_SRC_ADDR
) {
563 vb
= v4l2_m2m_next_src_buf(ctx
->m2m_ctx
);
564 ret
= fimc_prepare_addr(ctx
, vb
, s_frame
, &s_frame
->paddr
);
569 if (flags
& FIMC_DST_ADDR
) {
570 vb
= v4l2_m2m_next_dst_buf(ctx
->m2m_ctx
);
571 ret
= fimc_prepare_addr(ctx
, vb
, d_frame
, &d_frame
->paddr
);
577 static void fimc_dma_run(void *priv
)
579 struct fimc_ctx
*ctx
= priv
;
580 struct fimc_dev
*fimc
;
581 struct samsung_fimc_variant
*variant
= ctx
->fimc_dev
->variant
;
585 if (WARN(!ctx
, "null hardware context\n"))
588 fimc
= ctx
->fimc_dev
;
590 spin_lock_irqsave(&ctx
->slock
, flags
);
591 set_bit(ST_M2M_PEND
, &fimc
->state
);
593 ctx
->state
|= (FIMC_SRC_ADDR
| FIMC_DST_ADDR
);
594 ret
= fimc_prepare_config(ctx
, ctx
->state
);
596 err("Wrong parameters");
599 /* Reconfigure hardware if the context has changed. */
600 if (fimc
->m2m
.ctx
!= ctx
) {
601 ctx
->state
|= FIMC_PARAMS
;
605 fimc_hw_set_input_addr(fimc
, &ctx
->s_frame
.paddr
);
607 if (ctx
->state
& FIMC_PARAMS
) {
608 fimc_hw_set_input_path(ctx
);
609 fimc_hw_set_in_dma(ctx
);
610 if (fimc_set_scaler_info(ctx
)) {
611 err("Scaler setup error");
615 fimc_hw_set_prescaler(ctx
);
616 if (variant
->has_mainscaler_ext
)
617 fimc_hw_set_mainscaler_ext(ctx
);
619 fimc_hw_set_mainscaler(ctx
);
620 fimc_hw_set_target_format(ctx
);
621 fimc_hw_set_rotation(ctx
);
622 fimc_hw_set_effect(ctx
);
625 fimc_hw_set_output_path(ctx
);
626 if (ctx
->state
& (FIMC_DST_ADDR
| FIMC_PARAMS
))
627 fimc_hw_set_output_addr(fimc
, &ctx
->d_frame
.paddr
, -1);
629 if (ctx
->state
& FIMC_PARAMS
)
630 fimc_hw_set_out_dma(ctx
);
632 fimc_activate_capture(ctx
);
634 ctx
->state
&= (FIMC_CTX_M2M
| FIMC_CTX_CAP
|
635 FIMC_SRC_FMT
| FIMC_DST_FMT
);
636 fimc_hw_activate_input_dma(fimc
, true);
639 spin_unlock_irqrestore(&ctx
->slock
, flags
);
642 static void fimc_job_abort(void *priv
)
644 /* Nothing done in job_abort. */
647 static int fimc_queue_setup(struct vb2_queue
*vq
, unsigned int *num_buffers
,
648 unsigned int *num_planes
, unsigned long sizes
[],
651 struct fimc_ctx
*ctx
= vb2_get_drv_priv(vq
);
652 struct fimc_frame
*f
;
655 f
= ctx_get_frame(ctx
, vq
->type
);
660 * Return number of non-contigous planes (plane buffers)
661 * depending on the configured color format.
664 *num_planes
= f
->fmt
->memplanes
;
666 for (i
= 0; i
< f
->fmt
->memplanes
; i
++) {
667 sizes
[i
] = (f
->width
* f
->height
* f
->fmt
->depth
[i
]) >> 3;
668 allocators
[i
] = ctx
->fimc_dev
->alloc_ctx
;
671 if (*num_buffers
== 0)
677 static int fimc_buf_prepare(struct vb2_buffer
*vb
)
679 struct fimc_ctx
*ctx
= vb2_get_drv_priv(vb
->vb2_queue
);
680 struct fimc_frame
*frame
;
683 frame
= ctx_get_frame(ctx
, vb
->vb2_queue
->type
);
685 return PTR_ERR(frame
);
687 for (i
= 0; i
< frame
->fmt
->memplanes
; i
++)
688 vb2_set_plane_payload(vb
, i
, frame
->payload
[i
]);
693 static void fimc_buf_queue(struct vb2_buffer
*vb
)
695 struct fimc_ctx
*ctx
= vb2_get_drv_priv(vb
->vb2_queue
);
697 dbg("ctx: %p, ctx->state: 0x%x", ctx
, ctx
->state
);
700 v4l2_m2m_buf_queue(ctx
->m2m_ctx
, vb
);
703 static void fimc_lock(struct vb2_queue
*vq
)
705 struct fimc_ctx
*ctx
= vb2_get_drv_priv(vq
);
706 mutex_lock(&ctx
->fimc_dev
->lock
);
709 static void fimc_unlock(struct vb2_queue
*vq
)
711 struct fimc_ctx
*ctx
= vb2_get_drv_priv(vq
);
712 mutex_unlock(&ctx
->fimc_dev
->lock
);
715 struct vb2_ops fimc_qops
= {
716 .queue_setup
= fimc_queue_setup
,
717 .buf_prepare
= fimc_buf_prepare
,
718 .buf_queue
= fimc_buf_queue
,
719 .wait_prepare
= fimc_unlock
,
720 .wait_finish
= fimc_lock
,
723 static int fimc_m2m_querycap(struct file
*file
, void *priv
,
724 struct v4l2_capability
*cap
)
726 struct fimc_ctx
*ctx
= file
->private_data
;
727 struct fimc_dev
*fimc
= ctx
->fimc_dev
;
729 strncpy(cap
->driver
, fimc
->pdev
->name
, sizeof(cap
->driver
) - 1);
730 strncpy(cap
->card
, fimc
->pdev
->name
, sizeof(cap
->card
) - 1);
731 cap
->bus_info
[0] = 0;
732 cap
->version
= KERNEL_VERSION(1, 0, 0);
733 cap
->capabilities
= V4L2_CAP_STREAMING
|
734 V4L2_CAP_VIDEO_CAPTURE
| V4L2_CAP_VIDEO_OUTPUT
|
735 V4L2_CAP_VIDEO_CAPTURE_MPLANE
| V4L2_CAP_VIDEO_OUTPUT_MPLANE
;
740 int fimc_vidioc_enum_fmt_mplane(struct file
*file
, void *priv
,
741 struct v4l2_fmtdesc
*f
)
743 struct fimc_fmt
*fmt
;
745 if (f
->index
>= ARRAY_SIZE(fimc_formats
))
748 fmt
= &fimc_formats
[f
->index
];
749 strncpy(f
->description
, fmt
->name
, sizeof(f
->description
) - 1);
750 f
->pixelformat
= fmt
->fourcc
;
755 int fimc_vidioc_g_fmt_mplane(struct file
*file
, void *priv
,
756 struct v4l2_format
*f
)
758 struct fimc_ctx
*ctx
= priv
;
759 struct fimc_frame
*frame
;
761 frame
= ctx_get_frame(ctx
, f
->type
);
763 return PTR_ERR(frame
);
765 f
->fmt
.pix
.width
= frame
->width
;
766 f
->fmt
.pix
.height
= frame
->height
;
767 f
->fmt
.pix
.field
= V4L2_FIELD_NONE
;
768 f
->fmt
.pix
.pixelformat
= frame
->fmt
->fourcc
;
773 struct fimc_fmt
*find_format(struct v4l2_format
*f
, unsigned int mask
)
775 struct fimc_fmt
*fmt
;
778 for (i
= 0; i
< ARRAY_SIZE(fimc_formats
); ++i
) {
779 fmt
= &fimc_formats
[i
];
780 if (fmt
->fourcc
== f
->fmt
.pix
.pixelformat
&&
785 return (i
== ARRAY_SIZE(fimc_formats
)) ? NULL
: fmt
;
788 struct fimc_fmt
*find_mbus_format(struct v4l2_mbus_framefmt
*f
,
791 struct fimc_fmt
*fmt
;
794 for (i
= 0; i
< ARRAY_SIZE(fimc_formats
); ++i
) {
795 fmt
= &fimc_formats
[i
];
796 if (fmt
->mbus_code
== f
->code
&& (fmt
->flags
& mask
))
800 return (i
== ARRAY_SIZE(fimc_formats
)) ? NULL
: fmt
;
804 int fimc_vidioc_try_fmt_mplane(struct file
*file
, void *priv
,
805 struct v4l2_format
*f
)
807 struct fimc_ctx
*ctx
= priv
;
808 struct fimc_dev
*fimc
= ctx
->fimc_dev
;
809 struct samsung_fimc_variant
*variant
= fimc
->variant
;
810 struct v4l2_pix_format_mplane
*pix
= &f
->fmt
.pix_mp
;
811 struct fimc_fmt
*fmt
;
812 u32 max_width
, mod_x
, mod_y
, mask
;
813 int i
, is_output
= 0;
816 if (f
->type
== V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE
) {
817 if (ctx
->state
& FIMC_CTX_CAP
)
820 } else if (f
->type
!= V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE
) {
824 dbg("w: %d, h: %d", pix
->width
, pix
->height
);
826 mask
= is_output
? FMT_FLAGS_M2M
: FMT_FLAGS_M2M
| FMT_FLAGS_CAM
;
827 fmt
= find_format(f
, mask
);
829 v4l2_err(&fimc
->m2m
.v4l2_dev
, "Fourcc format (0x%X) invalid.\n",
834 if (pix
->field
== V4L2_FIELD_ANY
)
835 pix
->field
= V4L2_FIELD_NONE
;
836 else if (V4L2_FIELD_NONE
!= pix
->field
)
840 max_width
= variant
->pix_limit
->scaler_dis_w
;
841 mod_x
= ffs(variant
->min_inp_pixsize
) - 1;
843 max_width
= variant
->pix_limit
->out_rot_dis_w
;
844 mod_x
= ffs(variant
->min_out_pixsize
) - 1;
847 if (tiled_fmt(fmt
)) {
848 mod_x
= 6; /* 64 x 32 pixels tile */
851 if (fimc
->id
== 1 && variant
->pix_hoff
)
852 mod_y
= fimc_fmt_is_rgb(fmt
->color
) ? 0 : 1;
857 dbg("mod_x: %d, mod_y: %d, max_w: %d", mod_x
, mod_y
, max_width
);
859 v4l_bound_align_image(&pix
->width
, 16, max_width
, mod_x
,
860 &pix
->height
, 8, variant
->pix_limit
->scaler_dis_w
, mod_y
, 0);
862 pix
->num_planes
= fmt
->memplanes
;
864 for (i
= 0; i
< pix
->num_planes
; ++i
) {
865 int bpl
= pix
->plane_fmt
[i
].bytesperline
;
867 dbg("[%d] bpl: %d, depth: %d, w: %d, h: %d",
868 i
, bpl
, fmt
->depth
[i
], pix
->width
, pix
->height
);
870 if (!bpl
|| (bpl
* 8 / fmt
->depth
[i
]) > pix
->width
)
871 bpl
= (pix
->width
* fmt
->depth
[0]) >> 3;
873 if (!pix
->plane_fmt
[i
].sizeimage
)
874 pix
->plane_fmt
[i
].sizeimage
= pix
->height
* bpl
;
876 pix
->plane_fmt
[i
].bytesperline
= bpl
;
878 dbg("[%d]: bpl: %d, sizeimage: %d",
879 i
, pix
->plane_fmt
[i
].bytesperline
,
880 pix
->plane_fmt
[i
].sizeimage
);
886 static int fimc_m2m_s_fmt_mplane(struct file
*file
, void *priv
,
887 struct v4l2_format
*f
)
889 struct fimc_ctx
*ctx
= priv
;
890 struct fimc_dev
*fimc
= ctx
->fimc_dev
;
891 struct vb2_queue
*vq
;
892 struct fimc_frame
*frame
;
893 struct v4l2_pix_format_mplane
*pix
;
898 ret
= fimc_vidioc_try_fmt_mplane(file
, priv
, f
);
902 vq
= v4l2_m2m_get_vq(ctx
->m2m_ctx
, f
->type
);
904 if (vb2_is_streaming(vq
)) {
905 v4l2_err(&fimc
->m2m
.v4l2_dev
, "queue (%d) busy\n", f
->type
);
909 if (f
->type
== V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE
) {
910 frame
= &ctx
->s_frame
;
911 } else if (f
->type
== V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE
) {
912 frame
= &ctx
->d_frame
;
914 v4l2_err(&fimc
->m2m
.v4l2_dev
,
915 "Wrong buffer/video queue type (%d)\n", f
->type
);
919 pix
= &f
->fmt
.pix_mp
;
920 frame
->fmt
= find_format(f
, FMT_FLAGS_M2M
);
924 for (i
= 0; i
< frame
->fmt
->colplanes
; i
++)
925 frame
->payload
[i
] = pix
->plane_fmt
[i
].bytesperline
* pix
->height
;
927 frame
->f_width
= pix
->plane_fmt
[0].bytesperline
* 8 /
928 frame
->fmt
->depth
[0];
929 frame
->f_height
= pix
->height
;
930 frame
->width
= pix
->width
;
931 frame
->height
= pix
->height
;
932 frame
->o_width
= pix
->width
;
933 frame
->o_height
= pix
->height
;
937 spin_lock_irqsave(&ctx
->slock
, flags
);
938 tmp
= (frame
== &ctx
->d_frame
) ? FIMC_DST_FMT
: FIMC_SRC_FMT
;
939 ctx
->state
|= FIMC_PARAMS
| tmp
;
940 spin_unlock_irqrestore(&ctx
->slock
, flags
);
942 dbg("f_w: %d, f_h: %d", frame
->f_width
, frame
->f_height
);
947 static int fimc_m2m_reqbufs(struct file
*file
, void *priv
,
948 struct v4l2_requestbuffers
*reqbufs
)
950 struct fimc_ctx
*ctx
= priv
;
951 return v4l2_m2m_reqbufs(file
, ctx
->m2m_ctx
, reqbufs
);
954 static int fimc_m2m_querybuf(struct file
*file
, void *priv
,
955 struct v4l2_buffer
*buf
)
957 struct fimc_ctx
*ctx
= priv
;
958 return v4l2_m2m_querybuf(file
, ctx
->m2m_ctx
, buf
);
961 static int fimc_m2m_qbuf(struct file
*file
, void *priv
,
962 struct v4l2_buffer
*buf
)
964 struct fimc_ctx
*ctx
= priv
;
966 return v4l2_m2m_qbuf(file
, ctx
->m2m_ctx
, buf
);
969 static int fimc_m2m_dqbuf(struct file
*file
, void *priv
,
970 struct v4l2_buffer
*buf
)
972 struct fimc_ctx
*ctx
= priv
;
973 return v4l2_m2m_dqbuf(file
, ctx
->m2m_ctx
, buf
);
976 static int fimc_m2m_streamon(struct file
*file
, void *priv
,
977 enum v4l2_buf_type type
)
979 struct fimc_ctx
*ctx
= priv
;
981 /* The source and target color format need to be set */
982 if (V4L2_TYPE_IS_OUTPUT(type
)) {
983 if (~ctx
->state
& FIMC_SRC_FMT
)
985 } else if (~ctx
->state
& FIMC_DST_FMT
) {
989 return v4l2_m2m_streamon(file
, ctx
->m2m_ctx
, type
);
992 static int fimc_m2m_streamoff(struct file
*file
, void *priv
,
993 enum v4l2_buf_type type
)
995 struct fimc_ctx
*ctx
= priv
;
996 return v4l2_m2m_streamoff(file
, ctx
->m2m_ctx
, type
);
999 int fimc_vidioc_queryctrl(struct file
*file
, void *priv
,
1000 struct v4l2_queryctrl
*qc
)
1002 struct fimc_ctx
*ctx
= priv
;
1003 struct v4l2_queryctrl
*c
;
1006 c
= get_ctrl(qc
->id
);
1012 if (ctx
->state
& FIMC_CTX_CAP
) {
1013 return v4l2_subdev_call(ctx
->fimc_dev
->vid_cap
.sd
,
1014 core
, queryctrl
, qc
);
1019 int fimc_vidioc_g_ctrl(struct file
*file
, void *priv
,
1020 struct v4l2_control
*ctrl
)
1022 struct fimc_ctx
*ctx
= priv
;
1023 struct fimc_dev
*fimc
= ctx
->fimc_dev
;
1026 case V4L2_CID_HFLIP
:
1027 ctrl
->value
= (FLIP_X_AXIS
& ctx
->flip
) ? 1 : 0;
1029 case V4L2_CID_VFLIP
:
1030 ctrl
->value
= (FLIP_Y_AXIS
& ctx
->flip
) ? 1 : 0;
1032 case V4L2_CID_ROTATE
:
1033 ctrl
->value
= ctx
->rotation
;
1036 if (ctx
->state
& FIMC_CTX_CAP
) {
1037 return v4l2_subdev_call(fimc
->vid_cap
.sd
, core
,
1040 v4l2_err(&fimc
->m2m
.v4l2_dev
,
1041 "Invalid control\n");
1045 dbg("ctrl->value= %d", ctrl
->value
);
1050 int check_ctrl_val(struct fimc_ctx
*ctx
, struct v4l2_control
*ctrl
)
1052 struct v4l2_queryctrl
*c
;
1053 c
= get_ctrl(ctrl
->id
);
1057 if (ctrl
->value
< c
->minimum
|| ctrl
->value
> c
->maximum
1058 || (c
->step
!= 0 && ctrl
->value
% c
->step
!= 0)) {
1059 v4l2_err(&ctx
->fimc_dev
->m2m
.v4l2_dev
,
1060 "Invalid control value\n");
1067 int fimc_s_ctrl(struct fimc_ctx
*ctx
, struct v4l2_control
*ctrl
)
1069 struct samsung_fimc_variant
*variant
= ctx
->fimc_dev
->variant
;
1070 struct fimc_dev
*fimc
= ctx
->fimc_dev
;
1071 unsigned long flags
;
1073 spin_lock_irqsave(&ctx
->slock
, flags
);
1076 case V4L2_CID_HFLIP
:
1078 ctx
->flip
|= FLIP_X_AXIS
;
1080 ctx
->flip
&= ~FLIP_X_AXIS
;
1083 case V4L2_CID_VFLIP
:
1085 ctx
->flip
|= FLIP_Y_AXIS
;
1087 ctx
->flip
&= ~FLIP_Y_AXIS
;
1090 case V4L2_CID_ROTATE
:
1091 /* Check for the output rotator availability */
1092 if ((ctrl
->value
== 90 || ctrl
->value
== 270) &&
1093 (ctx
->in_path
== FIMC_DMA
&& !variant
->has_out_rot
)) {
1094 spin_unlock_irqrestore(&ctx
->slock
, flags
);
1097 ctx
->rotation
= ctrl
->value
;
1102 spin_unlock_irqrestore(&ctx
->slock
, flags
);
1103 v4l2_err(&fimc
->m2m
.v4l2_dev
, "Invalid control\n");
1106 ctx
->state
|= FIMC_PARAMS
;
1107 spin_unlock_irqrestore(&ctx
->slock
, flags
);
1112 static int fimc_m2m_s_ctrl(struct file
*file
, void *priv
,
1113 struct v4l2_control
*ctrl
)
1115 struct fimc_ctx
*ctx
= priv
;
1118 ret
= check_ctrl_val(ctx
, ctrl
);
1122 ret
= fimc_s_ctrl(ctx
, ctrl
);
1126 static int fimc_m2m_cropcap(struct file
*file
, void *fh
,
1127 struct v4l2_cropcap
*cr
)
1129 struct fimc_frame
*frame
;
1130 struct fimc_ctx
*ctx
= fh
;
1132 frame
= ctx_get_frame(ctx
, cr
->type
);
1134 return PTR_ERR(frame
);
1136 cr
->bounds
.left
= 0;
1138 cr
->bounds
.width
= frame
->f_width
;
1139 cr
->bounds
.height
= frame
->f_height
;
1140 cr
->defrect
= cr
->bounds
;
1145 static int fimc_m2m_g_crop(struct file
*file
, void *fh
, struct v4l2_crop
*cr
)
1147 struct fimc_frame
*frame
;
1148 struct fimc_ctx
*ctx
= file
->private_data
;
1150 frame
= ctx_get_frame(ctx
, cr
->type
);
1152 return PTR_ERR(frame
);
1154 cr
->c
.left
= frame
->offs_h
;
1155 cr
->c
.top
= frame
->offs_v
;
1156 cr
->c
.width
= frame
->width
;
1157 cr
->c
.height
= frame
->height
;
1162 int fimc_try_crop(struct fimc_ctx
*ctx
, struct v4l2_crop
*cr
)
1164 struct fimc_dev
*fimc
= ctx
->fimc_dev
;
1165 struct fimc_frame
*f
;
1166 u32 min_size
, halign
, depth
= 0;
1169 if (cr
->c
.top
< 0 || cr
->c
.left
< 0) {
1170 v4l2_err(&fimc
->m2m
.v4l2_dev
,
1171 "doesn't support negative values for top & left\n");
1175 if (cr
->type
== V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE
)
1176 f
= (ctx
->state
& FIMC_CTX_CAP
) ? &ctx
->s_frame
: &ctx
->d_frame
;
1177 else if (cr
->type
== V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE
&&
1178 ctx
->state
& FIMC_CTX_M2M
)
1183 min_size
= (f
== &ctx
->s_frame
) ?
1184 fimc
->variant
->min_inp_pixsize
: fimc
->variant
->min_out_pixsize
;
1186 if (ctx
->state
& FIMC_CTX_M2M
) {
1187 if (fimc
->id
== 1 && fimc
->variant
->pix_hoff
)
1188 halign
= fimc_fmt_is_rgb(f
->fmt
->color
) ? 0 : 1;
1190 halign
= ffs(min_size
) - 1;
1191 /* there are more strict aligment requirements at camera interface */
1197 for (i
= 0; i
< f
->fmt
->colplanes
; i
++)
1198 depth
+= f
->fmt
->depth
[i
];
1200 v4l_bound_align_image(&cr
->c
.width
, min_size
, f
->o_width
,
1202 &cr
->c
.height
, min_size
, f
->o_height
,
1203 halign
, 64/(ALIGN(depth
, 8)));
1205 /* adjust left/top if cropping rectangle is out of bounds */
1206 if (cr
->c
.left
+ cr
->c
.width
> f
->o_width
)
1207 cr
->c
.left
= f
->o_width
- cr
->c
.width
;
1208 if (cr
->c
.top
+ cr
->c
.height
> f
->o_height
)
1209 cr
->c
.top
= f
->o_height
- cr
->c
.height
;
1211 cr
->c
.left
= round_down(cr
->c
.left
, min_size
);
1212 cr
->c
.top
= round_down(cr
->c
.top
,
1213 ctx
->state
& FIMC_CTX_M2M
? 8 : 16);
1215 dbg("l:%d, t:%d, w:%d, h:%d, f_w: %d, f_h: %d",
1216 cr
->c
.left
, cr
->c
.top
, cr
->c
.width
, cr
->c
.height
,
1217 f
->f_width
, f
->f_height
);
1223 static int fimc_m2m_s_crop(struct file
*file
, void *fh
, struct v4l2_crop
*cr
)
1225 struct fimc_ctx
*ctx
= file
->private_data
;
1226 struct fimc_dev
*fimc
= ctx
->fimc_dev
;
1227 unsigned long flags
;
1228 struct fimc_frame
*f
;
1231 ret
= fimc_try_crop(ctx
, cr
);
1235 f
= (cr
->type
== V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE
) ?
1236 &ctx
->s_frame
: &ctx
->d_frame
;
1238 spin_lock_irqsave(&ctx
->slock
, flags
);
1239 if (~ctx
->state
& (FIMC_SRC_FMT
| FIMC_DST_FMT
)) {
1240 /* Check to see if scaling ratio is within supported range */
1241 if (cr
->type
== V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE
)
1242 ret
= fimc_check_scaler_ratio(&cr
->c
, &ctx
->d_frame
);
1244 ret
= fimc_check_scaler_ratio(&cr
->c
, &ctx
->s_frame
);
1246 v4l2_err(&fimc
->m2m
.v4l2_dev
, "Out of scaler range");
1247 spin_unlock_irqrestore(&ctx
->slock
, flags
);
1251 ctx
->state
|= FIMC_PARAMS
;
1253 f
->offs_h
= cr
->c
.left
;
1254 f
->offs_v
= cr
->c
.top
;
1255 f
->width
= cr
->c
.width
;
1256 f
->height
= cr
->c
.height
;
1258 spin_unlock_irqrestore(&ctx
->slock
, flags
);
1262 static const struct v4l2_ioctl_ops fimc_m2m_ioctl_ops
= {
1263 .vidioc_querycap
= fimc_m2m_querycap
,
1265 .vidioc_enum_fmt_vid_cap_mplane
= fimc_vidioc_enum_fmt_mplane
,
1266 .vidioc_enum_fmt_vid_out_mplane
= fimc_vidioc_enum_fmt_mplane
,
1268 .vidioc_g_fmt_vid_cap_mplane
= fimc_vidioc_g_fmt_mplane
,
1269 .vidioc_g_fmt_vid_out_mplane
= fimc_vidioc_g_fmt_mplane
,
1271 .vidioc_try_fmt_vid_cap_mplane
= fimc_vidioc_try_fmt_mplane
,
1272 .vidioc_try_fmt_vid_out_mplane
= fimc_vidioc_try_fmt_mplane
,
1274 .vidioc_s_fmt_vid_cap_mplane
= fimc_m2m_s_fmt_mplane
,
1275 .vidioc_s_fmt_vid_out_mplane
= fimc_m2m_s_fmt_mplane
,
1277 .vidioc_reqbufs
= fimc_m2m_reqbufs
,
1278 .vidioc_querybuf
= fimc_m2m_querybuf
,
1280 .vidioc_qbuf
= fimc_m2m_qbuf
,
1281 .vidioc_dqbuf
= fimc_m2m_dqbuf
,
1283 .vidioc_streamon
= fimc_m2m_streamon
,
1284 .vidioc_streamoff
= fimc_m2m_streamoff
,
1286 .vidioc_queryctrl
= fimc_vidioc_queryctrl
,
1287 .vidioc_g_ctrl
= fimc_vidioc_g_ctrl
,
1288 .vidioc_s_ctrl
= fimc_m2m_s_ctrl
,
1290 .vidioc_g_crop
= fimc_m2m_g_crop
,
1291 .vidioc_s_crop
= fimc_m2m_s_crop
,
1292 .vidioc_cropcap
= fimc_m2m_cropcap
1296 static int queue_init(void *priv
, struct vb2_queue
*src_vq
,
1297 struct vb2_queue
*dst_vq
)
1299 struct fimc_ctx
*ctx
= priv
;
1302 memset(src_vq
, 0, sizeof(*src_vq
));
1303 src_vq
->type
= V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE
;
1304 src_vq
->io_modes
= VB2_MMAP
| VB2_USERPTR
;
1305 src_vq
->drv_priv
= ctx
;
1306 src_vq
->ops
= &fimc_qops
;
1307 src_vq
->mem_ops
= &vb2_dma_contig_memops
;
1308 src_vq
->buf_struct_size
= sizeof(struct v4l2_m2m_buffer
);
1310 ret
= vb2_queue_init(src_vq
);
1314 memset(dst_vq
, 0, sizeof(*dst_vq
));
1315 dst_vq
->type
= V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE
;
1316 dst_vq
->io_modes
= VB2_MMAP
| VB2_USERPTR
;
1317 dst_vq
->drv_priv
= ctx
;
1318 dst_vq
->ops
= &fimc_qops
;
1319 dst_vq
->mem_ops
= &vb2_dma_contig_memops
;
1320 dst_vq
->buf_struct_size
= sizeof(struct v4l2_m2m_buffer
);
1322 return vb2_queue_init(dst_vq
);
1325 static int fimc_m2m_open(struct file
*file
)
1327 struct fimc_dev
*fimc
= video_drvdata(file
);
1328 struct fimc_ctx
*ctx
= NULL
;
1330 dbg("pid: %d, state: 0x%lx, refcnt: %d",
1331 task_pid_nr(current
), fimc
->state
, fimc
->vid_cap
.refcnt
);
1334 * Return if the corresponding video capture node
1335 * is already opened.
1337 if (fimc
->vid_cap
.refcnt
> 0)
1341 set_bit(ST_OUTDMA_RUN
, &fimc
->state
);
1343 ctx
= kzalloc(sizeof *ctx
, GFP_KERNEL
);
1347 file
->private_data
= ctx
;
1348 ctx
->fimc_dev
= fimc
;
1349 /* Default color format */
1350 ctx
->s_frame
.fmt
= &fimc_formats
[0];
1351 ctx
->d_frame
.fmt
= &fimc_formats
[0];
1352 /* Setup the device context for mem2mem mode. */
1353 ctx
->state
= FIMC_CTX_M2M
;
1355 ctx
->in_path
= FIMC_DMA
;
1356 ctx
->out_path
= FIMC_DMA
;
1357 spin_lock_init(&ctx
->slock
);
1359 ctx
->m2m_ctx
= v4l2_m2m_ctx_init(fimc
->m2m
.m2m_dev
, ctx
, queue_init
);
1360 if (IS_ERR(ctx
->m2m_ctx
)) {
1361 int err
= PTR_ERR(ctx
->m2m_ctx
);
1369 static int fimc_m2m_release(struct file
*file
)
1371 struct fimc_ctx
*ctx
= file
->private_data
;
1372 struct fimc_dev
*fimc
= ctx
->fimc_dev
;
1374 dbg("pid: %d, state: 0x%lx, refcnt= %d",
1375 task_pid_nr(current
), fimc
->state
, fimc
->m2m
.refcnt
);
1377 v4l2_m2m_ctx_release(ctx
->m2m_ctx
);
1379 if (--fimc
->m2m
.refcnt
<= 0)
1380 clear_bit(ST_OUTDMA_RUN
, &fimc
->state
);
1385 static unsigned int fimc_m2m_poll(struct file
*file
,
1386 struct poll_table_struct
*wait
)
1388 struct fimc_ctx
*ctx
= file
->private_data
;
1390 return v4l2_m2m_poll(file
, ctx
->m2m_ctx
, wait
);
1394 static int fimc_m2m_mmap(struct file
*file
, struct vm_area_struct
*vma
)
1396 struct fimc_ctx
*ctx
= file
->private_data
;
1398 return v4l2_m2m_mmap(file
, ctx
->m2m_ctx
, vma
);
1401 static const struct v4l2_file_operations fimc_m2m_fops
= {
1402 .owner
= THIS_MODULE
,
1403 .open
= fimc_m2m_open
,
1404 .release
= fimc_m2m_release
,
1405 .poll
= fimc_m2m_poll
,
1406 .unlocked_ioctl
= video_ioctl2
,
1407 .mmap
= fimc_m2m_mmap
,
1410 static struct v4l2_m2m_ops m2m_ops
= {
1411 .device_run
= fimc_dma_run
,
1412 .job_abort
= fimc_job_abort
,
1415 static int fimc_register_m2m_device(struct fimc_dev
*fimc
)
1417 struct video_device
*vfd
;
1418 struct platform_device
*pdev
;
1419 struct v4l2_device
*v4l2_dev
;
1426 v4l2_dev
= &fimc
->m2m
.v4l2_dev
;
1428 /* set name if it is empty */
1429 if (!v4l2_dev
->name
[0])
1430 snprintf(v4l2_dev
->name
, sizeof(v4l2_dev
->name
),
1431 "%s.m2m", dev_name(&pdev
->dev
));
1433 ret
= v4l2_device_register(&pdev
->dev
, v4l2_dev
);
1437 vfd
= video_device_alloc();
1439 v4l2_err(v4l2_dev
, "Failed to allocate video device\n");
1443 vfd
->fops
= &fimc_m2m_fops
;
1444 vfd
->ioctl_ops
= &fimc_m2m_ioctl_ops
;
1446 vfd
->release
= video_device_release
;
1447 vfd
->lock
= &fimc
->lock
;
1449 snprintf(vfd
->name
, sizeof(vfd
->name
), "%s:m2m", dev_name(&pdev
->dev
));
1451 video_set_drvdata(vfd
, fimc
);
1452 platform_set_drvdata(pdev
, fimc
);
1454 fimc
->m2m
.vfd
= vfd
;
1455 fimc
->m2m
.m2m_dev
= v4l2_m2m_init(&m2m_ops
);
1456 if (IS_ERR(fimc
->m2m
.m2m_dev
)) {
1457 v4l2_err(v4l2_dev
, "failed to initialize v4l2-m2m device\n");
1458 ret
= PTR_ERR(fimc
->m2m
.m2m_dev
);
1462 ret
= video_register_device(vfd
, VFL_TYPE_GRABBER
, -1);
1465 "%s(): failed to register video device\n", __func__
);
1469 "FIMC m2m driver registered as /dev/video%d\n", vfd
->num
);
1474 v4l2_m2m_release(fimc
->m2m
.m2m_dev
);
1476 video_device_release(fimc
->m2m
.vfd
);
1478 v4l2_device_unregister(v4l2_dev
);
1483 static void fimc_unregister_m2m_device(struct fimc_dev
*fimc
)
1486 v4l2_m2m_release(fimc
->m2m
.m2m_dev
);
1487 video_unregister_device(fimc
->m2m
.vfd
);
1489 v4l2_device_unregister(&fimc
->m2m
.v4l2_dev
);
1493 static void fimc_clk_release(struct fimc_dev
*fimc
)
1496 for (i
= 0; i
< fimc
->num_clocks
; i
++) {
1497 if (fimc
->clock
[i
]) {
1498 clk_disable(fimc
->clock
[i
]);
1499 clk_put(fimc
->clock
[i
]);
1504 static int fimc_clk_get(struct fimc_dev
*fimc
)
1507 for (i
= 0; i
< fimc
->num_clocks
; i
++) {
1508 fimc
->clock
[i
] = clk_get(&fimc
->pdev
->dev
, fimc_clocks
[i
]);
1510 if (!IS_ERR_OR_NULL(fimc
->clock
[i
])) {
1511 clk_enable(fimc
->clock
[i
]);
1514 dev_err(&fimc
->pdev
->dev
, "failed to get fimc clock: %s\n",
1521 static int fimc_probe(struct platform_device
*pdev
)
1523 struct fimc_dev
*fimc
;
1524 struct resource
*res
;
1525 struct samsung_fimc_driverdata
*drv_data
;
1527 int cap_input_index
= -1;
1529 dev_dbg(&pdev
->dev
, "%s():\n", __func__
);
1531 drv_data
= (struct samsung_fimc_driverdata
*)
1532 platform_get_device_id(pdev
)->driver_data
;
1534 if (pdev
->id
>= drv_data
->num_entities
) {
1535 dev_err(&pdev
->dev
, "Invalid platform device id: %d\n",
1540 fimc
= kzalloc(sizeof(struct fimc_dev
), GFP_KERNEL
);
1544 fimc
->id
= pdev
->id
;
1545 fimc
->variant
= drv_data
->variant
[fimc
->id
];
1547 fimc
->pdata
= pdev
->dev
.platform_data
;
1548 fimc
->state
= ST_IDLE
;
1550 init_waitqueue_head(&fimc
->irq_queue
);
1551 spin_lock_init(&fimc
->slock
);
1553 mutex_init(&fimc
->lock
);
1555 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1557 dev_err(&pdev
->dev
, "failed to find the registers\n");
1562 fimc
->regs_res
= request_mem_region(res
->start
, resource_size(res
),
1563 dev_name(&pdev
->dev
));
1564 if (!fimc
->regs_res
) {
1565 dev_err(&pdev
->dev
, "failed to obtain register region\n");
1570 fimc
->regs
= ioremap(res
->start
, resource_size(res
));
1572 dev_err(&pdev
->dev
, "failed to map registers\n");
1574 goto err_req_region
;
1577 fimc
->num_clocks
= MAX_FIMC_CLOCKS
- 1;
1579 * Check if vide capture node needs to be registered for this device
1584 for (i
= 0; i
< FIMC_MAX_CAMIF_CLIENTS
; ++i
)
1585 if (fimc
->pdata
->isp_info
[i
])
1587 if (i
< FIMC_MAX_CAMIF_CLIENTS
) {
1588 cap_input_index
= i
;
1593 ret
= fimc_clk_get(fimc
);
1595 goto err_regs_unmap
;
1596 clk_set_rate(fimc
->clock
[CLK_BUS
], drv_data
->lclk_frequency
);
1598 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
1600 dev_err(&pdev
->dev
, "failed to get IRQ resource\n");
1604 fimc
->irq
= res
->start
;
1606 fimc_hw_reset(fimc
);
1608 ret
= request_irq(fimc
->irq
, fimc_isr
, 0, pdev
->name
, fimc
);
1610 dev_err(&pdev
->dev
, "failed to install irq (%d)\n", ret
);
1614 /* Initialize contiguous memory allocator */
1615 fimc
->alloc_ctx
= vb2_dma_contig_init_ctx(&fimc
->pdev
->dev
);
1616 if (IS_ERR(fimc
->alloc_ctx
)) {
1617 ret
= PTR_ERR(fimc
->alloc_ctx
);
1621 ret
= fimc_register_m2m_device(fimc
);
1625 /* At least one camera sensor is required to register capture node */
1626 if (cap_input_index
>= 0) {
1627 ret
= fimc_register_capture_device(fimc
);
1630 clk_disable(fimc
->clock
[CLK_CAM
]);
1633 * Exclude the additional output DMA address registers by masking
1634 * them out on HW revisions that provide extended capabilites.
1636 if (fimc
->variant
->out_buf_count
> 4)
1637 fimc_hw_set_dma_seq(fimc
, 0xF);
1639 dev_dbg(&pdev
->dev
, "%s(): fimc-%d registered successfully\n",
1640 __func__
, fimc
->id
);
1645 fimc_unregister_m2m_device(fimc
);
1647 free_irq(fimc
->irq
, fimc
);
1649 fimc_clk_release(fimc
);
1651 iounmap(fimc
->regs
);
1653 release_resource(fimc
->regs_res
);
1654 kfree(fimc
->regs_res
);
1661 static int __devexit
fimc_remove(struct platform_device
*pdev
)
1663 struct fimc_dev
*fimc
=
1664 (struct fimc_dev
*)platform_get_drvdata(pdev
);
1666 free_irq(fimc
->irq
, fimc
);
1667 fimc_hw_reset(fimc
);
1669 fimc_unregister_m2m_device(fimc
);
1670 fimc_unregister_capture_device(fimc
);
1672 fimc_clk_release(fimc
);
1674 vb2_dma_contig_cleanup_ctx(fimc
->alloc_ctx
);
1676 iounmap(fimc
->regs
);
1677 release_resource(fimc
->regs_res
);
1678 kfree(fimc
->regs_res
);
1681 dev_info(&pdev
->dev
, "%s driver unloaded\n", pdev
->name
);
1685 /* Image pixel limits, similar across several FIMC HW revisions. */
1686 static struct fimc_pix_limit s5p_pix_limit
[3] = {
1688 .scaler_en_w
= 3264,
1689 .scaler_dis_w
= 8192,
1690 .in_rot_en_h
= 1920,
1691 .in_rot_dis_w
= 8192,
1692 .out_rot_en_w
= 1920,
1693 .out_rot_dis_w
= 4224,
1696 .scaler_en_w
= 4224,
1697 .scaler_dis_w
= 8192,
1698 .in_rot_en_h
= 1920,
1699 .in_rot_dis_w
= 8192,
1700 .out_rot_en_w
= 1920,
1701 .out_rot_dis_w
= 4224,
1704 .scaler_en_w
= 1920,
1705 .scaler_dis_w
= 8192,
1706 .in_rot_en_h
= 1280,
1707 .in_rot_dis_w
= 8192,
1708 .out_rot_en_w
= 1280,
1709 .out_rot_dis_w
= 1920,
1713 static struct samsung_fimc_variant fimc0_variant_s5p
= {
1716 .min_inp_pixsize
= 16,
1717 .min_out_pixsize
= 16,
1718 .hor_offs_align
= 8,
1720 .pix_limit
= &s5p_pix_limit
[0],
1723 static struct samsung_fimc_variant fimc2_variant_s5p
= {
1724 .min_inp_pixsize
= 16,
1725 .min_out_pixsize
= 16,
1726 .hor_offs_align
= 8,
1728 .pix_limit
= &s5p_pix_limit
[1],
1731 static struct samsung_fimc_variant fimc0_variant_s5pv210
= {
1735 .min_inp_pixsize
= 16,
1736 .min_out_pixsize
= 16,
1737 .hor_offs_align
= 8,
1739 .pix_limit
= &s5p_pix_limit
[1],
1742 static struct samsung_fimc_variant fimc1_variant_s5pv210
= {
1746 .has_mainscaler_ext
= 1,
1747 .min_inp_pixsize
= 16,
1748 .min_out_pixsize
= 16,
1749 .hor_offs_align
= 1,
1751 .pix_limit
= &s5p_pix_limit
[2],
1754 static struct samsung_fimc_variant fimc2_variant_s5pv210
= {
1756 .min_inp_pixsize
= 16,
1757 .min_out_pixsize
= 16,
1758 .hor_offs_align
= 8,
1760 .pix_limit
= &s5p_pix_limit
[2],
1763 static struct samsung_fimc_variant fimc0_variant_s5pv310
= {
1768 .has_mainscaler_ext
= 1,
1769 .min_inp_pixsize
= 16,
1770 .min_out_pixsize
= 16,
1771 .hor_offs_align
= 1,
1772 .out_buf_count
= 32,
1773 .pix_limit
= &s5p_pix_limit
[1],
1776 static struct samsung_fimc_variant fimc2_variant_s5pv310
= {
1779 .has_mainscaler_ext
= 1,
1780 .min_inp_pixsize
= 16,
1781 .min_out_pixsize
= 16,
1782 .hor_offs_align
= 1,
1783 .out_buf_count
= 32,
1784 .pix_limit
= &s5p_pix_limit
[2],
1788 static struct samsung_fimc_driverdata fimc_drvdata_s5p
= {
1790 [0] = &fimc0_variant_s5p
,
1791 [1] = &fimc0_variant_s5p
,
1792 [2] = &fimc2_variant_s5p
,
1795 .lclk_frequency
= 133000000UL,
1798 /* S5PV210, S5PC110 */
1799 static struct samsung_fimc_driverdata fimc_drvdata_s5pv210
= {
1801 [0] = &fimc0_variant_s5pv210
,
1802 [1] = &fimc1_variant_s5pv210
,
1803 [2] = &fimc2_variant_s5pv210
,
1806 .lclk_frequency
= 166000000UL,
1809 /* S5PV310, S5PC210 */
1810 static struct samsung_fimc_driverdata fimc_drvdata_s5pv310
= {
1812 [0] = &fimc0_variant_s5pv310
,
1813 [1] = &fimc0_variant_s5pv310
,
1814 [2] = &fimc0_variant_s5pv310
,
1815 [3] = &fimc2_variant_s5pv310
,
1818 .lclk_frequency
= 166000000UL,
1821 static struct platform_device_id fimc_driver_ids
[] = {
1824 .driver_data
= (unsigned long)&fimc_drvdata_s5p
,
1826 .name
= "s5pv210-fimc",
1827 .driver_data
= (unsigned long)&fimc_drvdata_s5pv210
,
1829 .name
= "s5pv310-fimc",
1830 .driver_data
= (unsigned long)&fimc_drvdata_s5pv310
,
1834 MODULE_DEVICE_TABLE(platform
, fimc_driver_ids
);
1836 static struct platform_driver fimc_driver
= {
1837 .probe
= fimc_probe
,
1838 .remove
= __devexit_p(fimc_remove
),
1839 .id_table
= fimc_driver_ids
,
1841 .name
= MODULE_NAME
,
1842 .owner
= THIS_MODULE
,
1846 static int __init
fimc_init(void)
1848 int ret
= platform_driver_register(&fimc_driver
);
1850 err("platform_driver_register failed: %d\n", ret
);
1854 static void __exit
fimc_exit(void)
1856 platform_driver_unregister(&fimc_driver
);
1859 module_init(fimc_init
);
1860 module_exit(fimc_exit
);
1862 MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
1863 MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver");
1864 MODULE_LICENSE("GPL");