Merge branch 'stable/ttm.pci-api.v5' of git://git.kernel.org/pub/scm/linux/kernel...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / mt9v011.c
1 /*
2 * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
3 *
4 * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
5 * This code is placed under the terms of the GNU General Public License v2
6 */
7
8 #include <linux/i2c.h>
9 #include <linux/slab.h>
10 #include <linux/videodev2.h>
11 #include <linux/delay.h>
12 #include <asm/div64.h>
13 #include <media/v4l2-device.h>
14 #include <media/v4l2-chip-ident.h>
15 #include <media/mt9v011.h>
16
17 MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
18 MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
19 MODULE_LICENSE("GPL");
20
21 static int debug;
22 module_param(debug, int, 0);
23 MODULE_PARM_DESC(debug, "Debug level (0-2)");
24
25 #define R00_MT9V011_CHIP_VERSION 0x00
26 #define R01_MT9V011_ROWSTART 0x01
27 #define R02_MT9V011_COLSTART 0x02
28 #define R03_MT9V011_HEIGHT 0x03
29 #define R04_MT9V011_WIDTH 0x04
30 #define R05_MT9V011_HBLANK 0x05
31 #define R06_MT9V011_VBLANK 0x06
32 #define R07_MT9V011_OUT_CTRL 0x07
33 #define R09_MT9V011_SHUTTER_WIDTH 0x09
34 #define R0A_MT9V011_CLK_SPEED 0x0a
35 #define R0B_MT9V011_RESTART 0x0b
36 #define R0C_MT9V011_SHUTTER_DELAY 0x0c
37 #define R0D_MT9V011_RESET 0x0d
38 #define R1E_MT9V011_DIGITAL_ZOOM 0x1e
39 #define R20_MT9V011_READ_MODE 0x20
40 #define R2B_MT9V011_GREEN_1_GAIN 0x2b
41 #define R2C_MT9V011_BLUE_GAIN 0x2c
42 #define R2D_MT9V011_RED_GAIN 0x2d
43 #define R2E_MT9V011_GREEN_2_GAIN 0x2e
44 #define R35_MT9V011_GLOBAL_GAIN 0x35
45 #define RF1_MT9V011_CHIP_ENABLE 0xf1
46
47 #define MT9V011_VERSION 0x8232
48 #define MT9V011_REV_B_VERSION 0x8243
49
50 /* supported controls */
51 static struct v4l2_queryctrl mt9v011_qctrl[] = {
52 {
53 .id = V4L2_CID_GAIN,
54 .type = V4L2_CTRL_TYPE_INTEGER,
55 .name = "Gain",
56 .minimum = 0,
57 .maximum = (1 << 10) - 1,
58 .step = 1,
59 .default_value = 0x0020,
60 .flags = 0,
61 }, {
62 .id = V4L2_CID_RED_BALANCE,
63 .type = V4L2_CTRL_TYPE_INTEGER,
64 .name = "Red Balance",
65 .minimum = -1 << 9,
66 .maximum = (1 << 9) - 1,
67 .step = 1,
68 .default_value = 0,
69 .flags = 0,
70 }, {
71 .id = V4L2_CID_BLUE_BALANCE,
72 .type = V4L2_CTRL_TYPE_INTEGER,
73 .name = "Blue Balance",
74 .minimum = -1 << 9,
75 .maximum = (1 << 9) - 1,
76 .step = 1,
77 .default_value = 0,
78 .flags = 0,
79 }, {
80 .id = V4L2_CID_HFLIP,
81 .type = V4L2_CTRL_TYPE_BOOLEAN,
82 .name = "Mirror",
83 .minimum = 0,
84 .maximum = 1,
85 .step = 1,
86 .default_value = 0,
87 .flags = 0,
88 }, {
89 .id = V4L2_CID_VFLIP,
90 .type = V4L2_CTRL_TYPE_BOOLEAN,
91 .name = "Vflip",
92 .minimum = 0,
93 .maximum = 1,
94 .step = 1,
95 .default_value = 0,
96 .flags = 0,
97 }, {
98 }
99 };
100
101 struct mt9v011 {
102 struct v4l2_subdev sd;
103 unsigned width, height;
104 unsigned xtal;
105 unsigned hflip:1;
106 unsigned vflip:1;
107
108 u16 global_gain, red_bal, blue_bal;
109 };
110
111 static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
112 {
113 return container_of(sd, struct mt9v011, sd);
114 }
115
116 static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
117 {
118 struct i2c_client *c = v4l2_get_subdevdata(sd);
119 __be16 buffer;
120 int rc, val;
121
122 rc = i2c_master_send(c, &addr, 1);
123 if (rc != 1)
124 v4l2_dbg(0, debug, sd,
125 "i2c i/o error: rc == %d (should be 1)\n", rc);
126
127 msleep(10);
128
129 rc = i2c_master_recv(c, (char *)&buffer, 2);
130 if (rc != 2)
131 v4l2_dbg(0, debug, sd,
132 "i2c i/o error: rc == %d (should be 2)\n", rc);
133
134 val = be16_to_cpu(buffer);
135
136 v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
137
138 return val;
139 }
140
141 static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
142 u16 value)
143 {
144 struct i2c_client *c = v4l2_get_subdevdata(sd);
145 unsigned char buffer[3];
146 int rc;
147
148 buffer[0] = addr;
149 buffer[1] = value >> 8;
150 buffer[2] = value & 0xff;
151
152 v4l2_dbg(2, debug, sd,
153 "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
154 rc = i2c_master_send(c, buffer, 3);
155 if (rc != 3)
156 v4l2_dbg(0, debug, sd,
157 "i2c i/o error: rc == %d (should be 3)\n", rc);
158 }
159
160
161 struct i2c_reg_value {
162 unsigned char reg;
163 u16 value;
164 };
165
166 /*
167 * Values used at the original driver
168 * Some values are marked as Reserved at the datasheet
169 */
170 static const struct i2c_reg_value mt9v011_init_default[] = {
171 { R0D_MT9V011_RESET, 0x0001 },
172 { R0D_MT9V011_RESET, 0x0000 },
173
174 { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
175 { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
176
177 { R0A_MT9V011_CLK_SPEED, 0x0000 },
178 { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
179
180 { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
181 };
182
183 static void set_balance(struct v4l2_subdev *sd)
184 {
185 struct mt9v011 *core = to_mt9v011(sd);
186 u16 green1_gain, green2_gain, blue_gain, red_gain;
187
188 green1_gain = core->global_gain;
189 green2_gain = core->global_gain;
190
191 blue_gain = core->global_gain +
192 core->global_gain * core->blue_bal / (1 << 9);
193
194 red_gain = core->global_gain +
195 core->global_gain * core->blue_bal / (1 << 9);
196
197 mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green1_gain);
198 mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green1_gain);
199 mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
200 mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
201 }
202
203 static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator)
204 {
205 struct mt9v011 *core = to_mt9v011(sd);
206 unsigned height, width, hblank, vblank, speed;
207 unsigned row_time, t_time;
208 u64 frames_per_ms;
209 unsigned tmp;
210
211 height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
212 width = mt9v011_read(sd, R04_MT9V011_WIDTH);
213 hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
214 vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
215 speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
216
217 row_time = (width + 113 + hblank) * (speed + 2);
218 t_time = row_time * (height + vblank + 1);
219
220 frames_per_ms = core->xtal * 1000l;
221 do_div(frames_per_ms, t_time);
222 tmp = frames_per_ms;
223
224 v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
225 tmp / 1000, tmp % 1000, t_time);
226
227 if (numerator && denominator) {
228 *numerator = 1000;
229 *denominator = (u32)frames_per_ms;
230 }
231 }
232
233 static u16 calc_speed(struct v4l2_subdev *sd, u32 numerator, u32 denominator)
234 {
235 struct mt9v011 *core = to_mt9v011(sd);
236 unsigned height, width, hblank, vblank;
237 unsigned row_time, line_time;
238 u64 t_time, speed;
239
240 /* Avoid bogus calculus */
241 if (!numerator || !denominator)
242 return 0;
243
244 height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
245 width = mt9v011_read(sd, R04_MT9V011_WIDTH);
246 hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
247 vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
248
249 row_time = width + 113 + hblank;
250 line_time = height + vblank + 1;
251
252 t_time = core->xtal * ((u64)numerator);
253 /* round to the closest value */
254 t_time += denominator / 2;
255 do_div(t_time, denominator);
256
257 speed = t_time;
258 do_div(speed, row_time * line_time);
259
260 /* Avoid having a negative value for speed */
261 if (speed < 2)
262 speed = 0;
263 else
264 speed -= 2;
265
266 /* Avoid speed overflow */
267 if (speed > 15)
268 return 15;
269
270 return (u16)speed;
271 }
272
273 static void set_res(struct v4l2_subdev *sd)
274 {
275 struct mt9v011 *core = to_mt9v011(sd);
276 unsigned vstart, hstart;
277
278 /*
279 * The mt9v011 doesn't have scaling. So, in order to select the desired
280 * resolution, we're cropping at the middle of the sensor.
281 * hblank and vblank should be adjusted, in order to warrant that
282 * we'll preserve the line timings for 30 fps, no matter what resolution
283 * is selected.
284 * NOTE: datasheet says that width (and height) should be filled with
285 * width-1. However, this doesn't work, since one pixel per line will
286 * be missing.
287 */
288
289 hstart = 14 + (640 - core->width) / 2;
290 mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
291 mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
292 mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
293
294 vstart = 8 + (480 - core->height) / 2;
295 mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
296 mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
297 mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
298
299 calc_fps(sd, NULL, NULL);
300 };
301
302 static void set_read_mode(struct v4l2_subdev *sd)
303 {
304 struct mt9v011 *core = to_mt9v011(sd);
305 unsigned mode = 0x1000;
306
307 if (core->hflip)
308 mode |= 0x4000;
309
310 if (core->vflip)
311 mode |= 0x8000;
312
313 mt9v011_write(sd, R20_MT9V011_READ_MODE, mode);
314 }
315
316 static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
317 {
318 int i;
319
320 for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
321 mt9v011_write(sd, mt9v011_init_default[i].reg,
322 mt9v011_init_default[i].value);
323
324 set_balance(sd);
325 set_res(sd);
326 set_read_mode(sd);
327
328 return 0;
329 };
330
331 static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
332 {
333 struct mt9v011 *core = to_mt9v011(sd);
334
335 v4l2_dbg(1, debug, sd, "g_ctrl called\n");
336
337 switch (ctrl->id) {
338 case V4L2_CID_GAIN:
339 ctrl->value = core->global_gain;
340 return 0;
341 case V4L2_CID_RED_BALANCE:
342 ctrl->value = core->red_bal;
343 return 0;
344 case V4L2_CID_BLUE_BALANCE:
345 ctrl->value = core->blue_bal;
346 return 0;
347 case V4L2_CID_HFLIP:
348 ctrl->value = core->hflip ? 1 : 0;
349 return 0;
350 case V4L2_CID_VFLIP:
351 ctrl->value = core->vflip ? 1 : 0;
352 return 0;
353 }
354 return -EINVAL;
355 }
356
357 static int mt9v011_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
358 {
359 int i;
360
361 v4l2_dbg(1, debug, sd, "queryctrl called\n");
362
363 for (i = 0; i < ARRAY_SIZE(mt9v011_qctrl); i++)
364 if (qc->id && qc->id == mt9v011_qctrl[i].id) {
365 memcpy(qc, &(mt9v011_qctrl[i]),
366 sizeof(*qc));
367 return 0;
368 }
369
370 return -EINVAL;
371 }
372
373
374 static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
375 {
376 struct mt9v011 *core = to_mt9v011(sd);
377 u8 i, n;
378 n = ARRAY_SIZE(mt9v011_qctrl);
379
380 for (i = 0; i < n; i++) {
381 if (ctrl->id != mt9v011_qctrl[i].id)
382 continue;
383 if (ctrl->value < mt9v011_qctrl[i].minimum ||
384 ctrl->value > mt9v011_qctrl[i].maximum)
385 return -ERANGE;
386 v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n",
387 ctrl->id, ctrl->value);
388 break;
389 }
390
391 switch (ctrl->id) {
392 case V4L2_CID_GAIN:
393 core->global_gain = ctrl->value;
394 break;
395 case V4L2_CID_RED_BALANCE:
396 core->red_bal = ctrl->value;
397 break;
398 case V4L2_CID_BLUE_BALANCE:
399 core->blue_bal = ctrl->value;
400 break;
401 case V4L2_CID_HFLIP:
402 core->hflip = ctrl->value;
403 set_read_mode(sd);
404 return 0;
405 case V4L2_CID_VFLIP:
406 core->vflip = ctrl->value;
407 set_read_mode(sd);
408 return 0;
409 default:
410 return -EINVAL;
411 }
412
413 set_balance(sd);
414
415 return 0;
416 }
417
418 static int mt9v011_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
419 enum v4l2_mbus_pixelcode *code)
420 {
421 if (index > 0)
422 return -EINVAL;
423
424 *code = V4L2_MBUS_FMT_SGRBG8_1X8;
425 return 0;
426 }
427
428 static int mt9v011_try_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
429 {
430 if (fmt->code != V4L2_MBUS_FMT_SGRBG8_1X8)
431 return -EINVAL;
432
433 v4l_bound_align_image(&fmt->width, 48, 639, 1,
434 &fmt->height, 32, 480, 1, 0);
435 fmt->field = V4L2_FIELD_NONE;
436 fmt->colorspace = V4L2_COLORSPACE_SRGB;
437
438 return 0;
439 }
440
441 static int mt9v011_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
442 {
443 struct v4l2_captureparm *cp = &parms->parm.capture;
444
445 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
446 return -EINVAL;
447
448 memset(cp, 0, sizeof(struct v4l2_captureparm));
449 cp->capability = V4L2_CAP_TIMEPERFRAME;
450 calc_fps(sd,
451 &cp->timeperframe.numerator,
452 &cp->timeperframe.denominator);
453
454 return 0;
455 }
456
457 static int mt9v011_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
458 {
459 struct v4l2_captureparm *cp = &parms->parm.capture;
460 struct v4l2_fract *tpf = &cp->timeperframe;
461 u16 speed;
462
463 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
464 return -EINVAL;
465 if (cp->extendedmode != 0)
466 return -EINVAL;
467
468 speed = calc_speed(sd, tpf->numerator, tpf->denominator);
469
470 mt9v011_write(sd, R0A_MT9V011_CLK_SPEED, speed);
471 v4l2_dbg(1, debug, sd, "Setting speed to %d\n", speed);
472
473 /* Recalculate and update fps info */
474 calc_fps(sd, &tpf->numerator, &tpf->denominator);
475
476 return 0;
477 }
478
479 static int mt9v011_s_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
480 {
481 struct mt9v011 *core = to_mt9v011(sd);
482 int rc;
483
484 rc = mt9v011_try_mbus_fmt(sd, fmt);
485 if (rc < 0)
486 return -EINVAL;
487
488 core->width = fmt->width;
489 core->height = fmt->height;
490
491 set_res(sd);
492
493 return 0;
494 }
495
496 #ifdef CONFIG_VIDEO_ADV_DEBUG
497 static int mt9v011_g_register(struct v4l2_subdev *sd,
498 struct v4l2_dbg_register *reg)
499 {
500 struct i2c_client *client = v4l2_get_subdevdata(sd);
501
502 if (!v4l2_chip_match_i2c_client(client, &reg->match))
503 return -EINVAL;
504 if (!capable(CAP_SYS_ADMIN))
505 return -EPERM;
506
507 reg->val = mt9v011_read(sd, reg->reg & 0xff);
508 reg->size = 2;
509
510 return 0;
511 }
512
513 static int mt9v011_s_register(struct v4l2_subdev *sd,
514 struct v4l2_dbg_register *reg)
515 {
516 struct i2c_client *client = v4l2_get_subdevdata(sd);
517
518 if (!v4l2_chip_match_i2c_client(client, &reg->match))
519 return -EINVAL;
520 if (!capable(CAP_SYS_ADMIN))
521 return -EPERM;
522
523 mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
524
525 return 0;
526 }
527 #endif
528
529 static int mt9v011_g_chip_ident(struct v4l2_subdev *sd,
530 struct v4l2_dbg_chip_ident *chip)
531 {
532 u16 version;
533 struct i2c_client *client = v4l2_get_subdevdata(sd);
534
535 version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
536
537 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_MT9V011,
538 version);
539 }
540
541 static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
542 .queryctrl = mt9v011_queryctrl,
543 .g_ctrl = mt9v011_g_ctrl,
544 .s_ctrl = mt9v011_s_ctrl,
545 .reset = mt9v011_reset,
546 .g_chip_ident = mt9v011_g_chip_ident,
547 #ifdef CONFIG_VIDEO_ADV_DEBUG
548 .g_register = mt9v011_g_register,
549 .s_register = mt9v011_s_register,
550 #endif
551 };
552
553 static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
554 .enum_mbus_fmt = mt9v011_enum_mbus_fmt,
555 .try_mbus_fmt = mt9v011_try_mbus_fmt,
556 .s_mbus_fmt = mt9v011_s_mbus_fmt,
557 .g_parm = mt9v011_g_parm,
558 .s_parm = mt9v011_s_parm,
559 };
560
561 static const struct v4l2_subdev_ops mt9v011_ops = {
562 .core = &mt9v011_core_ops,
563 .video = &mt9v011_video_ops,
564 };
565
566
567 /****************************************************************************
568 I2C Client & Driver
569 ****************************************************************************/
570
571 static int mt9v011_probe(struct i2c_client *c,
572 const struct i2c_device_id *id)
573 {
574 u16 version;
575 struct mt9v011 *core;
576 struct v4l2_subdev *sd;
577
578 /* Check if the adapter supports the needed features */
579 if (!i2c_check_functionality(c->adapter,
580 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
581 return -EIO;
582
583 core = kzalloc(sizeof(struct mt9v011), GFP_KERNEL);
584 if (!core)
585 return -ENOMEM;
586
587 sd = &core->sd;
588 v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
589
590 /* Check if the sensor is really a MT9V011 */
591 version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
592 if ((version != MT9V011_VERSION) &&
593 (version != MT9V011_REV_B_VERSION)) {
594 v4l2_info(sd, "*** unknown micron chip detected (0x%04x).\n",
595 version);
596 kfree(core);
597 return -EINVAL;
598 }
599
600 core->global_gain = 0x0024;
601 core->width = 640;
602 core->height = 480;
603 core->xtal = 27000000; /* Hz */
604
605 if (c->dev.platform_data) {
606 struct mt9v011_platform_data *pdata = c->dev.platform_data;
607
608 core->xtal = pdata->xtal;
609 v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
610 core->xtal / 1000000, (core->xtal / 1000) % 1000);
611 }
612
613 v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n",
614 c->addr << 1, c->adapter->name, version);
615
616 return 0;
617 }
618
619 static int mt9v011_remove(struct i2c_client *c)
620 {
621 struct v4l2_subdev *sd = i2c_get_clientdata(c);
622
623 v4l2_dbg(1, debug, sd,
624 "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
625 c->addr << 1);
626
627 v4l2_device_unregister_subdev(sd);
628 kfree(to_mt9v011(sd));
629 return 0;
630 }
631
632 /* ----------------------------------------------------------------------- */
633
634 static const struct i2c_device_id mt9v011_id[] = {
635 { "mt9v011", 0 },
636 { }
637 };
638 MODULE_DEVICE_TABLE(i2c, mt9v011_id);
639
640 static struct i2c_driver mt9v011_driver = {
641 .driver = {
642 .owner = THIS_MODULE,
643 .name = "mt9v011",
644 },
645 .probe = mt9v011_probe,
646 .remove = mt9v011_remove,
647 .id_table = mt9v011_id,
648 };
649
650 static __init int init_mt9v011(void)
651 {
652 return i2c_add_driver(&mt9v011_driver);
653 }
654
655 static __exit void exit_mt9v011(void)
656 {
657 i2c_del_driver(&mt9v011_driver);
658 }
659
660 module_init(init_mt9v011);
661 module_exit(exit_mt9v011);