Merge branch 'upstream-davem' of master.kernel.org:/pub/scm/linux/kernel/git/linville...
[GitHub/MotorolaMobilityLLC/kernel-slsi.git] / drivers / media / video / ivtv / ivtv-driver.h
1 /*
2 ivtv driver internal defines and structures
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2004 Chris Kennedy <c@groovy.org>
5 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22 #ifndef IVTV_DRIVER_H
23 #define IVTV_DRIVER_H
24
25 /* Internal header for ivtv project:
26 * Driver for the cx23415/6 chip.
27 * Author: Kevin Thayer (nufan_wfk at yahoo.com)
28 * License: GPL
29 * http://www.ivtvdriver.org
30 *
31 * -----
32 * MPG600/MPG160 support by T.Adachi <tadachi@tadachi-net.com>
33 * and Takeru KOMORIYA<komoriya@paken.org>
34 *
35 * AVerMedia M179 GPIO info by Chris Pinkham <cpinkham@bc2va.org>
36 * using information provided by Jiun-Kuei Jung @ AVerMedia.
37 */
38
39 #include <linux/version.h>
40 #include <linux/module.h>
41 #include <linux/moduleparam.h>
42 #include <linux/init.h>
43 #include <linux/delay.h>
44 #include <linux/sched.h>
45 #include <linux/fs.h>
46 #include <linux/pci.h>
47 #include <linux/interrupt.h>
48 #include <linux/spinlock.h>
49 #include <linux/i2c.h>
50 #include <linux/i2c-algo-bit.h>
51 #include <linux/list.h>
52 #include <linux/unistd.h>
53 #include <linux/byteorder/swab.h>
54 #include <linux/pagemap.h>
55 #include <linux/workqueue.h>
56 #include <linux/mutex.h>
57 #include <asm/uaccess.h>
58 #include <asm/system.h>
59
60 #include <linux/dvb/video.h>
61 #include <linux/dvb/audio.h>
62 #include <media/v4l2-common.h>
63 #include <media/tuner.h>
64 #include <media/cx2341x.h>
65
66 /* #define HAVE_XC3028 1 */
67
68 #include <media/ivtv.h>
69
70 #define IVTV_ENCODER_OFFSET 0x00000000
71 #define IVTV_ENCODER_SIZE 0x00800000 /* Last half isn't needed 0x01000000 */
72
73 #define IVTV_DECODER_OFFSET 0x01000000
74 #define IVTV_DECODER_SIZE 0x00800000 /* Last half isn't needed 0x01000000 */
75
76 #define IVTV_REG_OFFSET 0x02000000
77 #define IVTV_REG_SIZE 0x00010000
78
79 /* Buffers on hardware offsets */
80 #define IVTV_YUV_BUFFER_OFFSET 0x001a8600 /* First YUV Buffer */
81 #define IVTV_YUV_BUFFER_OFFSET_1 0x00240400 /* Second YUV Buffer */
82 #define IVTV_YUV_BUFFER_OFFSET_2 0x002d8200 /* Third YUV Buffer */
83 #define IVTV_YUV_BUFFER_OFFSET_3 0x00370000 /* Fourth YUV Buffer */
84 #define IVTV_YUV_BUFFER_UV_OFFSET 0x65400 /* Offset to UV Buffer */
85
86 /* Offset to filter table in firmware */
87 #define IVTV_YUV_HORIZONTAL_FILTER_OFFSET 0x025d8
88 #define IVTV_YUV_VERTICAL_FILTER_OFFSET 0x03358
89
90 extern const u32 yuv_offset[4];
91
92 /* Maximum ivtv driver instances.
93 Based on 6 PVR500s each with two PVR15s...
94 TODO: make this dynamic. I believe it is only a global in order to support
95 ivtv-fb. There must be a better way to do that. */
96 #define IVTV_MAX_CARDS 12
97
98 /* Supported cards */
99 #define IVTV_CARD_PVR_250 0 /* WinTV PVR 250 */
100 #define IVTV_CARD_PVR_350 1 /* encoder, decoder, tv-out */
101 #define IVTV_CARD_PVR_150 2 /* WinTV PVR 150 and PVR 500 (really just two
102 PVR150s on one PCI board) */
103 #define IVTV_CARD_M179 3 /* AVerMedia M179 (encoder only) */
104 #define IVTV_CARD_MPG600 4 /* Kuroutoshikou ITVC16-STVLP/YUAN MPG600, encoder only */
105 #define IVTV_CARD_MPG160 5 /* Kuroutoshikou ITVC15-STVLP/YUAN MPG160
106 cx23415 based, but does not have tv-out */
107 #define IVTV_CARD_PG600 6 /* YUAN PG600/DIAMONDMM PVR-550 based on the CX Falcon 2 */
108 #define IVTV_CARD_AVC2410 7 /* Adaptec AVC-2410 */
109 #define IVTV_CARD_AVC2010 8 /* Adaptec AVD-2010 (No Tuner) */
110 #define IVTV_CARD_TG5000TV 9 /* NAGASE TRANSGEAR 5000TV, encoder only */
111 #define IVTV_CARD_VA2000MAX_SNT6 10 /* VA2000MAX-STN6 */
112 #define IVTV_CARD_CX23416GYC 11 /* Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */
113 #define IVTV_CARD_GV_MVPRX 12 /* I/O Data GV-MVP/RX, RX2, RX2W */
114 #define IVTV_CARD_GV_MVPRX2E 13 /* I/O Data GV-MVP/RX2E */
115 #define IVTV_CARD_GOTVIEW_PCI_DVD 14 /* GotView PCI DVD */
116 #define IVTV_CARD_GOTVIEW_PCI_DVD2 15 /* GotView PCI DVD2 */
117 #define IVTV_CARD_YUAN_MPC622 16 /* Yuan MPC622 miniPCI */
118 #define IVTV_CARD_DCTMTVP1 17 /* DIGITAL COWBOY DCT-MTVP1 */
119 #ifdef HAVE_XC3028
120 #define IVTV_CARD_PG600V2 18 /* Yuan PG600V2/GotView PCI DVD Lite/Club3D ZAP-TV1x01 */
121 #define IVTV_CARD_LAST 18
122 #else
123 #define IVTV_CARD_LAST 17
124 #endif
125
126 /* Variants of existing cards but with the same PCI IDs. The driver
127 detects these based on other device information.
128 These cards must always come last.
129 New cards must be inserted above, and the indices of the cards below
130 must be adjusted accordingly. */
131
132 /* PVR-350 V1 (uses saa7114) */
133 #define IVTV_CARD_PVR_350_V1 (IVTV_CARD_LAST+1)
134 /* 2 variants of Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */
135 #define IVTV_CARD_CX23416GYC_NOGR (IVTV_CARD_LAST+2)
136 #define IVTV_CARD_CX23416GYC_NOGRYCS (IVTV_CARD_LAST+3)
137
138 #define IVTV_ENC_STREAM_TYPE_MPG 0
139 #define IVTV_ENC_STREAM_TYPE_YUV 1
140 #define IVTV_ENC_STREAM_TYPE_VBI 2
141 #define IVTV_ENC_STREAM_TYPE_PCM 3
142 #define IVTV_ENC_STREAM_TYPE_RAD 4
143 #define IVTV_DEC_STREAM_TYPE_MPG 5
144 #define IVTV_DEC_STREAM_TYPE_VBI 6
145 #define IVTV_DEC_STREAM_TYPE_VOUT 7
146 #define IVTV_DEC_STREAM_TYPE_YUV 8
147 #define IVTV_MAX_STREAMS 9
148
149 #define IVTV_V4L2_DEC_MPG_OFFSET 16 /* offset from 0 to register decoder mpg v4l2 minors on */
150 #define IVTV_V4L2_ENC_PCM_OFFSET 24 /* offset from 0 to register pcm v4l2 minors on */
151 #define IVTV_V4L2_ENC_YUV_OFFSET 32 /* offset from 0 to register yuv v4l2 minors on */
152 #define IVTV_V4L2_DEC_YUV_OFFSET 48 /* offset from 0 to register decoder yuv v4l2 minors on */
153 #define IVTV_V4L2_DEC_VBI_OFFSET 8 /* offset from 0 to register decoder vbi input v4l2 minors on */
154 #define IVTV_V4L2_DEC_VOUT_OFFSET 16 /* offset from 0 to register vbi output v4l2 minors on */
155
156 #define IVTV_ENC_MEM_START 0x00000000
157 #define IVTV_DEC_MEM_START 0x01000000
158
159 /* system vendor and device IDs */
160 #define PCI_VENDOR_ID_ICOMP 0x4444
161 #define PCI_DEVICE_ID_IVTV15 0x0803
162 #define PCI_DEVICE_ID_IVTV16 0x0016
163
164 /* subsystem vendor ID */
165 #define IVTV_PCI_ID_HAUPPAUGE 0x0070
166 #define IVTV_PCI_ID_HAUPPAUGE_ALT1 0x0270
167 #define IVTV_PCI_ID_HAUPPAUGE_ALT2 0x4070
168 #define IVTV_PCI_ID_ADAPTEC 0x9005
169 #define IVTV_PCI_ID_AVERMEDIA 0x1461
170 #define IVTV_PCI_ID_YUAN1 0x12ab
171 #define IVTV_PCI_ID_YUAN2 0xff01
172 #define IVTV_PCI_ID_YUAN3 0xffab
173 #define IVTV_PCI_ID_YUAN4 0xfbab
174 #define IVTV_PCI_ID_DIAMONDMM 0xff92
175 #define IVTV_PCI_ID_IODATA 0x10fc
176 #define IVTV_PCI_ID_MELCO 0x1154
177 #define IVTV_PCI_ID_GOTVIEW1 0xffac
178 #define IVTV_PCI_ID_GOTVIEW2 0xffad
179
180 /* Decoder Buffer hardware size on Chip */
181 #define IVTV_DEC_MAX_BUF 0x00100000 /* max bytes in decoder buffer */
182 #define IVTV_DEC_MIN_BUF 0x00010000 /* min bytes in dec buffer */
183
184 /* ======================================================================== */
185 /* ========================== START USER SETTABLE DMA VARIABLES =========== */
186 /* ======================================================================== */
187
188 #define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */
189
190 /* DMA Buffers, Default size in MB allocated */
191 #define IVTV_DEFAULT_ENC_MPG_BUFFERS 4
192 #define IVTV_DEFAULT_ENC_YUV_BUFFERS 2
193 #define IVTV_DEFAULT_ENC_VBI_BUFFERS 1
194 #define IVTV_DEFAULT_ENC_PCM_BUFFERS 1
195 #define IVTV_DEFAULT_DEC_MPG_BUFFERS 1
196 #define IVTV_DEFAULT_DEC_YUV_BUFFERS 1
197 #define IVTV_DEFAULT_DEC_VBI_BUFFERS 1
198
199 /* ======================================================================== */
200 /* ========================== END USER SETTABLE DMA VARIABLES ============= */
201 /* ======================================================================== */
202
203 /* Decoder Status Register */
204 #define IVTV_DMA_ERR_LIST 0x00000010
205 #define IVTV_DMA_ERR_WRITE 0x00000008
206 #define IVTV_DMA_ERR_READ 0x00000004
207 #define IVTV_DMA_SUCCESS_WRITE 0x00000002
208 #define IVTV_DMA_SUCCESS_READ 0x00000001
209 #define IVTV_DMA_READ_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_READ)
210 #define IVTV_DMA_WRITE_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE)
211 #define IVTV_DMA_ERR (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE | IVTV_DMA_ERR_READ)
212
213 /* DMA Registers */
214 #define IVTV_REG_DMAXFER (0x0000)
215 #define IVTV_REG_DMASTATUS (0x0004)
216 #define IVTV_REG_DECDMAADDR (0x0008)
217 #define IVTV_REG_ENCDMAADDR (0x000c)
218 #define IVTV_REG_DMACONTROL (0x0010)
219 #define IVTV_REG_IRQSTATUS (0x0040)
220 #define IVTV_REG_IRQMASK (0x0048)
221
222 /* Setup Registers */
223 #define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8)
224 #define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC)
225 #define IVTV_REG_DEC_SDRAM_REFRESH (0x08F8)
226 #define IVTV_REG_DEC_SDRAM_PRECHARGE (0x08FC)
227 #define IVTV_REG_VDM (0x2800)
228 #define IVTV_REG_AO (0x2D00)
229 #define IVTV_REG_BYTEFLUSH (0x2D24)
230 #define IVTV_REG_SPU (0x9050)
231 #define IVTV_REG_HW_BLOCKS (0x9054)
232 #define IVTV_REG_VPU (0x9058)
233 #define IVTV_REG_APU (0xA064)
234
235 #define IVTV_IRQ_ENC_START_CAP (0x1 << 31)
236 #define IVTV_IRQ_ENC_EOS (0x1 << 30)
237 #define IVTV_IRQ_ENC_VBI_CAP (0x1 << 29)
238 #define IVTV_IRQ_ENC_VIM_RST (0x1 << 28)
239 #define IVTV_IRQ_ENC_DMA_COMPLETE (0x1 << 27)
240 #define IVTV_IRQ_ENC_PIO_COMPLETE (0x1 << 25)
241 #define IVTV_IRQ_DEC_AUD_MODE_CHG (0x1 << 24)
242 #define IVTV_IRQ_DEC_DATA_REQ (0x1 << 22)
243 #define IVTV_IRQ_DEC_DMA_COMPLETE (0x1 << 20)
244 #define IVTV_IRQ_DEC_VBI_RE_INSERT (0x1 << 19)
245 #define IVTV_IRQ_DMA_ERR (0x1 << 18)
246 #define IVTV_IRQ_DMA_WRITE (0x1 << 17)
247 #define IVTV_IRQ_DMA_READ (0x1 << 16)
248 #define IVTV_IRQ_DEC_VSYNC (0x1 << 10)
249
250 /* IRQ Masks */
251 #define IVTV_IRQ_MASK_INIT (IVTV_IRQ_DMA_ERR|IVTV_IRQ_ENC_DMA_COMPLETE|\
252 IVTV_IRQ_DMA_READ|IVTV_IRQ_ENC_PIO_COMPLETE)
253
254 #define IVTV_IRQ_MASK_CAPTURE (IVTV_IRQ_ENC_START_CAP | IVTV_IRQ_ENC_EOS)
255 #define IVTV_IRQ_MASK_DECODE (IVTV_IRQ_DEC_DATA_REQ|IVTV_IRQ_DEC_AUD_MODE_CHG)
256
257 /* i2c stuff */
258 #define I2C_CLIENTS_MAX 16
259
260 /* debugging */
261
262 #define IVTV_DBGFLG_WARN (1 << 0)
263 #define IVTV_DBGFLG_INFO (1 << 1)
264 #define IVTV_DBGFLG_API (1 << 2)
265 #define IVTV_DBGFLG_DMA (1 << 3)
266 #define IVTV_DBGFLG_IOCTL (1 << 4)
267 #define IVTV_DBGFLG_I2C (1 << 5)
268 #define IVTV_DBGFLG_IRQ (1 << 6)
269 #define IVTV_DBGFLG_DEC (1 << 7)
270 #define IVTV_DBGFLG_YUV (1 << 8)
271 /* Flag to turn on high volume debugging */
272 #define IVTV_DBGFLG_HIGHVOL (1 << 9)
273
274 /* NOTE: extra space before comma in 'itv->num , ## args' is required for
275 gcc-2.95, otherwise it won't compile. */
276 #define IVTV_DEBUG(x, type, fmt, args...) \
277 do { \
278 if ((x) & ivtv_debug) \
279 printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \
280 } while (0)
281 #define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warning", fmt , ## args)
282 #define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info",fmt , ## args)
283 #define IVTV_DEBUG_API(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_API, "api", fmt , ## args)
284 #define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
285 #define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
286 #define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
287 #define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
288 #define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
289 #define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
290
291 #define IVTV_DEBUG_HIGH_VOL(x, type, fmt, args...) \
292 do { \
293 if (((x) & ivtv_debug) && (ivtv_debug & IVTV_DBGFLG_HIGHVOL)) \
294 printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \
295 } while (0)
296 #define IVTV_DEBUG_HI_WARN(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_WARN, "warning", fmt , ## args)
297 #define IVTV_DEBUG_HI_INFO(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_INFO, "info",fmt , ## args)
298 #define IVTV_DEBUG_HI_API(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_API, "api", fmt , ## args)
299 #define IVTV_DEBUG_HI_DMA(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
300 #define IVTV_DEBUG_HI_IOCTL(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
301 #define IVTV_DEBUG_HI_I2C(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
302 #define IVTV_DEBUG_HI_IRQ(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
303 #define IVTV_DEBUG_HI_DEC(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
304 #define IVTV_DEBUG_HI_YUV(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
305
306 #define IVTV_FB_DEBUG(x, type, fmt, args...) \
307 do { \
308 if ((x) & ivtv_debug) \
309 printk(KERN_INFO "ivtv%d-fb " type ": " fmt, itv->num , ## args); \
310 } while (0)
311 #define IVTV_FB_DEBUG_WARN(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_WARN, "warning", fmt , ## args)
312 #define IVTV_FB_DEBUG_INFO(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_INFO, "info", fmt , ## args)
313 #define IVTV_FB_DEBUG_API(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_API, "api", fmt , ## args)
314 #define IVTV_FB_DEBUG_DMA(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
315 #define IVTV_FB_DEBUG_IOCTL(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
316 #define IVTV_FB_DEBUG_I2C(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
317 #define IVTV_FB_DEBUG_IRQ(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
318 #define IVTV_FB_DEBUG_DEC(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
319 #define IVTV_FB_DEBUG_YUV(fmt, args...) IVTV_FB_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
320
321 /* Standard kernel messages */
322 #define IVTV_ERR(fmt, args...) printk(KERN_ERR "ivtv%d: " fmt, itv->num , ## args)
323 #define IVTV_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d: " fmt, itv->num , ## args)
324 #define IVTV_INFO(fmt, args...) printk(KERN_INFO "ivtv%d: " fmt, itv->num , ## args)
325 #define IVTV_FB_ERR(fmt, args...) printk(KERN_ERR "ivtv%d-fb: " fmt, itv->num , ## args)
326 #define IVTV_FB_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d-fb: " fmt, itv->num , ## args)
327 #define IVTV_FB_INFO(fmt, args...) printk(KERN_INFO "ivtv%d-fb: " fmt, itv->num , ## args)
328
329 /* Values for IVTV_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */
330 #define MPEG_FRAME_TYPE_IFRAME 1
331 #define MPEG_FRAME_TYPE_IFRAME_PFRAME 3
332 #define MPEG_FRAME_TYPE_ALL 7
333
334 /* output modes (cx23415 only) */
335 #define OUT_NONE 0
336 #define OUT_MPG 1
337 #define OUT_YUV 2
338 #define OUT_UDMA_YUV 3
339 #define OUT_PASSTHROUGH 4
340
341 #define IVTV_MAX_PGM_INDEX (400)
342
343 extern int ivtv_debug;
344
345
346 struct ivtv_options {
347 int megabytes[IVTV_MAX_STREAMS]; /* Size in megabytes of each stream */
348 int cardtype; /* force card type on load */
349 int tuner; /* set tuner on load */
350 int radio; /* enable/disable radio */
351 int newi2c; /* New I2C algorithm */
352 };
353
354 #define IVTV_MBOX_DMA_START 6
355 #define IVTV_MBOX_DMA_END 8
356 #define IVTV_MBOX_DMA 9
357 #define IVTV_MBOX_FIELD_DISPLAYED 8
358
359 /* ivtv-specific mailbox template */
360 struct ivtv_mailbox {
361 u32 flags;
362 u32 cmd;
363 u32 retval;
364 u32 timeout;
365 u32 data[CX2341X_MBOX_MAX_DATA];
366 };
367
368 struct ivtv_api_cache {
369 unsigned long last_jiffies; /* when last command was issued */
370 u32 data[CX2341X_MBOX_MAX_DATA]; /* last sent api data */
371 };
372
373 struct ivtv_mailbox_data {
374 volatile struct ivtv_mailbox __iomem *mbox;
375 /* Bits 0-2 are for the encoder mailboxes, 0-1 are for the decoder mailboxes.
376 If the bit is set, then the corresponding mailbox is in use by the driver. */
377 unsigned long busy;
378 u8 max_mbox;
379 };
380
381 /* per-buffer bit flags */
382 #define IVTV_F_B_NEED_BUF_SWAP 0 /* this buffer should be byte swapped */
383
384 /* per-stream, s_flags */
385 #define IVTV_F_S_DMA_PENDING 0 /* this stream has pending DMA */
386 #define IVTV_F_S_DMA_HAS_VBI 1 /* the current DMA request also requests VBI data */
387 #define IVTV_F_S_NEEDS_DATA 2 /* this decoding stream needs more data */
388
389 #define IVTV_F_S_CLAIMED 3 /* this stream is claimed */
390 #define IVTV_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
391 #define IVTV_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
392 #define IVTV_F_S_PASSTHROUGH 6 /* this stream is in passthrough mode */
393 #define IVTV_F_S_STREAMOFF 7 /* signal end of stream EOS */
394 #define IVTV_F_S_APPL_IO 8 /* this stream is used read/written by an application */
395
396 #define IVTV_F_S_PIO_PENDING 9 /* this stream has pending PIO */
397 #define IVTV_F_S_PIO_HAS_VBI 1 /* the current PIO request also requests VBI data */
398
399 /* per-ivtv, i_flags */
400 #define IVTV_F_I_DMA 0 /* DMA in progress */
401 #define IVTV_F_I_UDMA 1 /* UDMA in progress */
402 #define IVTV_F_I_UDMA_PENDING 2 /* UDMA pending */
403 #define IVTV_F_I_SPEED_CHANGE 3 /* A speed change is in progress */
404 #define IVTV_F_I_EOS 4 /* End of encoder stream reached */
405 #define IVTV_F_I_RADIO_USER 5 /* The radio tuner is selected */
406 #define IVTV_F_I_DIG_RST 6 /* Reset digitizer */
407 #define IVTV_F_I_DEC_YUV 7 /* YUV instead of MPG is being decoded */
408 #define IVTV_F_I_ENC_VBI 8 /* VBI DMA */
409 #define IVTV_F_I_UPDATE_CC 9 /* CC should be updated */
410 #define IVTV_F_I_UPDATE_WSS 10 /* WSS should be updated */
411 #define IVTV_F_I_UPDATE_VPS 11 /* VPS should be updated */
412 #define IVTV_F_I_DECODING_YUV 12 /* this stream is YUV frame decoding */
413 #define IVTV_F_I_ENC_PAUSED 13 /* the encoder is paused */
414 #define IVTV_F_I_VALID_DEC_TIMINGS 14 /* last_dec_timing is valid */
415 #define IVTV_F_I_HAVE_WORK 15 /* Used in the interrupt handler: there is work to be done */
416 #define IVTV_F_I_WORK_HANDLER_VBI 16 /* there is work to be done for VBI */
417 #define IVTV_F_I_WORK_HANDLER_YUV 17 /* there is work to be done for YUV */
418 #define IVTV_F_I_WORK_HANDLER_PIO 18 /* there is work to be done for PIO */
419 #define IVTV_F_I_PIO 19 /* PIO in progress */
420
421 /* Event notifications */
422 #define IVTV_F_I_EV_DEC_STOPPED 28 /* decoder stopped event */
423 #define IVTV_F_I_EV_VSYNC 29 /* VSYNC event */
424 #define IVTV_F_I_EV_VSYNC_FIELD 30 /* VSYNC event field (0 = first, 1 = second field) */
425 #define IVTV_F_I_EV_VSYNC_ENABLED 31 /* VSYNC event enabled */
426
427 /* Scatter-Gather array element, used in DMA transfers */
428 struct ivtv_SG_element {
429 u32 src;
430 u32 dst;
431 u32 size;
432 };
433
434 struct ivtv_user_dma {
435 struct mutex lock;
436 int page_count;
437 struct page *map[IVTV_DMA_SG_OSD_ENT];
438
439 /* Base Dev SG Array for cx23415/6 */
440 struct ivtv_SG_element SGarray[IVTV_DMA_SG_OSD_ENT];
441 dma_addr_t SG_handle;
442 int SG_length;
443
444 /* SG List of Buffers */
445 struct scatterlist SGlist[IVTV_DMA_SG_OSD_ENT];
446 };
447
448 struct ivtv_dma_page_info {
449 unsigned long uaddr;
450 unsigned long first;
451 unsigned long last;
452 unsigned int offset;
453 unsigned int tail;
454 int page_count;
455 };
456
457 struct ivtv_buffer {
458 struct list_head list;
459 dma_addr_t dma_handle;
460 unsigned long b_flags;
461 char *buf;
462
463 u32 bytesused;
464 u32 readpos;
465 };
466
467 struct ivtv_queue {
468 struct list_head list;
469 u32 buffers;
470 u32 length;
471 u32 bytesused;
472 };
473
474 struct ivtv; /* forward reference */
475
476 struct ivtv_stream {
477 /* These first four fields are always set, even if the stream
478 is not actually created. */
479 struct video_device *v4l2dev; /* NULL when stream not created */
480 struct ivtv *itv; /* for ease of use */
481 const char *name; /* name of the stream */
482 int type; /* stream type */
483
484 u32 id;
485 spinlock_t qlock; /* locks access to the queues */
486 unsigned long s_flags; /* status flags, see above */
487 int dma; /* can be PCI_DMA_TODEVICE,
488 PCI_DMA_FROMDEVICE or
489 PCI_DMA_NONE */
490 u32 dma_offset;
491 u32 dma_backup;
492 u64 dma_pts;
493
494 int subtype;
495 wait_queue_head_t waitq;
496 u32 dma_last_offset;
497
498 /* Buffer Stats */
499 u32 buffers;
500 u32 buf_size;
501 u32 buffers_stolen;
502
503 /* Buffer Queues */
504 struct ivtv_queue q_free; /* free buffers */
505 struct ivtv_queue q_full; /* full buffers */
506 struct ivtv_queue q_io; /* waiting for I/O */
507 struct ivtv_queue q_dma; /* waiting for DMA */
508 struct ivtv_queue q_predma; /* waiting for DMA */
509
510 /* Base Dev SG Array for cx23415/6 */
511 struct ivtv_SG_element *SGarray;
512 struct ivtv_SG_element *PIOarray;
513 dma_addr_t SG_handle;
514 int SG_length;
515
516 /* SG List of Buffers */
517 struct scatterlist *SGlist;
518 };
519
520 struct ivtv_open_id {
521 u32 open_id;
522 int type;
523 enum v4l2_priority prio;
524 struct ivtv *itv;
525 };
526
527 #define IVTV_YUV_UPDATE_HORIZONTAL 0x01
528 #define IVTV_YUV_UPDATE_VERTICAL 0x02
529
530 struct yuv_frame_info
531 {
532 u32 update;
533 int src_x;
534 int src_y;
535 unsigned int src_w;
536 unsigned int src_h;
537 int dst_x;
538 int dst_y;
539 unsigned int dst_w;
540 unsigned int dst_h;
541 int pan_x;
542 int pan_y;
543 u32 vis_w;
544 u32 vis_h;
545 u32 interlaced_y;
546 u32 interlaced_uv;
547 int tru_x;
548 u32 tru_w;
549 u32 tru_h;
550 u32 offset_y;
551 };
552
553 #define IVTV_YUV_MODE_INTERLACED 0x00
554 #define IVTV_YUV_MODE_PROGRESSIVE 0x01
555 #define IVTV_YUV_MODE_AUTO 0x02
556 #define IVTV_YUV_MODE_MASK 0x03
557
558 #define IVTV_YUV_SYNC_EVEN 0x00
559 #define IVTV_YUV_SYNC_ODD 0x04
560 #define IVTV_YUV_SYNC_MASK 0x04
561
562 struct yuv_playback_info
563 {
564 u32 reg_2834;
565 u32 reg_2838;
566 u32 reg_283c;
567 u32 reg_2840;
568 u32 reg_2844;
569 u32 reg_2848;
570 u32 reg_2854;
571 u32 reg_285c;
572 u32 reg_2864;
573
574 u32 reg_2870;
575 u32 reg_2874;
576 u32 reg_2890;
577 u32 reg_2898;
578 u32 reg_289c;
579
580 u32 reg_2918;
581 u32 reg_291c;
582 u32 reg_2920;
583 u32 reg_2924;
584 u32 reg_2928;
585 u32 reg_292c;
586 u32 reg_2930;
587
588 u32 reg_2934;
589
590 u32 reg_2938;
591 u32 reg_293c;
592 u32 reg_2940;
593 u32 reg_2944;
594 u32 reg_2948;
595 u32 reg_294c;
596 u32 reg_2950;
597 u32 reg_2954;
598 u32 reg_2958;
599 u32 reg_295c;
600 u32 reg_2960;
601 u32 reg_2964;
602 u32 reg_2968;
603 u32 reg_296c;
604
605 u32 reg_2970;
606
607 int v_filter_1;
608 int v_filter_2;
609 int h_filter;
610
611 u32 osd_x_offset;
612 u32 osd_y_offset;
613
614 u32 osd_x_pan;
615 u32 osd_y_pan;
616
617 u32 osd_vis_w;
618 u32 osd_vis_h;
619
620 int decode_height;
621
622 int frame_interlaced;
623 int frame_interlaced_last;
624
625 int lace_mode;
626 int lace_threshold;
627 int lace_sync_field;
628
629 atomic_t next_dma_frame;
630 atomic_t next_fill_frame;
631
632 u32 yuv_forced_update;
633 int update_frame;
634 struct yuv_frame_info new_frame_info[4];
635 struct yuv_frame_info old_frame_info;
636 struct yuv_frame_info old_frame_info_args;
637
638 void *blanking_ptr;
639 dma_addr_t blanking_dmaptr;
640 };
641
642 #define IVTV_VBI_FRAMES 32
643
644 /* VBI data */
645 struct vbi_info {
646 u32 dec_start;
647 u32 enc_start, enc_size;
648 int fpi;
649 u32 frame;
650 u32 dma_offset;
651 u8 cc_data_odd[256];
652 u8 cc_data_even[256];
653 int cc_pos;
654 u8 cc_no_update;
655 u8 vps[5];
656 u8 vps_found;
657 int wss;
658 u8 wss_found;
659 u8 wss_no_update;
660 u32 raw_decoder_line_size;
661 u8 raw_decoder_sav_odd_field;
662 u8 raw_decoder_sav_even_field;
663 u32 sliced_decoder_line_size;
664 u8 sliced_decoder_sav_odd_field;
665 u8 sliced_decoder_sav_even_field;
666 struct v4l2_format in;
667 /* convenience pointer to sliced struct in vbi_in union */
668 struct v4l2_sliced_vbi_format *sliced_in;
669 u32 service_set_in;
670 int insert_mpeg;
671
672 /* Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
673 One for /dev/vbi0 and one for /dev/vbi8 */
674 struct v4l2_sliced_vbi_data sliced_data[36];
675 struct v4l2_sliced_vbi_data sliced_dec_data[36];
676
677 /* Buffer for VBI data inserted into MPEG stream.
678 The first byte is a dummy byte that's never used.
679 The next 16 bytes contain the MPEG header for the VBI data,
680 the remainder is the actual VBI data.
681 The max size accepted by the MPEG VBI reinsertion turns out
682 to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,
683 where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is
684 a single line header byte and 2 * 18 is the number of VBI lines per frame.
685
686 However, it seems that the data must be 1K aligned, so we have to
687 pad the data until the 1 or 2 K boundary.
688
689 This pointer array will allocate 2049 bytes to store each VBI frame. */
690 u8 *sliced_mpeg_data[IVTV_VBI_FRAMES];
691 u32 sliced_mpeg_size[IVTV_VBI_FRAMES];
692 struct ivtv_buffer sliced_mpeg_buf;
693 u32 inserted_frame;
694
695 u32 start[2], count;
696 u32 raw_size;
697 u32 sliced_size;
698 };
699
700 /* forward declaration of struct defined in ivtv-cards.h */
701 struct ivtv_card;
702
703 /* Struct to hold info about ivtv cards */
704 struct ivtv {
705 int num; /* board number, -1 during init! */
706 char name[8]; /* board name for printk and interrupts (e.g. 'ivtv0') */
707 struct pci_dev *dev; /* PCI device */
708 const struct ivtv_card *card; /* card information */
709 const char *card_name; /* full name of the card */
710 u8 has_cx23415; /* 1 if it is a cx23415 based card, 0 for cx23416 */
711 u8 is_50hz;
712 u8 is_60hz;
713 u8 is_out_50hz;
714 u8 is_out_60hz;
715 u8 pvr150_workaround; /* 1 if the cx25840 needs to workaround a PVR150 bug */
716 u8 nof_inputs; /* number of video inputs */
717 u8 nof_audio_inputs; /* number of audio inputs */
718 u32 v4l2_cap; /* V4L2 capabilities of card */
719 u32 hw_flags; /* Hardware description of the board */
720
721 /* controlling Video decoder function */
722 int (*video_dec_func)(struct ivtv *, unsigned int, void *);
723
724 struct ivtv_options options; /* User options */
725 int stream_buf_size[IVTV_MAX_STREAMS]; /* Stream buffer size */
726 struct ivtv_stream streams[IVTV_MAX_STREAMS]; /* Stream data */
727 int speed;
728 u8 speed_mute_audio;
729 unsigned long i_flags; /* global ivtv flags */
730 atomic_t capturing; /* count number of active capture streams */
731 atomic_t decoding; /* count number of active decoding streams */
732 u32 irq_rr_idx; /* Round-robin stream index */
733 int cur_dma_stream; /* index of stream doing DMA */
734 int cur_pio_stream; /* index of stream doing PIO */
735 u32 dma_data_req_offset;
736 u32 dma_data_req_size;
737 int output_mode; /* NONE, MPG, YUV, UDMA YUV, passthrough */
738 spinlock_t lock; /* lock access to this struct */
739 int search_pack_header;
740
741 spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
742 struct mutex serialize_lock; /* lock used to serialize starting streams */
743
744 /* User based DMA for OSD */
745 struct ivtv_user_dma udma;
746
747 int open_id; /* incremented each time an open occurs, used as unique ID.
748 starts at 1, so 0 can be used as uninitialized value
749 in the stream->id. */
750
751 u32 base_addr;
752 u32 irqmask;
753
754 struct v4l2_prio_state prio;
755 struct workqueue_struct *irq_work_queues;
756 struct work_struct irq_work_queue;
757 struct timer_list dma_timer; /* Timer used to catch unfinished DMAs */
758
759 struct vbi_info vbi;
760
761 struct ivtv_mailbox_data enc_mbox;
762 struct ivtv_mailbox_data dec_mbox;
763 struct ivtv_api_cache api_cache[256]; /* Cached API Commands */
764
765 u8 card_rev;
766 volatile void __iomem *enc_mem, *dec_mem, *reg_mem;
767
768 u32 pgm_info_offset;
769 u32 pgm_info_num;
770 u32 pgm_info_write_idx;
771 u32 pgm_info_read_idx;
772 struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX];
773
774 u64 mpg_data_received;
775 u64 vbi_data_inserted;
776
777 wait_queue_head_t cap_w;
778 /* when the next decoder event arrives this queue is woken up */
779 wait_queue_head_t event_waitq;
780 /* when the next decoder vsync arrives this queue is woken up */
781 wait_queue_head_t vsync_waitq;
782 /* when the current DMA is finished this queue is woken up */
783 wait_queue_head_t dma_waitq;
784
785 /* OSD support */
786 unsigned long osd_video_pbase;
787 int osd_global_alpha_state; /* 0=off : 1=on */
788 int osd_local_alpha_state; /* 0=off : 1=on */
789 int osd_color_key_state; /* 0=off : 1=on */
790 u8 osd_global_alpha; /* Current global alpha */
791 u32 osd_color_key; /* Current color key */
792 u32 osd_pixelformat; /* Current pixel format */
793 struct v4l2_rect osd_rect; /* Current OSD position and size */
794 struct v4l2_rect main_rect; /* Current Main window position and size */
795
796 u32 last_dec_timing[3]; /* Store last retrieved pts/scr/frame values */
797
798 /* i2c */
799 struct i2c_adapter i2c_adap;
800 struct i2c_algo_bit_data i2c_algo;
801 struct i2c_client i2c_client;
802 struct mutex i2c_bus_lock;
803 int i2c_state;
804 struct i2c_client *i2c_clients[I2C_CLIENTS_MAX];
805
806 /* v4l2 and User settings */
807
808 /* codec settings */
809 struct cx2341x_mpeg_params params;
810 u32 audio_input;
811 u32 active_input;
812 u32 active_output;
813 v4l2_std_id std;
814 v4l2_std_id std_out;
815 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
816 u8 audio_stereo_mode;
817 u8 audio_bilingual_mode;
818
819 /* dualwatch */
820 unsigned long dualwatch_jiffies;
821 u16 dualwatch_stereo_mode;
822
823 /* Digitizer type */
824 int digitizer; /* 0x00EF = saa7114 0x00FO = saa7115 0x0106 = mic */
825
826 u32 lastVsyncFrame;
827
828 struct yuv_playback_info yuv_info;
829 struct osd_info *osd_info;
830 };
831
832 /* Globals */
833 extern struct ivtv *ivtv_cards[];
834 extern int ivtv_cards_active;
835 extern int ivtv_first_minor;
836 extern spinlock_t ivtv_cards_lock;
837
838 /*==============Prototypes==================*/
839
840 /* Hardware/IRQ */
841 void ivtv_set_irq_mask(struct ivtv *itv, u32 mask);
842 void ivtv_clear_irq_mask(struct ivtv *itv, u32 mask);
843
844 /* try to set output mode, return current mode. */
845 int ivtv_set_output_mode(struct ivtv *itv, int mode);
846
847 /* return current output stream based on current mode */
848 struct ivtv_stream *ivtv_get_output_stream(struct ivtv *itv);
849
850 /* Return non-zero if a signal is pending */
851 int ivtv_sleep_timeout(int timeout, int intr);
852
853 /* Wait on queue, returns -EINTR if interrupted */
854 int ivtv_waitq(wait_queue_head_t *waitq);
855
856 /* Read Hauppauge eeprom */
857 struct tveeprom; /* forward reference */
858 void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);
859
860 /* This is a PCI post thing, where if the pci register is not read, then
861 the write doesn't always take effect right away. By reading back the
862 register any pending PCI writes will be performed (in order), and so
863 you can be sure that the writes are guaranteed to be done.
864
865 Rarely needed, only in some timing sensitive cases.
866 Apparently if this is not done some motherboards seem
867 to kill the firmware and get into the broken state until computer is
868 rebooted. */
869 #define write_sync(val, reg) \
870 do { writel(val, reg); readl(reg); } while (0)
871
872 #define read_reg(reg) readl(itv->reg_mem + (reg))
873 #define write_reg(val, reg) writel(val, itv->reg_mem + (reg))
874 #define write_reg_sync(val, reg) \
875 do { write_reg(val, reg); read_reg(reg); } while (0)
876
877 #define read_enc(addr) readl(itv->enc_mem + (u32)(addr))
878 #define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr))
879 #define write_enc_sync(val, addr) \
880 do { write_enc(val, addr); read_enc(addr); } while (0)
881
882 #define read_dec(addr) readl(itv->dec_mem + (u32)(addr))
883 #define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr))
884 #define write_dec_sync(val, addr) \
885 do { write_dec(val, addr); read_dec(addr); } while (0)
886
887 #endif /* IVTV_DRIVER_H */