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V4L/DVB (13422): gspca - ov534: ov772x changes from Richard Kaswy.
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / video / gspca / ov534.c
1 /*
2 * ov534 gspca driver
3 *
4 * Copyright (C) 2008 Antonio Ospite <ospite@studenti.unina.it>
5 * Copyright (C) 2008 Jim Paris <jim@jtan.com>
6 * Copyright (C) 2009 Jean-Francois Moine http://moinejf.free.fr
7 *
8 * Based on a prototype written by Mark Ferrell <majortrips@gmail.com>
9 * USB protocol reverse engineered by Jim Paris <jim@jtan.com>
10 * https://jim.sh/svn/jim/devl/playstation/ps3/eye/test/
11 *
12 * PS3 Eye camera enhanced by Richard Kaswy http://kaswy.free.fr
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
27 */
28
29 #define MODULE_NAME "ov534"
30
31 #include "gspca.h"
32
33 #define OV534_REG_ADDRESS 0xf1 /* sensor address */
34 #define OV534_REG_SUBADDR 0xf2
35 #define OV534_REG_WRITE 0xf3
36 #define OV534_REG_READ 0xf4
37 #define OV534_REG_OPERATION 0xf5
38 #define OV534_REG_STATUS 0xf6
39
40 #define OV534_OP_WRITE_3 0x37
41 #define OV534_OP_WRITE_2 0x33
42 #define OV534_OP_READ_2 0xf9
43
44 #define CTRL_TIMEOUT 500
45
46 MODULE_AUTHOR("Antonio Ospite <ospite@studenti.unina.it>");
47 MODULE_DESCRIPTION("GSPCA/OV534 USB Camera Driver");
48 MODULE_LICENSE("GPL");
49
50 /* specific webcam descriptor */
51 struct sd {
52 struct gspca_dev gspca_dev; /* !! must be the first item */
53 __u32 last_pts;
54 u16 last_fid;
55 u8 frame_rate;
56 u8 gain;
57 u8 exposure;
58 u8 redblc;
59 u8 blueblc;
60 u8 autogain;
61 u8 sharpness;
62 u8 hflip;
63 u8 vflip;
64
65 u8 sensor;
66 #define SENSOR_OV772X 0
67 #define SENSOR_OV965X 1
68 };
69
70 /* V4L2 controls supported by the driver */
71 static int sd_setgain(struct gspca_dev *gspca_dev, __s32 val);
72 static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val);
73 static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val);
74 static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val);
75 static int sd_setredblc(struct gspca_dev *gspca_dev, __s32 val);
76 static int sd_getredblc(struct gspca_dev *gspca_dev, __s32 *val);
77 static int sd_setblueblc(struct gspca_dev *gspca_dev, __s32 val);
78 static int sd_getblueblc(struct gspca_dev *gspca_dev, __s32 *val);
79 static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
80 static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val);
81 static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val);
82 static int sd_getsharpness(struct gspca_dev *gspca_dev, __s32 *val);
83 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
84 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
85 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
86 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
87
88 static struct ctrl sd_ctrls_ov772x[] = {
89 {
90 {
91 .id = V4L2_CID_GAIN,
92 .type = V4L2_CTRL_TYPE_INTEGER,
93 .name = "Main Gain",
94 .minimum = 0,
95 .maximum = 63,
96 .step = 1,
97 #define GAIN_DEF 20
98 .default_value = GAIN_DEF,
99 },
100 .set = sd_setgain,
101 .get = sd_getgain,
102 },
103 {
104 {
105 .id = V4L2_CID_EXPOSURE,
106 .type = V4L2_CTRL_TYPE_INTEGER,
107 .name = "Exposure",
108 .minimum = 0,
109 .maximum = 255,
110 .step = 1,
111 #define EXPO_DEF 255
112 .default_value = EXPO_DEF,
113 },
114 .set = sd_setexposure,
115 .get = sd_getexposure,
116 },
117 {
118 {
119 .id = V4L2_CID_RED_BALANCE,
120 .type = V4L2_CTRL_TYPE_INTEGER,
121 .name = "Red Balance",
122 .minimum = 0,
123 .maximum = 255,
124 .step = 1,
125 #define RED_BALANCE_DEF 128
126 .default_value = RED_BALANCE_DEF,
127 },
128 .set = sd_setredblc,
129 .get = sd_getredblc,
130 },
131 {
132 {
133 .id = V4L2_CID_BLUE_BALANCE,
134 .type = V4L2_CTRL_TYPE_INTEGER,
135 .name = "Blue Balance",
136 .minimum = 0,
137 .maximum = 255,
138 .step = 1,
139 #define BLUE_BALANCE_DEF 128
140 .default_value = BLUE_BALANCE_DEF,
141 },
142 .set = sd_setblueblc,
143 .get = sd_getblueblc,
144 },
145 {
146 {
147 .id = V4L2_CID_AUTOGAIN,
148 .type = V4L2_CTRL_TYPE_BOOLEAN,
149 .name = "Autogain",
150 .minimum = 0,
151 .maximum = 1,
152 .step = 1,
153 #define AUTOGAIN_DEF 1
154 .default_value = AUTOGAIN_DEF,
155 },
156 .set = sd_setautogain,
157 .get = sd_getautogain,
158 },
159 {
160 {
161 .id = V4L2_CID_SHARPNESS,
162 .type = V4L2_CTRL_TYPE_INTEGER,
163 .name = "Sharpness",
164 .minimum = 0,
165 .maximum = 63,
166 .step = 1,
167 #define SHARPNESS_DEF 4
168 .default_value = SHARPNESS_DEF,
169 },
170 .set = sd_setsharpness,
171 .get = sd_getsharpness,
172 },
173 {
174 {
175 .id = V4L2_CID_HFLIP,
176 .type = V4L2_CTRL_TYPE_BOOLEAN,
177 .name = "HFlip",
178 .minimum = 0,
179 .maximum = 1,
180 .step = 1,
181 #define HFLIP_DEF 0
182 .default_value = HFLIP_DEF,
183 },
184 .set = sd_sethflip,
185 .get = sd_gethflip,
186 },
187 {
188 {
189 .id = V4L2_CID_VFLIP,
190 .type = V4L2_CTRL_TYPE_BOOLEAN,
191 .name = "VFlip",
192 .minimum = 0,
193 .maximum = 1,
194 .step = 1,
195 #define VFLIP_DEF 0
196 .default_value = VFLIP_DEF,
197 },
198 .set = sd_setvflip,
199 .get = sd_getvflip,
200 },
201 };
202 static struct ctrl sd_ctrls_ov965x[] = {
203 };
204
205 static const struct v4l2_pix_format vga_yuyv_mode[] = {
206 {320, 240, V4L2_PIX_FMT_YUYV, V4L2_FIELD_NONE,
207 .bytesperline = 320 * 2,
208 .sizeimage = 320 * 240 * 2,
209 .colorspace = V4L2_COLORSPACE_JPEG,
210 .priv = 1},
211 {640, 480, V4L2_PIX_FMT_YUYV, V4L2_FIELD_NONE,
212 .bytesperline = 640 * 2,
213 .sizeimage = 640 * 480 * 2,
214 .colorspace = V4L2_COLORSPACE_SRGB,
215 .priv = 0},
216 };
217
218 static const struct v4l2_pix_format vga_jpeg_mode[] = {
219 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
220 .bytesperline = 320,
221 .sizeimage = 320 * 240 * 3 / 8 + 590,
222 .colorspace = V4L2_COLORSPACE_JPEG,
223 .priv = 1},
224 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
225 .bytesperline = 640,
226 .sizeimage = 640 * 480 * 3 / 8 + 590,
227 .colorspace = V4L2_COLORSPACE_JPEG,
228 .priv = 0},
229 };
230 static const u8 bridge_init_ov772x[][2] = {
231 { 0xc2, 0x0c },
232 { 0x88, 0xf8 },
233 { 0xc3, 0x69 },
234 { 0x89, 0xff },
235 { 0x76, 0x03 },
236 { 0x92, 0x01 },
237 { 0x93, 0x18 },
238 { 0x94, 0x10 },
239 { 0x95, 0x10 },
240 { 0xe2, 0x00 },
241 { 0xe7, 0x3e },
242
243 { 0x96, 0x00 },
244
245 { 0x97, 0x20 },
246 { 0x97, 0x20 },
247 { 0x97, 0x20 },
248 { 0x97, 0x0a },
249 { 0x97, 0x3f },
250 { 0x97, 0x4a },
251 { 0x97, 0x20 },
252 { 0x97, 0x15 },
253 { 0x97, 0x0b },
254
255 { 0x8e, 0x40 },
256 { 0x1f, 0x81 },
257 { 0x34, 0x05 },
258 { 0xe3, 0x04 },
259 { 0x88, 0x00 },
260 { 0x89, 0x00 },
261 { 0x76, 0x00 },
262 { 0xe7, 0x2e },
263 { 0x31, 0xf9 },
264 { 0x25, 0x42 },
265 { 0x21, 0xf0 },
266
267 { 0x1c, 0x00 },
268 { 0x1d, 0x40 },
269 { 0x1d, 0x02 }, /* payload size 0x0200 * 4 = 2048 bytes */
270 { 0x1d, 0x00 }, /* payload size */
271
272 { 0x1d, 0x02 }, /* frame size 0x025800 * 4 = 614400 */
273 { 0x1d, 0x58 }, /* frame size */
274 { 0x1d, 0x00 }, /* frame size */
275
276 { 0x1c, 0x0a },
277 { 0x1d, 0x08 }, /* turn on UVC header */
278 { 0x1d, 0x0e }, /* .. */
279
280 { 0x8d, 0x1c },
281 { 0x8e, 0x80 },
282 { 0xe5, 0x04 },
283
284 { 0xc0, 0x50 },
285 { 0xc1, 0x3c },
286 { 0xc2, 0x0c },
287 };
288 static const u8 sensor_init_ov772x[][2] = {
289 { 0x12, 0x80 },
290 { 0x11, 0x01 },
291 /*fixme: better have a delay?*/
292 { 0x11, 0x01 },
293 { 0x11, 0x01 },
294 { 0x11, 0x01 },
295 { 0x11, 0x01 },
296 { 0x11, 0x01 },
297 { 0x11, 0x01 },
298 { 0x11, 0x01 },
299 { 0x11, 0x01 },
300 { 0x11, 0x01 },
301 { 0x11, 0x01 },
302
303 { 0x3d, 0x03 },
304 { 0x17, 0x26 },
305 { 0x18, 0xa0 },
306 { 0x19, 0x07 },
307 { 0x1a, 0xf0 },
308 { 0x32, 0x00 },
309 { 0x29, 0xa0 },
310 { 0x2c, 0xf0 },
311 { 0x65, 0x20 },
312 { 0x11, 0x01 },
313 { 0x42, 0x7f },
314 { 0x63, 0xaa }, /* was e0 */
315 { 0x64, 0xff },
316 { 0x66, 0x00 },
317 { 0x13, 0xf0 },
318 { 0x0d, 0x41 },
319 { 0x0f, 0xc5 },
320 { 0x14, 0x11 },
321
322 { 0x22, 0x7f },
323 { 0x23, 0x03 },
324 { 0x24, 0x40 },
325 { 0x25, 0x30 },
326 { 0x26, 0xa1 },
327 { 0x2a, 0x00 },
328 { 0x2b, 0x00 },
329 { 0x6b, 0xaa },
330 { 0x13, 0xff },
331
332 { 0x90, 0x05 },
333 { 0x91, 0x01 },
334 { 0x92, 0x03 },
335 { 0x93, 0x00 },
336 { 0x94, 0x60 },
337 { 0x95, 0x3c },
338 { 0x96, 0x24 },
339 { 0x97, 0x1e },
340 { 0x98, 0x62 },
341 { 0x99, 0x80 },
342 { 0x9a, 0x1e },
343 { 0x9b, 0x08 },
344 { 0x9c, 0x20 },
345 { 0x9e, 0x81 },
346
347 { 0xa6, 0x04 },
348 { 0x7e, 0x0c },
349 { 0x7f, 0x16 },
350 { 0x80, 0x2a },
351 { 0x81, 0x4e },
352 { 0x82, 0x61 },
353 { 0x83, 0x6f },
354 { 0x84, 0x7b },
355 { 0x85, 0x86 },
356 { 0x86, 0x8e },
357 { 0x87, 0x97 },
358 { 0x88, 0xa4 },
359 { 0x89, 0xaf },
360 { 0x8a, 0xc5 },
361 { 0x8b, 0xd7 },
362 { 0x8c, 0xe8 },
363 { 0x8d, 0x20 },
364
365 { 0x0c, 0x90 },
366
367 { 0x2b, 0x00 },
368 { 0x22, 0x7f },
369 { 0x23, 0x03 },
370 { 0x11, 0x01 },
371 { 0x0c, 0xd0 },
372 { 0x64, 0xff },
373 { 0x0d, 0x41 },
374
375 { 0x14, 0x41 },
376 { 0x0e, 0xcd },
377 { 0xac, 0xbf },
378 { 0x8e, 0x00 },
379 { 0x0c, 0xd0 }
380 };
381 static const u8 bridge_start_ov772x_vga[][2] = {
382 {0x1c, 0x00},
383 {0x1d, 0x40},
384 {0x1d, 0x02},
385 {0x1d, 0x00},
386 {0x1d, 0x02},
387 {0x1d, 0x58},
388 {0x1d, 0x00},
389 {0xc0, 0x50},
390 {0xc1, 0x3c},
391 };
392 static const u8 sensor_start_ov772x_vga[][2] = {
393 {0x12, 0x00},
394 {0x17, 0x26},
395 {0x18, 0xa0},
396 {0x19, 0x07},
397 {0x1a, 0xf0},
398 {0x29, 0xa0},
399 {0x2c, 0xf0},
400 };
401 static const u8 bridge_start_ov772x_qvga[][2] = {
402 {0x1c, 0x00},
403 {0x1d, 0x40},
404 {0x1d, 0x02},
405 {0x1d, 0x00},
406 {0x1d, 0x01},
407 {0x1d, 0x4b},
408 {0x1d, 0x00},
409 {0xc0, 0x28},
410 {0xc1, 0x1e},
411 };
412 static const u8 sensor_start_ov772x_qvga[][2] = {
413 {0x12, 0x40},
414 {0x17, 0x3f},
415 {0x18, 0x50},
416 {0x19, 0x03},
417 {0x1a, 0x78},
418 {0x29, 0x50},
419 {0x2c, 0x78},
420 };
421
422 static const u8 bridge_init_ov965x[][2] = {
423 {0x88, 0xf8},
424 {0x89, 0xff},
425 {0x76, 0x03},
426 {0x92, 0x03},
427 {0x95, 0x10},
428 {0xe2, 0x00},
429 {0xe7, 0x3e},
430 {0x8d, 0x1c},
431 {0x8e, 0x00},
432 {0x8f, 0x00},
433 {0x1f, 0x00},
434 {0xc3, 0xf9},
435 {0x89, 0xff},
436 {0x88, 0xf8},
437 {0x76, 0x03},
438 {0x92, 0x01},
439 {0x93, 0x18},
440 {0x1c, 0x0a},
441 {0x1d, 0x48},
442 {0xc0, 0x50},
443 {0xc1, 0x3c},
444 {0x34, 0x05},
445 {0xc2, 0x0c},
446 {0xc3, 0xf9},
447 {0x34, 0x05},
448 {0xe7, 0x2e},
449 {0x31, 0xf9},
450 {0x35, 0x02},
451 {0xd9, 0x10},
452 {0x25, 0x42},
453 {0x94, 0x11},
454 };
455
456 static const u8 sensor_init_ov965x[][2] = {
457 {0x12, 0x80}, /* com7 - SSCB reset */
458 {0x00, 0x00}, /* gain */
459 {0x01, 0x80}, /* blue */
460 {0x02, 0x80}, /* red */
461 {0x03, 0x1b}, /* vref */
462 {0x04, 0x03}, /* com1 - exposure low bits */
463 {0x0b, 0x57}, /* ver */
464 {0x0e, 0x61}, /* com5 */
465 {0x0f, 0x42}, /* com6 */
466 {0x11, 0x00}, /* clkrc */
467 {0x12, 0x02}, /* com7 - 15fps VGA YUYV */
468 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
469 {0x14, 0x28}, /* com9 */
470 {0x16, 0x24}, /* reg16 */
471 {0x17, 0x1d}, /* hstart*/
472 {0x18, 0xbd}, /* hstop */
473 {0x19, 0x01}, /* vstrt */
474 {0x1a, 0x81}, /* vstop*/
475 {0x1e, 0x04}, /* mvfp */
476 {0x24, 0x3c}, /* aew */
477 {0x25, 0x36}, /* aeb */
478 {0x26, 0x71}, /* vpt */
479 {0x27, 0x08}, /* bbias */
480 {0x28, 0x08}, /* gbbias */
481 {0x29, 0x15}, /* gr com */
482 {0x2a, 0x00}, /* exhch */
483 {0x2b, 0x00}, /* exhcl */
484 {0x2c, 0x08}, /* rbias */
485 {0x32, 0xff}, /* href */
486 {0x33, 0x00}, /* chlf */
487 {0x34, 0x3f}, /* aref1 */
488 {0x35, 0x00}, /* aref2 */
489 {0x36, 0xf8}, /* aref3 */
490 {0x38, 0x72}, /* adc2 */
491 {0x39, 0x57}, /* aref4 */
492 {0x3a, 0x80}, /* tslb - yuyv */
493 {0x3b, 0xc4}, /* com11 - night mode 1/4 frame rate */
494 {0x3d, 0x99}, /* com13 */
495 {0x3f, 0xc1}, /* edge */
496 {0x40, 0xc0}, /* com15 */
497 {0x41, 0x40}, /* com16 */
498 {0x42, 0xc0}, /* com17 */
499 {0x43, 0x0a}, /* rsvd */
500 {0x44, 0xf0},
501 {0x45, 0x46},
502 {0x46, 0x62},
503 {0x47, 0x2a},
504 {0x48, 0x3c},
505 {0x4a, 0xfc},
506 {0x4b, 0xfc},
507 {0x4c, 0x7f},
508 {0x4d, 0x7f},
509 {0x4e, 0x7f},
510 {0x4f, 0x98}, /* matrix */
511 {0x50, 0x98},
512 {0x51, 0x00},
513 {0x52, 0x28},
514 {0x53, 0x70},
515 {0x54, 0x98},
516 {0x58, 0x1a}, /* matrix coef sign */
517 {0x59, 0x85}, /* AWB control */
518 {0x5a, 0xa9},
519 {0x5b, 0x64},
520 {0x5c, 0x84},
521 {0x5d, 0x53},
522 {0x5e, 0x0e},
523 {0x5f, 0xf0}, /* AWB blue limit */
524 {0x60, 0xf0}, /* AWB red limit */
525 {0x61, 0xf0}, /* AWB green limit */
526 {0x62, 0x00}, /* lcc1 */
527 {0x63, 0x00}, /* lcc2 */
528 {0x64, 0x02}, /* lcc3 */
529 {0x65, 0x16}, /* lcc4 */
530 {0x66, 0x01}, /* lcc5 */
531 {0x69, 0x02}, /* hv */
532 {0x6b, 0x5a}, /* dbvl */
533 {0x6c, 0x04},
534 {0x6d, 0x55},
535 {0x6e, 0x00},
536 {0x6f, 0x9d},
537 {0x70, 0x21}, /* dnsth */
538 {0x71, 0x78},
539 {0x72, 0x00}, /* poidx */
540 {0x73, 0x01}, /* pckdv */
541 {0x74, 0x3a}, /* xindx */
542 {0x75, 0x35}, /* yindx */
543 {0x76, 0x01},
544 {0x77, 0x02},
545 {0x7a, 0x12}, /* gamma curve */
546 {0x7b, 0x08},
547 {0x7c, 0x16},
548 {0x7d, 0x30},
549 {0x7e, 0x5e},
550 {0x7f, 0x72},
551 {0x80, 0x82},
552 {0x81, 0x8e},
553 {0x82, 0x9a},
554 {0x83, 0xa4},
555 {0x84, 0xac},
556 {0x85, 0xb8},
557 {0x86, 0xc3},
558 {0x87, 0xd6},
559 {0x88, 0xe6},
560 {0x89, 0xf2},
561 {0x8a, 0x03},
562 {0x8c, 0x89}, /* com19 */
563 {0x14, 0x28}, /* com9 */
564 {0x90, 0x7d},
565 {0x91, 0x7b},
566 {0x9d, 0x03}, /* lcc6 */
567 {0x9e, 0x04}, /* lcc7 */
568 {0x9f, 0x7a},
569 {0xa0, 0x79},
570 {0xa1, 0x40}, /* aechm */
571 {0xa4, 0x50}, /* com21 */
572 {0xa5, 0x68}, /* com26 */
573 {0xa6, 0x4a}, /* AWB green */
574 {0xa8, 0xc1}, /* refa8 */
575 {0xa9, 0xef}, /* refa9 */
576 {0xaa, 0x92},
577 {0xab, 0x04},
578 {0xac, 0x80}, /* black level control */
579 {0xad, 0x80},
580 {0xae, 0x80},
581 {0xaf, 0x80},
582 {0xb2, 0xf2},
583 {0xb3, 0x20},
584 {0xb4, 0x20}, /* ctrlb4 */
585 {0xb5, 0x00},
586 {0xb6, 0xaf},
587 {0xbb, 0xae},
588 {0xbc, 0x7f}, /* ADC channel offsets */
589 {0xdb, 0x7f},
590 {0xbe, 0x7f},
591 {0xbf, 0x7f},
592 {0xc0, 0xe2},
593 {0xc1, 0xc0},
594 {0xc2, 0x01},
595 {0xc3, 0x4e},
596 {0xc6, 0x85},
597 {0xc7, 0x80}, /* com24 */
598 {0xc9, 0xe0},
599 {0xca, 0xe8},
600 {0xcb, 0xf0},
601 {0xcc, 0xd8},
602 {0xcd, 0xf1},
603 {0x4f, 0x98},
604 {0x50, 0x98},
605 {0x51, 0x00},
606 {0x52, 0x28},
607 {0x53, 0x70},
608 {0x54, 0x98},
609 {0x58, 0x1a},
610 {0xff, 0x41}, /* read 41, write ff 00 */
611 {0x41, 0x40}, /* com16 */
612 {0xc5, 0x03}, /* 60 Hz banding filter */
613 {0x6a, 0x02}, /* 50 Hz banding filter */
614
615 {0x12, 0x62}, /* com7 - 30fps VGA YUV */
616 {0x36, 0xfa}, /* aref3 */
617 {0x69, 0x0a}, /* hv */
618 {0x8c, 0x89}, /* com22 */
619 {0x14, 0x28}, /* com9 */
620 {0x3e, 0x0c},
621 {0x41, 0x40}, /* com16 */
622 {0x72, 0x00},
623 {0x73, 0x00},
624 {0x74, 0x3a},
625 {0x75, 0x35},
626 {0x76, 0x01},
627 {0xc7, 0x80},
628 {0x03, 0x12}, /* vref */
629 {0x17, 0x16}, /* hstart */
630 {0x18, 0x02}, /* hstop */
631 {0x19, 0x01}, /* vstrt */
632 {0x1a, 0x3d}, /* vstop */
633 {0x32, 0xff}, /* href */
634 {0xc0, 0xaa},
635 };
636
637 static const u8 bridge_init_ov965x_2[][2] = {
638 {0x94, 0xaa},
639 {0xf1, 0x60},
640 {0xe5, 0x04},
641 {0xc0, 0x50},
642 {0xc1, 0x3c},
643 {0x8c, 0x00},
644 {0x8d, 0x1c},
645 {0x34, 0x05},
646
647 {0xc2, 0x0c},
648 {0xc3, 0xf9},
649 {0xda, 0x01},
650 {0x50, 0x00},
651 {0x51, 0xa0},
652 {0x52, 0x3c},
653 {0x53, 0x00},
654 {0x54, 0x00},
655 {0x55, 0x00}, /* brightness */
656 {0x57, 0x00}, /* contrast 2 */
657 {0x5c, 0x00},
658 {0x5a, 0xa0},
659 {0x5b, 0x78},
660 {0x35, 0x02},
661 {0xd9, 0x10},
662 {0x94, 0x11},
663 };
664
665 static const u8 sensor_init_ov965x_2[][2] = {
666 {0x3b, 0xc4},
667 {0x1e, 0x04}, /* mvfp */
668 {0x13, 0xe0}, /* com8 */
669 {0x00, 0x00}, /* gain */
670 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
671 {0x11, 0x03}, /* clkrc */
672 {0x6b, 0x5a}, /* dblv */
673 {0x6a, 0x05},
674 {0xc5, 0x07},
675 {0xa2, 0x4b},
676 {0xa3, 0x3e},
677 {0x2d, 0x00},
678 {0xff, 0x42}, /* read 42, write ff 00 */
679 {0x42, 0xc0},
680 {0x2d, 0x00},
681 {0xff, 0x42}, /* read 42, write ff 00 */
682 {0x42, 0xc1},
683 {0x3f, 0x01},
684 {0xff, 0x42}, /* read 42, write ff 00 */
685 {0x42, 0xc1},
686 {0x4f, 0x98},
687 {0x50, 0x98},
688 {0x51, 0x00},
689 {0x52, 0x28},
690 {0x53, 0x70},
691 {0x54, 0x98},
692 {0x58, 0x1a},
693 {0xff, 0x41}, /* read 41, write ff 00 */
694 {0x41, 0x40}, /* com16 */
695 {0x56, 0x40},
696 {0x55, 0x8f},
697 {0x10, 0x25}, /* aech - exposure high bits */
698 {0xff, 0x13}, /* read 13, write ff 00 */
699 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
700 };
701
702 static const u8 sensor_start_ov965x[][2] = {
703 {0x12, 0x62}, /* com7 - 30fps VGA YUV */
704 {0x36, 0xfa}, /* aref3 */
705 {0x69, 0x0a}, /* hv */
706 {0x8c, 0x89}, /* com22 */
707 {0x14, 0x28}, /* com9 */
708 {0x3e, 0x0c}, /* com14 */
709 {0x41, 0x40}, /* com16 */
710 {0x72, 0x00},
711 {0x73, 0x00},
712 {0x74, 0x3a},
713 {0x75, 0x35},
714 {0x76, 0x01},
715 {0xc7, 0x80}, /* com24 */
716 {0x03, 0x12}, /* vref */
717 {0x17, 0x16}, /* hstart */
718 {0x18, 0x02}, /* hstop */
719 {0x19, 0x01}, /* vstrt */
720 {0x1a, 0x3d}, /* vstop */
721 {0x32, 0xff}, /* href */
722 {0xc0, 0xaa},
723 {}
724 };
725
726 static const u8 bridge_start_ov965x[][2] = {
727 {0x94, 0xaa},
728 {0xf1, 0x60},
729 {0xe5, 0x04},
730 {0xc0, 0x50},
731 {0xc1, 0x3c},
732 {0x8c, 0x00},
733 {0x8d, 0x1c},
734 {0x34, 0x05},
735 {}
736 };
737
738 static const u8 bridge_start_ov965x_vga[][2] = {
739 {0xc2, 0x0c},
740 {0xc3, 0xf9},
741 {0xda, 0x01},
742 {0x50, 0x00},
743 {0x51, 0xa0},
744 {0x52, 0x3c},
745 {0x53, 0x00},
746 {0x54, 0x00},
747 {0x55, 0x00},
748 {0x57, 0x00},
749 {0x5c, 0x00},
750 {0x5a, 0xa0},
751 {0x5b, 0x78},
752 {0x35, 0x02},
753 {0xd9, 0x10},
754 {0x94, 0x11},
755 {}
756 };
757
758 static const u8 bridge_start_ov965x_cif[][2] = {
759 {0xc2, 0x4c},
760 {0xc3, 0xf9},
761 {0xda, 0x00},
762 {0x50, 0x00},
763 {0x51, 0xa0},
764 {0x52, 0x78},
765 {0x53, 0x00},
766 {0x54, 0x00},
767 {0x55, 0x00},
768 {0x57, 0x00},
769 {0x5c, 0x00},
770 {0x5a, 0x50},
771 {0x5b, 0x3c},
772 {0x35, 0x02},
773 {0xd9, 0x10},
774 {0x94, 0x11},
775 {}
776 };
777
778 static const u8 sensor_start_ov965x_vga[][2] = {
779 {0x3b, 0xc4}, /* com11 - night mode 1/4 frame rate */
780 {0x1e, 0x04}, /* mvfp */
781 {0x13, 0xe0}, /* com8 */
782 {0x00, 0x00},
783 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
784 {0x11, 0x03}, /* clkrc */
785 {0x6b, 0x5a}, /* dblv */
786 {0x6a, 0x05}, /* 50 Hz banding filter */
787 {0xc5, 0x07}, /* 60 Hz banding filter */
788 {0xa2, 0x4b}, /* bd50 */
789 {0xa3, 0x3e}, /* bd60 */
790
791 {0x2d, 0x00}, /* advfl */
792 {}
793 };
794
795 static const u8 sensor_start_ov965x_cif[][2] = {
796 {0x3b, 0xe4}, /* com11 - night mode 1/4 frame rate */
797 {0x1e, 0x04}, /* mvfp */
798 {0x13, 0xe0}, /* com8 */
799 {0x00, 0x00},
800 {0x13, 0xe7}, /* com8 - everything (AGC, AWB and AEC) */
801 {0x11, 0x01}, /* clkrc */
802 {0x6b, 0x5a}, /* dblv */
803 {0x6a, 0x02}, /* 50 Hz banding filter */
804 {0xc5, 0x03}, /* 60 Hz banding filter */
805 {0xa2, 0x96}, /* bd50 */
806 {0xa3, 0x7d}, /* bd60 */
807
808 {0xff, 0x13}, /* read 13, write ff 00 */
809 {0x13, 0xe7},
810 {0x3a, 0x80}, /* tslb - yuyv */
811 {}
812 };
813
814 static const u8 sensor_start_ov965x_2[][2] = {
815 {0xff, 0x42}, /* read 42, write ff 00 */
816 {0x42, 0xc1}, /* com17 - 50 Hz filter */
817 {}
818 };
819
820
821 static void ov534_reg_write(struct gspca_dev *gspca_dev, u16 reg, u8 val)
822 {
823 struct usb_device *udev = gspca_dev->dev;
824 int ret;
825
826 PDEBUG(D_USBO, "reg=0x%04x, val=0%02x", reg, val);
827 gspca_dev->usb_buf[0] = val;
828 ret = usb_control_msg(udev,
829 usb_sndctrlpipe(udev, 0),
830 0x01,
831 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
832 0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT);
833 if (ret < 0)
834 PDEBUG(D_ERR, "write failed");
835 }
836
837 static u8 ov534_reg_read(struct gspca_dev *gspca_dev, u16 reg)
838 {
839 struct usb_device *udev = gspca_dev->dev;
840 int ret;
841
842 ret = usb_control_msg(udev,
843 usb_rcvctrlpipe(udev, 0),
844 0x01,
845 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
846 0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT);
847 PDEBUG(D_USBI, "reg=0x%04x, data=0x%02x", reg, gspca_dev->usb_buf[0]);
848 if (ret < 0)
849 PDEBUG(D_ERR, "read failed");
850 return gspca_dev->usb_buf[0];
851 }
852
853 /* Two bits control LED: 0x21 bit 7 and 0x23 bit 7.
854 * (direction and output)? */
855 static void ov534_set_led(struct gspca_dev *gspca_dev, int status)
856 {
857 u8 data;
858
859 PDEBUG(D_CONF, "led status: %d", status);
860
861 data = ov534_reg_read(gspca_dev, 0x21);
862 data |= 0x80;
863 ov534_reg_write(gspca_dev, 0x21, data);
864
865 data = ov534_reg_read(gspca_dev, 0x23);
866 if (status)
867 data |= 0x80;
868 else
869 data &= ~0x80;
870
871 ov534_reg_write(gspca_dev, 0x23, data);
872
873 if (!status) {
874 data = ov534_reg_read(gspca_dev, 0x21);
875 data &= ~0x80;
876 ov534_reg_write(gspca_dev, 0x21, data);
877 }
878 }
879
880 static int sccb_check_status(struct gspca_dev *gspca_dev)
881 {
882 u8 data;
883 int i;
884
885 for (i = 0; i < 5; i++) {
886 data = ov534_reg_read(gspca_dev, OV534_REG_STATUS);
887
888 switch (data) {
889 case 0x00:
890 return 1;
891 case 0x04:
892 return 0;
893 case 0x03:
894 break;
895 default:
896 PDEBUG(D_ERR, "sccb status 0x%02x, attempt %d/5",
897 data, i + 1);
898 }
899 }
900 return 0;
901 }
902
903 static void sccb_reg_write(struct gspca_dev *gspca_dev, u8 reg, u8 val)
904 {
905 PDEBUG(D_USBO, "reg: 0x%02x, val: 0x%02x", reg, val);
906 ov534_reg_write(gspca_dev, OV534_REG_SUBADDR, reg);
907 ov534_reg_write(gspca_dev, OV534_REG_WRITE, val);
908 ov534_reg_write(gspca_dev, OV534_REG_OPERATION, OV534_OP_WRITE_3);
909
910 if (!sccb_check_status(gspca_dev))
911 PDEBUG(D_ERR, "sccb_reg_write failed");
912 }
913
914 static u8 sccb_reg_read(struct gspca_dev *gspca_dev, u16 reg)
915 {
916 ov534_reg_write(gspca_dev, OV534_REG_SUBADDR, reg);
917 ov534_reg_write(gspca_dev, OV534_REG_OPERATION, OV534_OP_WRITE_2);
918 if (!sccb_check_status(gspca_dev))
919 PDEBUG(D_ERR, "sccb_reg_read failed 1");
920
921 ov534_reg_write(gspca_dev, OV534_REG_OPERATION, OV534_OP_READ_2);
922 if (!sccb_check_status(gspca_dev))
923 PDEBUG(D_ERR, "sccb_reg_read failed 2");
924
925 return ov534_reg_read(gspca_dev, OV534_REG_READ);
926 }
927
928 /* output a bridge sequence (reg - val) */
929 static void reg_w_array(struct gspca_dev *gspca_dev,
930 const u8 (*data)[2], int len)
931 {
932 while (--len >= 0) {
933 ov534_reg_write(gspca_dev, (*data)[0], (*data)[1]);
934 data++;
935 }
936 }
937
938 /* output a sensor sequence (reg - val) */
939 static void sccb_w_array(struct gspca_dev *gspca_dev,
940 const u8 (*data)[2], int len)
941 {
942 while (--len >= 0) {
943 if ((*data)[0] != 0xff) {
944 sccb_reg_write(gspca_dev, (*data)[0], (*data)[1]);
945 } else {
946 sccb_reg_read(gspca_dev, (*data)[1]);
947 sccb_reg_write(gspca_dev, 0xff, 0x00);
948 }
949 data++;
950 }
951 }
952
953 /* set framerate */
954 static void ov534_set_frame_rate(struct gspca_dev *gspca_dev)
955 {
956 struct sd *sd = (struct sd *) gspca_dev;
957 int i;
958 struct rate_s {
959 u8 fps;
960 u8 r11;
961 u8 r0d;
962 u8 re5;
963 };
964 const struct rate_s *r;
965 static const struct rate_s rate_0[] = { /* 640x480 */
966 {60, 0x01, 0xc1, 0x04},
967 {50, 0x01, 0x41, 0x02},
968 {40, 0x02, 0xc1, 0x04},
969 {30, 0x04, 0x81, 0x02},
970 {15, 0x03, 0x41, 0x04},
971 };
972 static const struct rate_s rate_1[] = { /* 320x240 */
973 {125, 0x02, 0x81, 0x02},
974 {100, 0x02, 0xc1, 0x04},
975 {75, 0x03, 0xc1, 0x04},
976 {60, 0x04, 0xc1, 0x04},
977 {50, 0x02, 0x41, 0x04},
978 {40, 0x03, 0x41, 0x04},
979 {30, 0x04, 0x41, 0x04},
980 };
981
982 if (gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv == 0) {
983 r = rate_0;
984 i = ARRAY_SIZE(rate_0);
985 } else {
986 r = rate_1;
987 i = ARRAY_SIZE(rate_1);
988 }
989 while (--i > 0) {
990 if (sd->frame_rate >= r->fps)
991 break;
992 r++;
993 }
994
995 sccb_reg_write(gspca_dev, 0x11, r->r11);
996 sccb_reg_write(gspca_dev, 0x0d, r->r0d);
997 ov534_reg_write(gspca_dev, 0xe5, r->re5);
998
999 PDEBUG(D_PROBE, "frame_rate: %d", r->fps);
1000 }
1001
1002 /* ov772x controls */
1003 static void setgain(struct gspca_dev *gspca_dev)
1004 {
1005 struct sd *sd = (struct sd *) gspca_dev;
1006 u8 val;
1007
1008 val = sd->gain;
1009 switch (val & 0x30) {
1010 case 0x00:
1011 val &= 0x0f;
1012 break;
1013 case 0x10:
1014 val &= 0x0f;
1015 val |= 0x30;
1016 break;
1017 case 0x20:
1018 val &= 0x0f;
1019 val |= 0x70;
1020 break;
1021 default:
1022 /* case 0x30: */
1023 val &= 0x0f;
1024 val |= 0xf0;
1025 break;
1026 }
1027 sccb_reg_write(gspca_dev, 0x00, val);
1028 }
1029
1030 static void setexposure(struct gspca_dev *gspca_dev)
1031 {
1032 struct sd *sd = (struct sd *) gspca_dev;
1033 u8 val;
1034
1035 val = sd->exposure;
1036 sccb_reg_write(gspca_dev, 0x08, val >> 7);
1037 sccb_reg_write(gspca_dev, 0x10, val << 1);
1038 }
1039
1040 static void setredblc(struct gspca_dev *gspca_dev)
1041 {
1042 struct sd *sd = (struct sd *) gspca_dev;
1043
1044 sccb_reg_write(gspca_dev, 0x43, sd->redblc);
1045 }
1046
1047 static void setblueblc(struct gspca_dev *gspca_dev)
1048 {
1049 struct sd *sd = (struct sd *) gspca_dev;
1050
1051 sccb_reg_write(gspca_dev, 0x42, sd->blueblc);
1052 }
1053
1054 static void setautogain(struct gspca_dev *gspca_dev)
1055 {
1056 struct sd *sd = (struct sd *) gspca_dev;
1057
1058 if (sd->autogain) {
1059 sccb_reg_write(gspca_dev, 0x13, 0xf7); /* AGC,AEC,AWB ON */
1060 sccb_reg_write(gspca_dev, 0x64,
1061 sccb_reg_read(gspca_dev, 0x64) | 0x03);
1062 } else {
1063 sccb_reg_write(gspca_dev, 0x13, 0xf0); /* AGC,AEC,AWB OFF */
1064 sccb_reg_write(gspca_dev, 0x64,
1065 sccb_reg_read(gspca_dev, 0x64) & 0xfc);
1066 }
1067 }
1068
1069 static void setsharpness(struct gspca_dev *gspca_dev)
1070 {
1071 struct sd *sd = (struct sd *) gspca_dev;
1072 u8 val;
1073
1074 val = sd->sharpness;
1075 sccb_reg_write(gspca_dev, 0x91, val); /* vga noise */
1076 sccb_reg_write(gspca_dev, 0x8e, val); /* qvga noise */
1077 }
1078
1079 static void sethflip(struct gspca_dev *gspca_dev)
1080 {
1081 struct sd *sd = (struct sd *) gspca_dev;
1082
1083 if (sd->hflip == 0)
1084 sccb_reg_write(gspca_dev, 0x0c,
1085 sccb_reg_read(gspca_dev, 0x0c) | 0x40);
1086 else
1087 sccb_reg_write(gspca_dev, 0x0c,
1088 sccb_reg_read(gspca_dev, 0x0c) & 0xbf);
1089 }
1090
1091 static void setvflip(struct gspca_dev *gspca_dev)
1092 {
1093 struct sd *sd = (struct sd *) gspca_dev;
1094
1095 if (sd->vflip == 0)
1096 sccb_reg_write(gspca_dev, 0x0c,
1097 sccb_reg_read(gspca_dev, 0x0c) | 0x80);
1098 else
1099 sccb_reg_write(gspca_dev, 0x0c,
1100 sccb_reg_read(gspca_dev, 0x0c) & 0x7f);
1101 }
1102
1103 /* this function is called at probe time */
1104 static int sd_config(struct gspca_dev *gspca_dev,
1105 const struct usb_device_id *id)
1106 {
1107 struct sd *sd = (struct sd *) gspca_dev;
1108 struct cam *cam;
1109
1110 sd->sensor = id->driver_info;
1111
1112 cam = &gspca_dev->cam;
1113
1114 if (sd->sensor == SENSOR_OV772X) {
1115 cam->cam_mode = vga_yuyv_mode;
1116 cam->nmodes = ARRAY_SIZE(vga_yuyv_mode);
1117
1118 cam->bulk = 1;
1119 cam->bulk_size = 16384;
1120 cam->bulk_nurbs = 2;
1121 } else { /* ov965x */
1122 cam->cam_mode = vga_jpeg_mode;
1123 cam->nmodes = ARRAY_SIZE(vga_jpeg_mode);
1124 }
1125
1126 sd->frame_rate = 30;
1127 sd->gain = GAIN_DEF;
1128 sd->exposure = EXPO_DEF;
1129 sd->redblc = RED_BALANCE_DEF;
1130 sd->blueblc = BLUE_BALANCE_DEF;
1131 sd->autogain = AUTOGAIN_DEF;
1132 sd->sharpness = SHARPNESS_DEF;
1133 #if HFLIP_DEF != 0
1134 sd->hflip = HFLIP_DEF;
1135 #endif
1136 #if VFLIP_DEF != 0
1137 sd->vflip = VFLIP_DEF;
1138 #endif
1139 return 0;
1140 }
1141
1142 /* this function is called at probe and resume time */
1143 static int sd_init(struct gspca_dev *gspca_dev)
1144 {
1145 struct sd *sd = (struct sd *) gspca_dev;
1146 u16 sensor_id;
1147 static const u8 sensor_addr[2] = {
1148 0x42, /* 0 SENSOR_OV772X */
1149 0x60, /* 1 SENSOR_OV965X */
1150 };
1151
1152 /* reset bridge */
1153 ov534_reg_write(gspca_dev, 0xe7, 0x3a);
1154 ov534_reg_write(gspca_dev, 0xe0, 0x08);
1155 msleep(100);
1156
1157 /* initialize the sensor address */
1158 ov534_reg_write(gspca_dev, OV534_REG_ADDRESS,
1159 sensor_addr[sd->sensor]);
1160
1161 /* reset sensor */
1162 sccb_reg_write(gspca_dev, 0x12, 0x80);
1163 msleep(10);
1164
1165 /* probe the sensor */
1166 sccb_reg_read(gspca_dev, 0x0a);
1167 sensor_id = sccb_reg_read(gspca_dev, 0x0a) << 8;
1168 sccb_reg_read(gspca_dev, 0x0b);
1169 sensor_id |= sccb_reg_read(gspca_dev, 0x0b);
1170 PDEBUG(D_PROBE, "Sensor ID: %04x", sensor_id);
1171
1172 /* initialize */
1173 switch (sd->sensor) {
1174 case SENSOR_OV772X:
1175 reg_w_array(gspca_dev, bridge_init_ov772x,
1176 ARRAY_SIZE(bridge_init_ov772x));
1177 ov534_set_led(gspca_dev, 1);
1178 sccb_w_array(gspca_dev, sensor_init_ov772x,
1179 ARRAY_SIZE(sensor_init_ov772x));
1180 ov534_reg_write(gspca_dev, 0xe0, 0x09);
1181 ov534_set_led(gspca_dev, 0);
1182 ov534_set_frame_rate(gspca_dev);
1183 break;
1184 default:
1185 /* case SENSOR_OV965X: */
1186 reg_w_array(gspca_dev, bridge_init_ov965x,
1187 ARRAY_SIZE(bridge_init_ov965x));
1188 sccb_w_array(gspca_dev, sensor_init_ov965x,
1189 ARRAY_SIZE(sensor_init_ov965x));
1190 reg_w_array(gspca_dev, bridge_init_ov965x_2,
1191 ARRAY_SIZE(bridge_init_ov965x_2));
1192 sccb_w_array(gspca_dev, sensor_init_ov965x_2,
1193 ARRAY_SIZE(sensor_init_ov965x_2));
1194 ov534_reg_write(gspca_dev, 0xe0, 0x00);
1195 ov534_reg_write(gspca_dev, 0xe0, 0x01);
1196 ov534_set_led(gspca_dev, 0);
1197 ov534_reg_write(gspca_dev, 0xe0, 0x00);
1198 }
1199
1200 return 0;
1201 }
1202
1203 static int sd_start_ov772x(struct gspca_dev *gspca_dev)
1204 {
1205 int mode;
1206
1207 mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv;
1208 if (mode != 0) { /* 320x240 */
1209 reg_w_array(gspca_dev, bridge_start_ov772x_qvga,
1210 ARRAY_SIZE(bridge_start_ov772x_qvga));
1211 sccb_w_array(gspca_dev, sensor_start_ov772x_qvga,
1212 ARRAY_SIZE(sensor_start_ov772x_qvga));
1213 } else { /* 640x480 */
1214 reg_w_array(gspca_dev, bridge_start_ov772x_vga,
1215 ARRAY_SIZE(bridge_start_ov772x_vga));
1216 sccb_w_array(gspca_dev, sensor_start_ov772x_vga,
1217 ARRAY_SIZE(sensor_start_ov772x_vga));
1218 }
1219 ov534_set_frame_rate(gspca_dev);
1220
1221 setautogain(gspca_dev);
1222 setgain(gspca_dev);
1223 setredblc(gspca_dev);
1224 setblueblc(gspca_dev);
1225 setexposure(gspca_dev);
1226 setsharpness(gspca_dev);
1227 setvflip(gspca_dev);
1228 sethflip(gspca_dev);
1229
1230 ov534_set_led(gspca_dev, 1);
1231 ov534_reg_write(gspca_dev, 0xe0, 0x00);
1232 return 0;
1233 }
1234
1235 static int sd_start_ov965x(struct gspca_dev *gspca_dev)
1236 {
1237 int mode;
1238
1239 sccb_w_array(gspca_dev, sensor_start_ov965x,
1240 ARRAY_SIZE(sensor_start_ov965x));
1241 reg_w_array(gspca_dev, bridge_start_ov965x,
1242 ARRAY_SIZE(bridge_start_ov965x));
1243
1244 mode = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv;
1245 if (mode != 0) { /* 320x240 */
1246 reg_w_array(gspca_dev, bridge_start_ov965x_cif,
1247 ARRAY_SIZE(bridge_start_ov965x_cif));
1248 sccb_w_array(gspca_dev, sensor_start_ov965x_cif,
1249 ARRAY_SIZE(sensor_start_ov965x_cif));
1250 } else { /* 640x480 */
1251 reg_w_array(gspca_dev, bridge_start_ov965x_vga,
1252 ARRAY_SIZE(bridge_start_ov965x_vga));
1253 sccb_w_array(gspca_dev, sensor_start_ov965x_vga,
1254 ARRAY_SIZE(sensor_start_ov965x_vga));
1255 }
1256 sccb_w_array(gspca_dev, sensor_start_ov965x_2,
1257 ARRAY_SIZE(sensor_start_ov965x_2));
1258 ov534_reg_write(gspca_dev, 0xe0, 0x00);
1259 ov534_reg_write(gspca_dev, 0xe0, 0x00);
1260 ov534_set_led(gspca_dev, 1);
1261 return 0;
1262 }
1263
1264 static void sd_stopN_ov772x(struct gspca_dev *gspca_dev)
1265 {
1266 ov534_reg_write(gspca_dev, 0xe0, 0x09);
1267 ov534_set_led(gspca_dev, 0);
1268 }
1269
1270 static void sd_stopN_ov965x(struct gspca_dev *gspca_dev)
1271 {
1272 ov534_reg_write(gspca_dev, 0xe0, 0x01);
1273 ov534_set_led(gspca_dev, 0);
1274 ov534_reg_write(gspca_dev, 0xe0, 0x00);
1275 }
1276
1277 /* Values for bmHeaderInfo (Video and Still Image Payload Headers, 2.4.3.3) */
1278 #define UVC_STREAM_EOH (1 << 7)
1279 #define UVC_STREAM_ERR (1 << 6)
1280 #define UVC_STREAM_STI (1 << 5)
1281 #define UVC_STREAM_RES (1 << 4)
1282 #define UVC_STREAM_SCR (1 << 3)
1283 #define UVC_STREAM_PTS (1 << 2)
1284 #define UVC_STREAM_EOF (1 << 1)
1285 #define UVC_STREAM_FID (1 << 0)
1286
1287 static void sd_pkt_scan(struct gspca_dev *gspca_dev, struct gspca_frame *frame,
1288 __u8 *data, int len)
1289 {
1290 struct sd *sd = (struct sd *) gspca_dev;
1291 __u32 this_pts;
1292 u16 this_fid;
1293 int remaining_len = len;
1294 int payload_len;
1295
1296 payload_len = gspca_dev->cam.bulk ? 2048 : 2040;
1297 do {
1298 len = min(remaining_len, payload_len);
1299
1300 /* Payloads are prefixed with a UVC-style header. We
1301 consider a frame to start when the FID toggles, or the PTS
1302 changes. A frame ends when EOF is set, and we've received
1303 the correct number of bytes. */
1304
1305 /* Verify UVC header. Header length is always 12 */
1306 if (data[0] != 12 || len < 12) {
1307 PDEBUG(D_PACK, "bad header");
1308 goto discard;
1309 }
1310
1311 /* Check errors */
1312 if (data[1] & UVC_STREAM_ERR) {
1313 PDEBUG(D_PACK, "payload error");
1314 goto discard;
1315 }
1316
1317 /* Extract PTS and FID */
1318 if (!(data[1] & UVC_STREAM_PTS)) {
1319 PDEBUG(D_PACK, "PTS not present");
1320 goto discard;
1321 }
1322 this_pts = (data[5] << 24) | (data[4] << 16)
1323 | (data[3] << 8) | data[2];
1324 this_fid = (data[1] & UVC_STREAM_FID) ? 1 : 0;
1325
1326 /* If PTS or FID has changed, start a new frame. */
1327 if (this_pts != sd->last_pts || this_fid != sd->last_fid) {
1328 if (gspca_dev->last_packet_type == INTER_PACKET)
1329 frame = gspca_frame_add(gspca_dev,
1330 LAST_PACKET, frame,
1331 NULL, 0);
1332 sd->last_pts = this_pts;
1333 sd->last_fid = this_fid;
1334 gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
1335 data + 12, len - 12);
1336 /* If this packet is marked as EOF, end the frame */
1337 } else if (data[1] & UVC_STREAM_EOF) {
1338 sd->last_pts = 0;
1339 frame = gspca_frame_add(gspca_dev, LAST_PACKET, frame,
1340 data + 12, len - 12);
1341 } else {
1342
1343 /* Add the data from this payload */
1344 gspca_frame_add(gspca_dev, INTER_PACKET, frame,
1345 data + 12, len - 12);
1346 }
1347
1348 /* Done this payload */
1349 goto scan_next;
1350
1351 discard:
1352 /* Discard data until a new frame starts. */
1353 gspca_frame_add(gspca_dev, DISCARD_PACKET, frame, NULL, 0);
1354
1355 scan_next:
1356 remaining_len -= len;
1357 data += len;
1358 } while (remaining_len > 0);
1359 }
1360
1361 /* ov772x controls */
1362 static int sd_setgain(struct gspca_dev *gspca_dev, __s32 val)
1363 {
1364 struct sd *sd = (struct sd *) gspca_dev;
1365
1366 sd->gain = val;
1367 if (gspca_dev->streaming)
1368 setgain(gspca_dev);
1369 return 0;
1370 }
1371
1372 static int sd_getgain(struct gspca_dev *gspca_dev, __s32 *val)
1373 {
1374 struct sd *sd = (struct sd *) gspca_dev;
1375
1376 *val = sd->gain;
1377 return 0;
1378 }
1379
1380 static int sd_setexposure(struct gspca_dev *gspca_dev, __s32 val)
1381 {
1382 struct sd *sd = (struct sd *) gspca_dev;
1383
1384 sd->exposure = val;
1385 if (gspca_dev->streaming)
1386 setexposure(gspca_dev);
1387 return 0;
1388 }
1389
1390 static int sd_getexposure(struct gspca_dev *gspca_dev, __s32 *val)
1391 {
1392 struct sd *sd = (struct sd *) gspca_dev;
1393
1394 *val = sd->exposure;
1395 return 0;
1396 }
1397
1398 static int sd_setredblc(struct gspca_dev *gspca_dev, __s32 val)
1399 {
1400 struct sd *sd = (struct sd *) gspca_dev;
1401
1402 sd->redblc = val;
1403 if (gspca_dev->streaming)
1404 setredblc(gspca_dev);
1405 return 0;
1406 }
1407
1408 static int sd_getredblc(struct gspca_dev *gspca_dev, __s32 *val)
1409 {
1410 struct sd *sd = (struct sd *) gspca_dev;
1411
1412 *val = sd->redblc;
1413 return 0;
1414 }
1415
1416 static int sd_setblueblc(struct gspca_dev *gspca_dev, __s32 val)
1417 {
1418 struct sd *sd = (struct sd *) gspca_dev;
1419
1420 sd->blueblc = val;
1421 if (gspca_dev->streaming)
1422 setblueblc(gspca_dev);
1423 return 0;
1424 }
1425
1426 static int sd_getblueblc(struct gspca_dev *gspca_dev, __s32 *val)
1427 {
1428 struct sd *sd = (struct sd *) gspca_dev;
1429
1430 *val = sd->blueblc;
1431 return 0;
1432 }
1433
1434 static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
1435 {
1436 struct sd *sd = (struct sd *) gspca_dev;
1437
1438 sd->autogain = val;
1439 if (gspca_dev->streaming)
1440 setautogain(gspca_dev);
1441 return 0;
1442 }
1443
1444 static int sd_getautogain(struct gspca_dev *gspca_dev, __s32 *val)
1445 {
1446 struct sd *sd = (struct sd *) gspca_dev;
1447
1448 *val = sd->autogain;
1449 return 0;
1450 }
1451
1452 static int sd_setsharpness(struct gspca_dev *gspca_dev, __s32 val)
1453 {
1454 struct sd *sd = (struct sd *) gspca_dev;
1455
1456 sd->sharpness = val;
1457 if (gspca_dev->streaming)
1458 setsharpness(gspca_dev);
1459 return 0;
1460 }
1461
1462 static int sd_getsharpness(struct gspca_dev *gspca_dev, __s32 *val)
1463 {
1464 struct sd *sd = (struct sd *) gspca_dev;
1465
1466 *val = sd->sharpness;
1467 return 0;
1468 }
1469
1470 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
1471 {
1472 struct sd *sd = (struct sd *) gspca_dev;
1473
1474 sd->hflip = val;
1475 if (gspca_dev->streaming)
1476 sethflip(gspca_dev);
1477 return 0;
1478 }
1479
1480 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
1481 {
1482 struct sd *sd = (struct sd *) gspca_dev;
1483
1484 *val = sd->hflip;
1485 return 0;
1486 }
1487
1488 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
1489 {
1490 struct sd *sd = (struct sd *) gspca_dev;
1491
1492 sd->vflip = val;
1493 if (gspca_dev->streaming)
1494 setvflip(gspca_dev);
1495 return 0;
1496 }
1497
1498 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
1499 {
1500 struct sd *sd = (struct sd *) gspca_dev;
1501
1502 *val = sd->vflip;
1503 return 0;
1504 }
1505
1506 /* get stream parameters (framerate) */
1507 static int sd_get_streamparm(struct gspca_dev *gspca_dev,
1508 struct v4l2_streamparm *parm)
1509 {
1510 struct v4l2_captureparm *cp = &parm->parm.capture;
1511 struct v4l2_fract *tpf = &cp->timeperframe;
1512 struct sd *sd = (struct sd *) gspca_dev;
1513
1514 if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1515 return -EINVAL;
1516
1517 cp->capability |= V4L2_CAP_TIMEPERFRAME;
1518 tpf->numerator = 1;
1519 tpf->denominator = sd->frame_rate;
1520
1521 return 0;
1522 }
1523
1524 /* set stream parameters (framerate) */
1525 static int sd_set_streamparm(struct gspca_dev *gspca_dev,
1526 struct v4l2_streamparm *parm)
1527 {
1528 struct v4l2_captureparm *cp = &parm->parm.capture;
1529 struct v4l2_fract *tpf = &cp->timeperframe;
1530 struct sd *sd = (struct sd *) gspca_dev;
1531
1532 if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1533 return -EINVAL;
1534
1535 /* Set requested framerate */
1536 sd->frame_rate = tpf->denominator / tpf->numerator;
1537 if (gspca_dev->streaming)
1538 ov534_set_frame_rate(gspca_dev);
1539
1540 /* Return the actual framerate */
1541 tpf->numerator = 1;
1542 tpf->denominator = sd->frame_rate;
1543
1544 return 0;
1545 }
1546
1547 /* sub-driver description */
1548 static const struct sd_desc sd_desc_ov772x = {
1549 .name = MODULE_NAME,
1550 .ctrls = sd_ctrls_ov772x,
1551 .nctrls = ARRAY_SIZE(sd_ctrls_ov772x),
1552 .config = sd_config,
1553 .init = sd_init,
1554 .start = sd_start_ov772x,
1555 .stopN = sd_stopN_ov772x,
1556 .pkt_scan = sd_pkt_scan,
1557 .get_streamparm = sd_get_streamparm,
1558 .set_streamparm = sd_set_streamparm,
1559 };
1560
1561 static const struct sd_desc sd_desc_ov965x = {
1562 .name = MODULE_NAME,
1563 .ctrls = sd_ctrls_ov965x,
1564 .nctrls = ARRAY_SIZE(sd_ctrls_ov965x),
1565 .config = sd_config,
1566 .init = sd_init,
1567 .start = sd_start_ov965x,
1568 .stopN = sd_stopN_ov965x,
1569 .pkt_scan = sd_pkt_scan,
1570 .get_streamparm = sd_get_streamparm,
1571 .set_streamparm = sd_set_streamparm,
1572 };
1573
1574 /* -- module initialisation -- */
1575 static const __devinitdata struct usb_device_id device_table[] = {
1576 {USB_DEVICE(0x06f8, 0x3003), .driver_info = SENSOR_OV965X},
1577 {USB_DEVICE(0x1415, 0x2000), .driver_info = SENSOR_OV772X},
1578 {}
1579 };
1580
1581 MODULE_DEVICE_TABLE(usb, device_table);
1582
1583 /* -- device connect -- */
1584 static int sd_probe(struct usb_interface *intf, const struct usb_device_id *id)
1585 {
1586 return gspca_dev_probe(intf, id,
1587 id->driver_info == SENSOR_OV772X
1588 ? &sd_desc_ov772x
1589 : &sd_desc_ov965x,
1590 sizeof(struct sd),
1591 THIS_MODULE);
1592 }
1593
1594 static struct usb_driver sd_driver = {
1595 .name = MODULE_NAME,
1596 .id_table = device_table,
1597 .probe = sd_probe,
1598 .disconnect = gspca_disconnect,
1599 #ifdef CONFIG_PM
1600 .suspend = gspca_suspend,
1601 .resume = gspca_resume,
1602 #endif
1603 };
1604
1605 /* -- module insert / remove -- */
1606 static int __init sd_mod_init(void)
1607 {
1608 int ret;
1609
1610 ret = usb_register(&sd_driver);
1611 if (ret < 0)
1612 return ret;
1613 PDEBUG(D_PROBE, "registered");
1614 return 0;
1615 }
1616
1617 static void __exit sd_mod_exit(void)
1618 {
1619 usb_deregister(&sd_driver);
1620 PDEBUG(D_PROBE, "deregistered");
1621 }
1622
1623 module_init(sd_mod_init);
1624 module_exit(sd_mod_exit);
kernel source for telekom puls (alcatel/mediatek)