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V4L/DVB (12076): gspca_ov519: Fix led inversion with some cams
[GitHub/exynos8895/android_kernel_samsung_universal8895.git] / drivers / media / video / gspca / ov519.c
1 /**
2 * OV519 driver
3 *
4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 *
6 * This module is adapted from the ov51x-jpeg package, which itself
7 * was adapted from the ov511 driver.
8 *
9 * Original copyright for the ov511 driver is:
10 *
11 * Copyright (c) 1999-2004 Mark W. McClelland
12 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
13 *
14 * ov51x-jpeg original copyright is:
15 *
16 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
17 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 *
33 */
34 #define MODULE_NAME "ov519"
35
36 #include "gspca.h"
37
38 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
39 MODULE_DESCRIPTION("OV519 USB Camera Driver");
40 MODULE_LICENSE("GPL");
41
42 /* global parameters */
43 static int frame_rate;
44
45 /* Number of times to retry a failed I2C transaction. Increase this if you
46 * are getting "Failed to read sensor ID..." */
47 static int i2c_detect_tries = 10;
48
49 /* ov519 device descriptor */
50 struct sd {
51 struct gspca_dev gspca_dev; /* !! must be the first item */
52
53 __u8 packet_nr;
54
55 char bridge;
56 #define BRIDGE_OV511 0
57 #define BRIDGE_OV511PLUS 1
58 #define BRIDGE_OV518 2
59 #define BRIDGE_OV518PLUS 3
60 #define BRIDGE_OV519 4
61 #define BRIDGE_MASK 7
62
63 char invert_led;
64 #define BRIDGE_INVERT_LED 8
65
66 /* Determined by sensor type */
67 __u8 sif;
68
69 __u8 brightness;
70 __u8 contrast;
71 __u8 colors;
72 __u8 hflip;
73 __u8 vflip;
74 __u8 autobrightness;
75 __u8 freq;
76
77 __u8 stopped; /* Streaming is temporarily paused */
78
79 __u8 frame_rate; /* current Framerate (OV519 only) */
80 __u8 clockdiv; /* clockdiv override for OV519 only */
81
82 char sensor; /* Type of image sensor chip (SEN_*) */
83 #define SEN_UNKNOWN 0
84 #define SEN_OV6620 1
85 #define SEN_OV6630 2
86 #define SEN_OV66308AF 3
87 #define SEN_OV7610 4
88 #define SEN_OV7620 5
89 #define SEN_OV7640 6
90 #define SEN_OV7670 7
91 #define SEN_OV76BE 8
92 #define SEN_OV8610 9
93 };
94
95 /* V4L2 controls supported by the driver */
96 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
97 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
98 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
99 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
100 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
101 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
102 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
103 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
104 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
105 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
106 static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val);
107 static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val);
108 static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
109 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
110 static void setbrightness(struct gspca_dev *gspca_dev);
111 static void setcontrast(struct gspca_dev *gspca_dev);
112 static void setcolors(struct gspca_dev *gspca_dev);
113 static void setautobrightness(struct sd *sd);
114 static void setfreq(struct sd *sd);
115
116 static const struct ctrl sd_ctrls[] = {
117 {
118 {
119 .id = V4L2_CID_BRIGHTNESS,
120 .type = V4L2_CTRL_TYPE_INTEGER,
121 .name = "Brightness",
122 .minimum = 0,
123 .maximum = 255,
124 .step = 1,
125 #define BRIGHTNESS_DEF 127
126 .default_value = BRIGHTNESS_DEF,
127 },
128 .set = sd_setbrightness,
129 .get = sd_getbrightness,
130 },
131 {
132 {
133 .id = V4L2_CID_CONTRAST,
134 .type = V4L2_CTRL_TYPE_INTEGER,
135 .name = "Contrast",
136 .minimum = 0,
137 .maximum = 255,
138 .step = 1,
139 #define CONTRAST_DEF 127
140 .default_value = CONTRAST_DEF,
141 },
142 .set = sd_setcontrast,
143 .get = sd_getcontrast,
144 },
145 {
146 {
147 .id = V4L2_CID_SATURATION,
148 .type = V4L2_CTRL_TYPE_INTEGER,
149 .name = "Color",
150 .minimum = 0,
151 .maximum = 255,
152 .step = 1,
153 #define COLOR_DEF 127
154 .default_value = COLOR_DEF,
155 },
156 .set = sd_setcolors,
157 .get = sd_getcolors,
158 },
159 /* The flip controls work with ov7670 only */
160 #define HFLIP_IDX 3
161 {
162 {
163 .id = V4L2_CID_HFLIP,
164 .type = V4L2_CTRL_TYPE_BOOLEAN,
165 .name = "Mirror",
166 .minimum = 0,
167 .maximum = 1,
168 .step = 1,
169 #define HFLIP_DEF 0
170 .default_value = HFLIP_DEF,
171 },
172 .set = sd_sethflip,
173 .get = sd_gethflip,
174 },
175 #define VFLIP_IDX 4
176 {
177 {
178 .id = V4L2_CID_VFLIP,
179 .type = V4L2_CTRL_TYPE_BOOLEAN,
180 .name = "Vflip",
181 .minimum = 0,
182 .maximum = 1,
183 .step = 1,
184 #define VFLIP_DEF 0
185 .default_value = VFLIP_DEF,
186 },
187 .set = sd_setvflip,
188 .get = sd_getvflip,
189 },
190 #define AUTOBRIGHT_IDX 5
191 {
192 {
193 .id = V4L2_CID_AUTOBRIGHTNESS,
194 .type = V4L2_CTRL_TYPE_BOOLEAN,
195 .name = "Auto Brightness",
196 .minimum = 0,
197 .maximum = 1,
198 .step = 1,
199 #define AUTOBRIGHT_DEF 1
200 .default_value = AUTOBRIGHT_DEF,
201 },
202 .set = sd_setautobrightness,
203 .get = sd_getautobrightness,
204 },
205 #define FREQ_IDX 6
206 {
207 {
208 .id = V4L2_CID_POWER_LINE_FREQUENCY,
209 .type = V4L2_CTRL_TYPE_MENU,
210 .name = "Light frequency filter",
211 .minimum = 0,
212 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
213 .step = 1,
214 #define FREQ_DEF 0
215 .default_value = FREQ_DEF,
216 },
217 .set = sd_setfreq,
218 .get = sd_getfreq,
219 },
220 #define OV7670_FREQ_IDX 7
221 {
222 {
223 .id = V4L2_CID_POWER_LINE_FREQUENCY,
224 .type = V4L2_CTRL_TYPE_MENU,
225 .name = "Light frequency filter",
226 .minimum = 0,
227 .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */
228 .step = 1,
229 #define OV7670_FREQ_DEF 3
230 .default_value = OV7670_FREQ_DEF,
231 },
232 .set = sd_setfreq,
233 .get = sd_getfreq,
234 },
235 };
236
237 static const struct v4l2_pix_format ov519_vga_mode[] = {
238 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
239 .bytesperline = 320,
240 .sizeimage = 320 * 240 * 3 / 8 + 590,
241 .colorspace = V4L2_COLORSPACE_JPEG,
242 .priv = 1},
243 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
244 .bytesperline = 640,
245 .sizeimage = 640 * 480 * 3 / 8 + 590,
246 .colorspace = V4L2_COLORSPACE_JPEG,
247 .priv = 0},
248 };
249 static const struct v4l2_pix_format ov519_sif_mode[] = {
250 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
251 .bytesperline = 160,
252 .sizeimage = 160 * 120 * 3 / 8 + 590,
253 .colorspace = V4L2_COLORSPACE_JPEG,
254 .priv = 3},
255 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
256 .bytesperline = 176,
257 .sizeimage = 176 * 144 * 3 / 8 + 590,
258 .colorspace = V4L2_COLORSPACE_JPEG,
259 .priv = 1},
260 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
261 .bytesperline = 320,
262 .sizeimage = 320 * 240 * 3 / 8 + 590,
263 .colorspace = V4L2_COLORSPACE_JPEG,
264 .priv = 2},
265 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
266 .bytesperline = 352,
267 .sizeimage = 352 * 288 * 3 / 8 + 590,
268 .colorspace = V4L2_COLORSPACE_JPEG,
269 .priv = 0},
270 };
271
272 static const struct v4l2_pix_format ov518_vga_mode[] = {
273 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
274 .bytesperline = 320,
275 .sizeimage = 320 * 240 * 3 / 8 + 590,
276 .colorspace = V4L2_COLORSPACE_JPEG,
277 .priv = 1},
278 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
279 .bytesperline = 640,
280 .sizeimage = 640 * 480 * 3 / 8 + 590,
281 .colorspace = V4L2_COLORSPACE_JPEG,
282 .priv = 0},
283 };
284 static const struct v4l2_pix_format ov518_sif_mode[] = {
285 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
286 .bytesperline = 160,
287 .sizeimage = 40000,
288 .colorspace = V4L2_COLORSPACE_JPEG,
289 .priv = 3},
290 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
291 .bytesperline = 176,
292 .sizeimage = 40000,
293 .colorspace = V4L2_COLORSPACE_JPEG,
294 .priv = 1},
295 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
296 .bytesperline = 320,
297 .sizeimage = 320 * 240 * 3 / 8 + 590,
298 .colorspace = V4L2_COLORSPACE_JPEG,
299 .priv = 2},
300 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
301 .bytesperline = 352,
302 .sizeimage = 352 * 288 * 3 / 8 + 590,
303 .colorspace = V4L2_COLORSPACE_JPEG,
304 .priv = 0},
305 };
306
307
308 /* Registers common to OV511 / OV518 */
309 #define R51x_SYS_RESET 0x50
310 #define R51x_SYS_INIT 0x53
311 #define R51x_SYS_SNAP 0x52
312 #define R51x_SYS_CUST_ID 0x5F
313 #define R51x_COMP_LUT_BEGIN 0x80
314
315 /* OV511 Camera interface register numbers */
316 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
317 #define OV511_RESET_NOREGS 0x3F /* All but OV511 & regs */
318
319 /* OV518 Camera interface register numbers */
320 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
321 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
322
323 /* OV519 Camera interface register numbers */
324 #define OV519_R10_H_SIZE 0x10
325 #define OV519_R11_V_SIZE 0x11
326 #define OV519_R12_X_OFFSETL 0x12
327 #define OV519_R13_X_OFFSETH 0x13
328 #define OV519_R14_Y_OFFSETL 0x14
329 #define OV519_R15_Y_OFFSETH 0x15
330 #define OV519_R16_DIVIDER 0x16
331 #define OV519_R20_DFR 0x20
332 #define OV519_R25_FORMAT 0x25
333
334 /* OV519 System Controller register numbers */
335 #define OV519_SYS_RESET1 0x51
336 #define OV519_SYS_EN_CLK1 0x54
337
338 #define OV519_GPIO_DATA_OUT0 0x71
339 #define OV519_GPIO_IO_CTRL0 0x72
340
341 #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
342
343 /* I2C registers */
344 #define R51x_I2C_W_SID 0x41
345 #define R51x_I2C_SADDR_3 0x42
346 #define R51x_I2C_SADDR_2 0x43
347 #define R51x_I2C_R_SID 0x44
348 #define R51x_I2C_DATA 0x45
349 #define R518_I2C_CTL 0x47 /* OV518(+) only */
350
351 /* I2C ADDRESSES */
352 #define OV7xx0_SID 0x42
353 #define OV8xx0_SID 0xa0
354 #define OV6xx0_SID 0xc0
355
356 /* OV7610 registers */
357 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
358 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
359 #define OV7610_REG_RED 0x02 /* red channel balance */
360 #define OV7610_REG_SAT 0x03 /* saturation */
361 #define OV8610_REG_HUE 0x04 /* 04 reserved */
362 #define OV7610_REG_CNT 0x05 /* Y contrast */
363 #define OV7610_REG_BRT 0x06 /* Y brightness */
364 #define OV7610_REG_COM_C 0x14 /* misc common regs */
365 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
366 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
367 #define OV7610_REG_COM_I 0x29 /* misc settings */
368
369 /* OV7670 registers */
370 #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
371 #define OV7670_REG_BLUE 0x01 /* blue gain */
372 #define OV7670_REG_RED 0x02 /* red gain */
373 #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
374 #define OV7670_REG_COM1 0x04 /* Control 1 */
375 #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
376 #define OV7670_REG_COM3 0x0c /* Control 3 */
377 #define OV7670_REG_COM4 0x0d /* Control 4 */
378 #define OV7670_REG_COM5 0x0e /* All "reserved" */
379 #define OV7670_REG_COM6 0x0f /* Control 6 */
380 #define OV7670_REG_AECH 0x10 /* More bits of AEC value */
381 #define OV7670_REG_CLKRC 0x11 /* Clock control */
382 #define OV7670_REG_COM7 0x12 /* Control 7 */
383 #define OV7670_COM7_FMT_VGA 0x00
384 #define OV7670_COM7_YUV 0x00 /* YUV */
385 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
386 #define OV7670_COM7_FMT_MASK 0x38
387 #define OV7670_COM7_RESET 0x80 /* Register reset */
388 #define OV7670_REG_COM8 0x13 /* Control 8 */
389 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
390 #define OV7670_COM8_AWB 0x02 /* White balance enable */
391 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
392 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
393 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
394 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
395 #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
396 #define OV7670_REG_COM10 0x15 /* Control 10 */
397 #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
398 #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
399 #define OV7670_REG_VSTART 0x19 /* Vert start high bits */
400 #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
401 #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
402 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
403 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
404 #define OV7670_REG_AEW 0x24 /* AGC upper limit */
405 #define OV7670_REG_AEB 0x25 /* AGC lower limit */
406 #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
407 #define OV7670_REG_HREF 0x32 /* HREF pieces */
408 #define OV7670_REG_TSLB 0x3a /* lots of stuff */
409 #define OV7670_REG_COM11 0x3b /* Control 11 */
410 #define OV7670_COM11_EXP 0x02
411 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
412 #define OV7670_REG_COM12 0x3c /* Control 12 */
413 #define OV7670_REG_COM13 0x3d /* Control 13 */
414 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
415 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
416 #define OV7670_REG_COM14 0x3e /* Control 14 */
417 #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
418 #define OV7670_REG_COM15 0x40 /* Control 15 */
419 #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
420 #define OV7670_REG_COM16 0x41 /* Control 16 */
421 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
422 #define OV7670_REG_BRIGHT 0x55 /* Brightness */
423 #define OV7670_REG_CONTRAS 0x56 /* Contrast control */
424 #define OV7670_REG_GFIX 0x69 /* Fix gain control */
425 #define OV7670_REG_RGB444 0x8c /* RGB 444 control */
426 #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
427 #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
428 #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
429 #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
430 #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
431 #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
432 #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
433 #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
434 #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
435
436 struct ov_regvals {
437 __u8 reg;
438 __u8 val;
439 };
440 struct ov_i2c_regvals {
441 __u8 reg;
442 __u8 val;
443 };
444
445 static const struct ov_i2c_regvals norm_6x20[] = {
446 { 0x12, 0x80 }, /* reset */
447 { 0x11, 0x01 },
448 { 0x03, 0x60 },
449 { 0x05, 0x7f }, /* For when autoadjust is off */
450 { 0x07, 0xa8 },
451 /* The ratio of 0x0c and 0x0d controls the white point */
452 { 0x0c, 0x24 },
453 { 0x0d, 0x24 },
454 { 0x0f, 0x15 }, /* COMS */
455 { 0x10, 0x75 }, /* AEC Exposure time */
456 { 0x12, 0x24 }, /* Enable AGC */
457 { 0x14, 0x04 },
458 /* 0x16: 0x06 helps frame stability with moving objects */
459 { 0x16, 0x06 },
460 /* { 0x20, 0x30 }, * Aperture correction enable */
461 { 0x26, 0xb2 }, /* BLC enable */
462 /* 0x28: 0x05 Selects RGB format if RGB on */
463 { 0x28, 0x05 },
464 { 0x2a, 0x04 }, /* Disable framerate adjust */
465 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
466 { 0x2d, 0x99 },
467 { 0x33, 0xa0 }, /* Color Processing Parameter */
468 { 0x34, 0xd2 }, /* Max A/D range */
469 { 0x38, 0x8b },
470 { 0x39, 0x40 },
471
472 { 0x3c, 0x39 }, /* Enable AEC mode changing */
473 { 0x3c, 0x3c }, /* Change AEC mode */
474 { 0x3c, 0x24 }, /* Disable AEC mode changing */
475
476 { 0x3d, 0x80 },
477 /* These next two registers (0x4a, 0x4b) are undocumented.
478 * They control the color balance */
479 { 0x4a, 0x80 },
480 { 0x4b, 0x80 },
481 { 0x4d, 0xd2 }, /* This reduces noise a bit */
482 { 0x4e, 0xc1 },
483 { 0x4f, 0x04 },
484 /* Do 50-53 have any effect? */
485 /* Toggle 0x12[2] off and on here? */
486 };
487
488 static const struct ov_i2c_regvals norm_6x30[] = {
489 { 0x12, 0x80 }, /* Reset */
490 { 0x00, 0x1f }, /* Gain */
491 { 0x01, 0x99 }, /* Blue gain */
492 { 0x02, 0x7c }, /* Red gain */
493 { 0x03, 0xc0 }, /* Saturation */
494 { 0x05, 0x0a }, /* Contrast */
495 { 0x06, 0x95 }, /* Brightness */
496 { 0x07, 0x2d }, /* Sharpness */
497 { 0x0c, 0x20 },
498 { 0x0d, 0x20 },
499 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
500 { 0x0f, 0x05 },
501 { 0x10, 0x9a },
502 { 0x11, 0x00 }, /* Pixel clock = fastest */
503 { 0x12, 0x24 }, /* Enable AGC and AWB */
504 { 0x13, 0x21 },
505 { 0x14, 0x80 },
506 { 0x15, 0x01 },
507 { 0x16, 0x03 },
508 { 0x17, 0x38 },
509 { 0x18, 0xea },
510 { 0x19, 0x04 },
511 { 0x1a, 0x93 },
512 { 0x1b, 0x00 },
513 { 0x1e, 0xc4 },
514 { 0x1f, 0x04 },
515 { 0x20, 0x20 },
516 { 0x21, 0x10 },
517 { 0x22, 0x88 },
518 { 0x23, 0xc0 }, /* Crystal circuit power level */
519 { 0x25, 0x9a }, /* Increase AEC black ratio */
520 { 0x26, 0xb2 }, /* BLC enable */
521 { 0x27, 0xa2 },
522 { 0x28, 0x00 },
523 { 0x29, 0x00 },
524 { 0x2a, 0x84 }, /* 60 Hz power */
525 { 0x2b, 0xa8 }, /* 60 Hz power */
526 { 0x2c, 0xa0 },
527 { 0x2d, 0x95 }, /* Enable auto-brightness */
528 { 0x2e, 0x88 },
529 { 0x33, 0x26 },
530 { 0x34, 0x03 },
531 { 0x36, 0x8f },
532 { 0x37, 0x80 },
533 { 0x38, 0x83 },
534 { 0x39, 0x80 },
535 { 0x3a, 0x0f },
536 { 0x3b, 0x3c },
537 { 0x3c, 0x1a },
538 { 0x3d, 0x80 },
539 { 0x3e, 0x80 },
540 { 0x3f, 0x0e },
541 { 0x40, 0x00 }, /* White bal */
542 { 0x41, 0x00 }, /* White bal */
543 { 0x42, 0x80 },
544 { 0x43, 0x3f }, /* White bal */
545 { 0x44, 0x80 },
546 { 0x45, 0x20 },
547 { 0x46, 0x20 },
548 { 0x47, 0x80 },
549 { 0x48, 0x7f },
550 { 0x49, 0x00 },
551 { 0x4a, 0x00 },
552 { 0x4b, 0x80 },
553 { 0x4c, 0xd0 },
554 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
555 { 0x4e, 0x40 },
556 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
557 { 0x50, 0xff },
558 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
559 { 0x55, 0xff },
560 { 0x56, 0x12 },
561 { 0x57, 0x81 },
562 { 0x58, 0x75 },
563 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
564 { 0x5a, 0x2c },
565 { 0x5b, 0x0f }, /* AWB chrominance levels */
566 { 0x5c, 0x10 },
567 { 0x3d, 0x80 },
568 { 0x27, 0xa6 },
569 { 0x12, 0x20 }, /* Toggle AWB */
570 { 0x12, 0x24 },
571 };
572
573 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
574 *
575 * Register 0x0f in the 7610 has the following effects:
576 *
577 * 0x85 (AEC method 1): Best overall, good contrast range
578 * 0x45 (AEC method 2): Very overexposed
579 * 0xa5 (spec sheet default): Ok, but the black level is
580 * shifted resulting in loss of contrast
581 * 0x05 (old driver setting): very overexposed, too much
582 * contrast
583 */
584 static const struct ov_i2c_regvals norm_7610[] = {
585 { 0x10, 0xff },
586 { 0x16, 0x06 },
587 { 0x28, 0x24 },
588 { 0x2b, 0xac },
589 { 0x12, 0x00 },
590 { 0x38, 0x81 },
591 { 0x28, 0x24 }, /* 0c */
592 { 0x0f, 0x85 }, /* lg's setting */
593 { 0x15, 0x01 },
594 { 0x20, 0x1c },
595 { 0x23, 0x2a },
596 { 0x24, 0x10 },
597 { 0x25, 0x8a },
598 { 0x26, 0xa2 },
599 { 0x27, 0xc2 },
600 { 0x2a, 0x04 },
601 { 0x2c, 0xfe },
602 { 0x2d, 0x93 },
603 { 0x30, 0x71 },
604 { 0x31, 0x60 },
605 { 0x32, 0x26 },
606 { 0x33, 0x20 },
607 { 0x34, 0x48 },
608 { 0x12, 0x24 },
609 { 0x11, 0x01 },
610 { 0x0c, 0x24 },
611 { 0x0d, 0x24 },
612 };
613
614 static const struct ov_i2c_regvals norm_7620[] = {
615 { 0x00, 0x00 }, /* gain */
616 { 0x01, 0x80 }, /* blue gain */
617 { 0x02, 0x80 }, /* red gain */
618 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
619 { 0x06, 0x60 },
620 { 0x07, 0x00 },
621 { 0x0c, 0x24 },
622 { 0x0c, 0x24 },
623 { 0x0d, 0x24 },
624 { 0x11, 0x01 },
625 { 0x12, 0x24 },
626 { 0x13, 0x01 },
627 { 0x14, 0x84 },
628 { 0x15, 0x01 },
629 { 0x16, 0x03 },
630 { 0x17, 0x2f },
631 { 0x18, 0xcf },
632 { 0x19, 0x06 },
633 { 0x1a, 0xf5 },
634 { 0x1b, 0x00 },
635 { 0x20, 0x18 },
636 { 0x21, 0x80 },
637 { 0x22, 0x80 },
638 { 0x23, 0x00 },
639 { 0x26, 0xa2 },
640 { 0x27, 0xea },
641 { 0x28, 0x20 },
642 { 0x29, 0x00 },
643 { 0x2a, 0x10 },
644 { 0x2b, 0x00 },
645 { 0x2c, 0x88 },
646 { 0x2d, 0x91 },
647 { 0x2e, 0x80 },
648 { 0x2f, 0x44 },
649 { 0x60, 0x27 },
650 { 0x61, 0x02 },
651 { 0x62, 0x5f },
652 { 0x63, 0xd5 },
653 { 0x64, 0x57 },
654 { 0x65, 0x83 },
655 { 0x66, 0x55 },
656 { 0x67, 0x92 },
657 { 0x68, 0xcf },
658 { 0x69, 0x76 },
659 { 0x6a, 0x22 },
660 { 0x6b, 0x00 },
661 { 0x6c, 0x02 },
662 { 0x6d, 0x44 },
663 { 0x6e, 0x80 },
664 { 0x6f, 0x1d },
665 { 0x70, 0x8b },
666 { 0x71, 0x00 },
667 { 0x72, 0x14 },
668 { 0x73, 0x54 },
669 { 0x74, 0x00 },
670 { 0x75, 0x8e },
671 { 0x76, 0x00 },
672 { 0x77, 0xff },
673 { 0x78, 0x80 },
674 { 0x79, 0x80 },
675 { 0x7a, 0x80 },
676 { 0x7b, 0xe2 },
677 { 0x7c, 0x00 },
678 };
679
680 /* 7640 and 7648. The defaults should be OK for most registers. */
681 static const struct ov_i2c_regvals norm_7640[] = {
682 { 0x12, 0x80 },
683 { 0x12, 0x14 },
684 };
685
686 /* 7670. Defaults taken from OmniVision provided data,
687 * as provided by Jonathan Corbet of OLPC */
688 static const struct ov_i2c_regvals norm_7670[] = {
689 { OV7670_REG_COM7, OV7670_COM7_RESET },
690 { OV7670_REG_TSLB, 0x04 }, /* OV */
691 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
692 { OV7670_REG_CLKRC, 0x01 },
693 /*
694 * Set the hardware window. These values from OV don't entirely
695 * make sense - hstop is less than hstart. But they work...
696 */
697 { OV7670_REG_HSTART, 0x13 },
698 { OV7670_REG_HSTOP, 0x01 },
699 { OV7670_REG_HREF, 0xb6 },
700 { OV7670_REG_VSTART, 0x02 },
701 { OV7670_REG_VSTOP, 0x7a },
702 { OV7670_REG_VREF, 0x0a },
703
704 { OV7670_REG_COM3, 0x00 },
705 { OV7670_REG_COM14, 0x00 },
706 /* Mystery scaling numbers */
707 { 0x70, 0x3a },
708 { 0x71, 0x35 },
709 { 0x72, 0x11 },
710 { 0x73, 0xf0 },
711 { 0xa2, 0x02 },
712 /* { OV7670_REG_COM10, 0x0 }, */
713
714 /* Gamma curve values */
715 { 0x7a, 0x20 },
716 { 0x7b, 0x10 },
717 { 0x7c, 0x1e },
718 { 0x7d, 0x35 },
719 { 0x7e, 0x5a },
720 { 0x7f, 0x69 },
721 { 0x80, 0x76 },
722 { 0x81, 0x80 },
723 { 0x82, 0x88 },
724 { 0x83, 0x8f },
725 { 0x84, 0x96 },
726 { 0x85, 0xa3 },
727 { 0x86, 0xaf },
728 { 0x87, 0xc4 },
729 { 0x88, 0xd7 },
730 { 0x89, 0xe8 },
731
732 /* AGC and AEC parameters. Note we start by disabling those features,
733 then turn them only after tweaking the values. */
734 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
735 | OV7670_COM8_AECSTEP
736 | OV7670_COM8_BFILT },
737 { OV7670_REG_GAIN, 0x00 },
738 { OV7670_REG_AECH, 0x00 },
739 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
740 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
741 { OV7670_REG_BD50MAX, 0x05 },
742 { OV7670_REG_BD60MAX, 0x07 },
743 { OV7670_REG_AEW, 0x95 },
744 { OV7670_REG_AEB, 0x33 },
745 { OV7670_REG_VPT, 0xe3 },
746 { OV7670_REG_HAECC1, 0x78 },
747 { OV7670_REG_HAECC2, 0x68 },
748 { 0xa1, 0x03 }, /* magic */
749 { OV7670_REG_HAECC3, 0xd8 },
750 { OV7670_REG_HAECC4, 0xd8 },
751 { OV7670_REG_HAECC5, 0xf0 },
752 { OV7670_REG_HAECC6, 0x90 },
753 { OV7670_REG_HAECC7, 0x94 },
754 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
755 | OV7670_COM8_AECSTEP
756 | OV7670_COM8_BFILT
757 | OV7670_COM8_AGC
758 | OV7670_COM8_AEC },
759
760 /* Almost all of these are magic "reserved" values. */
761 { OV7670_REG_COM5, 0x61 },
762 { OV7670_REG_COM6, 0x4b },
763 { 0x16, 0x02 },
764 { OV7670_REG_MVFP, 0x07 },
765 { 0x21, 0x02 },
766 { 0x22, 0x91 },
767 { 0x29, 0x07 },
768 { 0x33, 0x0b },
769 { 0x35, 0x0b },
770 { 0x37, 0x1d },
771 { 0x38, 0x71 },
772 { 0x39, 0x2a },
773 { OV7670_REG_COM12, 0x78 },
774 { 0x4d, 0x40 },
775 { 0x4e, 0x20 },
776 { OV7670_REG_GFIX, 0x00 },
777 { 0x6b, 0x4a },
778 { 0x74, 0x10 },
779 { 0x8d, 0x4f },
780 { 0x8e, 0x00 },
781 { 0x8f, 0x00 },
782 { 0x90, 0x00 },
783 { 0x91, 0x00 },
784 { 0x96, 0x00 },
785 { 0x9a, 0x00 },
786 { 0xb0, 0x84 },
787 { 0xb1, 0x0c },
788 { 0xb2, 0x0e },
789 { 0xb3, 0x82 },
790 { 0xb8, 0x0a },
791
792 /* More reserved magic, some of which tweaks white balance */
793 { 0x43, 0x0a },
794 { 0x44, 0xf0 },
795 { 0x45, 0x34 },
796 { 0x46, 0x58 },
797 { 0x47, 0x28 },
798 { 0x48, 0x3a },
799 { 0x59, 0x88 },
800 { 0x5a, 0x88 },
801 { 0x5b, 0x44 },
802 { 0x5c, 0x67 },
803 { 0x5d, 0x49 },
804 { 0x5e, 0x0e },
805 { 0x6c, 0x0a },
806 { 0x6d, 0x55 },
807 { 0x6e, 0x11 },
808 { 0x6f, 0x9f },
809 /* "9e for advance AWB" */
810 { 0x6a, 0x40 },
811 { OV7670_REG_BLUE, 0x40 },
812 { OV7670_REG_RED, 0x60 },
813 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
814 | OV7670_COM8_AECSTEP
815 | OV7670_COM8_BFILT
816 | OV7670_COM8_AGC
817 | OV7670_COM8_AEC
818 | OV7670_COM8_AWB },
819
820 /* Matrix coefficients */
821 { 0x4f, 0x80 },
822 { 0x50, 0x80 },
823 { 0x51, 0x00 },
824 { 0x52, 0x22 },
825 { 0x53, 0x5e },
826 { 0x54, 0x80 },
827 { 0x58, 0x9e },
828
829 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
830 { OV7670_REG_EDGE, 0x00 },
831 { 0x75, 0x05 },
832 { 0x76, 0xe1 },
833 { 0x4c, 0x00 },
834 { 0x77, 0x01 },
835 { OV7670_REG_COM13, OV7670_COM13_GAMMA
836 | OV7670_COM13_UVSAT
837 | 2}, /* was 3 */
838 { 0x4b, 0x09 },
839 { 0xc9, 0x60 },
840 { OV7670_REG_COM16, 0x38 },
841 { 0x56, 0x40 },
842
843 { 0x34, 0x11 },
844 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
845 { 0xa4, 0x88 },
846 { 0x96, 0x00 },
847 { 0x97, 0x30 },
848 { 0x98, 0x20 },
849 { 0x99, 0x30 },
850 { 0x9a, 0x84 },
851 { 0x9b, 0x29 },
852 { 0x9c, 0x03 },
853 { 0x9d, 0x4c },
854 { 0x9e, 0x3f },
855 { 0x78, 0x04 },
856
857 /* Extra-weird stuff. Some sort of multiplexor register */
858 { 0x79, 0x01 },
859 { 0xc8, 0xf0 },
860 { 0x79, 0x0f },
861 { 0xc8, 0x00 },
862 { 0x79, 0x10 },
863 { 0xc8, 0x7e },
864 { 0x79, 0x0a },
865 { 0xc8, 0x80 },
866 { 0x79, 0x0b },
867 { 0xc8, 0x01 },
868 { 0x79, 0x0c },
869 { 0xc8, 0x0f },
870 { 0x79, 0x0d },
871 { 0xc8, 0x20 },
872 { 0x79, 0x09 },
873 { 0xc8, 0x80 },
874 { 0x79, 0x02 },
875 { 0xc8, 0xc0 },
876 { 0x79, 0x03 },
877 { 0xc8, 0x40 },
878 { 0x79, 0x05 },
879 { 0xc8, 0x30 },
880 { 0x79, 0x26 },
881 };
882
883 static const struct ov_i2c_regvals norm_8610[] = {
884 { 0x12, 0x80 },
885 { 0x00, 0x00 },
886 { 0x01, 0x80 },
887 { 0x02, 0x80 },
888 { 0x03, 0xc0 },
889 { 0x04, 0x30 },
890 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
891 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
892 { 0x0a, 0x86 },
893 { 0x0b, 0xb0 },
894 { 0x0c, 0x20 },
895 { 0x0d, 0x20 },
896 { 0x11, 0x01 },
897 { 0x12, 0x25 },
898 { 0x13, 0x01 },
899 { 0x14, 0x04 },
900 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
901 { 0x16, 0x03 },
902 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
903 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
904 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
905 { 0x1a, 0xf5 },
906 { 0x1b, 0x00 },
907 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
908 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
909 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
910 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
911 { 0x26, 0xa2 },
912 { 0x27, 0xea },
913 { 0x28, 0x00 },
914 { 0x29, 0x00 },
915 { 0x2a, 0x80 },
916 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
917 { 0x2c, 0xac },
918 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
919 { 0x2e, 0x80 },
920 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
921 { 0x4c, 0x00 },
922 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
923 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
924 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
925 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
926 { 0x63, 0xff },
927 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
928 * maybe thats wrong */
929 { 0x65, 0x00 },
930 { 0x66, 0x55 },
931 { 0x67, 0xb0 },
932 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
933 { 0x69, 0x02 },
934 { 0x6a, 0x22 },
935 { 0x6b, 0x00 },
936 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
937 * deleting bit7 colors the first images red */
938 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
939 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
940 { 0x6f, 0x01 },
941 { 0x70, 0x8b },
942 { 0x71, 0x00 },
943 { 0x72, 0x14 },
944 { 0x73, 0x54 },
945 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
946 { 0x75, 0x0e },
947 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
948 { 0x77, 0xff },
949 { 0x78, 0x80 },
950 { 0x79, 0x80 },
951 { 0x7a, 0x80 },
952 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
953 { 0x7c, 0x00 },
954 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
955 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
956 { 0x7f, 0xfb },
957 { 0x80, 0x28 },
958 { 0x81, 0x00 },
959 { 0x82, 0x23 },
960 { 0x83, 0x0b },
961 { 0x84, 0x00 },
962 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
963 { 0x86, 0xc9 },
964 { 0x87, 0x00 },
965 { 0x88, 0x00 },
966 { 0x89, 0x01 },
967 { 0x12, 0x20 },
968 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
969 };
970
971 static unsigned char ov7670_abs_to_sm(unsigned char v)
972 {
973 if (v > 127)
974 return v & 0x7f;
975 return (128 - v) | 0x80;
976 }
977
978 /* Write a OV519 register */
979 static int reg_w(struct sd *sd, __u16 index, __u8 value)
980 {
981 int ret;
982 int req = (sd->bridge <= BRIDGE_OV511PLUS) ? 2 : 1;
983
984 sd->gspca_dev.usb_buf[0] = value;
985 ret = usb_control_msg(sd->gspca_dev.dev,
986 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
987 req,
988 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
989 0, index,
990 sd->gspca_dev.usb_buf, 1, 500);
991 if (ret < 0)
992 PDEBUG(D_ERR, "Write reg [%02x] %02x failed", index, value);
993 return ret;
994 }
995
996 /* Read from a OV519 register */
997 /* returns: negative is error, pos or zero is data */
998 static int reg_r(struct sd *sd, __u16 index)
999 {
1000 int ret;
1001 int req = (sd->bridge <= BRIDGE_OV511PLUS) ? 3 : 1;
1002
1003 ret = usb_control_msg(sd->gspca_dev.dev,
1004 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1005 req,
1006 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1007 0, index, sd->gspca_dev.usb_buf, 1, 500);
1008
1009 if (ret >= 0)
1010 ret = sd->gspca_dev.usb_buf[0];
1011 else
1012 PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
1013 return ret;
1014 }
1015
1016 /* Read 8 values from a OV519 register */
1017 static int reg_r8(struct sd *sd,
1018 __u16 index)
1019 {
1020 int ret;
1021
1022 ret = usb_control_msg(sd->gspca_dev.dev,
1023 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1024 1, /* REQ_IO */
1025 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1026 0, index, sd->gspca_dev.usb_buf, 8, 500);
1027
1028 if (ret >= 0)
1029 ret = sd->gspca_dev.usb_buf[0];
1030 else
1031 PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
1032 return ret;
1033 }
1034
1035 /*
1036 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
1037 * the same position as 1's in "mask" are cleared and set to "value". Bits
1038 * that are in the same position as 0's in "mask" are preserved, regardless
1039 * of their respective state in "value".
1040 */
1041 static int reg_w_mask(struct sd *sd,
1042 __u16 index,
1043 __u8 value,
1044 __u8 mask)
1045 {
1046 int ret;
1047 __u8 oldval;
1048
1049 if (mask != 0xff) {
1050 value &= mask; /* Enforce mask on value */
1051 ret = reg_r(sd, index);
1052 if (ret < 0)
1053 return ret;
1054
1055 oldval = ret & ~mask; /* Clear the masked bits */
1056 value |= oldval; /* Set the desired bits */
1057 }
1058 return reg_w(sd, index, value);
1059 }
1060
1061 /*
1062 * Writes multiple (n) byte value to a single register. Only valid with certain
1063 * registers (0x30 and 0xc4 - 0xce).
1064 */
1065 static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
1066 {
1067 int ret;
1068
1069 *((u32 *)sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
1070
1071 ret = usb_control_msg(sd->gspca_dev.dev,
1072 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1073 1 /* REG_IO */,
1074 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1075 0, index,
1076 sd->gspca_dev.usb_buf, n, 500);
1077 if (ret < 0)
1078 PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value);
1079 return ret;
1080 }
1081
1082
1083 /*
1084 * The OV518 I2C I/O procedure is different, hence, this function.
1085 * This is normally only called from i2c_w(). Note that this function
1086 * always succeeds regardless of whether the sensor is present and working.
1087 */
1088 static int i2c_w(struct sd *sd,
1089 __u8 reg,
1090 __u8 value)
1091 {
1092 int rc;
1093
1094 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
1095
1096 /* Select camera register */
1097 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
1098 if (rc < 0)
1099 return rc;
1100
1101 /* Write "value" to I2C data port of OV511 */
1102 rc = reg_w(sd, R51x_I2C_DATA, value);
1103 if (rc < 0)
1104 return rc;
1105
1106 /* Initiate 3-byte write cycle */
1107 rc = reg_w(sd, R518_I2C_CTL, 0x01);
1108 if (rc < 0)
1109 return rc;
1110
1111 /* wait for write complete */
1112 msleep(4);
1113 return reg_r8(sd, R518_I2C_CTL);
1114 }
1115
1116 /*
1117 * returns: negative is error, pos or zero is data
1118 *
1119 * The OV518 I2C I/O procedure is different, hence, this function.
1120 * This is normally only called from i2c_r(). Note that this function
1121 * always succeeds regardless of whether the sensor is present and working.
1122 */
1123 static int i2c_r(struct sd *sd, __u8 reg)
1124 {
1125 int rc, value;
1126
1127 /* Select camera register */
1128 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
1129 if (rc < 0)
1130 return rc;
1131
1132 /* Initiate 2-byte write cycle */
1133 rc = reg_w(sd, R518_I2C_CTL, 0x03);
1134 if (rc < 0)
1135 return rc;
1136
1137 /* Initiate 2-byte read cycle */
1138 rc = reg_w(sd, R518_I2C_CTL, 0x05);
1139 if (rc < 0)
1140 return rc;
1141 value = reg_r(sd, R51x_I2C_DATA);
1142 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
1143 return value;
1144 }
1145
1146 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
1147 * the same position as 1's in "mask" are cleared and set to "value". Bits
1148 * that are in the same position as 0's in "mask" are preserved, regardless
1149 * of their respective state in "value".
1150 */
1151 static int i2c_w_mask(struct sd *sd,
1152 __u8 reg,
1153 __u8 value,
1154 __u8 mask)
1155 {
1156 int rc;
1157 __u8 oldval;
1158
1159 value &= mask; /* Enforce mask on value */
1160 rc = i2c_r(sd, reg);
1161 if (rc < 0)
1162 return rc;
1163 oldval = rc & ~mask; /* Clear the masked bits */
1164 value |= oldval; /* Set the desired bits */
1165 return i2c_w(sd, reg, value);
1166 }
1167
1168 /* Temporarily stops OV511 from functioning. Must do this before changing
1169 * registers while the camera is streaming */
1170 static inline int ov51x_stop(struct sd *sd)
1171 {
1172 PDEBUG(D_STREAM, "stopping");
1173 sd->stopped = 1;
1174 switch (sd->bridge) {
1175 case BRIDGE_OV511:
1176 case BRIDGE_OV511PLUS:
1177 return reg_w(sd, R51x_SYS_RESET, 0x3d);
1178 case BRIDGE_OV518:
1179 case BRIDGE_OV518PLUS:
1180 return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
1181 case BRIDGE_OV519:
1182 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
1183 }
1184
1185 return 0;
1186 }
1187
1188 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
1189 * actually stopped (for performance). */
1190 static inline int ov51x_restart(struct sd *sd)
1191 {
1192 int rc;
1193
1194 PDEBUG(D_STREAM, "restarting");
1195 if (!sd->stopped)
1196 return 0;
1197 sd->stopped = 0;
1198
1199 /* Reinitialize the stream */
1200 switch (sd->bridge) {
1201 case BRIDGE_OV511:
1202 case BRIDGE_OV511PLUS:
1203 return reg_w(sd, R51x_SYS_RESET, 0x00);
1204 case BRIDGE_OV518:
1205 case BRIDGE_OV518PLUS:
1206 rc = reg_w(sd, 0x2f, 0x80);
1207 if (rc < 0)
1208 return rc;
1209 return reg_w(sd, R51x_SYS_RESET, 0x00);
1210 case BRIDGE_OV519:
1211 return reg_w(sd, OV519_SYS_RESET1, 0x00);
1212 }
1213
1214 return 0;
1215 }
1216
1217 /* This does an initial reset of an OmniVision sensor and ensures that I2C
1218 * is synchronized. Returns <0 on failure.
1219 */
1220 static int init_ov_sensor(struct sd *sd)
1221 {
1222 int i;
1223
1224 /* Reset the sensor */
1225 if (i2c_w(sd, 0x12, 0x80) < 0)
1226 return -EIO;
1227
1228 /* Wait for it to initialize */
1229 msleep(150);
1230
1231 for (i = 0; i < i2c_detect_tries; i++) {
1232 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
1233 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
1234 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
1235 return 0;
1236 }
1237
1238 /* Reset the sensor */
1239 if (i2c_w(sd, 0x12, 0x80) < 0)
1240 return -EIO;
1241 /* Wait for it to initialize */
1242 msleep(150);
1243 /* Dummy read to sync I2C */
1244 if (i2c_r(sd, 0x00) < 0)
1245 return -EIO;
1246 }
1247 return -EIO;
1248 }
1249
1250 /* Set the read and write slave IDs. The "slave" argument is the write slave,
1251 * and the read slave will be set to (slave + 1).
1252 * This should not be called from outside the i2c I/O functions.
1253 * Sets I2C read and write slave IDs. Returns <0 for error
1254 */
1255 static int ov51x_set_slave_ids(struct sd *sd,
1256 __u8 slave)
1257 {
1258 int rc;
1259
1260 rc = reg_w(sd, R51x_I2C_W_SID, slave);
1261 if (rc < 0)
1262 return rc;
1263 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
1264 }
1265
1266 static int write_regvals(struct sd *sd,
1267 const struct ov_regvals *regvals,
1268 int n)
1269 {
1270 int rc;
1271
1272 while (--n >= 0) {
1273 rc = reg_w(sd, regvals->reg, regvals->val);
1274 if (rc < 0)
1275 return rc;
1276 regvals++;
1277 }
1278 return 0;
1279 }
1280
1281 static int write_i2c_regvals(struct sd *sd,
1282 const struct ov_i2c_regvals *regvals,
1283 int n)
1284 {
1285 int rc;
1286
1287 while (--n >= 0) {
1288 rc = i2c_w(sd, regvals->reg, regvals->val);
1289 if (rc < 0)
1290 return rc;
1291 regvals++;
1292 }
1293 return 0;
1294 }
1295
1296 /****************************************************************************
1297 *
1298 * OV511 and sensor configuration
1299 *
1300 ***************************************************************************/
1301
1302 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
1303 * the same register settings as the OV8610, since they are very similar.
1304 */
1305 static int ov8xx0_configure(struct sd *sd)
1306 {
1307 int rc;
1308
1309 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
1310
1311 /* Detect sensor (sub)type */
1312 rc = i2c_r(sd, OV7610_REG_COM_I);
1313 if (rc < 0) {
1314 PDEBUG(D_ERR, "Error detecting sensor type");
1315 return -1;
1316 }
1317 if ((rc & 3) == 1) {
1318 sd->sensor = SEN_OV8610;
1319 } else {
1320 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
1321 return -1;
1322 }
1323
1324 /* Set sensor-specific vars */
1325 /* sd->sif = 0; already done */
1326 return 0;
1327 }
1328
1329 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
1330 * the same register settings as the OV7610, since they are very similar.
1331 */
1332 static int ov7xx0_configure(struct sd *sd)
1333 {
1334 int rc, high, low;
1335
1336
1337 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
1338
1339 /* Detect sensor (sub)type */
1340 rc = i2c_r(sd, OV7610_REG_COM_I);
1341
1342 /* add OV7670 here
1343 * it appears to be wrongly detected as a 7610 by default */
1344 if (rc < 0) {
1345 PDEBUG(D_ERR, "Error detecting sensor type");
1346 return -1;
1347 }
1348 if ((rc & 3) == 3) {
1349 /* quick hack to make OV7670s work */
1350 high = i2c_r(sd, 0x0a);
1351 low = i2c_r(sd, 0x0b);
1352 /* info("%x, %x", high, low); */
1353 if (high == 0x76 && low == 0x73) {
1354 PDEBUG(D_PROBE, "Sensor is an OV7670");
1355 sd->sensor = SEN_OV7670;
1356 } else {
1357 PDEBUG(D_PROBE, "Sensor is an OV7610");
1358 sd->sensor = SEN_OV7610;
1359 }
1360 } else if ((rc & 3) == 1) {
1361 /* I don't know what's different about the 76BE yet. */
1362 if (i2c_r(sd, 0x15) & 1)
1363 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
1364 else
1365 PDEBUG(D_PROBE, "Sensor is an OV76BE");
1366
1367 /* OV511+ will return all zero isoc data unless we
1368 * configure the sensor as a 7620. Someone needs to
1369 * find the exact reg. setting that causes this. */
1370 sd->sensor = SEN_OV76BE;
1371 } else if ((rc & 3) == 0) {
1372 /* try to read product id registers */
1373 high = i2c_r(sd, 0x0a);
1374 if (high < 0) {
1375 PDEBUG(D_ERR, "Error detecting camera chip PID");
1376 return high;
1377 }
1378 low = i2c_r(sd, 0x0b);
1379 if (low < 0) {
1380 PDEBUG(D_ERR, "Error detecting camera chip VER");
1381 return low;
1382 }
1383 if (high == 0x76) {
1384 switch (low) {
1385 case 0x30:
1386 PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
1387 PDEBUG(D_ERR,
1388 "7630 is not supported by this driver");
1389 return -1;
1390 case 0x40:
1391 PDEBUG(D_PROBE, "Sensor is an OV7645");
1392 sd->sensor = SEN_OV7640; /* FIXME */
1393 break;
1394 case 0x45:
1395 PDEBUG(D_PROBE, "Sensor is an OV7645B");
1396 sd->sensor = SEN_OV7640; /* FIXME */
1397 break;
1398 case 0x48:
1399 PDEBUG(D_PROBE, "Sensor is an OV7648");
1400 sd->sensor = SEN_OV7640; /* FIXME */
1401 break;
1402 default:
1403 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
1404 return -1;
1405 }
1406 } else {
1407 PDEBUG(D_PROBE, "Sensor is an OV7620");
1408 sd->sensor = SEN_OV7620;
1409 }
1410 } else {
1411 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
1412 return -1;
1413 }
1414
1415 /* Set sensor-specific vars */
1416 /* sd->sif = 0; already done */
1417 return 0;
1418 }
1419
1420 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
1421 static int ov6xx0_configure(struct sd *sd)
1422 {
1423 int rc;
1424 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
1425
1426 /* Detect sensor (sub)type */
1427 rc = i2c_r(sd, OV7610_REG_COM_I);
1428 if (rc < 0) {
1429 PDEBUG(D_ERR, "Error detecting sensor type");
1430 return -1;
1431 }
1432
1433 /* Ugh. The first two bits are the version bits, but
1434 * the entire register value must be used. I guess OVT
1435 * underestimated how many variants they would make. */
1436 switch (rc) {
1437 case 0x00:
1438 sd->sensor = SEN_OV6630;
1439 PDEBUG(D_ERR,
1440 "WARNING: Sensor is an OV66308. Your camera may have");
1441 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
1442 break;
1443 case 0x01:
1444 sd->sensor = SEN_OV6620;
1445 PDEBUG(D_PROBE, "Sensor is an OV6620");
1446 break;
1447 case 0x02:
1448 sd->sensor = SEN_OV6630;
1449 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
1450 break;
1451 case 0x03:
1452 sd->sensor = SEN_OV66308AF;
1453 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
1454 break;
1455 case 0x90:
1456 sd->sensor = SEN_OV6630;
1457 PDEBUG(D_ERR,
1458 "WARNING: Sensor is an OV66307. Your camera may have");
1459 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
1460 break;
1461 default:
1462 PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
1463 return -1;
1464 }
1465
1466 /* Set sensor-specific vars */
1467 sd->sif = 1;
1468
1469 return 0;
1470 }
1471
1472 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
1473 static void ov51x_led_control(struct sd *sd, int on)
1474 {
1475 if (sd->invert_led)
1476 on = !on;
1477
1478 switch (sd->bridge) {
1479 /* OV511 has no LED control */
1480 case BRIDGE_OV511PLUS:
1481 reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
1482 break;
1483 case BRIDGE_OV518:
1484 case BRIDGE_OV518PLUS:
1485 reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
1486 break;
1487 case BRIDGE_OV519:
1488 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
1489 break;
1490 }
1491 }
1492
1493 /* OV518 quantization tables are 8x4 (instead of 8x8) */
1494 static int ov518_upload_quan_tables(struct sd *sd)
1495 {
1496 const unsigned char yQuanTable518[] = {
1497 5, 4, 5, 6, 6, 7, 7, 7,
1498 5, 5, 5, 5, 6, 7, 7, 7,
1499 6, 6, 6, 6, 7, 7, 7, 8,
1500 7, 7, 6, 7, 7, 7, 8, 8
1501 };
1502
1503 const unsigned char uvQuanTable518[] = {
1504 6, 6, 6, 7, 7, 7, 7, 7,
1505 6, 6, 6, 7, 7, 7, 7, 7,
1506 6, 6, 6, 7, 7, 7, 7, 8,
1507 7, 7, 7, 7, 7, 7, 8, 8
1508 };
1509
1510 const unsigned char *pYTable = yQuanTable518;
1511 const unsigned char *pUVTable = uvQuanTable518;
1512 unsigned char val0, val1;
1513 int i, rc, reg = R51x_COMP_LUT_BEGIN;
1514
1515 PDEBUG(D_PROBE, "Uploading quantization tables");
1516
1517 for (i = 0; i < 16; i++) {
1518 val0 = *pYTable++;
1519 val1 = *pYTable++;
1520 val0 &= 0x0f;
1521 val1 &= 0x0f;
1522 val0 |= val1 << 4;
1523 rc = reg_w(sd, reg, val0);
1524 if (rc < 0)
1525 return rc;
1526
1527 val0 = *pUVTable++;
1528 val1 = *pUVTable++;
1529 val0 &= 0x0f;
1530 val1 &= 0x0f;
1531 val0 |= val1 << 4;
1532 rc = reg_w(sd, reg + 16, val0);
1533 if (rc < 0)
1534 return rc;
1535
1536 reg++;
1537 }
1538
1539 return 0;
1540 }
1541
1542 /* This initializes the OV518/OV518+ and the sensor */
1543 static int ov518_configure(struct gspca_dev *gspca_dev)
1544 {
1545 struct sd *sd = (struct sd *) gspca_dev;
1546 int rc;
1547
1548 /* For 518 and 518+ */
1549 static struct ov_regvals init_518[] = {
1550 { R51x_SYS_RESET, 0x40 },
1551 { R51x_SYS_INIT, 0xe1 },
1552 { R51x_SYS_RESET, 0x3e },
1553 { R51x_SYS_INIT, 0xe1 },
1554 { R51x_SYS_RESET, 0x00 },
1555 { R51x_SYS_INIT, 0xe1 },
1556 { 0x46, 0x00 },
1557 { 0x5d, 0x03 },
1558 };
1559
1560 static struct ov_regvals norm_518[] = {
1561 { R51x_SYS_SNAP, 0x02 }, /* Reset */
1562 { R51x_SYS_SNAP, 0x01 }, /* Enable */
1563 { 0x31, 0x0f },
1564 { 0x5d, 0x03 },
1565 { 0x24, 0x9f },
1566 { 0x25, 0x90 },
1567 { 0x20, 0x00 },
1568 { 0x51, 0x04 },
1569 { 0x71, 0x19 },
1570 { 0x2f, 0x80 },
1571 };
1572
1573 static struct ov_regvals norm_518_p[] = {
1574 { R51x_SYS_SNAP, 0x02 }, /* Reset */
1575 { R51x_SYS_SNAP, 0x01 }, /* Enable */
1576 { 0x31, 0x0f },
1577 { 0x5d, 0x03 },
1578 { 0x24, 0x9f },
1579 { 0x25, 0x90 },
1580 { 0x20, 0x60 },
1581 { 0x51, 0x02 },
1582 { 0x71, 0x19 },
1583 { 0x40, 0xff },
1584 { 0x41, 0x42 },
1585 { 0x46, 0x00 },
1586 { 0x33, 0x04 },
1587 { 0x21, 0x19 },
1588 { 0x3f, 0x10 },
1589 { 0x2f, 0x80 },
1590 };
1591
1592 /* First 5 bits of custom ID reg are a revision ID on OV518 */
1593 PDEBUG(D_PROBE, "Device revision %d",
1594 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
1595
1596 rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
1597 if (rc < 0)
1598 return rc;
1599
1600 /* Set LED GPIO pin to output mode */
1601 rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
1602 if (rc < 0)
1603 return rc;
1604
1605 switch (sd->bridge) {
1606 case BRIDGE_OV518:
1607 rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
1608 if (rc < 0)
1609 return rc;
1610 break;
1611 case BRIDGE_OV518PLUS:
1612 rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
1613 if (rc < 0)
1614 return rc;
1615 break;
1616 }
1617
1618 rc = ov518_upload_quan_tables(sd);
1619 if (rc < 0) {
1620 PDEBUG(D_ERR, "Error uploading quantization tables");
1621 return rc;
1622 }
1623
1624 rc = reg_w(sd, 0x2f, 0x80);
1625 if (rc < 0)
1626 return rc;
1627
1628 return 0;
1629 }
1630
1631 static int ov519_configure(struct sd *sd)
1632 {
1633 static const struct ov_regvals init_519[] = {
1634 { 0x5a, 0x6d }, /* EnableSystem */
1635 { 0x53, 0x9b },
1636 { 0x54, 0xff }, /* set bit2 to enable jpeg */
1637 { 0x5d, 0x03 },
1638 { 0x49, 0x01 },
1639 { 0x48, 0x00 },
1640 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
1641 * detection will fail. This deserves further investigation. */
1642 { OV519_GPIO_IO_CTRL0, 0xee },
1643 { 0x51, 0x0f }, /* SetUsbInit */
1644 { 0x51, 0x00 },
1645 { 0x22, 0x00 },
1646 /* windows reads 0x55 at this point*/
1647 };
1648
1649 return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
1650 }
1651
1652 /* this function is called at probe time */
1653 static int sd_config(struct gspca_dev *gspca_dev,
1654 const struct usb_device_id *id)
1655 {
1656 struct sd *sd = (struct sd *) gspca_dev;
1657 struct cam *cam;
1658 int ret = 0;
1659
1660 sd->bridge = id->driver_info & BRIDGE_MASK;
1661 sd->invert_led = id->driver_info & BRIDGE_INVERT_LED;
1662
1663 switch (sd->bridge) {
1664 case BRIDGE_OV518:
1665 case BRIDGE_OV518PLUS:
1666 ret = ov518_configure(gspca_dev);
1667 break;
1668 case BRIDGE_OV519:
1669 ret = ov519_configure(sd);
1670 break;
1671 }
1672
1673 if (ret)
1674 goto error;
1675
1676 ov51x_led_control(sd, 0); /* turn LED off */
1677
1678 /* Test for 76xx */
1679 if (ov51x_set_slave_ids(sd, OV7xx0_SID) < 0)
1680 goto error;
1681
1682 /* The OV519 must be more aggressive about sensor detection since
1683 * I2C write will never fail if the sensor is not present. We have
1684 * to try to initialize the sensor to detect its presence */
1685 if (init_ov_sensor(sd) >= 0) {
1686 if (ov7xx0_configure(sd) < 0) {
1687 PDEBUG(D_ERR, "Failed to configure OV7xx0");
1688 goto error;
1689 }
1690 } else {
1691
1692 /* Test for 6xx0 */
1693 if (ov51x_set_slave_ids(sd, OV6xx0_SID) < 0)
1694 goto error;
1695
1696 if (init_ov_sensor(sd) >= 0) {
1697 if (ov6xx0_configure(sd) < 0) {
1698 PDEBUG(D_ERR, "Failed to configure OV6xx0");
1699 goto error;
1700 }
1701 } else {
1702
1703 /* Test for 8xx0 */
1704 if (ov51x_set_slave_ids(sd, OV8xx0_SID) < 0)
1705 goto error;
1706
1707 if (init_ov_sensor(sd) < 0) {
1708 PDEBUG(D_ERR,
1709 "Can't determine sensor slave IDs");
1710 goto error;
1711 }
1712 if (ov8xx0_configure(sd) < 0) {
1713 PDEBUG(D_ERR,
1714 "Failed to configure OV8xx0 sensor");
1715 goto error;
1716 }
1717 }
1718 }
1719
1720 cam = &gspca_dev->cam;
1721 switch (sd->bridge) {
1722 case BRIDGE_OV518:
1723 case BRIDGE_OV518PLUS:
1724 if (!sd->sif) {
1725 cam->cam_mode = ov518_vga_mode;
1726 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
1727 } else {
1728 cam->cam_mode = ov518_sif_mode;
1729 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
1730 }
1731 break;
1732 case BRIDGE_OV519:
1733 if (!sd->sif) {
1734 cam->cam_mode = ov519_vga_mode;
1735 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
1736 } else {
1737 cam->cam_mode = ov519_sif_mode;
1738 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
1739 }
1740 break;
1741 }
1742 sd->brightness = BRIGHTNESS_DEF;
1743 sd->contrast = CONTRAST_DEF;
1744 sd->colors = COLOR_DEF;
1745 sd->hflip = HFLIP_DEF;
1746 sd->vflip = VFLIP_DEF;
1747 sd->autobrightness = AUTOBRIGHT_DEF;
1748 if (sd->sensor == SEN_OV7670) {
1749 sd->freq = OV7670_FREQ_DEF;
1750 gspca_dev->ctrl_dis = 1 << FREQ_IDX;
1751 } else {
1752 sd->freq = FREQ_DEF;
1753 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) |
1754 (1 << OV7670_FREQ_IDX);
1755 }
1756 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
1757 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX;
1758 /* OV8610 Frequency filter control should work but needs testing */
1759 if (sd->sensor == SEN_OV8610)
1760 gspca_dev->ctrl_dis |= 1 << FREQ_IDX;
1761
1762 return 0;
1763 error:
1764 PDEBUG(D_ERR, "OV519 Config failed");
1765 return -EBUSY;
1766 }
1767
1768 /* this function is called at probe and resume time */
1769 static int sd_init(struct gspca_dev *gspca_dev)
1770 {
1771 struct sd *sd = (struct sd *) gspca_dev;
1772
1773 /* initialize the sensor */
1774 switch (sd->sensor) {
1775 case SEN_OV6620:
1776 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
1777 return -EIO;
1778 break;
1779 case SEN_OV6630:
1780 case SEN_OV66308AF:
1781 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
1782 return -EIO;
1783 break;
1784 default:
1785 /* case SEN_OV7610: */
1786 /* case SEN_OV76BE: */
1787 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
1788 return -EIO;
1789 break;
1790 case SEN_OV7620:
1791 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
1792 return -EIO;
1793 break;
1794 case SEN_OV7640:
1795 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
1796 return -EIO;
1797 break;
1798 case SEN_OV7670:
1799 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
1800 return -EIO;
1801 break;
1802 case SEN_OV8610:
1803 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
1804 return -EIO;
1805 break;
1806 }
1807 return 0;
1808 }
1809
1810 /* Sets up the OV518/OV518+ with the given image parameters
1811 *
1812 * OV518 needs a completely different approach, until we can figure out what
1813 * the individual registers do. Also, only 15 FPS is supported now.
1814 *
1815 * Do not put any sensor-specific code in here (including I2C I/O functions)
1816 */
1817 static int ov518_mode_init_regs(struct sd *sd)
1818 {
1819 int hsegs, vsegs;
1820
1821 /******** Set the mode ********/
1822
1823 reg_w(sd, 0x2b, 0);
1824 reg_w(sd, 0x2c, 0);
1825 reg_w(sd, 0x2d, 0);
1826 reg_w(sd, 0x2e, 0);
1827 reg_w(sd, 0x3b, 0);
1828 reg_w(sd, 0x3c, 0);
1829 reg_w(sd, 0x3d, 0);
1830 reg_w(sd, 0x3e, 0);
1831
1832 if (sd->bridge == BRIDGE_OV518) {
1833 /* Set 8-bit (YVYU) input format */
1834 reg_w_mask(sd, 0x20, 0x08, 0x08);
1835
1836 /* Set 12-bit (4:2:0) output format */
1837 reg_w_mask(sd, 0x28, 0x80, 0xf0);
1838 reg_w_mask(sd, 0x38, 0x80, 0xf0);
1839 } else {
1840 reg_w(sd, 0x28, 0x80);
1841 reg_w(sd, 0x38, 0x80);
1842 }
1843
1844 hsegs = sd->gspca_dev.width / 16;
1845 vsegs = sd->gspca_dev.height / 4;
1846
1847 reg_w(sd, 0x29, hsegs);
1848 reg_w(sd, 0x2a, vsegs);
1849
1850 reg_w(sd, 0x39, hsegs);
1851 reg_w(sd, 0x3a, vsegs);
1852
1853 /* Windows driver does this here; who knows why */
1854 reg_w(sd, 0x2f, 0x80);
1855
1856 /******** Set the framerate (to 30 FPS) ********/
1857 if (sd->bridge == BRIDGE_OV518PLUS)
1858 sd->clockdiv = 1;
1859 else
1860 sd->clockdiv = 0;
1861
1862 /* Mode independent, but framerate dependent, regs */
1863 reg_w(sd, 0x51, 0x04); /* Clock divider; lower==faster */
1864 reg_w(sd, 0x22, 0x18);
1865 reg_w(sd, 0x23, 0xff);
1866
1867 if (sd->bridge == BRIDGE_OV518PLUS)
1868 reg_w(sd, 0x21, 0x19);
1869 else
1870 reg_w(sd, 0x71, 0x17); /* Compression-related? */
1871
1872 /* FIXME: Sensor-specific */
1873 /* Bit 5 is what matters here. Of course, it is "reserved" */
1874 i2c_w(sd, 0x54, 0x23);
1875
1876 reg_w(sd, 0x2f, 0x80);
1877
1878 if (sd->bridge == BRIDGE_OV518PLUS) {
1879 reg_w(sd, 0x24, 0x94);
1880 reg_w(sd, 0x25, 0x90);
1881 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
1882 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
1883 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
1884 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
1885 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
1886 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
1887 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
1888 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
1889 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
1890 } else {
1891 reg_w(sd, 0x24, 0x9f);
1892 reg_w(sd, 0x25, 0x90);
1893 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
1894 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
1895 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
1896 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
1897 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
1898 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
1899 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
1900 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
1901 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
1902 }
1903
1904 reg_w(sd, 0x2f, 0x80);
1905
1906 return 0;
1907 }
1908
1909
1910 /* Sets up the OV519 with the given image parameters
1911 *
1912 * OV519 needs a completely different approach, until we can figure out what
1913 * the individual registers do.
1914 *
1915 * Do not put any sensor-specific code in here (including I2C I/O functions)
1916 */
1917 static int ov519_mode_init_regs(struct sd *sd)
1918 {
1919 static const struct ov_regvals mode_init_519_ov7670[] = {
1920 { 0x5d, 0x03 }, /* Turn off suspend mode */
1921 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
1922 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1923 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1924 { 0xa3, 0x18 },
1925 { 0xa4, 0x04 },
1926 { 0xa5, 0x28 },
1927 { 0x37, 0x00 }, /* SetUsbInit */
1928 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1929 /* Enable both fields, YUV Input, disable defect comp (why?) */
1930 { 0x20, 0x0c },
1931 { 0x21, 0x38 },
1932 { 0x22, 0x1d },
1933 { 0x17, 0x50 }, /* undocumented */
1934 { 0x37, 0x00 }, /* undocumented */
1935 { 0x40, 0xff }, /* I2C timeout counter */
1936 { 0x46, 0x00 }, /* I2C clock prescaler */
1937 { 0x59, 0x04 }, /* new from windrv 090403 */
1938 { 0xff, 0x00 }, /* undocumented */
1939 /* windows reads 0x55 at this point, why? */
1940 };
1941
1942 static const struct ov_regvals mode_init_519[] = {
1943 { 0x5d, 0x03 }, /* Turn off suspend mode */
1944 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
1945 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1946 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1947 { 0xa3, 0x18 },
1948 { 0xa4, 0x04 },
1949 { 0xa5, 0x28 },
1950 { 0x37, 0x00 }, /* SetUsbInit */
1951 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1952 /* Enable both fields, YUV Input, disable defect comp (why?) */
1953 { 0x22, 0x1d },
1954 { 0x17, 0x50 }, /* undocumented */
1955 { 0x37, 0x00 }, /* undocumented */
1956 { 0x40, 0xff }, /* I2C timeout counter */
1957 { 0x46, 0x00 }, /* I2C clock prescaler */
1958 { 0x59, 0x04 }, /* new from windrv 090403 */
1959 { 0xff, 0x00 }, /* undocumented */
1960 /* windows reads 0x55 at this point, why? */
1961 };
1962
1963 /******** Set the mode ********/
1964 if (sd->sensor != SEN_OV7670) {
1965 if (write_regvals(sd, mode_init_519,
1966 ARRAY_SIZE(mode_init_519)))
1967 return -EIO;
1968 if (sd->sensor == SEN_OV7640) {
1969 /* Select 8-bit input mode */
1970 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
1971 }
1972 } else {
1973 if (write_regvals(sd, mode_init_519_ov7670,
1974 ARRAY_SIZE(mode_init_519_ov7670)))
1975 return -EIO;
1976 }
1977
1978 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
1979 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
1980 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
1981 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
1982 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
1983 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
1984 reg_w(sd, OV519_R16_DIVIDER, 0x00);
1985 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
1986 reg_w(sd, 0x26, 0x00); /* Undocumented */
1987
1988 /******** Set the framerate ********/
1989 if (frame_rate > 0)
1990 sd->frame_rate = frame_rate;
1991
1992 /* FIXME: These are only valid at the max resolution. */
1993 sd->clockdiv = 0;
1994 switch (sd->sensor) {
1995 case SEN_OV7640:
1996 switch (sd->frame_rate) {
1997 default:
1998 /* case 30: */
1999 reg_w(sd, 0xa4, 0x0c);
2000 reg_w(sd, 0x23, 0xff);
2001 break;
2002 case 25:
2003 reg_w(sd, 0xa4, 0x0c);
2004 reg_w(sd, 0x23, 0x1f);
2005 break;
2006 case 20:
2007 reg_w(sd, 0xa4, 0x0c);
2008 reg_w(sd, 0x23, 0x1b);
2009 break;
2010 case 15:
2011 reg_w(sd, 0xa4, 0x04);
2012 reg_w(sd, 0x23, 0xff);
2013 sd->clockdiv = 1;
2014 break;
2015 case 10:
2016 reg_w(sd, 0xa4, 0x04);
2017 reg_w(sd, 0x23, 0x1f);
2018 sd->clockdiv = 1;
2019 break;
2020 case 5:
2021 reg_w(sd, 0xa4, 0x04);
2022 reg_w(sd, 0x23, 0x1b);
2023 sd->clockdiv = 1;
2024 break;
2025 }
2026 break;
2027 case SEN_OV8610:
2028 switch (sd->frame_rate) {
2029 default: /* 15 fps */
2030 /* case 15: */
2031 reg_w(sd, 0xa4, 0x06);
2032 reg_w(sd, 0x23, 0xff);
2033 break;
2034 case 10:
2035 reg_w(sd, 0xa4, 0x06);
2036 reg_w(sd, 0x23, 0x1f);
2037 break;
2038 case 5:
2039 reg_w(sd, 0xa4, 0x06);
2040 reg_w(sd, 0x23, 0x1b);
2041 break;
2042 }
2043 break;
2044 case SEN_OV7670: /* guesses, based on 7640 */
2045 PDEBUG(D_STREAM, "Setting framerate to %d fps",
2046 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
2047 reg_w(sd, 0xa4, 0x10);
2048 switch (sd->frame_rate) {
2049 case 30:
2050 reg_w(sd, 0x23, 0xff);
2051 break;
2052 case 20:
2053 reg_w(sd, 0x23, 0x1b);
2054 break;
2055 default:
2056 /* case 15: */
2057 reg_w(sd, 0x23, 0xff);
2058 sd->clockdiv = 1;
2059 break;
2060 }
2061 break;
2062 }
2063 return 0;
2064 }
2065
2066 static int mode_init_ov_sensor_regs(struct sd *sd)
2067 {
2068 struct gspca_dev *gspca_dev;
2069 int qvga;
2070
2071 gspca_dev = &sd->gspca_dev;
2072 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
2073
2074 /******** Mode (VGA/QVGA) and sensor specific regs ********/
2075 switch (sd->sensor) {
2076 case SEN_OV8610:
2077 /* For OV8610 qvga means qsvga */
2078 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
2079 break;
2080 case SEN_OV7610:
2081 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2082 break;
2083 case SEN_OV7620:
2084 /* i2c_w(sd, 0x2b, 0x00); */
2085 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2086 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
2087 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
2088 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
2089 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
2090 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
2091 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
2092 break;
2093 case SEN_OV76BE:
2094 /* i2c_w(sd, 0x2b, 0x00); */
2095 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2096 break;
2097 case SEN_OV7640:
2098 /* i2c_w(sd, 0x2b, 0x00); */
2099 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2100 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
2101 /* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */
2102 /* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */
2103 /* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */
2104 /* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */
2105 /* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */
2106 break;
2107 case SEN_OV7670:
2108 /* set COM7_FMT_VGA or COM7_FMT_QVGA
2109 * do we need to set anything else?
2110 * HSTART etc are set in set_ov_sensor_window itself */
2111 i2c_w_mask(sd, OV7670_REG_COM7,
2112 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
2113 OV7670_COM7_FMT_MASK);
2114 break;
2115 case SEN_OV6620:
2116 case SEN_OV6630:
2117 case SEN_OV66308AF:
2118 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2119 break;
2120 default:
2121 return -EINVAL;
2122 }
2123
2124 /******** Palette-specific regs ********/
2125 if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
2126 /* not valid on the OV6620/OV7620/6630? */
2127 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
2128 }
2129
2130 /* The OV518 needs special treatment. Although both the OV518
2131 * and the OV6630 support a 16-bit video bus, only the 8 bit Y
2132 * bus is actually used. The UV bus is tied to ground.
2133 * Therefore, the OV6630 needs to be in 8-bit multiplexed
2134 * output mode */
2135
2136 /* OV7640 is 8-bit only */
2137
2138 if (sd->sensor != SEN_OV6630 && sd->sensor != SEN_OV66308AF &&
2139 sd->sensor != SEN_OV7640)
2140 i2c_w_mask(sd, 0x13, 0x00, 0x20);
2141
2142 /******** Clock programming ********/
2143 /* The OV6620 needs special handling. This prevents the
2144 * severe banding that normally occurs */
2145 if (sd->sensor == SEN_OV6620) {
2146
2147 /* Clock down */
2148 i2c_w(sd, 0x2a, 0x04);
2149 i2c_w(sd, 0x11, sd->clockdiv);
2150 i2c_w(sd, 0x2a, 0x84);
2151 /* This next setting is critical. It seems to improve
2152 * the gain or the contrast. The "reserved" bits seem
2153 * to have some effect in this case. */
2154 i2c_w(sd, 0x2d, 0x85);
2155 } else {
2156 i2c_w(sd, 0x11, sd->clockdiv);
2157 }
2158
2159 /******** Special Features ********/
2160 /* no evidence this is possible with OV7670, either */
2161 /* Test Pattern */
2162 if (sd->sensor != SEN_OV7640 && sd->sensor != SEN_OV7670)
2163 i2c_w_mask(sd, 0x12, 0x00, 0x02);
2164
2165 /* Enable auto white balance */
2166 if (sd->sensor == SEN_OV7670)
2167 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
2168 OV7670_COM8_AWB);
2169 else
2170 i2c_w_mask(sd, 0x12, 0x04, 0x04);
2171
2172 /* This will go away as soon as ov51x_mode_init_sensor_regs() */
2173 /* is fully tested. */
2174 /* 7620/6620/6630? don't have register 0x35, so play it safe */
2175 if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
2176 if (!qvga)
2177 i2c_w(sd, 0x35, 0x9e);
2178 else
2179 i2c_w(sd, 0x35, 0x1e);
2180 }
2181 return 0;
2182 }
2183
2184 static void sethvflip(struct sd *sd)
2185 {
2186 if (sd->sensor != SEN_OV7670)
2187 return;
2188 if (sd->gspca_dev.streaming)
2189 ov51x_stop(sd);
2190 i2c_w_mask(sd, OV7670_REG_MVFP,
2191 OV7670_MVFP_MIRROR * sd->hflip
2192 | OV7670_MVFP_VFLIP * sd->vflip,
2193 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
2194 if (sd->gspca_dev.streaming)
2195 ov51x_restart(sd);
2196 }
2197
2198 static int set_ov_sensor_window(struct sd *sd)
2199 {
2200 struct gspca_dev *gspca_dev;
2201 int qvga, crop;
2202 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
2203 int ret, hstart, hstop, vstop, vstart;
2204 __u8 v;
2205
2206 gspca_dev = &sd->gspca_dev;
2207 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
2208 crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2;
2209
2210 /* The different sensor ICs handle setting up of window differently.
2211 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
2212 switch (sd->sensor) {
2213 case SEN_OV8610:
2214 hwsbase = 0x1e;
2215 hwebase = 0x1e;
2216 vwsbase = 0x02;
2217 vwebase = 0x02;
2218 break;
2219 case SEN_OV7610:
2220 case SEN_OV76BE:
2221 hwsbase = 0x38;
2222 hwebase = 0x3a;
2223 vwsbase = vwebase = 0x05;
2224 break;
2225 case SEN_OV6620:
2226 case SEN_OV6630:
2227 case SEN_OV66308AF:
2228 hwsbase = 0x38;
2229 hwebase = 0x3a;
2230 vwsbase = 0x05;
2231 vwebase = 0x06;
2232 if (sd->sensor == SEN_OV66308AF && qvga)
2233 /* HDG: this fixes U and V getting swapped */
2234 hwsbase++;
2235 if (crop) {
2236 hwsbase += 8;
2237 hwebase += 8;
2238 vwsbase += 11;
2239 vwebase += 11;
2240 }
2241 break;
2242 case SEN_OV7620:
2243 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
2244 hwebase = 0x2f;
2245 vwsbase = vwebase = 0x05;
2246 break;
2247 case SEN_OV7640:
2248 hwsbase = 0x1a;
2249 hwebase = 0x1a;
2250 vwsbase = vwebase = 0x03;
2251 break;
2252 case SEN_OV7670:
2253 /*handling of OV7670 hardware sensor start and stop values
2254 * is very odd, compared to the other OV sensors */
2255 vwsbase = vwebase = hwebase = hwsbase = 0x00;
2256 break;
2257 default:
2258 return -EINVAL;
2259 }
2260
2261 switch (sd->sensor) {
2262 case SEN_OV6620:
2263 case SEN_OV6630:
2264 case SEN_OV66308AF:
2265 if (qvga) { /* QCIF */
2266 hwscale = 0;
2267 vwscale = 0;
2268 } else { /* CIF */
2269 hwscale = 1;
2270 vwscale = 1; /* The datasheet says 0;
2271 * it's wrong */
2272 }
2273 break;
2274 case SEN_OV8610:
2275 if (qvga) { /* QSVGA */
2276 hwscale = 1;
2277 vwscale = 1;
2278 } else { /* SVGA */
2279 hwscale = 2;
2280 vwscale = 2;
2281 }
2282 break;
2283 default: /* SEN_OV7xx0 */
2284 if (qvga) { /* QVGA */
2285 hwscale = 1;
2286 vwscale = 0;
2287 } else { /* VGA */
2288 hwscale = 2;
2289 vwscale = 1;
2290 }
2291 }
2292
2293 ret = mode_init_ov_sensor_regs(sd);
2294 if (ret < 0)
2295 return ret;
2296
2297 if (sd->sensor == SEN_OV8610) {
2298 i2c_w_mask(sd, 0x2d, 0x05, 0x40);
2299 /* old 0x95, new 0x05 from windrv 090403 */
2300 /* bits 5-7: reserved */
2301 i2c_w_mask(sd, 0x28, 0x20, 0x20);
2302 /* bit 5: progressive mode on */
2303 }
2304
2305 /* The below is wrong for OV7670s because their window registers
2306 * only store the high bits in 0x17 to 0x1a */
2307
2308 /* SRH Use sd->max values instead of requested win values */
2309 /* SCS Since we're sticking with only the max hardware widths
2310 * for a given mode */
2311 /* I can hard code this for OV7670s */
2312 /* Yes, these numbers do look odd, but they're tested and work! */
2313 if (sd->sensor == SEN_OV7670) {
2314 if (qvga) { /* QVGA from ov7670.c by
2315 * Jonathan Corbet */
2316 hstart = 164;
2317 hstop = 20;
2318 vstart = 14;
2319 vstop = 494;
2320 } else { /* VGA */
2321 hstart = 158;
2322 hstop = 14;
2323 vstart = 10;
2324 vstop = 490;
2325 }
2326 /* OV7670 hardware window registers are split across
2327 * multiple locations */
2328 i2c_w(sd, OV7670_REG_HSTART, hstart >> 3);
2329 i2c_w(sd, OV7670_REG_HSTOP, hstop >> 3);
2330 v = i2c_r(sd, OV7670_REG_HREF);
2331 v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x07);
2332 msleep(10); /* need to sleep between read and write to
2333 * same reg! */
2334 i2c_w(sd, OV7670_REG_HREF, v);
2335
2336 i2c_w(sd, OV7670_REG_VSTART, vstart >> 2);
2337 i2c_w(sd, OV7670_REG_VSTOP, vstop >> 2);
2338 v = i2c_r(sd, OV7670_REG_VREF);
2339 v = (v & 0xc0) | ((vstop & 0x3) << 2) | (vstart & 0x03);
2340 msleep(10); /* need to sleep between read and write to
2341 * same reg! */
2342 i2c_w(sd, OV7670_REG_VREF, v);
2343 } else {
2344 i2c_w(sd, 0x17, hwsbase);
2345 i2c_w(sd, 0x18, hwebase + (sd->gspca_dev.width >> hwscale));
2346 i2c_w(sd, 0x19, vwsbase);
2347 i2c_w(sd, 0x1a, vwebase + (sd->gspca_dev.height >> vwscale));
2348 }
2349 return 0;
2350 }
2351
2352 /* -- start the camera -- */
2353 static int sd_start(struct gspca_dev *gspca_dev)
2354 {
2355 struct sd *sd = (struct sd *) gspca_dev;
2356 int ret = 0;
2357
2358 switch (sd->bridge) {
2359 case BRIDGE_OV518:
2360 case BRIDGE_OV518PLUS:
2361 ret = ov518_mode_init_regs(sd);
2362 break;
2363 case BRIDGE_OV519:
2364 ret = ov519_mode_init_regs(sd);
2365 break;
2366 }
2367 if (ret < 0)
2368 goto out;
2369
2370 ret = set_ov_sensor_window(sd);
2371 if (ret < 0)
2372 goto out;
2373
2374 setcontrast(gspca_dev);
2375 setbrightness(gspca_dev);
2376 setcolors(gspca_dev);
2377 sethvflip(sd);
2378 setautobrightness(sd);
2379 setfreq(sd);
2380
2381 ret = ov51x_restart(sd);
2382 if (ret < 0)
2383 goto out;
2384 ov51x_led_control(sd, 1);
2385 return 0;
2386 out:
2387 PDEBUG(D_ERR, "camera start error:%d", ret);
2388 return ret;
2389 }
2390
2391 static void sd_stopN(struct gspca_dev *gspca_dev)
2392 {
2393 struct sd *sd = (struct sd *) gspca_dev;
2394
2395 ov51x_stop(sd);
2396 ov51x_led_control(sd, 0);
2397 }
2398
2399 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
2400 struct gspca_frame *frame, /* target */
2401 __u8 *data, /* isoc packet */
2402 int len) /* iso packet length */
2403 {
2404 struct sd *sd = (struct sd *) gspca_dev;
2405
2406 /* A false positive here is likely, until OVT gives me
2407 * the definitive SOF/EOF format */
2408 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
2409 gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0);
2410 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0);
2411 sd->packet_nr = 0;
2412 }
2413
2414 if (gspca_dev->last_packet_type == DISCARD_PACKET)
2415 return;
2416
2417 /* Does this device use packet numbers ? */
2418 if (len & 7) {
2419 len--;
2420 if (sd->packet_nr == data[len])
2421 sd->packet_nr++;
2422 /* The last few packets of the frame (which are all 0's
2423 except that they may contain part of the footer), are
2424 numbered 0 */
2425 else if (sd->packet_nr == 0 || data[len]) {
2426 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
2427 (int)data[len], (int)sd->packet_nr);
2428 gspca_dev->last_packet_type = DISCARD_PACKET;
2429 return;
2430 }
2431 }
2432
2433 /* intermediate packet */
2434 gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len);
2435 }
2436
2437 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
2438 struct gspca_frame *frame, /* target */
2439 __u8 *data, /* isoc packet */
2440 int len) /* iso packet length */
2441 {
2442 /* Header of ov519 is 16 bytes:
2443 * Byte Value Description
2444 * 0 0xff magic
2445 * 1 0xff magic
2446 * 2 0xff magic
2447 * 3 0xXX 0x50 = SOF, 0x51 = EOF
2448 * 9 0xXX 0x01 initial frame without data,
2449 * 0x00 standard frame with image
2450 * 14 Lo in EOF: length of image data / 8
2451 * 15 Hi
2452 */
2453
2454 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
2455 switch (data[3]) {
2456 case 0x50: /* start of frame */
2457 #define HDRSZ 16
2458 data += HDRSZ;
2459 len -= HDRSZ;
2460 #undef HDRSZ
2461 if (data[0] == 0xff || data[1] == 0xd8)
2462 gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
2463 data, len);
2464 else
2465 gspca_dev->last_packet_type = DISCARD_PACKET;
2466 return;
2467 case 0x51: /* end of frame */
2468 if (data[9] != 0)
2469 gspca_dev->last_packet_type = DISCARD_PACKET;
2470 gspca_frame_add(gspca_dev, LAST_PACKET, frame,
2471 data, 0);
2472 return;
2473 }
2474 }
2475
2476 /* intermediate packet */
2477 gspca_frame_add(gspca_dev, INTER_PACKET, frame,
2478 data, len);
2479 }
2480
2481 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
2482 struct gspca_frame *frame, /* target */
2483 __u8 *data, /* isoc packet */
2484 int len) /* iso packet length */
2485 {
2486 struct sd *sd = (struct sd *) gspca_dev;
2487
2488 switch (sd->bridge) {
2489 case BRIDGE_OV511:
2490 case BRIDGE_OV511PLUS:
2491 break;
2492 case BRIDGE_OV518:
2493 case BRIDGE_OV518PLUS:
2494 ov518_pkt_scan(gspca_dev, frame, data, len);
2495 break;
2496 case BRIDGE_OV519:
2497 ov519_pkt_scan(gspca_dev, frame, data, len);
2498 break;
2499 }
2500 }
2501
2502 /* -- management routines -- */
2503
2504 static void setbrightness(struct gspca_dev *gspca_dev)
2505 {
2506 struct sd *sd = (struct sd *) gspca_dev;
2507 int val;
2508
2509 val = sd->brightness;
2510 switch (sd->sensor) {
2511 case SEN_OV8610:
2512 case SEN_OV7610:
2513 case SEN_OV76BE:
2514 case SEN_OV6620:
2515 case SEN_OV6630:
2516 case SEN_OV66308AF:
2517 case SEN_OV7640:
2518 i2c_w(sd, OV7610_REG_BRT, val);
2519 break;
2520 case SEN_OV7620:
2521 /* 7620 doesn't like manual changes when in auto mode */
2522 if (!sd->autobrightness)
2523 i2c_w(sd, OV7610_REG_BRT, val);
2524 break;
2525 case SEN_OV7670:
2526 /*win trace
2527 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
2528 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
2529 break;
2530 }
2531 }
2532
2533 static void setcontrast(struct gspca_dev *gspca_dev)
2534 {
2535 struct sd *sd = (struct sd *) gspca_dev;
2536 int val;
2537
2538 val = sd->contrast;
2539 switch (sd->sensor) {
2540 case SEN_OV7610:
2541 case SEN_OV6620:
2542 i2c_w(sd, OV7610_REG_CNT, val);
2543 break;
2544 case SEN_OV6630:
2545 case SEN_OV66308AF:
2546 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
2547 break;
2548 case SEN_OV8610: {
2549 static const __u8 ctab[] = {
2550 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
2551 };
2552
2553 /* Use Y gamma control instead. Bit 0 enables it. */
2554 i2c_w(sd, 0x64, ctab[val >> 5]);
2555 break;
2556 }
2557 case SEN_OV7620: {
2558 static const __u8 ctab[] = {
2559 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
2560 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
2561 };
2562
2563 /* Use Y gamma control instead. Bit 0 enables it. */
2564 i2c_w(sd, 0x64, ctab[val >> 4]);
2565 break;
2566 }
2567 case SEN_OV7640:
2568 /* Use gain control instead. */
2569 i2c_w(sd, OV7610_REG_GAIN, val >> 2);
2570 break;
2571 case SEN_OV7670:
2572 /* check that this isn't just the same as ov7610 */
2573 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
2574 break;
2575 }
2576 }
2577
2578 static void setcolors(struct gspca_dev *gspca_dev)
2579 {
2580 struct sd *sd = (struct sd *) gspca_dev;
2581 int val;
2582
2583 val = sd->colors;
2584 switch (sd->sensor) {
2585 case SEN_OV8610:
2586 case SEN_OV7610:
2587 case SEN_OV76BE:
2588 case SEN_OV6620:
2589 case SEN_OV6630:
2590 case SEN_OV66308AF:
2591 i2c_w(sd, OV7610_REG_SAT, val);
2592 break;
2593 case SEN_OV7620:
2594 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
2595 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
2596 if (rc < 0)
2597 goto out; */
2598 i2c_w(sd, OV7610_REG_SAT, val);
2599 break;
2600 case SEN_OV7640:
2601 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
2602 break;
2603 case SEN_OV7670:
2604 /* supported later once I work out how to do it
2605 * transparently fail now! */
2606 /* set REG_COM13 values for UV sat auto mode */
2607 break;
2608 }
2609 }
2610
2611 static void setautobrightness(struct sd *sd)
2612 {
2613 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
2614 return;
2615
2616 i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10);
2617 }
2618
2619 static void setfreq(struct sd *sd)
2620 {
2621 if (sd->sensor == SEN_OV7670) {
2622 switch (sd->freq) {
2623 case 0: /* Banding filter disabled */
2624 i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
2625 break;
2626 case 1: /* 50 hz */
2627 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
2628 OV7670_COM8_BFILT);
2629 i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
2630 break;
2631 case 2: /* 60 hz */
2632 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
2633 OV7670_COM8_BFILT);
2634 i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
2635 break;
2636 case 3: /* Auto hz */
2637 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
2638 OV7670_COM8_BFILT);
2639 i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
2640 0x18);
2641 break;
2642 }
2643 } else {
2644 switch (sd->freq) {
2645 case 0: /* Banding filter disabled */
2646 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
2647 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
2648 break;
2649 case 1: /* 50 hz (filter on and framerate adj) */
2650 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
2651 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
2652 /* 20 fps -> 16.667 fps */
2653 if (sd->sensor == SEN_OV6620 ||
2654 sd->sensor == SEN_OV6630 ||
2655 sd->sensor == SEN_OV66308AF)
2656 i2c_w(sd, 0x2b, 0x5e);
2657 else
2658 i2c_w(sd, 0x2b, 0xac);
2659 break;
2660 case 2: /* 60 hz (filter on, ...) */
2661 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
2662 if (sd->sensor == SEN_OV6620 ||
2663 sd->sensor == SEN_OV6630 ||
2664 sd->sensor == SEN_OV66308AF) {
2665 /* 20 fps -> 15 fps */
2666 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
2667 i2c_w(sd, 0x2b, 0xa8);
2668 } else {
2669 /* no framerate adj. */
2670 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
2671 }
2672 break;
2673 }
2674 }
2675 }
2676
2677 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
2678 {
2679 struct sd *sd = (struct sd *) gspca_dev;
2680
2681 sd->brightness = val;
2682 if (gspca_dev->streaming)
2683 setbrightness(gspca_dev);
2684 return 0;
2685 }
2686
2687 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
2688 {
2689 struct sd *sd = (struct sd *) gspca_dev;
2690
2691 *val = sd->brightness;
2692 return 0;
2693 }
2694
2695 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
2696 {
2697 struct sd *sd = (struct sd *) gspca_dev;
2698
2699 sd->contrast = val;
2700 if (gspca_dev->streaming)
2701 setcontrast(gspca_dev);
2702 return 0;
2703 }
2704
2705 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
2706 {
2707 struct sd *sd = (struct sd *) gspca_dev;
2708
2709 *val = sd->contrast;
2710 return 0;
2711 }
2712
2713 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
2714 {
2715 struct sd *sd = (struct sd *) gspca_dev;
2716
2717 sd->colors = val;
2718 if (gspca_dev->streaming)
2719 setcolors(gspca_dev);
2720 return 0;
2721 }
2722
2723 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
2724 {
2725 struct sd *sd = (struct sd *) gspca_dev;
2726
2727 *val = sd->colors;
2728 return 0;
2729 }
2730
2731 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
2732 {
2733 struct sd *sd = (struct sd *) gspca_dev;
2734
2735 sd->hflip = val;
2736 if (gspca_dev->streaming)
2737 sethvflip(sd);
2738 return 0;
2739 }
2740
2741 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
2742 {
2743 struct sd *sd = (struct sd *) gspca_dev;
2744
2745 *val = sd->hflip;
2746 return 0;
2747 }
2748
2749 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
2750 {
2751 struct sd *sd = (struct sd *) gspca_dev;
2752
2753 sd->vflip = val;
2754 if (gspca_dev->streaming)
2755 sethvflip(sd);
2756 return 0;
2757 }
2758
2759 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
2760 {
2761 struct sd *sd = (struct sd *) gspca_dev;
2762
2763 *val = sd->vflip;
2764 return 0;
2765 }
2766
2767 static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val)
2768 {
2769 struct sd *sd = (struct sd *) gspca_dev;
2770
2771 sd->autobrightness = val;
2772 if (gspca_dev->streaming)
2773 setautobrightness(sd);
2774 return 0;
2775 }
2776
2777 static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val)
2778 {
2779 struct sd *sd = (struct sd *) gspca_dev;
2780
2781 *val = sd->autobrightness;
2782 return 0;
2783 }
2784
2785 static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
2786 {
2787 struct sd *sd = (struct sd *) gspca_dev;
2788
2789 sd->freq = val;
2790 if (gspca_dev->streaming)
2791 setfreq(sd);
2792 return 0;
2793 }
2794
2795 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
2796 {
2797 struct sd *sd = (struct sd *) gspca_dev;
2798
2799 *val = sd->freq;
2800 return 0;
2801 }
2802
2803 static int sd_querymenu(struct gspca_dev *gspca_dev,
2804 struct v4l2_querymenu *menu)
2805 {
2806 struct sd *sd = (struct sd *) gspca_dev;
2807
2808 switch (menu->id) {
2809 case V4L2_CID_POWER_LINE_FREQUENCY:
2810 switch (menu->index) {
2811 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
2812 strcpy((char *) menu->name, "NoFliker");
2813 return 0;
2814 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
2815 strcpy((char *) menu->name, "50 Hz");
2816 return 0;
2817 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
2818 strcpy((char *) menu->name, "60 Hz");
2819 return 0;
2820 case 3:
2821 if (sd->sensor != SEN_OV7670)
2822 return -EINVAL;
2823
2824 strcpy((char *) menu->name, "Automatic");
2825 return 0;
2826 }
2827 break;
2828 }
2829 return -EINVAL;
2830 }
2831
2832 /* sub-driver description */
2833 static const struct sd_desc sd_desc = {
2834 .name = MODULE_NAME,
2835 .ctrls = sd_ctrls,
2836 .nctrls = ARRAY_SIZE(sd_ctrls),
2837 .config = sd_config,
2838 .init = sd_init,
2839 .start = sd_start,
2840 .stopN = sd_stopN,
2841 .pkt_scan = sd_pkt_scan,
2842 .querymenu = sd_querymenu,
2843 };
2844
2845 /* -- module initialisation -- */
2846 static const __devinitdata struct usb_device_id device_table[] = {
2847 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
2848 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
2849 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
2850 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
2851 {USB_DEVICE(0x041e, 0x4064),
2852 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
2853 {USB_DEVICE(0x041e, 0x4068),
2854 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
2855 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
2856 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
2857 {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
2858 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
2859 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
2860 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
2861 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
2862 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
2863 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
2864 {}
2865 };
2866
2867 MODULE_DEVICE_TABLE(usb, device_table);
2868
2869 /* -- device connect -- */
2870 static int sd_probe(struct usb_interface *intf,
2871 const struct usb_device_id *id)
2872 {
2873 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
2874 THIS_MODULE);
2875 }
2876
2877 static struct usb_driver sd_driver = {
2878 .name = MODULE_NAME,
2879 .id_table = device_table,
2880 .probe = sd_probe,
2881 .disconnect = gspca_disconnect,
2882 #ifdef CONFIG_PM
2883 .suspend = gspca_suspend,
2884 .resume = gspca_resume,
2885 #endif
2886 };
2887
2888 /* -- module insert / remove -- */
2889 static int __init sd_mod_init(void)
2890 {
2891 int ret;
2892 ret = usb_register(&sd_driver);
2893 if (ret < 0)
2894 return ret;
2895 PDEBUG(D_PROBE, "registered");
2896 return 0;
2897 }
2898 static void __exit sd_mod_exit(void)
2899 {
2900 usb_deregister(&sd_driver);
2901 PDEBUG(D_PROBE, "deregistered");
2902 }
2903
2904 module_init(sd_mod_init);
2905 module_exit(sd_mod_exit);
2906
2907 module_param(frame_rate, int, 0644);
2908 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");