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V4L/DVB (12075): gspca_ov519: check ov518 packet numbers
[GitHub/exynos8895/android_kernel_samsung_universal8895.git] / drivers / media / video / gspca / ov519.c
1 /**
2 * OV519 driver
3 *
4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 *
6 * This module is adapted from the ov51x-jpeg package, which itself
7 * was adapted from the ov511 driver.
8 *
9 * Original copyright for the ov511 driver is:
10 *
11 * Copyright (c) 1999-2004 Mark W. McClelland
12 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
13 *
14 * ov51x-jpeg original copyright is:
15 *
16 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
17 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 *
33 */
34 #define MODULE_NAME "ov519"
35
36 #include "gspca.h"
37
38 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
39 MODULE_DESCRIPTION("OV519 USB Camera Driver");
40 MODULE_LICENSE("GPL");
41
42 /* global parameters */
43 static int frame_rate;
44
45 /* Number of times to retry a failed I2C transaction. Increase this if you
46 * are getting "Failed to read sensor ID..." */
47 static int i2c_detect_tries = 10;
48
49 /* ov519 device descriptor */
50 struct sd {
51 struct gspca_dev gspca_dev; /* !! must be the first item */
52
53 __u8 packet_nr;
54
55 char bridge;
56 #define BRIDGE_OV511 0
57 #define BRIDGE_OV511PLUS 1
58 #define BRIDGE_OV518 2
59 #define BRIDGE_OV518PLUS 3
60 #define BRIDGE_OV519 4
61
62 /* Determined by sensor type */
63 __u8 sif;
64
65 __u8 brightness;
66 __u8 contrast;
67 __u8 colors;
68 __u8 hflip;
69 __u8 vflip;
70 __u8 autobrightness;
71 __u8 freq;
72
73 __u8 stopped; /* Streaming is temporarily paused */
74
75 __u8 frame_rate; /* current Framerate (OV519 only) */
76 __u8 clockdiv; /* clockdiv override for OV519 only */
77
78 char sensor; /* Type of image sensor chip (SEN_*) */
79 #define SEN_UNKNOWN 0
80 #define SEN_OV6620 1
81 #define SEN_OV6630 2
82 #define SEN_OV66308AF 3
83 #define SEN_OV7610 4
84 #define SEN_OV7620 5
85 #define SEN_OV7640 6
86 #define SEN_OV7670 7
87 #define SEN_OV76BE 8
88 #define SEN_OV8610 9
89 };
90
91 /* V4L2 controls supported by the driver */
92 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
93 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
94 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
95 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
96 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
97 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
98 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
99 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
100 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
101 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
102 static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val);
103 static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val);
104 static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
105 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
106 static void setbrightness(struct gspca_dev *gspca_dev);
107 static void setcontrast(struct gspca_dev *gspca_dev);
108 static void setcolors(struct gspca_dev *gspca_dev);
109 static void setautobrightness(struct sd *sd);
110 static void setfreq(struct sd *sd);
111
112 static const struct ctrl sd_ctrls[] = {
113 {
114 {
115 .id = V4L2_CID_BRIGHTNESS,
116 .type = V4L2_CTRL_TYPE_INTEGER,
117 .name = "Brightness",
118 .minimum = 0,
119 .maximum = 255,
120 .step = 1,
121 #define BRIGHTNESS_DEF 127
122 .default_value = BRIGHTNESS_DEF,
123 },
124 .set = sd_setbrightness,
125 .get = sd_getbrightness,
126 },
127 {
128 {
129 .id = V4L2_CID_CONTRAST,
130 .type = V4L2_CTRL_TYPE_INTEGER,
131 .name = "Contrast",
132 .minimum = 0,
133 .maximum = 255,
134 .step = 1,
135 #define CONTRAST_DEF 127
136 .default_value = CONTRAST_DEF,
137 },
138 .set = sd_setcontrast,
139 .get = sd_getcontrast,
140 },
141 {
142 {
143 .id = V4L2_CID_SATURATION,
144 .type = V4L2_CTRL_TYPE_INTEGER,
145 .name = "Color",
146 .minimum = 0,
147 .maximum = 255,
148 .step = 1,
149 #define COLOR_DEF 127
150 .default_value = COLOR_DEF,
151 },
152 .set = sd_setcolors,
153 .get = sd_getcolors,
154 },
155 /* The flip controls work with ov7670 only */
156 #define HFLIP_IDX 3
157 {
158 {
159 .id = V4L2_CID_HFLIP,
160 .type = V4L2_CTRL_TYPE_BOOLEAN,
161 .name = "Mirror",
162 .minimum = 0,
163 .maximum = 1,
164 .step = 1,
165 #define HFLIP_DEF 0
166 .default_value = HFLIP_DEF,
167 },
168 .set = sd_sethflip,
169 .get = sd_gethflip,
170 },
171 #define VFLIP_IDX 4
172 {
173 {
174 .id = V4L2_CID_VFLIP,
175 .type = V4L2_CTRL_TYPE_BOOLEAN,
176 .name = "Vflip",
177 .minimum = 0,
178 .maximum = 1,
179 .step = 1,
180 #define VFLIP_DEF 0
181 .default_value = VFLIP_DEF,
182 },
183 .set = sd_setvflip,
184 .get = sd_getvflip,
185 },
186 #define AUTOBRIGHT_IDX 5
187 {
188 {
189 .id = V4L2_CID_AUTOBRIGHTNESS,
190 .type = V4L2_CTRL_TYPE_BOOLEAN,
191 .name = "Auto Brightness",
192 .minimum = 0,
193 .maximum = 1,
194 .step = 1,
195 #define AUTOBRIGHT_DEF 1
196 .default_value = AUTOBRIGHT_DEF,
197 },
198 .set = sd_setautobrightness,
199 .get = sd_getautobrightness,
200 },
201 #define FREQ_IDX 6
202 {
203 {
204 .id = V4L2_CID_POWER_LINE_FREQUENCY,
205 .type = V4L2_CTRL_TYPE_MENU,
206 .name = "Light frequency filter",
207 .minimum = 0,
208 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
209 .step = 1,
210 #define FREQ_DEF 0
211 .default_value = FREQ_DEF,
212 },
213 .set = sd_setfreq,
214 .get = sd_getfreq,
215 },
216 #define OV7670_FREQ_IDX 7
217 {
218 {
219 .id = V4L2_CID_POWER_LINE_FREQUENCY,
220 .type = V4L2_CTRL_TYPE_MENU,
221 .name = "Light frequency filter",
222 .minimum = 0,
223 .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */
224 .step = 1,
225 #define OV7670_FREQ_DEF 3
226 .default_value = OV7670_FREQ_DEF,
227 },
228 .set = sd_setfreq,
229 .get = sd_getfreq,
230 },
231 };
232
233 static const struct v4l2_pix_format ov519_vga_mode[] = {
234 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
235 .bytesperline = 320,
236 .sizeimage = 320 * 240 * 3 / 8 + 590,
237 .colorspace = V4L2_COLORSPACE_JPEG,
238 .priv = 1},
239 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
240 .bytesperline = 640,
241 .sizeimage = 640 * 480 * 3 / 8 + 590,
242 .colorspace = V4L2_COLORSPACE_JPEG,
243 .priv = 0},
244 };
245 static const struct v4l2_pix_format ov519_sif_mode[] = {
246 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
247 .bytesperline = 160,
248 .sizeimage = 160 * 120 * 3 / 8 + 590,
249 .colorspace = V4L2_COLORSPACE_JPEG,
250 .priv = 3},
251 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
252 .bytesperline = 176,
253 .sizeimage = 176 * 144 * 3 / 8 + 590,
254 .colorspace = V4L2_COLORSPACE_JPEG,
255 .priv = 1},
256 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
257 .bytesperline = 320,
258 .sizeimage = 320 * 240 * 3 / 8 + 590,
259 .colorspace = V4L2_COLORSPACE_JPEG,
260 .priv = 2},
261 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
262 .bytesperline = 352,
263 .sizeimage = 352 * 288 * 3 / 8 + 590,
264 .colorspace = V4L2_COLORSPACE_JPEG,
265 .priv = 0},
266 };
267
268 static const struct v4l2_pix_format ov518_vga_mode[] = {
269 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
270 .bytesperline = 320,
271 .sizeimage = 320 * 240 * 3 / 8 + 590,
272 .colorspace = V4L2_COLORSPACE_JPEG,
273 .priv = 1},
274 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
275 .bytesperline = 640,
276 .sizeimage = 640 * 480 * 3 / 8 + 590,
277 .colorspace = V4L2_COLORSPACE_JPEG,
278 .priv = 0},
279 };
280 static const struct v4l2_pix_format ov518_sif_mode[] = {
281 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
282 .bytesperline = 160,
283 .sizeimage = 40000,
284 .colorspace = V4L2_COLORSPACE_JPEG,
285 .priv = 3},
286 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
287 .bytesperline = 176,
288 .sizeimage = 40000,
289 .colorspace = V4L2_COLORSPACE_JPEG,
290 .priv = 1},
291 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
292 .bytesperline = 320,
293 .sizeimage = 320 * 240 * 3 / 8 + 590,
294 .colorspace = V4L2_COLORSPACE_JPEG,
295 .priv = 2},
296 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
297 .bytesperline = 352,
298 .sizeimage = 352 * 288 * 3 / 8 + 590,
299 .colorspace = V4L2_COLORSPACE_JPEG,
300 .priv = 0},
301 };
302
303
304 /* Registers common to OV511 / OV518 */
305 #define R51x_SYS_RESET 0x50
306 #define R51x_SYS_INIT 0x53
307 #define R51x_SYS_SNAP 0x52
308 #define R51x_SYS_CUST_ID 0x5F
309 #define R51x_COMP_LUT_BEGIN 0x80
310
311 /* OV511 Camera interface register numbers */
312 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
313 #define OV511_RESET_NOREGS 0x3F /* All but OV511 & regs */
314
315 /* OV518 Camera interface register numbers */
316 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
317 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
318
319 /* OV519 Camera interface register numbers */
320 #define OV519_R10_H_SIZE 0x10
321 #define OV519_R11_V_SIZE 0x11
322 #define OV519_R12_X_OFFSETL 0x12
323 #define OV519_R13_X_OFFSETH 0x13
324 #define OV519_R14_Y_OFFSETL 0x14
325 #define OV519_R15_Y_OFFSETH 0x15
326 #define OV519_R16_DIVIDER 0x16
327 #define OV519_R20_DFR 0x20
328 #define OV519_R25_FORMAT 0x25
329
330 /* OV519 System Controller register numbers */
331 #define OV519_SYS_RESET1 0x51
332 #define OV519_SYS_EN_CLK1 0x54
333
334 #define OV519_GPIO_DATA_OUT0 0x71
335 #define OV519_GPIO_IO_CTRL0 0x72
336
337 #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
338
339 /* I2C registers */
340 #define R51x_I2C_W_SID 0x41
341 #define R51x_I2C_SADDR_3 0x42
342 #define R51x_I2C_SADDR_2 0x43
343 #define R51x_I2C_R_SID 0x44
344 #define R51x_I2C_DATA 0x45
345 #define R518_I2C_CTL 0x47 /* OV518(+) only */
346
347 /* I2C ADDRESSES */
348 #define OV7xx0_SID 0x42
349 #define OV8xx0_SID 0xa0
350 #define OV6xx0_SID 0xc0
351
352 /* OV7610 registers */
353 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
354 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
355 #define OV7610_REG_RED 0x02 /* red channel balance */
356 #define OV7610_REG_SAT 0x03 /* saturation */
357 #define OV8610_REG_HUE 0x04 /* 04 reserved */
358 #define OV7610_REG_CNT 0x05 /* Y contrast */
359 #define OV7610_REG_BRT 0x06 /* Y brightness */
360 #define OV7610_REG_COM_C 0x14 /* misc common regs */
361 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
362 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
363 #define OV7610_REG_COM_I 0x29 /* misc settings */
364
365 /* OV7670 registers */
366 #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
367 #define OV7670_REG_BLUE 0x01 /* blue gain */
368 #define OV7670_REG_RED 0x02 /* red gain */
369 #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
370 #define OV7670_REG_COM1 0x04 /* Control 1 */
371 #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
372 #define OV7670_REG_COM3 0x0c /* Control 3 */
373 #define OV7670_REG_COM4 0x0d /* Control 4 */
374 #define OV7670_REG_COM5 0x0e /* All "reserved" */
375 #define OV7670_REG_COM6 0x0f /* Control 6 */
376 #define OV7670_REG_AECH 0x10 /* More bits of AEC value */
377 #define OV7670_REG_CLKRC 0x11 /* Clock control */
378 #define OV7670_REG_COM7 0x12 /* Control 7 */
379 #define OV7670_COM7_FMT_VGA 0x00
380 #define OV7670_COM7_YUV 0x00 /* YUV */
381 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
382 #define OV7670_COM7_FMT_MASK 0x38
383 #define OV7670_COM7_RESET 0x80 /* Register reset */
384 #define OV7670_REG_COM8 0x13 /* Control 8 */
385 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
386 #define OV7670_COM8_AWB 0x02 /* White balance enable */
387 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
388 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
389 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
390 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
391 #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
392 #define OV7670_REG_COM10 0x15 /* Control 10 */
393 #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
394 #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
395 #define OV7670_REG_VSTART 0x19 /* Vert start high bits */
396 #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
397 #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
398 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
399 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
400 #define OV7670_REG_AEW 0x24 /* AGC upper limit */
401 #define OV7670_REG_AEB 0x25 /* AGC lower limit */
402 #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
403 #define OV7670_REG_HREF 0x32 /* HREF pieces */
404 #define OV7670_REG_TSLB 0x3a /* lots of stuff */
405 #define OV7670_REG_COM11 0x3b /* Control 11 */
406 #define OV7670_COM11_EXP 0x02
407 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
408 #define OV7670_REG_COM12 0x3c /* Control 12 */
409 #define OV7670_REG_COM13 0x3d /* Control 13 */
410 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
411 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
412 #define OV7670_REG_COM14 0x3e /* Control 14 */
413 #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
414 #define OV7670_REG_COM15 0x40 /* Control 15 */
415 #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
416 #define OV7670_REG_COM16 0x41 /* Control 16 */
417 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
418 #define OV7670_REG_BRIGHT 0x55 /* Brightness */
419 #define OV7670_REG_CONTRAS 0x56 /* Contrast control */
420 #define OV7670_REG_GFIX 0x69 /* Fix gain control */
421 #define OV7670_REG_RGB444 0x8c /* RGB 444 control */
422 #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
423 #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
424 #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
425 #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
426 #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
427 #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
428 #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
429 #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
430 #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
431
432 struct ov_regvals {
433 __u8 reg;
434 __u8 val;
435 };
436 struct ov_i2c_regvals {
437 __u8 reg;
438 __u8 val;
439 };
440
441 static const struct ov_i2c_regvals norm_6x20[] = {
442 { 0x12, 0x80 }, /* reset */
443 { 0x11, 0x01 },
444 { 0x03, 0x60 },
445 { 0x05, 0x7f }, /* For when autoadjust is off */
446 { 0x07, 0xa8 },
447 /* The ratio of 0x0c and 0x0d controls the white point */
448 { 0x0c, 0x24 },
449 { 0x0d, 0x24 },
450 { 0x0f, 0x15 }, /* COMS */
451 { 0x10, 0x75 }, /* AEC Exposure time */
452 { 0x12, 0x24 }, /* Enable AGC */
453 { 0x14, 0x04 },
454 /* 0x16: 0x06 helps frame stability with moving objects */
455 { 0x16, 0x06 },
456 /* { 0x20, 0x30 }, * Aperture correction enable */
457 { 0x26, 0xb2 }, /* BLC enable */
458 /* 0x28: 0x05 Selects RGB format if RGB on */
459 { 0x28, 0x05 },
460 { 0x2a, 0x04 }, /* Disable framerate adjust */
461 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
462 { 0x2d, 0x99 },
463 { 0x33, 0xa0 }, /* Color Processing Parameter */
464 { 0x34, 0xd2 }, /* Max A/D range */
465 { 0x38, 0x8b },
466 { 0x39, 0x40 },
467
468 { 0x3c, 0x39 }, /* Enable AEC mode changing */
469 { 0x3c, 0x3c }, /* Change AEC mode */
470 { 0x3c, 0x24 }, /* Disable AEC mode changing */
471
472 { 0x3d, 0x80 },
473 /* These next two registers (0x4a, 0x4b) are undocumented.
474 * They control the color balance */
475 { 0x4a, 0x80 },
476 { 0x4b, 0x80 },
477 { 0x4d, 0xd2 }, /* This reduces noise a bit */
478 { 0x4e, 0xc1 },
479 { 0x4f, 0x04 },
480 /* Do 50-53 have any effect? */
481 /* Toggle 0x12[2] off and on here? */
482 };
483
484 static const struct ov_i2c_regvals norm_6x30[] = {
485 { 0x12, 0x80 }, /* Reset */
486 { 0x00, 0x1f }, /* Gain */
487 { 0x01, 0x99 }, /* Blue gain */
488 { 0x02, 0x7c }, /* Red gain */
489 { 0x03, 0xc0 }, /* Saturation */
490 { 0x05, 0x0a }, /* Contrast */
491 { 0x06, 0x95 }, /* Brightness */
492 { 0x07, 0x2d }, /* Sharpness */
493 { 0x0c, 0x20 },
494 { 0x0d, 0x20 },
495 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
496 { 0x0f, 0x05 },
497 { 0x10, 0x9a },
498 { 0x11, 0x00 }, /* Pixel clock = fastest */
499 { 0x12, 0x24 }, /* Enable AGC and AWB */
500 { 0x13, 0x21 },
501 { 0x14, 0x80 },
502 { 0x15, 0x01 },
503 { 0x16, 0x03 },
504 { 0x17, 0x38 },
505 { 0x18, 0xea },
506 { 0x19, 0x04 },
507 { 0x1a, 0x93 },
508 { 0x1b, 0x00 },
509 { 0x1e, 0xc4 },
510 { 0x1f, 0x04 },
511 { 0x20, 0x20 },
512 { 0x21, 0x10 },
513 { 0x22, 0x88 },
514 { 0x23, 0xc0 }, /* Crystal circuit power level */
515 { 0x25, 0x9a }, /* Increase AEC black ratio */
516 { 0x26, 0xb2 }, /* BLC enable */
517 { 0x27, 0xa2 },
518 { 0x28, 0x00 },
519 { 0x29, 0x00 },
520 { 0x2a, 0x84 }, /* 60 Hz power */
521 { 0x2b, 0xa8 }, /* 60 Hz power */
522 { 0x2c, 0xa0 },
523 { 0x2d, 0x95 }, /* Enable auto-brightness */
524 { 0x2e, 0x88 },
525 { 0x33, 0x26 },
526 { 0x34, 0x03 },
527 { 0x36, 0x8f },
528 { 0x37, 0x80 },
529 { 0x38, 0x83 },
530 { 0x39, 0x80 },
531 { 0x3a, 0x0f },
532 { 0x3b, 0x3c },
533 { 0x3c, 0x1a },
534 { 0x3d, 0x80 },
535 { 0x3e, 0x80 },
536 { 0x3f, 0x0e },
537 { 0x40, 0x00 }, /* White bal */
538 { 0x41, 0x00 }, /* White bal */
539 { 0x42, 0x80 },
540 { 0x43, 0x3f }, /* White bal */
541 { 0x44, 0x80 },
542 { 0x45, 0x20 },
543 { 0x46, 0x20 },
544 { 0x47, 0x80 },
545 { 0x48, 0x7f },
546 { 0x49, 0x00 },
547 { 0x4a, 0x00 },
548 { 0x4b, 0x80 },
549 { 0x4c, 0xd0 },
550 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
551 { 0x4e, 0x40 },
552 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
553 { 0x50, 0xff },
554 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
555 { 0x55, 0xff },
556 { 0x56, 0x12 },
557 { 0x57, 0x81 },
558 { 0x58, 0x75 },
559 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
560 { 0x5a, 0x2c },
561 { 0x5b, 0x0f }, /* AWB chrominance levels */
562 { 0x5c, 0x10 },
563 { 0x3d, 0x80 },
564 { 0x27, 0xa6 },
565 { 0x12, 0x20 }, /* Toggle AWB */
566 { 0x12, 0x24 },
567 };
568
569 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
570 *
571 * Register 0x0f in the 7610 has the following effects:
572 *
573 * 0x85 (AEC method 1): Best overall, good contrast range
574 * 0x45 (AEC method 2): Very overexposed
575 * 0xa5 (spec sheet default): Ok, but the black level is
576 * shifted resulting in loss of contrast
577 * 0x05 (old driver setting): very overexposed, too much
578 * contrast
579 */
580 static const struct ov_i2c_regvals norm_7610[] = {
581 { 0x10, 0xff },
582 { 0x16, 0x06 },
583 { 0x28, 0x24 },
584 { 0x2b, 0xac },
585 { 0x12, 0x00 },
586 { 0x38, 0x81 },
587 { 0x28, 0x24 }, /* 0c */
588 { 0x0f, 0x85 }, /* lg's setting */
589 { 0x15, 0x01 },
590 { 0x20, 0x1c },
591 { 0x23, 0x2a },
592 { 0x24, 0x10 },
593 { 0x25, 0x8a },
594 { 0x26, 0xa2 },
595 { 0x27, 0xc2 },
596 { 0x2a, 0x04 },
597 { 0x2c, 0xfe },
598 { 0x2d, 0x93 },
599 { 0x30, 0x71 },
600 { 0x31, 0x60 },
601 { 0x32, 0x26 },
602 { 0x33, 0x20 },
603 { 0x34, 0x48 },
604 { 0x12, 0x24 },
605 { 0x11, 0x01 },
606 { 0x0c, 0x24 },
607 { 0x0d, 0x24 },
608 };
609
610 static const struct ov_i2c_regvals norm_7620[] = {
611 { 0x00, 0x00 }, /* gain */
612 { 0x01, 0x80 }, /* blue gain */
613 { 0x02, 0x80 }, /* red gain */
614 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
615 { 0x06, 0x60 },
616 { 0x07, 0x00 },
617 { 0x0c, 0x24 },
618 { 0x0c, 0x24 },
619 { 0x0d, 0x24 },
620 { 0x11, 0x01 },
621 { 0x12, 0x24 },
622 { 0x13, 0x01 },
623 { 0x14, 0x84 },
624 { 0x15, 0x01 },
625 { 0x16, 0x03 },
626 { 0x17, 0x2f },
627 { 0x18, 0xcf },
628 { 0x19, 0x06 },
629 { 0x1a, 0xf5 },
630 { 0x1b, 0x00 },
631 { 0x20, 0x18 },
632 { 0x21, 0x80 },
633 { 0x22, 0x80 },
634 { 0x23, 0x00 },
635 { 0x26, 0xa2 },
636 { 0x27, 0xea },
637 { 0x28, 0x20 },
638 { 0x29, 0x00 },
639 { 0x2a, 0x10 },
640 { 0x2b, 0x00 },
641 { 0x2c, 0x88 },
642 { 0x2d, 0x91 },
643 { 0x2e, 0x80 },
644 { 0x2f, 0x44 },
645 { 0x60, 0x27 },
646 { 0x61, 0x02 },
647 { 0x62, 0x5f },
648 { 0x63, 0xd5 },
649 { 0x64, 0x57 },
650 { 0x65, 0x83 },
651 { 0x66, 0x55 },
652 { 0x67, 0x92 },
653 { 0x68, 0xcf },
654 { 0x69, 0x76 },
655 { 0x6a, 0x22 },
656 { 0x6b, 0x00 },
657 { 0x6c, 0x02 },
658 { 0x6d, 0x44 },
659 { 0x6e, 0x80 },
660 { 0x6f, 0x1d },
661 { 0x70, 0x8b },
662 { 0x71, 0x00 },
663 { 0x72, 0x14 },
664 { 0x73, 0x54 },
665 { 0x74, 0x00 },
666 { 0x75, 0x8e },
667 { 0x76, 0x00 },
668 { 0x77, 0xff },
669 { 0x78, 0x80 },
670 { 0x79, 0x80 },
671 { 0x7a, 0x80 },
672 { 0x7b, 0xe2 },
673 { 0x7c, 0x00 },
674 };
675
676 /* 7640 and 7648. The defaults should be OK for most registers. */
677 static const struct ov_i2c_regvals norm_7640[] = {
678 { 0x12, 0x80 },
679 { 0x12, 0x14 },
680 };
681
682 /* 7670. Defaults taken from OmniVision provided data,
683 * as provided by Jonathan Corbet of OLPC */
684 static const struct ov_i2c_regvals norm_7670[] = {
685 { OV7670_REG_COM7, OV7670_COM7_RESET },
686 { OV7670_REG_TSLB, 0x04 }, /* OV */
687 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
688 { OV7670_REG_CLKRC, 0x01 },
689 /*
690 * Set the hardware window. These values from OV don't entirely
691 * make sense - hstop is less than hstart. But they work...
692 */
693 { OV7670_REG_HSTART, 0x13 },
694 { OV7670_REG_HSTOP, 0x01 },
695 { OV7670_REG_HREF, 0xb6 },
696 { OV7670_REG_VSTART, 0x02 },
697 { OV7670_REG_VSTOP, 0x7a },
698 { OV7670_REG_VREF, 0x0a },
699
700 { OV7670_REG_COM3, 0x00 },
701 { OV7670_REG_COM14, 0x00 },
702 /* Mystery scaling numbers */
703 { 0x70, 0x3a },
704 { 0x71, 0x35 },
705 { 0x72, 0x11 },
706 { 0x73, 0xf0 },
707 { 0xa2, 0x02 },
708 /* { OV7670_REG_COM10, 0x0 }, */
709
710 /* Gamma curve values */
711 { 0x7a, 0x20 },
712 { 0x7b, 0x10 },
713 { 0x7c, 0x1e },
714 { 0x7d, 0x35 },
715 { 0x7e, 0x5a },
716 { 0x7f, 0x69 },
717 { 0x80, 0x76 },
718 { 0x81, 0x80 },
719 { 0x82, 0x88 },
720 { 0x83, 0x8f },
721 { 0x84, 0x96 },
722 { 0x85, 0xa3 },
723 { 0x86, 0xaf },
724 { 0x87, 0xc4 },
725 { 0x88, 0xd7 },
726 { 0x89, 0xe8 },
727
728 /* AGC and AEC parameters. Note we start by disabling those features,
729 then turn them only after tweaking the values. */
730 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
731 | OV7670_COM8_AECSTEP
732 | OV7670_COM8_BFILT },
733 { OV7670_REG_GAIN, 0x00 },
734 { OV7670_REG_AECH, 0x00 },
735 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
736 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
737 { OV7670_REG_BD50MAX, 0x05 },
738 { OV7670_REG_BD60MAX, 0x07 },
739 { OV7670_REG_AEW, 0x95 },
740 { OV7670_REG_AEB, 0x33 },
741 { OV7670_REG_VPT, 0xe3 },
742 { OV7670_REG_HAECC1, 0x78 },
743 { OV7670_REG_HAECC2, 0x68 },
744 { 0xa1, 0x03 }, /* magic */
745 { OV7670_REG_HAECC3, 0xd8 },
746 { OV7670_REG_HAECC4, 0xd8 },
747 { OV7670_REG_HAECC5, 0xf0 },
748 { OV7670_REG_HAECC6, 0x90 },
749 { OV7670_REG_HAECC7, 0x94 },
750 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
751 | OV7670_COM8_AECSTEP
752 | OV7670_COM8_BFILT
753 | OV7670_COM8_AGC
754 | OV7670_COM8_AEC },
755
756 /* Almost all of these are magic "reserved" values. */
757 { OV7670_REG_COM5, 0x61 },
758 { OV7670_REG_COM6, 0x4b },
759 { 0x16, 0x02 },
760 { OV7670_REG_MVFP, 0x07 },
761 { 0x21, 0x02 },
762 { 0x22, 0x91 },
763 { 0x29, 0x07 },
764 { 0x33, 0x0b },
765 { 0x35, 0x0b },
766 { 0x37, 0x1d },
767 { 0x38, 0x71 },
768 { 0x39, 0x2a },
769 { OV7670_REG_COM12, 0x78 },
770 { 0x4d, 0x40 },
771 { 0x4e, 0x20 },
772 { OV7670_REG_GFIX, 0x00 },
773 { 0x6b, 0x4a },
774 { 0x74, 0x10 },
775 { 0x8d, 0x4f },
776 { 0x8e, 0x00 },
777 { 0x8f, 0x00 },
778 { 0x90, 0x00 },
779 { 0x91, 0x00 },
780 { 0x96, 0x00 },
781 { 0x9a, 0x00 },
782 { 0xb0, 0x84 },
783 { 0xb1, 0x0c },
784 { 0xb2, 0x0e },
785 { 0xb3, 0x82 },
786 { 0xb8, 0x0a },
787
788 /* More reserved magic, some of which tweaks white balance */
789 { 0x43, 0x0a },
790 { 0x44, 0xf0 },
791 { 0x45, 0x34 },
792 { 0x46, 0x58 },
793 { 0x47, 0x28 },
794 { 0x48, 0x3a },
795 { 0x59, 0x88 },
796 { 0x5a, 0x88 },
797 { 0x5b, 0x44 },
798 { 0x5c, 0x67 },
799 { 0x5d, 0x49 },
800 { 0x5e, 0x0e },
801 { 0x6c, 0x0a },
802 { 0x6d, 0x55 },
803 { 0x6e, 0x11 },
804 { 0x6f, 0x9f },
805 /* "9e for advance AWB" */
806 { 0x6a, 0x40 },
807 { OV7670_REG_BLUE, 0x40 },
808 { OV7670_REG_RED, 0x60 },
809 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
810 | OV7670_COM8_AECSTEP
811 | OV7670_COM8_BFILT
812 | OV7670_COM8_AGC
813 | OV7670_COM8_AEC
814 | OV7670_COM8_AWB },
815
816 /* Matrix coefficients */
817 { 0x4f, 0x80 },
818 { 0x50, 0x80 },
819 { 0x51, 0x00 },
820 { 0x52, 0x22 },
821 { 0x53, 0x5e },
822 { 0x54, 0x80 },
823 { 0x58, 0x9e },
824
825 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
826 { OV7670_REG_EDGE, 0x00 },
827 { 0x75, 0x05 },
828 { 0x76, 0xe1 },
829 { 0x4c, 0x00 },
830 { 0x77, 0x01 },
831 { OV7670_REG_COM13, OV7670_COM13_GAMMA
832 | OV7670_COM13_UVSAT
833 | 2}, /* was 3 */
834 { 0x4b, 0x09 },
835 { 0xc9, 0x60 },
836 { OV7670_REG_COM16, 0x38 },
837 { 0x56, 0x40 },
838
839 { 0x34, 0x11 },
840 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
841 { 0xa4, 0x88 },
842 { 0x96, 0x00 },
843 { 0x97, 0x30 },
844 { 0x98, 0x20 },
845 { 0x99, 0x30 },
846 { 0x9a, 0x84 },
847 { 0x9b, 0x29 },
848 { 0x9c, 0x03 },
849 { 0x9d, 0x4c },
850 { 0x9e, 0x3f },
851 { 0x78, 0x04 },
852
853 /* Extra-weird stuff. Some sort of multiplexor register */
854 { 0x79, 0x01 },
855 { 0xc8, 0xf0 },
856 { 0x79, 0x0f },
857 { 0xc8, 0x00 },
858 { 0x79, 0x10 },
859 { 0xc8, 0x7e },
860 { 0x79, 0x0a },
861 { 0xc8, 0x80 },
862 { 0x79, 0x0b },
863 { 0xc8, 0x01 },
864 { 0x79, 0x0c },
865 { 0xc8, 0x0f },
866 { 0x79, 0x0d },
867 { 0xc8, 0x20 },
868 { 0x79, 0x09 },
869 { 0xc8, 0x80 },
870 { 0x79, 0x02 },
871 { 0xc8, 0xc0 },
872 { 0x79, 0x03 },
873 { 0xc8, 0x40 },
874 { 0x79, 0x05 },
875 { 0xc8, 0x30 },
876 { 0x79, 0x26 },
877 };
878
879 static const struct ov_i2c_regvals norm_8610[] = {
880 { 0x12, 0x80 },
881 { 0x00, 0x00 },
882 { 0x01, 0x80 },
883 { 0x02, 0x80 },
884 { 0x03, 0xc0 },
885 { 0x04, 0x30 },
886 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
887 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
888 { 0x0a, 0x86 },
889 { 0x0b, 0xb0 },
890 { 0x0c, 0x20 },
891 { 0x0d, 0x20 },
892 { 0x11, 0x01 },
893 { 0x12, 0x25 },
894 { 0x13, 0x01 },
895 { 0x14, 0x04 },
896 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
897 { 0x16, 0x03 },
898 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
899 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
900 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
901 { 0x1a, 0xf5 },
902 { 0x1b, 0x00 },
903 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
904 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
905 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
906 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
907 { 0x26, 0xa2 },
908 { 0x27, 0xea },
909 { 0x28, 0x00 },
910 { 0x29, 0x00 },
911 { 0x2a, 0x80 },
912 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
913 { 0x2c, 0xac },
914 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
915 { 0x2e, 0x80 },
916 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
917 { 0x4c, 0x00 },
918 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
919 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
920 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
921 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
922 { 0x63, 0xff },
923 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
924 * maybe thats wrong */
925 { 0x65, 0x00 },
926 { 0x66, 0x55 },
927 { 0x67, 0xb0 },
928 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
929 { 0x69, 0x02 },
930 { 0x6a, 0x22 },
931 { 0x6b, 0x00 },
932 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
933 * deleting bit7 colors the first images red */
934 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
935 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
936 { 0x6f, 0x01 },
937 { 0x70, 0x8b },
938 { 0x71, 0x00 },
939 { 0x72, 0x14 },
940 { 0x73, 0x54 },
941 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
942 { 0x75, 0x0e },
943 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
944 { 0x77, 0xff },
945 { 0x78, 0x80 },
946 { 0x79, 0x80 },
947 { 0x7a, 0x80 },
948 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
949 { 0x7c, 0x00 },
950 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
951 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
952 { 0x7f, 0xfb },
953 { 0x80, 0x28 },
954 { 0x81, 0x00 },
955 { 0x82, 0x23 },
956 { 0x83, 0x0b },
957 { 0x84, 0x00 },
958 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
959 { 0x86, 0xc9 },
960 { 0x87, 0x00 },
961 { 0x88, 0x00 },
962 { 0x89, 0x01 },
963 { 0x12, 0x20 },
964 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
965 };
966
967 static unsigned char ov7670_abs_to_sm(unsigned char v)
968 {
969 if (v > 127)
970 return v & 0x7f;
971 return (128 - v) | 0x80;
972 }
973
974 /* Write a OV519 register */
975 static int reg_w(struct sd *sd, __u16 index, __u8 value)
976 {
977 int ret;
978 int req = (sd->bridge <= BRIDGE_OV511PLUS) ? 2 : 1;
979
980 sd->gspca_dev.usb_buf[0] = value;
981 ret = usb_control_msg(sd->gspca_dev.dev,
982 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
983 req,
984 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
985 0, index,
986 sd->gspca_dev.usb_buf, 1, 500);
987 if (ret < 0)
988 PDEBUG(D_ERR, "Write reg [%02x] %02x failed", index, value);
989 return ret;
990 }
991
992 /* Read from a OV519 register */
993 /* returns: negative is error, pos or zero is data */
994 static int reg_r(struct sd *sd, __u16 index)
995 {
996 int ret;
997 int req = (sd->bridge <= BRIDGE_OV511PLUS) ? 3 : 1;
998
999 ret = usb_control_msg(sd->gspca_dev.dev,
1000 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1001 req,
1002 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1003 0, index, sd->gspca_dev.usb_buf, 1, 500);
1004
1005 if (ret >= 0)
1006 ret = sd->gspca_dev.usb_buf[0];
1007 else
1008 PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
1009 return ret;
1010 }
1011
1012 /* Read 8 values from a OV519 register */
1013 static int reg_r8(struct sd *sd,
1014 __u16 index)
1015 {
1016 int ret;
1017
1018 ret = usb_control_msg(sd->gspca_dev.dev,
1019 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1020 1, /* REQ_IO */
1021 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1022 0, index, sd->gspca_dev.usb_buf, 8, 500);
1023
1024 if (ret >= 0)
1025 ret = sd->gspca_dev.usb_buf[0];
1026 else
1027 PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
1028 return ret;
1029 }
1030
1031 /*
1032 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
1033 * the same position as 1's in "mask" are cleared and set to "value". Bits
1034 * that are in the same position as 0's in "mask" are preserved, regardless
1035 * of their respective state in "value".
1036 */
1037 static int reg_w_mask(struct sd *sd,
1038 __u16 index,
1039 __u8 value,
1040 __u8 mask)
1041 {
1042 int ret;
1043 __u8 oldval;
1044
1045 if (mask != 0xff) {
1046 value &= mask; /* Enforce mask on value */
1047 ret = reg_r(sd, index);
1048 if (ret < 0)
1049 return ret;
1050
1051 oldval = ret & ~mask; /* Clear the masked bits */
1052 value |= oldval; /* Set the desired bits */
1053 }
1054 return reg_w(sd, index, value);
1055 }
1056
1057 /*
1058 * Writes multiple (n) byte value to a single register. Only valid with certain
1059 * registers (0x30 and 0xc4 - 0xce).
1060 */
1061 static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
1062 {
1063 int ret;
1064
1065 *((u32 *)sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
1066
1067 ret = usb_control_msg(sd->gspca_dev.dev,
1068 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1069 1 /* REG_IO */,
1070 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1071 0, index,
1072 sd->gspca_dev.usb_buf, n, 500);
1073 if (ret < 0)
1074 PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value);
1075 return ret;
1076 }
1077
1078
1079 /*
1080 * The OV518 I2C I/O procedure is different, hence, this function.
1081 * This is normally only called from i2c_w(). Note that this function
1082 * always succeeds regardless of whether the sensor is present and working.
1083 */
1084 static int i2c_w(struct sd *sd,
1085 __u8 reg,
1086 __u8 value)
1087 {
1088 int rc;
1089
1090 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
1091
1092 /* Select camera register */
1093 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
1094 if (rc < 0)
1095 return rc;
1096
1097 /* Write "value" to I2C data port of OV511 */
1098 rc = reg_w(sd, R51x_I2C_DATA, value);
1099 if (rc < 0)
1100 return rc;
1101
1102 /* Initiate 3-byte write cycle */
1103 rc = reg_w(sd, R518_I2C_CTL, 0x01);
1104 if (rc < 0)
1105 return rc;
1106
1107 /* wait for write complete */
1108 msleep(4);
1109 return reg_r8(sd, R518_I2C_CTL);
1110 }
1111
1112 /*
1113 * returns: negative is error, pos or zero is data
1114 *
1115 * The OV518 I2C I/O procedure is different, hence, this function.
1116 * This is normally only called from i2c_r(). Note that this function
1117 * always succeeds regardless of whether the sensor is present and working.
1118 */
1119 static int i2c_r(struct sd *sd, __u8 reg)
1120 {
1121 int rc, value;
1122
1123 /* Select camera register */
1124 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
1125 if (rc < 0)
1126 return rc;
1127
1128 /* Initiate 2-byte write cycle */
1129 rc = reg_w(sd, R518_I2C_CTL, 0x03);
1130 if (rc < 0)
1131 return rc;
1132
1133 /* Initiate 2-byte read cycle */
1134 rc = reg_w(sd, R518_I2C_CTL, 0x05);
1135 if (rc < 0)
1136 return rc;
1137 value = reg_r(sd, R51x_I2C_DATA);
1138 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
1139 return value;
1140 }
1141
1142 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
1143 * the same position as 1's in "mask" are cleared and set to "value". Bits
1144 * that are in the same position as 0's in "mask" are preserved, regardless
1145 * of their respective state in "value".
1146 */
1147 static int i2c_w_mask(struct sd *sd,
1148 __u8 reg,
1149 __u8 value,
1150 __u8 mask)
1151 {
1152 int rc;
1153 __u8 oldval;
1154
1155 value &= mask; /* Enforce mask on value */
1156 rc = i2c_r(sd, reg);
1157 if (rc < 0)
1158 return rc;
1159 oldval = rc & ~mask; /* Clear the masked bits */
1160 value |= oldval; /* Set the desired bits */
1161 return i2c_w(sd, reg, value);
1162 }
1163
1164 /* Temporarily stops OV511 from functioning. Must do this before changing
1165 * registers while the camera is streaming */
1166 static inline int ov51x_stop(struct sd *sd)
1167 {
1168 PDEBUG(D_STREAM, "stopping");
1169 sd->stopped = 1;
1170 switch (sd->bridge) {
1171 case BRIDGE_OV511:
1172 case BRIDGE_OV511PLUS:
1173 return reg_w(sd, R51x_SYS_RESET, 0x3d);
1174 case BRIDGE_OV518:
1175 case BRIDGE_OV518PLUS:
1176 return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
1177 case BRIDGE_OV519:
1178 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
1179 }
1180
1181 return 0;
1182 }
1183
1184 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
1185 * actually stopped (for performance). */
1186 static inline int ov51x_restart(struct sd *sd)
1187 {
1188 int rc;
1189
1190 PDEBUG(D_STREAM, "restarting");
1191 if (!sd->stopped)
1192 return 0;
1193 sd->stopped = 0;
1194
1195 /* Reinitialize the stream */
1196 switch (sd->bridge) {
1197 case BRIDGE_OV511:
1198 case BRIDGE_OV511PLUS:
1199 return reg_w(sd, R51x_SYS_RESET, 0x00);
1200 case BRIDGE_OV518:
1201 case BRIDGE_OV518PLUS:
1202 rc = reg_w(sd, 0x2f, 0x80);
1203 if (rc < 0)
1204 return rc;
1205 return reg_w(sd, R51x_SYS_RESET, 0x00);
1206 case BRIDGE_OV519:
1207 return reg_w(sd, OV519_SYS_RESET1, 0x00);
1208 }
1209
1210 return 0;
1211 }
1212
1213 /* This does an initial reset of an OmniVision sensor and ensures that I2C
1214 * is synchronized. Returns <0 on failure.
1215 */
1216 static int init_ov_sensor(struct sd *sd)
1217 {
1218 int i;
1219
1220 /* Reset the sensor */
1221 if (i2c_w(sd, 0x12, 0x80) < 0)
1222 return -EIO;
1223
1224 /* Wait for it to initialize */
1225 msleep(150);
1226
1227 for (i = 0; i < i2c_detect_tries; i++) {
1228 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
1229 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
1230 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
1231 return 0;
1232 }
1233
1234 /* Reset the sensor */
1235 if (i2c_w(sd, 0x12, 0x80) < 0)
1236 return -EIO;
1237 /* Wait for it to initialize */
1238 msleep(150);
1239 /* Dummy read to sync I2C */
1240 if (i2c_r(sd, 0x00) < 0)
1241 return -EIO;
1242 }
1243 return -EIO;
1244 }
1245
1246 /* Set the read and write slave IDs. The "slave" argument is the write slave,
1247 * and the read slave will be set to (slave + 1).
1248 * This should not be called from outside the i2c I/O functions.
1249 * Sets I2C read and write slave IDs. Returns <0 for error
1250 */
1251 static int ov51x_set_slave_ids(struct sd *sd,
1252 __u8 slave)
1253 {
1254 int rc;
1255
1256 rc = reg_w(sd, R51x_I2C_W_SID, slave);
1257 if (rc < 0)
1258 return rc;
1259 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
1260 }
1261
1262 static int write_regvals(struct sd *sd,
1263 const struct ov_regvals *regvals,
1264 int n)
1265 {
1266 int rc;
1267
1268 while (--n >= 0) {
1269 rc = reg_w(sd, regvals->reg, regvals->val);
1270 if (rc < 0)
1271 return rc;
1272 regvals++;
1273 }
1274 return 0;
1275 }
1276
1277 static int write_i2c_regvals(struct sd *sd,
1278 const struct ov_i2c_regvals *regvals,
1279 int n)
1280 {
1281 int rc;
1282
1283 while (--n >= 0) {
1284 rc = i2c_w(sd, regvals->reg, regvals->val);
1285 if (rc < 0)
1286 return rc;
1287 regvals++;
1288 }
1289 return 0;
1290 }
1291
1292 /****************************************************************************
1293 *
1294 * OV511 and sensor configuration
1295 *
1296 ***************************************************************************/
1297
1298 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
1299 * the same register settings as the OV8610, since they are very similar.
1300 */
1301 static int ov8xx0_configure(struct sd *sd)
1302 {
1303 int rc;
1304
1305 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
1306
1307 /* Detect sensor (sub)type */
1308 rc = i2c_r(sd, OV7610_REG_COM_I);
1309 if (rc < 0) {
1310 PDEBUG(D_ERR, "Error detecting sensor type");
1311 return -1;
1312 }
1313 if ((rc & 3) == 1) {
1314 sd->sensor = SEN_OV8610;
1315 } else {
1316 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
1317 return -1;
1318 }
1319
1320 /* Set sensor-specific vars */
1321 /* sd->sif = 0; already done */
1322 return 0;
1323 }
1324
1325 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
1326 * the same register settings as the OV7610, since they are very similar.
1327 */
1328 static int ov7xx0_configure(struct sd *sd)
1329 {
1330 int rc, high, low;
1331
1332
1333 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
1334
1335 /* Detect sensor (sub)type */
1336 rc = i2c_r(sd, OV7610_REG_COM_I);
1337
1338 /* add OV7670 here
1339 * it appears to be wrongly detected as a 7610 by default */
1340 if (rc < 0) {
1341 PDEBUG(D_ERR, "Error detecting sensor type");
1342 return -1;
1343 }
1344 if ((rc & 3) == 3) {
1345 /* quick hack to make OV7670s work */
1346 high = i2c_r(sd, 0x0a);
1347 low = i2c_r(sd, 0x0b);
1348 /* info("%x, %x", high, low); */
1349 if (high == 0x76 && low == 0x73) {
1350 PDEBUG(D_PROBE, "Sensor is an OV7670");
1351 sd->sensor = SEN_OV7670;
1352 } else {
1353 PDEBUG(D_PROBE, "Sensor is an OV7610");
1354 sd->sensor = SEN_OV7610;
1355 }
1356 } else if ((rc & 3) == 1) {
1357 /* I don't know what's different about the 76BE yet. */
1358 if (i2c_r(sd, 0x15) & 1)
1359 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
1360 else
1361 PDEBUG(D_PROBE, "Sensor is an OV76BE");
1362
1363 /* OV511+ will return all zero isoc data unless we
1364 * configure the sensor as a 7620. Someone needs to
1365 * find the exact reg. setting that causes this. */
1366 sd->sensor = SEN_OV76BE;
1367 } else if ((rc & 3) == 0) {
1368 /* try to read product id registers */
1369 high = i2c_r(sd, 0x0a);
1370 if (high < 0) {
1371 PDEBUG(D_ERR, "Error detecting camera chip PID");
1372 return high;
1373 }
1374 low = i2c_r(sd, 0x0b);
1375 if (low < 0) {
1376 PDEBUG(D_ERR, "Error detecting camera chip VER");
1377 return low;
1378 }
1379 if (high == 0x76) {
1380 switch (low) {
1381 case 0x30:
1382 PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
1383 PDEBUG(D_ERR,
1384 "7630 is not supported by this driver");
1385 return -1;
1386 case 0x40:
1387 PDEBUG(D_PROBE, "Sensor is an OV7645");
1388 sd->sensor = SEN_OV7640; /* FIXME */
1389 break;
1390 case 0x45:
1391 PDEBUG(D_PROBE, "Sensor is an OV7645B");
1392 sd->sensor = SEN_OV7640; /* FIXME */
1393 break;
1394 case 0x48:
1395 PDEBUG(D_PROBE, "Sensor is an OV7648");
1396 sd->sensor = SEN_OV7640; /* FIXME */
1397 break;
1398 default:
1399 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
1400 return -1;
1401 }
1402 } else {
1403 PDEBUG(D_PROBE, "Sensor is an OV7620");
1404 sd->sensor = SEN_OV7620;
1405 }
1406 } else {
1407 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
1408 return -1;
1409 }
1410
1411 /* Set sensor-specific vars */
1412 /* sd->sif = 0; already done */
1413 return 0;
1414 }
1415
1416 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
1417 static int ov6xx0_configure(struct sd *sd)
1418 {
1419 int rc;
1420 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
1421
1422 /* Detect sensor (sub)type */
1423 rc = i2c_r(sd, OV7610_REG_COM_I);
1424 if (rc < 0) {
1425 PDEBUG(D_ERR, "Error detecting sensor type");
1426 return -1;
1427 }
1428
1429 /* Ugh. The first two bits are the version bits, but
1430 * the entire register value must be used. I guess OVT
1431 * underestimated how many variants they would make. */
1432 switch (rc) {
1433 case 0x00:
1434 sd->sensor = SEN_OV6630;
1435 PDEBUG(D_ERR,
1436 "WARNING: Sensor is an OV66308. Your camera may have");
1437 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
1438 break;
1439 case 0x01:
1440 sd->sensor = SEN_OV6620;
1441 PDEBUG(D_PROBE, "Sensor is an OV6620");
1442 break;
1443 case 0x02:
1444 sd->sensor = SEN_OV6630;
1445 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
1446 break;
1447 case 0x03:
1448 sd->sensor = SEN_OV66308AF;
1449 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
1450 break;
1451 case 0x90:
1452 sd->sensor = SEN_OV6630;
1453 PDEBUG(D_ERR,
1454 "WARNING: Sensor is an OV66307. Your camera may have");
1455 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
1456 break;
1457 default:
1458 PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
1459 return -1;
1460 }
1461
1462 /* Set sensor-specific vars */
1463 sd->sif = 1;
1464
1465 return 0;
1466 }
1467
1468 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
1469 static void ov51x_led_control(struct sd *sd, int on)
1470 {
1471 switch (sd->bridge) {
1472 /* OV511 has no LED control */
1473 case BRIDGE_OV511PLUS:
1474 reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
1475 break;
1476 case BRIDGE_OV518:
1477 case BRIDGE_OV518PLUS:
1478 reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
1479 break;
1480 case BRIDGE_OV519:
1481 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
1482 break;
1483 }
1484 }
1485
1486 /* OV518 quantization tables are 8x4 (instead of 8x8) */
1487 static int ov518_upload_quan_tables(struct sd *sd)
1488 {
1489 const unsigned char yQuanTable518[] = {
1490 5, 4, 5, 6, 6, 7, 7, 7,
1491 5, 5, 5, 5, 6, 7, 7, 7,
1492 6, 6, 6, 6, 7, 7, 7, 8,
1493 7, 7, 6, 7, 7, 7, 8, 8
1494 };
1495
1496 const unsigned char uvQuanTable518[] = {
1497 6, 6, 6, 7, 7, 7, 7, 7,
1498 6, 6, 6, 7, 7, 7, 7, 7,
1499 6, 6, 6, 7, 7, 7, 7, 8,
1500 7, 7, 7, 7, 7, 7, 8, 8
1501 };
1502
1503 const unsigned char *pYTable = yQuanTable518;
1504 const unsigned char *pUVTable = uvQuanTable518;
1505 unsigned char val0, val1;
1506 int i, rc, reg = R51x_COMP_LUT_BEGIN;
1507
1508 PDEBUG(D_PROBE, "Uploading quantization tables");
1509
1510 for (i = 0; i < 16; i++) {
1511 val0 = *pYTable++;
1512 val1 = *pYTable++;
1513 val0 &= 0x0f;
1514 val1 &= 0x0f;
1515 val0 |= val1 << 4;
1516 rc = reg_w(sd, reg, val0);
1517 if (rc < 0)
1518 return rc;
1519
1520 val0 = *pUVTable++;
1521 val1 = *pUVTable++;
1522 val0 &= 0x0f;
1523 val1 &= 0x0f;
1524 val0 |= val1 << 4;
1525 rc = reg_w(sd, reg + 16, val0);
1526 if (rc < 0)
1527 return rc;
1528
1529 reg++;
1530 }
1531
1532 return 0;
1533 }
1534
1535 /* This initializes the OV518/OV518+ and the sensor */
1536 static int ov518_configure(struct gspca_dev *gspca_dev)
1537 {
1538 struct sd *sd = (struct sd *) gspca_dev;
1539 int rc;
1540
1541 /* For 518 and 518+ */
1542 static struct ov_regvals init_518[] = {
1543 { R51x_SYS_RESET, 0x40 },
1544 { R51x_SYS_INIT, 0xe1 },
1545 { R51x_SYS_RESET, 0x3e },
1546 { R51x_SYS_INIT, 0xe1 },
1547 { R51x_SYS_RESET, 0x00 },
1548 { R51x_SYS_INIT, 0xe1 },
1549 { 0x46, 0x00 },
1550 { 0x5d, 0x03 },
1551 };
1552
1553 static struct ov_regvals norm_518[] = {
1554 { R51x_SYS_SNAP, 0x02 }, /* Reset */
1555 { R51x_SYS_SNAP, 0x01 }, /* Enable */
1556 { 0x31, 0x0f },
1557 { 0x5d, 0x03 },
1558 { 0x24, 0x9f },
1559 { 0x25, 0x90 },
1560 { 0x20, 0x00 },
1561 { 0x51, 0x04 },
1562 { 0x71, 0x19 },
1563 { 0x2f, 0x80 },
1564 };
1565
1566 static struct ov_regvals norm_518_p[] = {
1567 { R51x_SYS_SNAP, 0x02 }, /* Reset */
1568 { R51x_SYS_SNAP, 0x01 }, /* Enable */
1569 { 0x31, 0x0f },
1570 { 0x5d, 0x03 },
1571 { 0x24, 0x9f },
1572 { 0x25, 0x90 },
1573 { 0x20, 0x60 },
1574 { 0x51, 0x02 },
1575 { 0x71, 0x19 },
1576 { 0x40, 0xff },
1577 { 0x41, 0x42 },
1578 { 0x46, 0x00 },
1579 { 0x33, 0x04 },
1580 { 0x21, 0x19 },
1581 { 0x3f, 0x10 },
1582 { 0x2f, 0x80 },
1583 };
1584
1585 /* First 5 bits of custom ID reg are a revision ID on OV518 */
1586 PDEBUG(D_PROBE, "Device revision %d",
1587 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
1588
1589 rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
1590 if (rc < 0)
1591 return rc;
1592
1593 /* Set LED GPIO pin to output mode */
1594 rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
1595 if (rc < 0)
1596 return rc;
1597
1598 switch (sd->bridge) {
1599 case BRIDGE_OV518:
1600 rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
1601 if (rc < 0)
1602 return rc;
1603 break;
1604 case BRIDGE_OV518PLUS:
1605 rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
1606 if (rc < 0)
1607 return rc;
1608 break;
1609 }
1610
1611 rc = ov518_upload_quan_tables(sd);
1612 if (rc < 0) {
1613 PDEBUG(D_ERR, "Error uploading quantization tables");
1614 return rc;
1615 }
1616
1617 rc = reg_w(sd, 0x2f, 0x80);
1618 if (rc < 0)
1619 return rc;
1620
1621 return 0;
1622 }
1623
1624 static int ov519_configure(struct sd *sd)
1625 {
1626 static const struct ov_regvals init_519[] = {
1627 { 0x5a, 0x6d }, /* EnableSystem */
1628 { 0x53, 0x9b },
1629 { 0x54, 0xff }, /* set bit2 to enable jpeg */
1630 { 0x5d, 0x03 },
1631 { 0x49, 0x01 },
1632 { 0x48, 0x00 },
1633 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
1634 * detection will fail. This deserves further investigation. */
1635 { OV519_GPIO_IO_CTRL0, 0xee },
1636 { 0x51, 0x0f }, /* SetUsbInit */
1637 { 0x51, 0x00 },
1638 { 0x22, 0x00 },
1639 /* windows reads 0x55 at this point*/
1640 };
1641
1642 return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
1643 }
1644
1645 /* this function is called at probe time */
1646 static int sd_config(struct gspca_dev *gspca_dev,
1647 const struct usb_device_id *id)
1648 {
1649 struct sd *sd = (struct sd *) gspca_dev;
1650 struct cam *cam;
1651 int ret = 0;
1652
1653 sd->bridge = id->driver_info;
1654
1655 switch (sd->bridge) {
1656 case BRIDGE_OV518:
1657 case BRIDGE_OV518PLUS:
1658 ret = ov518_configure(gspca_dev);
1659 break;
1660 case BRIDGE_OV519:
1661 ret = ov519_configure(sd);
1662 break;
1663 }
1664
1665 if (ret)
1666 goto error;
1667
1668 ov51x_led_control(sd, 0); /* turn LED off */
1669
1670 /* Test for 76xx */
1671 if (ov51x_set_slave_ids(sd, OV7xx0_SID) < 0)
1672 goto error;
1673
1674 /* The OV519 must be more aggressive about sensor detection since
1675 * I2C write will never fail if the sensor is not present. We have
1676 * to try to initialize the sensor to detect its presence */
1677 if (init_ov_sensor(sd) >= 0) {
1678 if (ov7xx0_configure(sd) < 0) {
1679 PDEBUG(D_ERR, "Failed to configure OV7xx0");
1680 goto error;
1681 }
1682 } else {
1683
1684 /* Test for 6xx0 */
1685 if (ov51x_set_slave_ids(sd, OV6xx0_SID) < 0)
1686 goto error;
1687
1688 if (init_ov_sensor(sd) >= 0) {
1689 if (ov6xx0_configure(sd) < 0) {
1690 PDEBUG(D_ERR, "Failed to configure OV6xx0");
1691 goto error;
1692 }
1693 } else {
1694
1695 /* Test for 8xx0 */
1696 if (ov51x_set_slave_ids(sd, OV8xx0_SID) < 0)
1697 goto error;
1698
1699 if (init_ov_sensor(sd) < 0) {
1700 PDEBUG(D_ERR,
1701 "Can't determine sensor slave IDs");
1702 goto error;
1703 }
1704 if (ov8xx0_configure(sd) < 0) {
1705 PDEBUG(D_ERR,
1706 "Failed to configure OV8xx0 sensor");
1707 goto error;
1708 }
1709 }
1710 }
1711
1712 cam = &gspca_dev->cam;
1713 switch (sd->bridge) {
1714 case BRIDGE_OV518:
1715 case BRIDGE_OV518PLUS:
1716 if (!sd->sif) {
1717 cam->cam_mode = ov518_vga_mode;
1718 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
1719 } else {
1720 cam->cam_mode = ov518_sif_mode;
1721 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
1722 }
1723 break;
1724 case BRIDGE_OV519:
1725 if (!sd->sif) {
1726 cam->cam_mode = ov519_vga_mode;
1727 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
1728 } else {
1729 cam->cam_mode = ov519_sif_mode;
1730 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
1731 }
1732 break;
1733 }
1734 sd->brightness = BRIGHTNESS_DEF;
1735 sd->contrast = CONTRAST_DEF;
1736 sd->colors = COLOR_DEF;
1737 sd->hflip = HFLIP_DEF;
1738 sd->vflip = VFLIP_DEF;
1739 sd->autobrightness = AUTOBRIGHT_DEF;
1740 if (sd->sensor == SEN_OV7670) {
1741 sd->freq = OV7670_FREQ_DEF;
1742 gspca_dev->ctrl_dis = 1 << FREQ_IDX;
1743 } else {
1744 sd->freq = FREQ_DEF;
1745 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) |
1746 (1 << OV7670_FREQ_IDX);
1747 }
1748 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
1749 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX;
1750 /* OV8610 Frequency filter control should work but needs testing */
1751 if (sd->sensor == SEN_OV8610)
1752 gspca_dev->ctrl_dis |= 1 << FREQ_IDX;
1753
1754 return 0;
1755 error:
1756 PDEBUG(D_ERR, "OV519 Config failed");
1757 return -EBUSY;
1758 }
1759
1760 /* this function is called at probe and resume time */
1761 static int sd_init(struct gspca_dev *gspca_dev)
1762 {
1763 struct sd *sd = (struct sd *) gspca_dev;
1764
1765 /* initialize the sensor */
1766 switch (sd->sensor) {
1767 case SEN_OV6620:
1768 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
1769 return -EIO;
1770 break;
1771 case SEN_OV6630:
1772 case SEN_OV66308AF:
1773 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
1774 return -EIO;
1775 break;
1776 default:
1777 /* case SEN_OV7610: */
1778 /* case SEN_OV76BE: */
1779 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
1780 return -EIO;
1781 break;
1782 case SEN_OV7620:
1783 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
1784 return -EIO;
1785 break;
1786 case SEN_OV7640:
1787 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
1788 return -EIO;
1789 break;
1790 case SEN_OV7670:
1791 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
1792 return -EIO;
1793 break;
1794 case SEN_OV8610:
1795 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
1796 return -EIO;
1797 break;
1798 }
1799 return 0;
1800 }
1801
1802 /* Sets up the OV518/OV518+ with the given image parameters
1803 *
1804 * OV518 needs a completely different approach, until we can figure out what
1805 * the individual registers do. Also, only 15 FPS is supported now.
1806 *
1807 * Do not put any sensor-specific code in here (including I2C I/O functions)
1808 */
1809 static int ov518_mode_init_regs(struct sd *sd)
1810 {
1811 int hsegs, vsegs;
1812
1813 /******** Set the mode ********/
1814
1815 reg_w(sd, 0x2b, 0);
1816 reg_w(sd, 0x2c, 0);
1817 reg_w(sd, 0x2d, 0);
1818 reg_w(sd, 0x2e, 0);
1819 reg_w(sd, 0x3b, 0);
1820 reg_w(sd, 0x3c, 0);
1821 reg_w(sd, 0x3d, 0);
1822 reg_w(sd, 0x3e, 0);
1823
1824 if (sd->bridge == BRIDGE_OV518) {
1825 /* Set 8-bit (YVYU) input format */
1826 reg_w_mask(sd, 0x20, 0x08, 0x08);
1827
1828 /* Set 12-bit (4:2:0) output format */
1829 reg_w_mask(sd, 0x28, 0x80, 0xf0);
1830 reg_w_mask(sd, 0x38, 0x80, 0xf0);
1831 } else {
1832 reg_w(sd, 0x28, 0x80);
1833 reg_w(sd, 0x38, 0x80);
1834 }
1835
1836 hsegs = sd->gspca_dev.width / 16;
1837 vsegs = sd->gspca_dev.height / 4;
1838
1839 reg_w(sd, 0x29, hsegs);
1840 reg_w(sd, 0x2a, vsegs);
1841
1842 reg_w(sd, 0x39, hsegs);
1843 reg_w(sd, 0x3a, vsegs);
1844
1845 /* Windows driver does this here; who knows why */
1846 reg_w(sd, 0x2f, 0x80);
1847
1848 /******** Set the framerate (to 30 FPS) ********/
1849 if (sd->bridge == BRIDGE_OV518PLUS)
1850 sd->clockdiv = 1;
1851 else
1852 sd->clockdiv = 0;
1853
1854 /* Mode independent, but framerate dependent, regs */
1855 reg_w(sd, 0x51, 0x04); /* Clock divider; lower==faster */
1856 reg_w(sd, 0x22, 0x18);
1857 reg_w(sd, 0x23, 0xff);
1858
1859 if (sd->bridge == BRIDGE_OV518PLUS)
1860 reg_w(sd, 0x21, 0x19);
1861 else
1862 reg_w(sd, 0x71, 0x17); /* Compression-related? */
1863
1864 /* FIXME: Sensor-specific */
1865 /* Bit 5 is what matters here. Of course, it is "reserved" */
1866 i2c_w(sd, 0x54, 0x23);
1867
1868 reg_w(sd, 0x2f, 0x80);
1869
1870 if (sd->bridge == BRIDGE_OV518PLUS) {
1871 reg_w(sd, 0x24, 0x94);
1872 reg_w(sd, 0x25, 0x90);
1873 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
1874 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
1875 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
1876 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
1877 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
1878 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
1879 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
1880 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
1881 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
1882 } else {
1883 reg_w(sd, 0x24, 0x9f);
1884 reg_w(sd, 0x25, 0x90);
1885 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
1886 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
1887 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
1888 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
1889 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
1890 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
1891 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
1892 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
1893 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
1894 }
1895
1896 reg_w(sd, 0x2f, 0x80);
1897
1898 return 0;
1899 }
1900
1901
1902 /* Sets up the OV519 with the given image parameters
1903 *
1904 * OV519 needs a completely different approach, until we can figure out what
1905 * the individual registers do.
1906 *
1907 * Do not put any sensor-specific code in here (including I2C I/O functions)
1908 */
1909 static int ov519_mode_init_regs(struct sd *sd)
1910 {
1911 static const struct ov_regvals mode_init_519_ov7670[] = {
1912 { 0x5d, 0x03 }, /* Turn off suspend mode */
1913 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
1914 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1915 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1916 { 0xa3, 0x18 },
1917 { 0xa4, 0x04 },
1918 { 0xa5, 0x28 },
1919 { 0x37, 0x00 }, /* SetUsbInit */
1920 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1921 /* Enable both fields, YUV Input, disable defect comp (why?) */
1922 { 0x20, 0x0c },
1923 { 0x21, 0x38 },
1924 { 0x22, 0x1d },
1925 { 0x17, 0x50 }, /* undocumented */
1926 { 0x37, 0x00 }, /* undocumented */
1927 { 0x40, 0xff }, /* I2C timeout counter */
1928 { 0x46, 0x00 }, /* I2C clock prescaler */
1929 { 0x59, 0x04 }, /* new from windrv 090403 */
1930 { 0xff, 0x00 }, /* undocumented */
1931 /* windows reads 0x55 at this point, why? */
1932 };
1933
1934 static const struct ov_regvals mode_init_519[] = {
1935 { 0x5d, 0x03 }, /* Turn off suspend mode */
1936 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
1937 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1938 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1939 { 0xa3, 0x18 },
1940 { 0xa4, 0x04 },
1941 { 0xa5, 0x28 },
1942 { 0x37, 0x00 }, /* SetUsbInit */
1943 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1944 /* Enable both fields, YUV Input, disable defect comp (why?) */
1945 { 0x22, 0x1d },
1946 { 0x17, 0x50 }, /* undocumented */
1947 { 0x37, 0x00 }, /* undocumented */
1948 { 0x40, 0xff }, /* I2C timeout counter */
1949 { 0x46, 0x00 }, /* I2C clock prescaler */
1950 { 0x59, 0x04 }, /* new from windrv 090403 */
1951 { 0xff, 0x00 }, /* undocumented */
1952 /* windows reads 0x55 at this point, why? */
1953 };
1954
1955 /******** Set the mode ********/
1956 if (sd->sensor != SEN_OV7670) {
1957 if (write_regvals(sd, mode_init_519,
1958 ARRAY_SIZE(mode_init_519)))
1959 return -EIO;
1960 if (sd->sensor == SEN_OV7640) {
1961 /* Select 8-bit input mode */
1962 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
1963 }
1964 } else {
1965 if (write_regvals(sd, mode_init_519_ov7670,
1966 ARRAY_SIZE(mode_init_519_ov7670)))
1967 return -EIO;
1968 }
1969
1970 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
1971 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
1972 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
1973 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
1974 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
1975 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
1976 reg_w(sd, OV519_R16_DIVIDER, 0x00);
1977 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
1978 reg_w(sd, 0x26, 0x00); /* Undocumented */
1979
1980 /******** Set the framerate ********/
1981 if (frame_rate > 0)
1982 sd->frame_rate = frame_rate;
1983
1984 /* FIXME: These are only valid at the max resolution. */
1985 sd->clockdiv = 0;
1986 switch (sd->sensor) {
1987 case SEN_OV7640:
1988 switch (sd->frame_rate) {
1989 default:
1990 /* case 30: */
1991 reg_w(sd, 0xa4, 0x0c);
1992 reg_w(sd, 0x23, 0xff);
1993 break;
1994 case 25:
1995 reg_w(sd, 0xa4, 0x0c);
1996 reg_w(sd, 0x23, 0x1f);
1997 break;
1998 case 20:
1999 reg_w(sd, 0xa4, 0x0c);
2000 reg_w(sd, 0x23, 0x1b);
2001 break;
2002 case 15:
2003 reg_w(sd, 0xa4, 0x04);
2004 reg_w(sd, 0x23, 0xff);
2005 sd->clockdiv = 1;
2006 break;
2007 case 10:
2008 reg_w(sd, 0xa4, 0x04);
2009 reg_w(sd, 0x23, 0x1f);
2010 sd->clockdiv = 1;
2011 break;
2012 case 5:
2013 reg_w(sd, 0xa4, 0x04);
2014 reg_w(sd, 0x23, 0x1b);
2015 sd->clockdiv = 1;
2016 break;
2017 }
2018 break;
2019 case SEN_OV8610:
2020 switch (sd->frame_rate) {
2021 default: /* 15 fps */
2022 /* case 15: */
2023 reg_w(sd, 0xa4, 0x06);
2024 reg_w(sd, 0x23, 0xff);
2025 break;
2026 case 10:
2027 reg_w(sd, 0xa4, 0x06);
2028 reg_w(sd, 0x23, 0x1f);
2029 break;
2030 case 5:
2031 reg_w(sd, 0xa4, 0x06);
2032 reg_w(sd, 0x23, 0x1b);
2033 break;
2034 }
2035 break;
2036 case SEN_OV7670: /* guesses, based on 7640 */
2037 PDEBUG(D_STREAM, "Setting framerate to %d fps",
2038 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
2039 reg_w(sd, 0xa4, 0x10);
2040 switch (sd->frame_rate) {
2041 case 30:
2042 reg_w(sd, 0x23, 0xff);
2043 break;
2044 case 20:
2045 reg_w(sd, 0x23, 0x1b);
2046 break;
2047 default:
2048 /* case 15: */
2049 reg_w(sd, 0x23, 0xff);
2050 sd->clockdiv = 1;
2051 break;
2052 }
2053 break;
2054 }
2055 return 0;
2056 }
2057
2058 static int mode_init_ov_sensor_regs(struct sd *sd)
2059 {
2060 struct gspca_dev *gspca_dev;
2061 int qvga;
2062
2063 gspca_dev = &sd->gspca_dev;
2064 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
2065
2066 /******** Mode (VGA/QVGA) and sensor specific regs ********/
2067 switch (sd->sensor) {
2068 case SEN_OV8610:
2069 /* For OV8610 qvga means qsvga */
2070 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
2071 break;
2072 case SEN_OV7610:
2073 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2074 break;
2075 case SEN_OV7620:
2076 /* i2c_w(sd, 0x2b, 0x00); */
2077 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2078 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
2079 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
2080 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
2081 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
2082 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
2083 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
2084 break;
2085 case SEN_OV76BE:
2086 /* i2c_w(sd, 0x2b, 0x00); */
2087 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2088 break;
2089 case SEN_OV7640:
2090 /* i2c_w(sd, 0x2b, 0x00); */
2091 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2092 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
2093 /* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */
2094 /* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */
2095 /* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */
2096 /* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */
2097 /* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */
2098 break;
2099 case SEN_OV7670:
2100 /* set COM7_FMT_VGA or COM7_FMT_QVGA
2101 * do we need to set anything else?
2102 * HSTART etc are set in set_ov_sensor_window itself */
2103 i2c_w_mask(sd, OV7670_REG_COM7,
2104 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
2105 OV7670_COM7_FMT_MASK);
2106 break;
2107 case SEN_OV6620:
2108 case SEN_OV6630:
2109 case SEN_OV66308AF:
2110 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
2111 break;
2112 default:
2113 return -EINVAL;
2114 }
2115
2116 /******** Palette-specific regs ********/
2117 if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
2118 /* not valid on the OV6620/OV7620/6630? */
2119 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
2120 }
2121
2122 /* The OV518 needs special treatment. Although both the OV518
2123 * and the OV6630 support a 16-bit video bus, only the 8 bit Y
2124 * bus is actually used. The UV bus is tied to ground.
2125 * Therefore, the OV6630 needs to be in 8-bit multiplexed
2126 * output mode */
2127
2128 /* OV7640 is 8-bit only */
2129
2130 if (sd->sensor != SEN_OV6630 && sd->sensor != SEN_OV66308AF &&
2131 sd->sensor != SEN_OV7640)
2132 i2c_w_mask(sd, 0x13, 0x00, 0x20);
2133
2134 /******** Clock programming ********/
2135 /* The OV6620 needs special handling. This prevents the
2136 * severe banding that normally occurs */
2137 if (sd->sensor == SEN_OV6620) {
2138
2139 /* Clock down */
2140 i2c_w(sd, 0x2a, 0x04);
2141 i2c_w(sd, 0x11, sd->clockdiv);
2142 i2c_w(sd, 0x2a, 0x84);
2143 /* This next setting is critical. It seems to improve
2144 * the gain or the contrast. The "reserved" bits seem
2145 * to have some effect in this case. */
2146 i2c_w(sd, 0x2d, 0x85);
2147 } else {
2148 i2c_w(sd, 0x11, sd->clockdiv);
2149 }
2150
2151 /******** Special Features ********/
2152 /* no evidence this is possible with OV7670, either */
2153 /* Test Pattern */
2154 if (sd->sensor != SEN_OV7640 && sd->sensor != SEN_OV7670)
2155 i2c_w_mask(sd, 0x12, 0x00, 0x02);
2156
2157 /* Enable auto white balance */
2158 if (sd->sensor == SEN_OV7670)
2159 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
2160 OV7670_COM8_AWB);
2161 else
2162 i2c_w_mask(sd, 0x12, 0x04, 0x04);
2163
2164 /* This will go away as soon as ov51x_mode_init_sensor_regs() */
2165 /* is fully tested. */
2166 /* 7620/6620/6630? don't have register 0x35, so play it safe */
2167 if (sd->sensor == SEN_OV7610 || sd->sensor == SEN_OV76BE) {
2168 if (!qvga)
2169 i2c_w(sd, 0x35, 0x9e);
2170 else
2171 i2c_w(sd, 0x35, 0x1e);
2172 }
2173 return 0;
2174 }
2175
2176 static void sethvflip(struct sd *sd)
2177 {
2178 if (sd->sensor != SEN_OV7670)
2179 return;
2180 if (sd->gspca_dev.streaming)
2181 ov51x_stop(sd);
2182 i2c_w_mask(sd, OV7670_REG_MVFP,
2183 OV7670_MVFP_MIRROR * sd->hflip
2184 | OV7670_MVFP_VFLIP * sd->vflip,
2185 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
2186 if (sd->gspca_dev.streaming)
2187 ov51x_restart(sd);
2188 }
2189
2190 static int set_ov_sensor_window(struct sd *sd)
2191 {
2192 struct gspca_dev *gspca_dev;
2193 int qvga, crop;
2194 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
2195 int ret, hstart, hstop, vstop, vstart;
2196 __u8 v;
2197
2198 gspca_dev = &sd->gspca_dev;
2199 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
2200 crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2;
2201
2202 /* The different sensor ICs handle setting up of window differently.
2203 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
2204 switch (sd->sensor) {
2205 case SEN_OV8610:
2206 hwsbase = 0x1e;
2207 hwebase = 0x1e;
2208 vwsbase = 0x02;
2209 vwebase = 0x02;
2210 break;
2211 case SEN_OV7610:
2212 case SEN_OV76BE:
2213 hwsbase = 0x38;
2214 hwebase = 0x3a;
2215 vwsbase = vwebase = 0x05;
2216 break;
2217 case SEN_OV6620:
2218 case SEN_OV6630:
2219 case SEN_OV66308AF:
2220 hwsbase = 0x38;
2221 hwebase = 0x3a;
2222 vwsbase = 0x05;
2223 vwebase = 0x06;
2224 if (sd->sensor == SEN_OV66308AF && qvga)
2225 /* HDG: this fixes U and V getting swapped */
2226 hwsbase++;
2227 if (crop) {
2228 hwsbase += 8;
2229 hwebase += 8;
2230 vwsbase += 11;
2231 vwebase += 11;
2232 }
2233 break;
2234 case SEN_OV7620:
2235 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
2236 hwebase = 0x2f;
2237 vwsbase = vwebase = 0x05;
2238 break;
2239 case SEN_OV7640:
2240 hwsbase = 0x1a;
2241 hwebase = 0x1a;
2242 vwsbase = vwebase = 0x03;
2243 break;
2244 case SEN_OV7670:
2245 /*handling of OV7670 hardware sensor start and stop values
2246 * is very odd, compared to the other OV sensors */
2247 vwsbase = vwebase = hwebase = hwsbase = 0x00;
2248 break;
2249 default:
2250 return -EINVAL;
2251 }
2252
2253 switch (sd->sensor) {
2254 case SEN_OV6620:
2255 case SEN_OV6630:
2256 case SEN_OV66308AF:
2257 if (qvga) { /* QCIF */
2258 hwscale = 0;
2259 vwscale = 0;
2260 } else { /* CIF */
2261 hwscale = 1;
2262 vwscale = 1; /* The datasheet says 0;
2263 * it's wrong */
2264 }
2265 break;
2266 case SEN_OV8610:
2267 if (qvga) { /* QSVGA */
2268 hwscale = 1;
2269 vwscale = 1;
2270 } else { /* SVGA */
2271 hwscale = 2;
2272 vwscale = 2;
2273 }
2274 break;
2275 default: /* SEN_OV7xx0 */
2276 if (qvga) { /* QVGA */
2277 hwscale = 1;
2278 vwscale = 0;
2279 } else { /* VGA */
2280 hwscale = 2;
2281 vwscale = 1;
2282 }
2283 }
2284
2285 ret = mode_init_ov_sensor_regs(sd);
2286 if (ret < 0)
2287 return ret;
2288
2289 if (sd->sensor == SEN_OV8610) {
2290 i2c_w_mask(sd, 0x2d, 0x05, 0x40);
2291 /* old 0x95, new 0x05 from windrv 090403 */
2292 /* bits 5-7: reserved */
2293 i2c_w_mask(sd, 0x28, 0x20, 0x20);
2294 /* bit 5: progressive mode on */
2295 }
2296
2297 /* The below is wrong for OV7670s because their window registers
2298 * only store the high bits in 0x17 to 0x1a */
2299
2300 /* SRH Use sd->max values instead of requested win values */
2301 /* SCS Since we're sticking with only the max hardware widths
2302 * for a given mode */
2303 /* I can hard code this for OV7670s */
2304 /* Yes, these numbers do look odd, but they're tested and work! */
2305 if (sd->sensor == SEN_OV7670) {
2306 if (qvga) { /* QVGA from ov7670.c by
2307 * Jonathan Corbet */
2308 hstart = 164;
2309 hstop = 20;
2310 vstart = 14;
2311 vstop = 494;
2312 } else { /* VGA */
2313 hstart = 158;
2314 hstop = 14;
2315 vstart = 10;
2316 vstop = 490;
2317 }
2318 /* OV7670 hardware window registers are split across
2319 * multiple locations */
2320 i2c_w(sd, OV7670_REG_HSTART, hstart >> 3);
2321 i2c_w(sd, OV7670_REG_HSTOP, hstop >> 3);
2322 v = i2c_r(sd, OV7670_REG_HREF);
2323 v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x07);
2324 msleep(10); /* need to sleep between read and write to
2325 * same reg! */
2326 i2c_w(sd, OV7670_REG_HREF, v);
2327
2328 i2c_w(sd, OV7670_REG_VSTART, vstart >> 2);
2329 i2c_w(sd, OV7670_REG_VSTOP, vstop >> 2);
2330 v = i2c_r(sd, OV7670_REG_VREF);
2331 v = (v & 0xc0) | ((vstop & 0x3) << 2) | (vstart & 0x03);
2332 msleep(10); /* need to sleep between read and write to
2333 * same reg! */
2334 i2c_w(sd, OV7670_REG_VREF, v);
2335 } else {
2336 i2c_w(sd, 0x17, hwsbase);
2337 i2c_w(sd, 0x18, hwebase + (sd->gspca_dev.width >> hwscale));
2338 i2c_w(sd, 0x19, vwsbase);
2339 i2c_w(sd, 0x1a, vwebase + (sd->gspca_dev.height >> vwscale));
2340 }
2341 return 0;
2342 }
2343
2344 /* -- start the camera -- */
2345 static int sd_start(struct gspca_dev *gspca_dev)
2346 {
2347 struct sd *sd = (struct sd *) gspca_dev;
2348 int ret = 0;
2349
2350 switch (sd->bridge) {
2351 case BRIDGE_OV518:
2352 case BRIDGE_OV518PLUS:
2353 ret = ov518_mode_init_regs(sd);
2354 break;
2355 case BRIDGE_OV519:
2356 ret = ov519_mode_init_regs(sd);
2357 break;
2358 }
2359 if (ret < 0)
2360 goto out;
2361
2362 ret = set_ov_sensor_window(sd);
2363 if (ret < 0)
2364 goto out;
2365
2366 setcontrast(gspca_dev);
2367 setbrightness(gspca_dev);
2368 setcolors(gspca_dev);
2369 sethvflip(sd);
2370 setautobrightness(sd);
2371 setfreq(sd);
2372
2373 ret = ov51x_restart(sd);
2374 if (ret < 0)
2375 goto out;
2376 ov51x_led_control(sd, 1);
2377 return 0;
2378 out:
2379 PDEBUG(D_ERR, "camera start error:%d", ret);
2380 return ret;
2381 }
2382
2383 static void sd_stopN(struct gspca_dev *gspca_dev)
2384 {
2385 struct sd *sd = (struct sd *) gspca_dev;
2386
2387 ov51x_stop(sd);
2388 ov51x_led_control(sd, 0);
2389 }
2390
2391 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
2392 struct gspca_frame *frame, /* target */
2393 __u8 *data, /* isoc packet */
2394 int len) /* iso packet length */
2395 {
2396 struct sd *sd = (struct sd *) gspca_dev;
2397
2398 /* A false positive here is likely, until OVT gives me
2399 * the definitive SOF/EOF format */
2400 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
2401 gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0);
2402 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0);
2403 sd->packet_nr = 0;
2404 }
2405
2406 if (gspca_dev->last_packet_type == DISCARD_PACKET)
2407 return;
2408
2409 /* Does this device use packet numbers ? */
2410 if (len & 7) {
2411 len--;
2412 if (sd->packet_nr == data[len])
2413 sd->packet_nr++;
2414 /* The last few packets of the frame (which are all 0's
2415 except that they may contain part of the footer), are
2416 numbered 0 */
2417 else if (sd->packet_nr == 0 || data[len]) {
2418 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
2419 (int)data[len], (int)sd->packet_nr);
2420 gspca_dev->last_packet_type = DISCARD_PACKET;
2421 return;
2422 }
2423 }
2424
2425 /* intermediate packet */
2426 gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len);
2427 }
2428
2429 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
2430 struct gspca_frame *frame, /* target */
2431 __u8 *data, /* isoc packet */
2432 int len) /* iso packet length */
2433 {
2434 /* Header of ov519 is 16 bytes:
2435 * Byte Value Description
2436 * 0 0xff magic
2437 * 1 0xff magic
2438 * 2 0xff magic
2439 * 3 0xXX 0x50 = SOF, 0x51 = EOF
2440 * 9 0xXX 0x01 initial frame without data,
2441 * 0x00 standard frame with image
2442 * 14 Lo in EOF: length of image data / 8
2443 * 15 Hi
2444 */
2445
2446 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
2447 switch (data[3]) {
2448 case 0x50: /* start of frame */
2449 #define HDRSZ 16
2450 data += HDRSZ;
2451 len -= HDRSZ;
2452 #undef HDRSZ
2453 if (data[0] == 0xff || data[1] == 0xd8)
2454 gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
2455 data, len);
2456 else
2457 gspca_dev->last_packet_type = DISCARD_PACKET;
2458 return;
2459 case 0x51: /* end of frame */
2460 if (data[9] != 0)
2461 gspca_dev->last_packet_type = DISCARD_PACKET;
2462 gspca_frame_add(gspca_dev, LAST_PACKET, frame,
2463 data, 0);
2464 return;
2465 }
2466 }
2467
2468 /* intermediate packet */
2469 gspca_frame_add(gspca_dev, INTER_PACKET, frame,
2470 data, len);
2471 }
2472
2473 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
2474 struct gspca_frame *frame, /* target */
2475 __u8 *data, /* isoc packet */
2476 int len) /* iso packet length */
2477 {
2478 struct sd *sd = (struct sd *) gspca_dev;
2479
2480 switch (sd->bridge) {
2481 case BRIDGE_OV511:
2482 case BRIDGE_OV511PLUS:
2483 break;
2484 case BRIDGE_OV518:
2485 case BRIDGE_OV518PLUS:
2486 ov518_pkt_scan(gspca_dev, frame, data, len);
2487 break;
2488 case BRIDGE_OV519:
2489 ov519_pkt_scan(gspca_dev, frame, data, len);
2490 break;
2491 }
2492 }
2493
2494 /* -- management routines -- */
2495
2496 static void setbrightness(struct gspca_dev *gspca_dev)
2497 {
2498 struct sd *sd = (struct sd *) gspca_dev;
2499 int val;
2500
2501 val = sd->brightness;
2502 switch (sd->sensor) {
2503 case SEN_OV8610:
2504 case SEN_OV7610:
2505 case SEN_OV76BE:
2506 case SEN_OV6620:
2507 case SEN_OV6630:
2508 case SEN_OV66308AF:
2509 case SEN_OV7640:
2510 i2c_w(sd, OV7610_REG_BRT, val);
2511 break;
2512 case SEN_OV7620:
2513 /* 7620 doesn't like manual changes when in auto mode */
2514 if (!sd->autobrightness)
2515 i2c_w(sd, OV7610_REG_BRT, val);
2516 break;
2517 case SEN_OV7670:
2518 /*win trace
2519 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
2520 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
2521 break;
2522 }
2523 }
2524
2525 static void setcontrast(struct gspca_dev *gspca_dev)
2526 {
2527 struct sd *sd = (struct sd *) gspca_dev;
2528 int val;
2529
2530 val = sd->contrast;
2531 switch (sd->sensor) {
2532 case SEN_OV7610:
2533 case SEN_OV6620:
2534 i2c_w(sd, OV7610_REG_CNT, val);
2535 break;
2536 case SEN_OV6630:
2537 case SEN_OV66308AF:
2538 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
2539 break;
2540 case SEN_OV8610: {
2541 static const __u8 ctab[] = {
2542 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
2543 };
2544
2545 /* Use Y gamma control instead. Bit 0 enables it. */
2546 i2c_w(sd, 0x64, ctab[val >> 5]);
2547 break;
2548 }
2549 case SEN_OV7620: {
2550 static const __u8 ctab[] = {
2551 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
2552 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
2553 };
2554
2555 /* Use Y gamma control instead. Bit 0 enables it. */
2556 i2c_w(sd, 0x64, ctab[val >> 4]);
2557 break;
2558 }
2559 case SEN_OV7640:
2560 /* Use gain control instead. */
2561 i2c_w(sd, OV7610_REG_GAIN, val >> 2);
2562 break;
2563 case SEN_OV7670:
2564 /* check that this isn't just the same as ov7610 */
2565 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
2566 break;
2567 }
2568 }
2569
2570 static void setcolors(struct gspca_dev *gspca_dev)
2571 {
2572 struct sd *sd = (struct sd *) gspca_dev;
2573 int val;
2574
2575 val = sd->colors;
2576 switch (sd->sensor) {
2577 case SEN_OV8610:
2578 case SEN_OV7610:
2579 case SEN_OV76BE:
2580 case SEN_OV6620:
2581 case SEN_OV6630:
2582 case SEN_OV66308AF:
2583 i2c_w(sd, OV7610_REG_SAT, val);
2584 break;
2585 case SEN_OV7620:
2586 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
2587 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
2588 if (rc < 0)
2589 goto out; */
2590 i2c_w(sd, OV7610_REG_SAT, val);
2591 break;
2592 case SEN_OV7640:
2593 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
2594 break;
2595 case SEN_OV7670:
2596 /* supported later once I work out how to do it
2597 * transparently fail now! */
2598 /* set REG_COM13 values for UV sat auto mode */
2599 break;
2600 }
2601 }
2602
2603 static void setautobrightness(struct sd *sd)
2604 {
2605 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
2606 return;
2607
2608 i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10);
2609 }
2610
2611 static void setfreq(struct sd *sd)
2612 {
2613 if (sd->sensor == SEN_OV7670) {
2614 switch (sd->freq) {
2615 case 0: /* Banding filter disabled */
2616 i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
2617 break;
2618 case 1: /* 50 hz */
2619 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
2620 OV7670_COM8_BFILT);
2621 i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
2622 break;
2623 case 2: /* 60 hz */
2624 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
2625 OV7670_COM8_BFILT);
2626 i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
2627 break;
2628 case 3: /* Auto hz */
2629 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
2630 OV7670_COM8_BFILT);
2631 i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
2632 0x18);
2633 break;
2634 }
2635 } else {
2636 switch (sd->freq) {
2637 case 0: /* Banding filter disabled */
2638 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
2639 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
2640 break;
2641 case 1: /* 50 hz (filter on and framerate adj) */
2642 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
2643 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
2644 /* 20 fps -> 16.667 fps */
2645 if (sd->sensor == SEN_OV6620 ||
2646 sd->sensor == SEN_OV6630 ||
2647 sd->sensor == SEN_OV66308AF)
2648 i2c_w(sd, 0x2b, 0x5e);
2649 else
2650 i2c_w(sd, 0x2b, 0xac);
2651 break;
2652 case 2: /* 60 hz (filter on, ...) */
2653 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
2654 if (sd->sensor == SEN_OV6620 ||
2655 sd->sensor == SEN_OV6630 ||
2656 sd->sensor == SEN_OV66308AF) {
2657 /* 20 fps -> 15 fps */
2658 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
2659 i2c_w(sd, 0x2b, 0xa8);
2660 } else {
2661 /* no framerate adj. */
2662 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
2663 }
2664 break;
2665 }
2666 }
2667 }
2668
2669 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
2670 {
2671 struct sd *sd = (struct sd *) gspca_dev;
2672
2673 sd->brightness = val;
2674 if (gspca_dev->streaming)
2675 setbrightness(gspca_dev);
2676 return 0;
2677 }
2678
2679 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
2680 {
2681 struct sd *sd = (struct sd *) gspca_dev;
2682
2683 *val = sd->brightness;
2684 return 0;
2685 }
2686
2687 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
2688 {
2689 struct sd *sd = (struct sd *) gspca_dev;
2690
2691 sd->contrast = val;
2692 if (gspca_dev->streaming)
2693 setcontrast(gspca_dev);
2694 return 0;
2695 }
2696
2697 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
2698 {
2699 struct sd *sd = (struct sd *) gspca_dev;
2700
2701 *val = sd->contrast;
2702 return 0;
2703 }
2704
2705 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
2706 {
2707 struct sd *sd = (struct sd *) gspca_dev;
2708
2709 sd->colors = val;
2710 if (gspca_dev->streaming)
2711 setcolors(gspca_dev);
2712 return 0;
2713 }
2714
2715 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
2716 {
2717 struct sd *sd = (struct sd *) gspca_dev;
2718
2719 *val = sd->colors;
2720 return 0;
2721 }
2722
2723 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
2724 {
2725 struct sd *sd = (struct sd *) gspca_dev;
2726
2727 sd->hflip = val;
2728 if (gspca_dev->streaming)
2729 sethvflip(sd);
2730 return 0;
2731 }
2732
2733 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
2734 {
2735 struct sd *sd = (struct sd *) gspca_dev;
2736
2737 *val = sd->hflip;
2738 return 0;
2739 }
2740
2741 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
2742 {
2743 struct sd *sd = (struct sd *) gspca_dev;
2744
2745 sd->vflip = val;
2746 if (gspca_dev->streaming)
2747 sethvflip(sd);
2748 return 0;
2749 }
2750
2751 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
2752 {
2753 struct sd *sd = (struct sd *) gspca_dev;
2754
2755 *val = sd->vflip;
2756 return 0;
2757 }
2758
2759 static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val)
2760 {
2761 struct sd *sd = (struct sd *) gspca_dev;
2762
2763 sd->autobrightness = val;
2764 if (gspca_dev->streaming)
2765 setautobrightness(sd);
2766 return 0;
2767 }
2768
2769 static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val)
2770 {
2771 struct sd *sd = (struct sd *) gspca_dev;
2772
2773 *val = sd->autobrightness;
2774 return 0;
2775 }
2776
2777 static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
2778 {
2779 struct sd *sd = (struct sd *) gspca_dev;
2780
2781 sd->freq = val;
2782 if (gspca_dev->streaming)
2783 setfreq(sd);
2784 return 0;
2785 }
2786
2787 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
2788 {
2789 struct sd *sd = (struct sd *) gspca_dev;
2790
2791 *val = sd->freq;
2792 return 0;
2793 }
2794
2795 static int sd_querymenu(struct gspca_dev *gspca_dev,
2796 struct v4l2_querymenu *menu)
2797 {
2798 struct sd *sd = (struct sd *) gspca_dev;
2799
2800 switch (menu->id) {
2801 case V4L2_CID_POWER_LINE_FREQUENCY:
2802 switch (menu->index) {
2803 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
2804 strcpy((char *) menu->name, "NoFliker");
2805 return 0;
2806 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
2807 strcpy((char *) menu->name, "50 Hz");
2808 return 0;
2809 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
2810 strcpy((char *) menu->name, "60 Hz");
2811 return 0;
2812 case 3:
2813 if (sd->sensor != SEN_OV7670)
2814 return -EINVAL;
2815
2816 strcpy((char *) menu->name, "Automatic");
2817 return 0;
2818 }
2819 break;
2820 }
2821 return -EINVAL;
2822 }
2823
2824 /* sub-driver description */
2825 static const struct sd_desc sd_desc = {
2826 .name = MODULE_NAME,
2827 .ctrls = sd_ctrls,
2828 .nctrls = ARRAY_SIZE(sd_ctrls),
2829 .config = sd_config,
2830 .init = sd_init,
2831 .start = sd_start,
2832 .stopN = sd_stopN,
2833 .pkt_scan = sd_pkt_scan,
2834 .querymenu = sd_querymenu,
2835 };
2836
2837 /* -- module initialisation -- */
2838 static const __devinitdata struct usb_device_id device_table[] = {
2839 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
2840 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
2841 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
2842 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
2843 {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
2844 {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
2845 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
2846 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
2847 {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
2848 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
2849 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
2850 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
2851 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
2852 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
2853 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
2854 {}
2855 };
2856
2857 MODULE_DEVICE_TABLE(usb, device_table);
2858
2859 /* -- device connect -- */
2860 static int sd_probe(struct usb_interface *intf,
2861 const struct usb_device_id *id)
2862 {
2863 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
2864 THIS_MODULE);
2865 }
2866
2867 static struct usb_driver sd_driver = {
2868 .name = MODULE_NAME,
2869 .id_table = device_table,
2870 .probe = sd_probe,
2871 .disconnect = gspca_disconnect,
2872 #ifdef CONFIG_PM
2873 .suspend = gspca_suspend,
2874 .resume = gspca_resume,
2875 #endif
2876 };
2877
2878 /* -- module insert / remove -- */
2879 static int __init sd_mod_init(void)
2880 {
2881 int ret;
2882 ret = usb_register(&sd_driver);
2883 if (ret < 0)
2884 return ret;
2885 PDEBUG(D_PROBE, "registered");
2886 return 0;
2887 }
2888 static void __exit sd_mod_exit(void)
2889 {
2890 usb_deregister(&sd_driver);
2891 PDEBUG(D_PROBE, "deregistered");
2892 }
2893
2894 module_init(sd_mod_init);
2895 module_exit(sd_mod_exit);
2896
2897 module_param(frame_rate, int, 0644);
2898 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");