drivers/media/video/cx23885/cx23885.h

   1 /*
   2  *  Driver for the Conexant CX23885 PCIe bridge
   3  *
   4  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the Free Software
  19  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20  */
  21
  22 #include <linux/pci.h>
  23 #include <linux/i2c.h>
  24 #include <linux/i2c-algo-bit.h>
  25 #include <linux/kdev_t.h>
  26 #include <linux/slab.h>
  27
  28 #include <media/v4l2-device.h>
  29 #include <media/tuner.h>
  30 #include <media/tveeprom.h>
  31 #include <media/videobuf-dma-sg.h>
  32 #include <media/videobuf-dvb.h>
  33 #include <media/rc-core.h>
  34
  35 #include "btcx-risc.h"
  36 #include "cx23885-reg.h"
  37 #include "media/cx2341x.h"
  38
  39 #include <linux/mutex.h>
  40
  41 #define CX23885_VERSION "0.0.3"
  42
  43 #define UNSET (-1U)
  44
  45 #define CX23885_MAXBOARDS 8
  46
  47 /* Max number of inputs by card */
  48 #define MAX_CX23885_INPUT 8
  49 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
  50 #define RESOURCE_OVERLAY       1
  51 #define RESOURCE_VIDEO         2
  52 #define RESOURCE_VBI           4
  53
  54 #define BUFFER_TIMEOUT     (HZ)  /* 0.5 seconds */
  55
  56 #define CX23885_BOARD_NOAUTO               UNSET
  57 #define CX23885_BOARD_UNKNOWN                  0
  58 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp      1
  59 #define CX23885_BOARD_HAUPPAUGE_HVR1800        2
  60 #define CX23885_BOARD_HAUPPAUGE_HVR1250        3
  61 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP   4
  62 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q       5
  63 #define CX23885_BOARD_HAUPPAUGE_HVR1500        6
  64 #define CX23885_BOARD_HAUPPAUGE_HVR1200        7
  65 #define CX23885_BOARD_HAUPPAUGE_HVR1700        8
  66 #define CX23885_BOARD_HAUPPAUGE_HVR1400        9
  67 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
  68 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
  69 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
  70 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F   13
  71 #define CX23885_BOARD_TBS_6920                 14
  72 #define CX23885_BOARD_TEVII_S470               15
  73 #define CX23885_BOARD_DVBWORLD_2005            16
  74 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI      17
  75 #define CX23885_BOARD_HAUPPAUGE_HVR1270        18
  76 #define CX23885_BOARD_HAUPPAUGE_HVR1275        19
  77 #define CX23885_BOARD_HAUPPAUGE_HVR1255        20
  78 #define CX23885_BOARD_HAUPPAUGE_HVR1210        21
  79 #define CX23885_BOARD_MYGICA_X8506             22
  80 #define CX23885_BOARD_MAGICPRO_PROHDTVE2       23
  81 #define CX23885_BOARD_HAUPPAUGE_HVR1850        24
  82 #define CX23885_BOARD_COMPRO_VIDEOMATE_E800    25
  83 #define CX23885_BOARD_HAUPPAUGE_HVR1290        26
  84 #define CX23885_BOARD_MYGICA_X8558PRO          27
  85 #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
  86 #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID     29
  87 #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
  88
  89 #define GPIO_0 0x00000001
  90 #define GPIO_1 0x00000002
  91 #define GPIO_2 0x00000004
  92 #define GPIO_3 0x00000008
  93 #define GPIO_4 0x00000010
  94 #define GPIO_5 0x00000020
  95 #define GPIO_6 0x00000040
  96 #define GPIO_7 0x00000080
  97 #define GPIO_8 0x00000100
  98 #define GPIO_9 0x00000200
  99 #define GPIO_10 0x00000400
 100 #define GPIO_11 0x00000800
 101 #define GPIO_12 0x00001000
 102 #define GPIO_13 0x00002000
 103 #define GPIO_14 0x00004000
 104 #define GPIO_15 0x00008000
 105
 106 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
 107 #define CX23885_NORMS (\
 108         V4L2_STD_NTSC_M |  V4L2_STD_NTSC_M_JP |  V4L2_STD_NTSC_443 | \
 109         V4L2_STD_PAL_BG |  V4L2_STD_PAL_DK    |  V4L2_STD_PAL_I    | \
 110         V4L2_STD_PAL_M  |  V4L2_STD_PAL_N     |  V4L2_STD_PAL_Nc   | \
 111         V4L2_STD_PAL_60 |  V4L2_STD_SECAM_L   |  V4L2_STD_SECAM_DK)
 112
 113 struct cx23885_fmt {
 114         char  *name;
 115         u32   fourcc;          /* v4l2 format id */
 116         int   depth;
 117         int   flags;
 118         u32   cxformat;
 119 };
 120
 121 struct cx23885_ctrl {
 122         struct v4l2_queryctrl v;
 123         u32                   off;
 124         u32                   reg;
 125         u32                   mask;
 126         u32                   shift;
 127 };
 128
 129 struct cx23885_tvnorm {
 130         char            *name;
 131         v4l2_std_id     id;
 132         u32             cxiformat;
 133         u32             cxoformat;
 134 };
 135
 136 struct cx23885_fh {
 137         struct cx23885_dev         *dev;
 138         enum v4l2_buf_type         type;
 139         int                        radio;
 140         u32                        resources;
 141
 142         /* video overlay */
 143         struct v4l2_window         win;
 144         struct v4l2_clip           *clips;
 145         unsigned int               nclips;
 146
 147         /* video capture */
 148         struct cx23885_fmt         *fmt;
 149         unsigned int               width, height;
 150
 151         /* vbi capture */
 152         struct videobuf_queue      vidq;
 153         struct videobuf_queue      vbiq;
 154
 155         /* MPEG Encoder specifics ONLY */
 156         struct videobuf_queue      mpegq;
 157         atomic_t                   v4l_reading;
 158 };
 159
 160 enum cx23885_itype {
 161         CX23885_VMUX_COMPOSITE1 = 1,
 162         CX23885_VMUX_COMPOSITE2,
 163         CX23885_VMUX_COMPOSITE3,
 164         CX23885_VMUX_COMPOSITE4,
 165         CX23885_VMUX_SVIDEO,
 166         CX23885_VMUX_COMPONENT,
 167         CX23885_VMUX_TELEVISION,
 168         CX23885_VMUX_CABLE,
 169         CX23885_VMUX_DVB,
 170         CX23885_VMUX_DEBUG,
 171         CX23885_RADIO,
 172 };
 173
 174 enum cx23885_src_sel_type {
 175         CX23885_SRC_SEL_EXT_656_VIDEO = 0,
 176         CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
 177 };
 178
 179 /* buffer for one video frame */
 180 struct cx23885_buffer {
 181         /* common v4l buffer stuff -- must be first */
 182         struct videobuf_buffer vb;
 183
 184         /* cx23885 specific */
 185         unsigned int           bpl;
 186         struct btcx_riscmem    risc;
 187         struct cx23885_fmt     *fmt;
 188         u32                    count;
 189 };
 190
 191 struct cx23885_input {
 192         enum cx23885_itype type;
 193         unsigned int    vmux;
 194         u32             gpio0, gpio1, gpio2, gpio3;
 195 };
 196
 197 typedef enum {
 198         CX23885_MPEG_UNDEFINED = 0,
 199         CX23885_MPEG_DVB,
 200         CX23885_ANALOG_VIDEO,
 201         CX23885_MPEG_ENCODER,
 202 } port_t;
 203
 204 struct cx23885_board {
 205         char                    *name;
 206         port_t                  porta, portb, portc;
 207         int             num_fds_portb, num_fds_portc;
 208         unsigned int            tuner_type;
 209         unsigned int            radio_type;
 210         unsigned char           tuner_addr;
 211         unsigned char           radio_addr;
 212         unsigned int            tuner_bus;
 213
 214         /* Vendors can and do run the PCIe bridge at different
 215          * clock rates, driven physically by crystals on the PCBs.
 216          * The core has to accommodate this. This allows the user
 217          * to add new boards with new frequencys. The value is
 218          * expressed in Hz.
 219          *
 220          * The core framework will default this value based on
 221          * current designs, but it can vary.
 222          */
 223         u32                     clk_freq;
 224         struct cx23885_input    input[MAX_CX23885_INPUT];
 225         int                     ci_type; /* for NetUP */
 226 };
 227
 228 struct cx23885_subid {
 229         u16     subvendor;
 230         u16     subdevice;
 231         u32     card;
 232 };
 233
 234 struct cx23885_i2c {
 235         struct cx23885_dev *dev;
 236
 237         int                        nr;
 238
 239         /* i2c i/o */
 240         struct i2c_adapter         i2c_adap;
 241         struct i2c_algo_bit_data   i2c_algo;
 242         struct i2c_client          i2c_client;
 243         u32                        i2c_rc;
 244
 245         /* 885 registers used for raw addess */
 246         u32                        i2c_period;
 247         u32                        reg_ctrl;
 248         u32                        reg_stat;
 249         u32                        reg_addr;
 250         u32                        reg_rdata;
 251         u32                        reg_wdata;
 252 };
 253
 254 struct cx23885_dmaqueue {
 255         struct list_head       active;
 256         struct list_head       queued;
 257         struct timer_list      timeout;
 258         struct btcx_riscmem    stopper;
 259         u32                    count;
 260 };
 261
 262 struct cx23885_tsport {
 263         struct cx23885_dev *dev;
 264
 265         int                        nr;
 266         int                        sram_chno;
 267
 268         struct videobuf_dvb_frontends frontends;
 269
 270         /* dma queues */
 271         struct cx23885_dmaqueue    mpegq;
 272         u32                        ts_packet_size;
 273         u32                        ts_packet_count;
 274
 275         int                        width;
 276         int                        height;
 277
 278         spinlock_t                 slock;
 279
 280         /* registers */
 281         u32                        reg_gpcnt;
 282         u32                        reg_gpcnt_ctl;
 283         u32                        reg_dma_ctl;
 284         u32                        reg_lngth;
 285         u32                        reg_hw_sop_ctrl;
 286         u32                        reg_gen_ctrl;
 287         u32                        reg_bd_pkt_status;
 288         u32                        reg_sop_status;
 289         u32                        reg_fifo_ovfl_stat;
 290         u32                        reg_vld_misc;
 291         u32                        reg_ts_clk_en;
 292         u32                        reg_ts_int_msk;
 293         u32                        reg_ts_int_stat;
 294         u32                        reg_src_sel;
 295
 296         /* Default register vals */
 297         int                        pci_irqmask;
 298         u32                        dma_ctl_val;
 299         u32                        ts_int_msk_val;
 300         u32                        gen_ctrl_val;
 301         u32                        ts_clk_en_val;
 302         u32                        src_sel_val;
 303         u32                        vld_misc_val;
 304         u32                        hw_sop_ctrl_val;
 305
 306         /* Allow a single tsport to have multiple frontends */
 307         u32                        num_frontends;
 308         void                (*gate_ctrl)(struct cx23885_tsport *port, int open);
 309         void                       *port_priv;
 310 };
 311
 312 struct cx23885_kernel_ir {
 313         struct cx23885_dev      *cx;
 314         char                    *name;
 315         char                    *phys;
 316
 317         struct rc_dev           *rc;
 318 };
 319
 320 struct cx23885_dev {
 321         atomic_t                   refcount;
 322         struct v4l2_device         v4l2_dev;
 323
 324         /* pci stuff */
 325         struct pci_dev             *pci;
 326         unsigned char              pci_rev, pci_lat;
 327         int                        pci_bus, pci_slot;
 328         u32                        __iomem *lmmio;
 329         u8                         __iomem *bmmio;
 330         int                        pci_irqmask;
 331         spinlock_t                 pci_irqmask_lock; /* protects mask reg too */
 332         int                        hwrevision;
 333
 334         /* This valud is board specific and is used to configure the
 335          * AV core so we see nice clean and stable video and audio. */
 336         u32                        clk_freq;
 337
 338         /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
 339         struct cx23885_i2c         i2c_bus[3];
 340
 341         int                        nr;
 342         struct mutex               lock;
 343         struct mutex               gpio_lock;
 344
 345         /* board details */
 346         unsigned int               board;
 347         char                       name[32];
 348
 349         struct cx23885_tsport      ts1, ts2;
 350
 351         /* sram configuration */
 352         struct sram_channel        *sram_channels;
 353
 354         enum {
 355                 CX23885_BRIDGE_UNDEFINED = 0,
 356                 CX23885_BRIDGE_885 = 885,
 357                 CX23885_BRIDGE_887 = 887,
 358                 CX23885_BRIDGE_888 = 888,
 359         } bridge;
 360
 361         /* Analog video */
 362         u32                        resources;
 363         unsigned int               input;
 364         u32                        tvaudio;
 365         v4l2_std_id                tvnorm;
 366         unsigned int               tuner_type;
 367         unsigned char              tuner_addr;
 368         unsigned int               tuner_bus;
 369         unsigned int               radio_type;
 370         unsigned char              radio_addr;
 371         unsigned int               has_radio;
 372         struct v4l2_subdev         *sd_cx25840;
 373         struct work_struct         cx25840_work;
 374
 375         /* Infrared */
 376         struct v4l2_subdev         *sd_ir;
 377         struct work_struct         ir_rx_work;
 378         unsigned long              ir_rx_notifications;
 379         struct work_struct         ir_tx_work;
 380         unsigned long              ir_tx_notifications;
 381
 382         struct cx23885_kernel_ir   *kernel_ir;
 383         atomic_t                   ir_input_stopping;
 384
 385         /* V4l */
 386         u32                        freq;
 387         struct video_device        *video_dev;
 388         struct video_device        *vbi_dev;
 389         struct video_device        *radio_dev;
 390
 391         struct cx23885_dmaqueue    vidq;
 392         struct cx23885_dmaqueue    vbiq;
 393         spinlock_t                 slock;
 394
 395         /* MPEG Encoder ONLY settings */
 396         u32                        cx23417_mailbox;
 397         struct cx2341x_mpeg_params mpeg_params;
 398         struct video_device        *v4l_device;
 399         atomic_t                   v4l_reader_count;
 400         struct cx23885_tvnorm      encodernorm;
 401
 402 };
 403
 404 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
 405 {
 406         return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
 407 }
 408
 409 #define call_all(dev, o, f, args...) \
 410         v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
 411
 412 #define CX23885_HW_888_IR  (1 << 0)
 413 #define CX23885_HW_AV_CORE (1 << 1)
 414
 415 #define call_hw(dev, grpid, o, f, args...) \
 416         v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
 417
 418 extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
 419
 420 #define SRAM_CH01  0 /* Video A */
 421 #define SRAM_CH02  1 /* VBI A */
 422 #define SRAM_CH03  2 /* Video B */
 423 #define SRAM_CH04  3 /* Transport via B */
 424 #define SRAM_CH05  4 /* VBI B */
 425 #define SRAM_CH06  5 /* Video C */
 426 #define SRAM_CH07  6 /* Transport via C */
 427 #define SRAM_CH08  7 /* Audio Internal A */
 428 #define SRAM_CH09  8 /* Audio Internal B */
 429 #define SRAM_CH10  9 /* Audio External */
 430 #define SRAM_CH11 10 /* COMB_3D_N */
 431 #define SRAM_CH12 11 /* Comb 3D N1 */
 432 #define SRAM_CH13 12 /* Comb 3D N2 */
 433 #define SRAM_CH14 13 /* MOE Vid */
 434 #define SRAM_CH15 14 /* MOE RSLT */
 435
 436 struct sram_channel {
 437         char *name;
 438         u32  cmds_start;
 439         u32  ctrl_start;
 440         u32  cdt;
 441         u32  fifo_start;
 442         u32  fifo_size;
 443         u32  ptr1_reg;
 444         u32  ptr2_reg;
 445         u32  cnt1_reg;
 446         u32  cnt2_reg;
 447         u32  jumponly;
 448 };
 449
 450 /* ----------------------------------------------------------- */
 451
 452 #define cx_read(reg)             readl(dev->lmmio + ((reg)>>2))
 453 #define cx_write(reg, value)     writel((value), dev->lmmio + ((reg)>>2))
 454
 455 #define cx_andor(reg, mask, value) \
 456   writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
 457   ((value) & (mask)), dev->lmmio+((reg)>>2))
 458
 459 #define cx_set(reg, bit)          cx_andor((reg), (bit), (bit))
 460 #define cx_clear(reg, bit)        cx_andor((reg), (bit), 0)
 461
 462 /* ----------------------------------------------------------- */
 463 /* cx23885-core.c                                              */
 464
 465 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
 466         struct sram_channel *ch,
 467         unsigned int bpl, u32 risc);
 468
 469 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
 470         struct sram_channel *ch);
 471
 472 extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
 473         u32 reg, u32 mask, u32 value);
 474
 475 extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
 476         struct scatterlist *sglist,
 477         unsigned int top_offset, unsigned int bottom_offset,
 478         unsigned int bpl, unsigned int padding, unsigned int lines);
 479
 480 void cx23885_cancel_buffers(struct cx23885_tsport *port);
 481
 482 extern int cx23885_restart_queue(struct cx23885_tsport *port,
 483                                 struct cx23885_dmaqueue *q);
 484
 485 extern void cx23885_wakeup(struct cx23885_tsport *port,
 486                            struct cx23885_dmaqueue *q, u32 count);
 487
 488 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
 489 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
 490 extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
 491 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
 492         int asoutput);
 493
 494 extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
 495 extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
 496 extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
 497 extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
 498
 499 /* ----------------------------------------------------------- */
 500 /* cx23885-cards.c                                             */
 501 extern struct cx23885_board cx23885_boards[];
 502 extern const unsigned int cx23885_bcount;
 503
 504 extern struct cx23885_subid cx23885_subids[];
 505 extern const unsigned int cx23885_idcount;
 506
 507 extern int cx23885_tuner_callback(void *priv, int component,
 508         int command, int arg);
 509 extern void cx23885_card_list(struct cx23885_dev *dev);
 510 extern int  cx23885_ir_init(struct cx23885_dev *dev);
 511 extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
 512 extern void cx23885_ir_fini(struct cx23885_dev *dev);
 513 extern void cx23885_gpio_setup(struct cx23885_dev *dev);
 514 extern void cx23885_card_setup(struct cx23885_dev *dev);
 515 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
 516
 517 extern int cx23885_dvb_register(struct cx23885_tsport *port);
 518 extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
 519
 520 extern int cx23885_buf_prepare(struct videobuf_queue *q,
 521                                struct cx23885_tsport *port,
 522                                struct cx23885_buffer *buf,
 523                                enum v4l2_field field);
 524 extern void cx23885_buf_queue(struct cx23885_tsport *port,
 525                               struct cx23885_buffer *buf);
 526 extern void cx23885_free_buffer(struct videobuf_queue *q,
 527                                 struct cx23885_buffer *buf);
 528
 529 /* ----------------------------------------------------------- */
 530 /* cx23885-video.c                                             */
 531 /* Video */
 532 extern int cx23885_video_register(struct cx23885_dev *dev);
 533 extern void cx23885_video_unregister(struct cx23885_dev *dev);
 534 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
 535
 536 /* ----------------------------------------------------------- */
 537 /* cx23885-vbi.c                                               */
 538 extern int cx23885_vbi_fmt(struct file *file, void *priv,
 539         struct v4l2_format *f);
 540 extern void cx23885_vbi_timeout(unsigned long data);
 541 extern struct videobuf_queue_ops cx23885_vbi_qops;
 542
 543 /* cx23885-i2c.c                                                */
 544 extern int cx23885_i2c_register(struct cx23885_i2c *bus);
 545 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
 546 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
 547
 548 /* ----------------------------------------------------------- */
 549 /* cx23885-417.c                                               */
 550 extern int cx23885_417_register(struct cx23885_dev *dev);
 551 extern void cx23885_417_unregister(struct cx23885_dev *dev);
 552 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
 553 extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
 554 extern void cx23885_mc417_init(struct cx23885_dev *dev);
 555 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
 556 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
 557 extern int mc417_register_read(struct cx23885_dev *dev,
 558                                 u16 address, u32 *value);
 559 extern int mc417_register_write(struct cx23885_dev *dev,
 560                                 u16 address, u32 value);
 561 extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
 562 extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
 563 extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
 564
 565
 566 /* ----------------------------------------------------------- */
 567 /* tv norms                                                    */
 568
 569 static inline unsigned int norm_maxw(v4l2_std_id norm)
 570 {
 571         return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
 572 }
 573
 574 static inline unsigned int norm_maxh(v4l2_std_id norm)
 575 {
 576         return (norm & V4L2_STD_625_50) ? 576 : 480;
 577 }
 578
 579 static inline unsigned int norm_swidth(v4l2_std_id norm)
 580 {
 581         return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
 582 }