2 * The Marvell camera core. This device appears in a number of settings,
3 * so it needs platform-specific support outside of the core.
5 * Copyright 2011 Jonathan Corbet corbet@lwn.net
7 #include <linux/kernel.h>
8 #include <linux/module.h>
11 #include <linux/i2c.h>
12 #include <linux/interrupt.h>
13 #include <linux/spinlock.h>
14 #include <linux/slab.h>
15 #include <linux/device.h>
16 #include <linux/wait.h>
17 #include <linux/list.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/delay.h>
20 #include <linux/vmalloc.h>
22 #include <linux/videodev2.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-ioctl.h>
25 #include <media/v4l2-ctrls.h>
26 #include <media/v4l2-chip-ident.h>
27 #include <media/ov7670.h>
28 #include <media/videobuf2-vmalloc.h>
29 #include <media/videobuf2-dma-contig.h>
30 #include <media/videobuf2-dma-sg.h>
32 #include "mcam-core.h"
34 #ifdef MCAM_MODE_VMALLOC
36 * Internal DMA buffer management. Since the controller cannot do S/G I/O,
37 * we must have physically contiguous buffers to bring frames into.
38 * These parameters control how many buffers we use, whether we
39 * allocate them at load time (better chance of success, but nails down
40 * memory) or when somebody tries to use the camera (riskier), and,
41 * for load-time allocation, how big they should be.
43 * The controller can cycle through three buffers. We could use
44 * more by flipping pointers around, but it probably makes little
48 static bool alloc_bufs_at_read
;
49 module_param(alloc_bufs_at_read
, bool, 0444);
50 MODULE_PARM_DESC(alloc_bufs_at_read
,
51 "Non-zero value causes DMA buffers to be allocated when the "
52 "video capture device is read, rather than at module load "
53 "time. This saves memory, but decreases the chances of "
54 "successfully getting those buffers. This parameter is "
55 "only used in the vmalloc buffer mode");
57 static int n_dma_bufs
= 3;
58 module_param(n_dma_bufs
, uint
, 0644);
59 MODULE_PARM_DESC(n_dma_bufs
,
60 "The number of DMA buffers to allocate. Can be either two "
61 "(saves memory, makes timing tighter) or three.");
63 static int dma_buf_size
= VGA_WIDTH
* VGA_HEIGHT
* 2; /* Worst case */
64 module_param(dma_buf_size
, uint
, 0444);
65 MODULE_PARM_DESC(dma_buf_size
,
66 "The size of the allocated DMA buffers. If actual operating "
67 "parameters require larger buffers, an attempt to reallocate "
69 #else /* MCAM_MODE_VMALLOC */
70 static const bool alloc_bufs_at_read
= 0;
71 static const int n_dma_bufs
= 3; /* Used by S/G_PARM */
72 #endif /* MCAM_MODE_VMALLOC */
75 module_param(flip
, bool, 0444);
76 MODULE_PARM_DESC(flip
,
77 "If set, the sensor will be instructed to flip the image "
80 static int buffer_mode
= -1;
81 module_param(buffer_mode
, int, 0444);
82 MODULE_PARM_DESC(buffer_mode
,
83 "Set the buffer mode to be used; default is to go with what "
84 "the platform driver asks for. Set to 0 for vmalloc, 1 for "
88 * Status flags. Always manipulated with bit operations.
90 #define CF_BUF0_VALID 0 /* Buffers valid - first three */
91 #define CF_BUF1_VALID 1
92 #define CF_BUF2_VALID 2
93 #define CF_DMA_ACTIVE 3 /* A frame is incoming */
94 #define CF_CONFIG_NEEDED 4 /* Must configure hardware */
95 #define CF_SINGLE_BUFFER 5 /* Running with a single buffer */
96 #define CF_SG_RESTART 6 /* SG restart needed */
98 #define sensor_call(cam, o, f, args...) \
99 v4l2_subdev_call(cam->sensor, o, f, ##args)
101 static struct mcam_format_struct
{
104 int bpp
; /* Bytes per pixel */
105 enum v4l2_mbus_pixelcode mbus_code
;
108 .desc
= "YUYV 4:2:2",
109 .pixelformat
= V4L2_PIX_FMT_YUYV
,
110 .mbus_code
= V4L2_MBUS_FMT_YUYV8_2X8
,
115 .pixelformat
= V4L2_PIX_FMT_RGB444
,
116 .mbus_code
= V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE
,
121 .pixelformat
= V4L2_PIX_FMT_RGB565
,
122 .mbus_code
= V4L2_MBUS_FMT_RGB565_2X8_LE
,
126 .desc
= "Raw RGB Bayer",
127 .pixelformat
= V4L2_PIX_FMT_SBGGR8
,
128 .mbus_code
= V4L2_MBUS_FMT_SBGGR8_1X8
,
132 #define N_MCAM_FMTS ARRAY_SIZE(mcam_formats)
134 static struct mcam_format_struct
*mcam_find_format(u32 pixelformat
)
138 for (i
= 0; i
< N_MCAM_FMTS
; i
++)
139 if (mcam_formats
[i
].pixelformat
== pixelformat
)
140 return mcam_formats
+ i
;
141 /* Not found? Then return the first format. */
146 * The default format we use until somebody says otherwise.
148 static const struct v4l2_pix_format mcam_def_pix_format
= {
150 .height
= VGA_HEIGHT
,
151 .pixelformat
= V4L2_PIX_FMT_YUYV
,
152 .field
= V4L2_FIELD_NONE
,
153 .bytesperline
= VGA_WIDTH
*2,
154 .sizeimage
= VGA_WIDTH
*VGA_HEIGHT
*2,
157 static const enum v4l2_mbus_pixelcode mcam_def_mbus_code
=
158 V4L2_MBUS_FMT_YUYV8_2X8
;
162 * The two-word DMA descriptor format used by the Armada 610 and like. There
163 * Is a three-word format as well (set C1_DESC_3WORD) where the third
164 * word is a pointer to the next descriptor, but we don't use it. Two-word
165 * descriptors have to be contiguous in memory.
167 struct mcam_dma_desc
{
173 * Our buffer type for working with videobuf2. Note that the vb2
174 * developers have decreed that struct vb2_buffer must be at the
175 * beginning of this structure.
177 struct mcam_vb_buffer
{
178 struct vb2_buffer vb_buf
;
179 struct list_head queue
;
180 struct mcam_dma_desc
*dma_desc
; /* Descriptor virtual address */
181 dma_addr_t dma_desc_pa
; /* Descriptor physical address */
182 int dma_desc_nent
; /* Number of mapped descriptors */
185 static inline struct mcam_vb_buffer
*vb_to_mvb(struct vb2_buffer
*vb
)
187 return container_of(vb
, struct mcam_vb_buffer
, vb_buf
);
191 * Hand a completed buffer back to user space.
193 static void mcam_buffer_done(struct mcam_camera
*cam
, int frame
,
194 struct vb2_buffer
*vbuf
)
196 vbuf
->v4l2_buf
.bytesused
= cam
->pix_format
.sizeimage
;
197 vbuf
->v4l2_buf
.sequence
= cam
->buf_seq
[frame
];
198 vb2_set_plane_payload(vbuf
, 0, cam
->pix_format
.sizeimage
);
199 vb2_buffer_done(vbuf
, VB2_BUF_STATE_DONE
);
205 * Debugging and related.
207 #define cam_err(cam, fmt, arg...) \
208 dev_err((cam)->dev, fmt, ##arg);
209 #define cam_warn(cam, fmt, arg...) \
210 dev_warn((cam)->dev, fmt, ##arg);
211 #define cam_dbg(cam, fmt, arg...) \
212 dev_dbg((cam)->dev, fmt, ##arg);
216 * Flag manipulation helpers
218 static void mcam_reset_buffers(struct mcam_camera
*cam
)
223 for (i
= 0; i
< cam
->nbufs
; i
++)
224 clear_bit(i
, &cam
->flags
);
227 static inline int mcam_needs_config(struct mcam_camera
*cam
)
229 return test_bit(CF_CONFIG_NEEDED
, &cam
->flags
);
232 static void mcam_set_config_needed(struct mcam_camera
*cam
, int needed
)
235 set_bit(CF_CONFIG_NEEDED
, &cam
->flags
);
237 clear_bit(CF_CONFIG_NEEDED
, &cam
->flags
);
240 /* ------------------------------------------------------------------- */
242 * Make the controller start grabbing images. Everything must
243 * be set up before doing this.
245 static void mcam_ctlr_start(struct mcam_camera
*cam
)
247 /* set_bit performs a read, so no other barrier should be
249 mcam_reg_set_bit(cam
, REG_CTRL0
, C0_ENABLE
);
252 static void mcam_ctlr_stop(struct mcam_camera
*cam
)
254 mcam_reg_clear_bit(cam
, REG_CTRL0
, C0_ENABLE
);
257 /* ------------------------------------------------------------------- */
259 #ifdef MCAM_MODE_VMALLOC
261 * Code specific to the vmalloc buffer mode.
265 * Allocate in-kernel DMA buffers for vmalloc mode.
267 static int mcam_alloc_dma_bufs(struct mcam_camera
*cam
, int loadtime
)
271 mcam_set_config_needed(cam
, 1);
273 cam
->dma_buf_size
= dma_buf_size
;
275 cam
->dma_buf_size
= cam
->pix_format
.sizeimage
;
280 for (i
= 0; i
< n_dma_bufs
; i
++) {
281 cam
->dma_bufs
[i
] = dma_alloc_coherent(cam
->dev
,
282 cam
->dma_buf_size
, cam
->dma_handles
+ i
,
284 if (cam
->dma_bufs
[i
] == NULL
) {
285 cam_warn(cam
, "Failed to allocate DMA buffer\n");
291 switch (cam
->nbufs
) {
293 dma_free_coherent(cam
->dev
, cam
->dma_buf_size
,
294 cam
->dma_bufs
[0], cam
->dma_handles
[0]);
297 cam_err(cam
, "Insufficient DMA buffers, cannot operate\n");
302 cam_warn(cam
, "Will limp along with only 2 buffers\n");
308 static void mcam_free_dma_bufs(struct mcam_camera
*cam
)
312 for (i
= 0; i
< cam
->nbufs
; i
++) {
313 dma_free_coherent(cam
->dev
, cam
->dma_buf_size
,
314 cam
->dma_bufs
[i
], cam
->dma_handles
[i
]);
315 cam
->dma_bufs
[i
] = NULL
;
322 * Set up DMA buffers when operating in vmalloc mode
324 static void mcam_ctlr_dma_vmalloc(struct mcam_camera
*cam
)
327 * Store the first two Y buffers (we aren't supporting
328 * planar formats for now, so no UV bufs). Then either
329 * set the third if it exists, or tell the controller
332 mcam_reg_write(cam
, REG_Y0BAR
, cam
->dma_handles
[0]);
333 mcam_reg_write(cam
, REG_Y1BAR
, cam
->dma_handles
[1]);
334 if (cam
->nbufs
> 2) {
335 mcam_reg_write(cam
, REG_Y2BAR
, cam
->dma_handles
[2]);
336 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_TWOBUFS
);
338 mcam_reg_set_bit(cam
, REG_CTRL1
, C1_TWOBUFS
);
339 if (cam
->chip_id
== V4L2_IDENT_CAFE
)
340 mcam_reg_write(cam
, REG_UBAR
, 0); /* 32 bits only */
344 * Copy data out to user space in the vmalloc case
346 static void mcam_frame_tasklet(unsigned long data
)
348 struct mcam_camera
*cam
= (struct mcam_camera
*) data
;
351 struct mcam_vb_buffer
*buf
;
353 spin_lock_irqsave(&cam
->dev_lock
, flags
);
354 for (i
= 0; i
< cam
->nbufs
; i
++) {
355 int bufno
= cam
->next_buf
;
357 if (cam
->state
!= S_STREAMING
|| bufno
< 0)
358 break; /* I/O got stopped */
359 if (++(cam
->next_buf
) >= cam
->nbufs
)
361 if (!test_bit(bufno
, &cam
->flags
))
363 if (list_empty(&cam
->buffers
)) {
364 cam
->frame_state
.singles
++;
365 break; /* Leave it valid, hope for better later */
367 cam
->frame_state
.delivered
++;
368 clear_bit(bufno
, &cam
->flags
);
369 buf
= list_first_entry(&cam
->buffers
, struct mcam_vb_buffer
,
371 list_del_init(&buf
->queue
);
373 * Drop the lock during the big copy. This *should* be safe...
375 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
376 memcpy(vb2_plane_vaddr(&buf
->vb_buf
, 0), cam
->dma_bufs
[bufno
],
377 cam
->pix_format
.sizeimage
);
378 mcam_buffer_done(cam
, bufno
, &buf
->vb_buf
);
379 spin_lock_irqsave(&cam
->dev_lock
, flags
);
381 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
386 * Make sure our allocated buffers are up to the task.
388 static int mcam_check_dma_buffers(struct mcam_camera
*cam
)
390 if (cam
->nbufs
> 0 && cam
->dma_buf_size
< cam
->pix_format
.sizeimage
)
391 mcam_free_dma_bufs(cam
);
393 return mcam_alloc_dma_bufs(cam
, 0);
397 static void mcam_vmalloc_done(struct mcam_camera
*cam
, int frame
)
399 tasklet_schedule(&cam
->s_tasklet
);
402 #else /* MCAM_MODE_VMALLOC */
404 static inline int mcam_alloc_dma_bufs(struct mcam_camera
*cam
, int loadtime
)
409 static inline void mcam_free_dma_bufs(struct mcam_camera
*cam
)
414 static inline int mcam_check_dma_buffers(struct mcam_camera
*cam
)
421 #endif /* MCAM_MODE_VMALLOC */
424 #ifdef MCAM_MODE_DMA_CONTIG
425 /* ---------------------------------------------------------------------- */
427 * DMA-contiguous code.
430 * Set up a contiguous buffer for the given frame. Here also is where
431 * the underrun strategy is set: if there is no buffer available, reuse
432 * the buffer from the other BAR and set the CF_SINGLE_BUFFER flag to
433 * keep the interrupt handler from giving that buffer back to user
434 * space. In this way, we always have a buffer to DMA to and don't
435 * have to try to play games stopping and restarting the controller.
437 static void mcam_set_contig_buffer(struct mcam_camera
*cam
, int frame
)
439 struct mcam_vb_buffer
*buf
;
441 * If there are no available buffers, go into single mode
443 if (list_empty(&cam
->buffers
)) {
444 buf
= cam
->vb_bufs
[frame
^ 0x1];
445 cam
->vb_bufs
[frame
] = buf
;
446 mcam_reg_write(cam
, frame
== 0 ? REG_Y0BAR
: REG_Y1BAR
,
447 vb2_dma_contig_plane_dma_addr(&buf
->vb_buf
, 0));
448 set_bit(CF_SINGLE_BUFFER
, &cam
->flags
);
449 cam
->frame_state
.singles
++;
453 * OK, we have a buffer we can use.
455 buf
= list_first_entry(&cam
->buffers
, struct mcam_vb_buffer
, queue
);
456 list_del_init(&buf
->queue
);
457 mcam_reg_write(cam
, frame
== 0 ? REG_Y0BAR
: REG_Y1BAR
,
458 vb2_dma_contig_plane_dma_addr(&buf
->vb_buf
, 0));
459 cam
->vb_bufs
[frame
] = buf
;
460 clear_bit(CF_SINGLE_BUFFER
, &cam
->flags
);
464 * Initial B_DMA_contig setup.
466 static void mcam_ctlr_dma_contig(struct mcam_camera
*cam
)
468 mcam_reg_set_bit(cam
, REG_CTRL1
, C1_TWOBUFS
);
470 mcam_set_contig_buffer(cam
, 0);
471 mcam_set_contig_buffer(cam
, 1);
475 * Frame completion handling.
477 static void mcam_dma_contig_done(struct mcam_camera
*cam
, int frame
)
479 struct mcam_vb_buffer
*buf
= cam
->vb_bufs
[frame
];
481 if (!test_bit(CF_SINGLE_BUFFER
, &cam
->flags
)) {
482 cam
->frame_state
.delivered
++;
483 mcam_buffer_done(cam
, frame
, &buf
->vb_buf
);
485 mcam_set_contig_buffer(cam
, frame
);
488 #endif /* MCAM_MODE_DMA_CONTIG */
490 #ifdef MCAM_MODE_DMA_SG
491 /* ---------------------------------------------------------------------- */
493 * Scatter/gather-specific code.
497 * Set up the next buffer for S/G I/O; caller should be sure that
498 * the controller is stopped and a buffer is available.
500 static void mcam_sg_next_buffer(struct mcam_camera
*cam
)
502 struct mcam_vb_buffer
*buf
;
504 buf
= list_first_entry(&cam
->buffers
, struct mcam_vb_buffer
, queue
);
505 list_del_init(&buf
->queue
);
507 * Very Bad Not Good Things happen if you don't clear
508 * C1_DESC_ENA before making any descriptor changes.
510 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_DESC_ENA
);
511 mcam_reg_write(cam
, REG_DMA_DESC_Y
, buf
->dma_desc_pa
);
512 mcam_reg_write(cam
, REG_DESC_LEN_Y
,
513 buf
->dma_desc_nent
*sizeof(struct mcam_dma_desc
));
514 mcam_reg_write(cam
, REG_DESC_LEN_U
, 0);
515 mcam_reg_write(cam
, REG_DESC_LEN_V
, 0);
516 mcam_reg_set_bit(cam
, REG_CTRL1
, C1_DESC_ENA
);
517 cam
->vb_bufs
[0] = buf
;
521 * Initial B_DMA_sg setup
523 static void mcam_ctlr_dma_sg(struct mcam_camera
*cam
)
526 * The list-empty condition can hit us at resume time
527 * if the buffer list was empty when the system was suspended.
529 if (list_empty(&cam
->buffers
)) {
530 set_bit(CF_SG_RESTART
, &cam
->flags
);
534 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_DESC_3WORD
);
535 mcam_sg_next_buffer(cam
);
541 * Frame completion with S/G is trickier. We can't muck with
542 * a descriptor chain on the fly, since the controller buffers it
543 * internally. So we have to actually stop and restart; Marvell
544 * says this is the way to do it.
546 * Of course, stopping is easier said than done; experience shows
547 * that the controller can start a frame *after* C0_ENABLE has been
548 * cleared. So when running in S/G mode, the controller is "stopped"
549 * on receipt of the start-of-frame interrupt. That means we can
550 * safely change the DMA descriptor array here and restart things
551 * (assuming there's another buffer waiting to go).
553 static void mcam_dma_sg_done(struct mcam_camera
*cam
, int frame
)
555 struct mcam_vb_buffer
*buf
= cam
->vb_bufs
[0];
558 * If we're no longer supposed to be streaming, don't do anything.
560 if (cam
->state
!= S_STREAMING
)
563 * If we have another buffer available, put it in and
564 * restart the engine.
566 if (!list_empty(&cam
->buffers
)) {
567 mcam_sg_next_buffer(cam
);
568 mcam_ctlr_start(cam
);
570 * Otherwise set CF_SG_RESTART and the controller will
571 * be restarted once another buffer shows up.
574 set_bit(CF_SG_RESTART
, &cam
->flags
);
575 cam
->frame_state
.singles
++;
576 cam
->vb_bufs
[0] = NULL
;
579 * Now we can give the completed frame back to user space.
581 cam
->frame_state
.delivered
++;
582 mcam_buffer_done(cam
, frame
, &buf
->vb_buf
);
587 * Scatter/gather mode requires stopping the controller between
588 * frames so we can put in a new DMA descriptor array. If no new
589 * buffer exists at frame completion, the controller is left stopped;
590 * this function is charged with gettig things going again.
592 static void mcam_sg_restart(struct mcam_camera
*cam
)
594 mcam_ctlr_dma_sg(cam
);
595 mcam_ctlr_start(cam
);
596 clear_bit(CF_SG_RESTART
, &cam
->flags
);
599 #else /* MCAM_MODE_DMA_SG */
601 static inline void mcam_sg_restart(struct mcam_camera
*cam
)
606 #endif /* MCAM_MODE_DMA_SG */
608 /* ---------------------------------------------------------------------- */
610 * Buffer-mode-independent controller code.
616 static void mcam_ctlr_image(struct mcam_camera
*cam
)
619 struct v4l2_pix_format
*fmt
= &cam
->pix_format
;
621 imgsz
= ((fmt
->height
<< IMGSZ_V_SHIFT
) & IMGSZ_V_MASK
) |
622 (fmt
->bytesperline
& IMGSZ_H_MASK
);
623 mcam_reg_write(cam
, REG_IMGSIZE
, imgsz
);
624 mcam_reg_write(cam
, REG_IMGOFFSET
, 0);
625 /* YPITCH just drops the last two bits */
626 mcam_reg_write_mask(cam
, REG_IMGPITCH
, fmt
->bytesperline
,
629 * Tell the controller about the image format we are using.
631 switch (cam
->pix_format
.pixelformat
) {
632 case V4L2_PIX_FMT_YUYV
:
633 mcam_reg_write_mask(cam
, REG_CTRL0
,
634 C0_DF_YUV
|C0_YUV_PACKED
|C0_YUVE_YUYV
,
638 case V4L2_PIX_FMT_RGB444
:
639 mcam_reg_write_mask(cam
, REG_CTRL0
,
640 C0_DF_RGB
|C0_RGBF_444
|C0_RGB4_XRGB
,
645 case V4L2_PIX_FMT_RGB565
:
646 mcam_reg_write_mask(cam
, REG_CTRL0
,
647 C0_DF_RGB
|C0_RGBF_565
|C0_RGB5_BGGR
,
652 cam_err(cam
, "Unknown format %x\n", cam
->pix_format
.pixelformat
);
656 * Make sure it knows we want to use hsync/vsync.
658 mcam_reg_write_mask(cam
, REG_CTRL0
, C0_SIF_HVSYNC
,
664 * Configure the controller for operation; caller holds the
667 static int mcam_ctlr_configure(struct mcam_camera
*cam
)
671 spin_lock_irqsave(&cam
->dev_lock
, flags
);
672 clear_bit(CF_SG_RESTART
, &cam
->flags
);
674 mcam_ctlr_image(cam
);
675 mcam_set_config_needed(cam
, 0);
676 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
680 static void mcam_ctlr_irq_enable(struct mcam_camera
*cam
)
683 * Clear any pending interrupts, since we do not
684 * expect to have I/O active prior to enabling.
686 mcam_reg_write(cam
, REG_IRQSTAT
, FRAMEIRQS
);
687 mcam_reg_set_bit(cam
, REG_IRQMASK
, FRAMEIRQS
);
690 static void mcam_ctlr_irq_disable(struct mcam_camera
*cam
)
692 mcam_reg_clear_bit(cam
, REG_IRQMASK
, FRAMEIRQS
);
697 static void mcam_ctlr_init(struct mcam_camera
*cam
)
701 spin_lock_irqsave(&cam
->dev_lock
, flags
);
703 * Make sure it's not powered down.
705 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_PWRDWN
);
707 * Turn off the enable bit. It sure should be off anyway,
708 * but it's good to be sure.
710 mcam_reg_clear_bit(cam
, REG_CTRL0
, C0_ENABLE
);
712 * Clock the sensor appropriately. Controller clock should
713 * be 48MHz, sensor "typical" value is half that.
715 mcam_reg_write_mask(cam
, REG_CLKCTRL
, 2, CLK_DIV_MASK
);
716 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
721 * Stop the controller, and don't return until we're really sure that no
722 * further DMA is going on.
724 static void mcam_ctlr_stop_dma(struct mcam_camera
*cam
)
729 * Theory: stop the camera controller (whether it is operating
730 * or not). Delay briefly just in case we race with the SOF
731 * interrupt, then wait until no DMA is active.
733 spin_lock_irqsave(&cam
->dev_lock
, flags
);
734 clear_bit(CF_SG_RESTART
, &cam
->flags
);
737 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
739 * This is a brutally long sleep, but experience shows that
740 * it can take the controller a while to get the message that
741 * it needs to stop grabbing frames. In particular, we can
742 * sometimes (on mmp) get a frame at the end WITHOUT the
743 * start-of-frame indication.
746 if (test_bit(CF_DMA_ACTIVE
, &cam
->flags
))
747 cam_err(cam
, "Timeout waiting for DMA to end\n");
748 /* This would be bad news - what now? */
749 spin_lock_irqsave(&cam
->dev_lock
, flags
);
750 mcam_ctlr_irq_disable(cam
);
751 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
757 static void mcam_ctlr_power_up(struct mcam_camera
*cam
)
761 spin_lock_irqsave(&cam
->dev_lock
, flags
);
762 cam
->plat_power_up(cam
);
763 mcam_reg_clear_bit(cam
, REG_CTRL1
, C1_PWRDWN
);
764 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
765 msleep(5); /* Just to be sure */
768 static void mcam_ctlr_power_down(struct mcam_camera
*cam
)
772 spin_lock_irqsave(&cam
->dev_lock
, flags
);
774 * School of hard knocks department: be sure we do any register
775 * twiddling on the controller *before* calling the platform
776 * power down routine.
778 mcam_reg_set_bit(cam
, REG_CTRL1
, C1_PWRDWN
);
779 cam
->plat_power_down(cam
);
780 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
783 /* -------------------------------------------------------------------- */
785 * Communications with the sensor.
788 static int __mcam_cam_reset(struct mcam_camera
*cam
)
790 return sensor_call(cam
, core
, reset
, 0);
794 * We have found the sensor on the i2c. Let's try to have a
797 static int mcam_cam_init(struct mcam_camera
*cam
)
799 struct v4l2_dbg_chip_ident chip
;
802 mutex_lock(&cam
->s_mutex
);
803 if (cam
->state
!= S_NOTREADY
)
804 cam_warn(cam
, "Cam init with device in funky state %d",
806 ret
= __mcam_cam_reset(cam
);
809 chip
.ident
= V4L2_IDENT_NONE
;
810 chip
.match
.type
= V4L2_CHIP_MATCH_I2C_ADDR
;
811 chip
.match
.addr
= cam
->sensor_addr
;
812 ret
= sensor_call(cam
, core
, g_chip_ident
, &chip
);
815 cam
->sensor_type
= chip
.ident
;
816 if (cam
->sensor_type
!= V4L2_IDENT_OV7670
) {
817 cam_err(cam
, "Unsupported sensor type 0x%x", cam
->sensor_type
);
821 /* Get/set parameters? */
825 mcam_ctlr_power_down(cam
);
826 mutex_unlock(&cam
->s_mutex
);
831 * Configure the sensor to match the parameters we have. Caller should
834 static int mcam_cam_set_flip(struct mcam_camera
*cam
)
836 struct v4l2_control ctrl
;
838 memset(&ctrl
, 0, sizeof(ctrl
));
839 ctrl
.id
= V4L2_CID_VFLIP
;
841 return sensor_call(cam
, core
, s_ctrl
, &ctrl
);
845 static int mcam_cam_configure(struct mcam_camera
*cam
)
847 struct v4l2_mbus_framefmt mbus_fmt
;
850 v4l2_fill_mbus_format(&mbus_fmt
, &cam
->pix_format
, cam
->mbus_code
);
851 ret
= sensor_call(cam
, core
, init
, 0);
853 ret
= sensor_call(cam
, video
, s_mbus_fmt
, &mbus_fmt
);
855 * OV7670 does weird things if flip is set *before* format...
857 ret
+= mcam_cam_set_flip(cam
);
862 * Get everything ready, and start grabbing frames.
864 static int mcam_read_setup(struct mcam_camera
*cam
)
870 * Configuration. If we still don't have DMA buffers,
871 * make one last, desperate attempt.
873 if (cam
->buffer_mode
== B_vmalloc
&& cam
->nbufs
== 0 &&
874 mcam_alloc_dma_bufs(cam
, 0))
877 if (mcam_needs_config(cam
)) {
878 mcam_cam_configure(cam
);
879 ret
= mcam_ctlr_configure(cam
);
887 spin_lock_irqsave(&cam
->dev_lock
, flags
);
888 clear_bit(CF_DMA_ACTIVE
, &cam
->flags
);
889 mcam_reset_buffers(cam
);
890 mcam_ctlr_irq_enable(cam
);
891 cam
->state
= S_STREAMING
;
892 if (!test_bit(CF_SG_RESTART
, &cam
->flags
))
893 mcam_ctlr_start(cam
);
894 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
898 /* ----------------------------------------------------------------------- */
900 * Videobuf2 interface code.
903 static int mcam_vb_queue_setup(struct vb2_queue
*vq
,
904 const struct v4l2_format
*fmt
, unsigned int *nbufs
,
905 unsigned int *num_planes
, unsigned int sizes
[],
908 struct mcam_camera
*cam
= vb2_get_drv_priv(vq
);
909 int minbufs
= (cam
->buffer_mode
== B_DMA_contig
) ? 3 : 2;
911 sizes
[0] = cam
->pix_format
.sizeimage
;
912 *num_planes
= 1; /* Someday we have to support planar formats... */
913 if (*nbufs
< minbufs
)
915 if (cam
->buffer_mode
== B_DMA_contig
)
916 alloc_ctxs
[0] = cam
->vb_alloc_ctx
;
921 static void mcam_vb_buf_queue(struct vb2_buffer
*vb
)
923 struct mcam_vb_buffer
*mvb
= vb_to_mvb(vb
);
924 struct mcam_camera
*cam
= vb2_get_drv_priv(vb
->vb2_queue
);
928 spin_lock_irqsave(&cam
->dev_lock
, flags
);
929 start
= (cam
->state
== S_BUFWAIT
) && !list_empty(&cam
->buffers
);
930 list_add(&mvb
->queue
, &cam
->buffers
);
931 if (cam
->state
== S_STREAMING
&& test_bit(CF_SG_RESTART
, &cam
->flags
))
932 mcam_sg_restart(cam
);
933 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
935 mcam_read_setup(cam
);
940 * vb2 uses these to release the mutex when waiting in dqbuf. I'm
941 * not actually sure we need to do this (I'm not sure that vb2_dqbuf() needs
942 * to be called with the mutex held), but better safe than sorry.
944 static void mcam_vb_wait_prepare(struct vb2_queue
*vq
)
946 struct mcam_camera
*cam
= vb2_get_drv_priv(vq
);
948 mutex_unlock(&cam
->s_mutex
);
951 static void mcam_vb_wait_finish(struct vb2_queue
*vq
)
953 struct mcam_camera
*cam
= vb2_get_drv_priv(vq
);
955 mutex_lock(&cam
->s_mutex
);
959 * These need to be called with the mutex held from vb2
961 static int mcam_vb_start_streaming(struct vb2_queue
*vq
, unsigned int count
)
963 struct mcam_camera
*cam
= vb2_get_drv_priv(vq
);
965 if (cam
->state
!= S_IDLE
) {
966 INIT_LIST_HEAD(&cam
->buffers
);
971 * Videobuf2 sneakily hoards all the buffers and won't
972 * give them to us until *after* streaming starts. But
973 * we can't actually start streaming until we have a
974 * destination. So go into a wait state and hope they
975 * give us buffers soon.
977 if (cam
->buffer_mode
!= B_vmalloc
&& list_empty(&cam
->buffers
)) {
978 cam
->state
= S_BUFWAIT
;
981 return mcam_read_setup(cam
);
984 static int mcam_vb_stop_streaming(struct vb2_queue
*vq
)
986 struct mcam_camera
*cam
= vb2_get_drv_priv(vq
);
989 if (cam
->state
== S_BUFWAIT
) {
990 /* They never gave us buffers */
994 if (cam
->state
!= S_STREAMING
)
996 mcam_ctlr_stop_dma(cam
);
998 * VB2 reclaims the buffers, so we need to forget
1001 spin_lock_irqsave(&cam
->dev_lock
, flags
);
1002 INIT_LIST_HEAD(&cam
->buffers
);
1003 spin_unlock_irqrestore(&cam
->dev_lock
, flags
);
1008 static const struct vb2_ops mcam_vb2_ops
= {
1009 .queue_setup
= mcam_vb_queue_setup
,
1010 .buf_queue
= mcam_vb_buf_queue
,
1011 .start_streaming
= mcam_vb_start_streaming
,
1012 .stop_streaming
= mcam_vb_stop_streaming
,
1013 .wait_prepare
= mcam_vb_wait_prepare
,
1014 .wait_finish
= mcam_vb_wait_finish
,
1018 #ifdef MCAM_MODE_DMA_SG
1020 * Scatter/gather mode uses all of the above functions plus a
1021 * few extras to deal with DMA mapping.
1023 static int mcam_vb_sg_buf_init(struct vb2_buffer
*vb
)
1025 struct mcam_vb_buffer
*mvb
= vb_to_mvb(vb
);
1026 struct mcam_camera
*cam
= vb2_get_drv_priv(vb
->vb2_queue
);
1027 int ndesc
= cam
->pix_format
.sizeimage
/PAGE_SIZE
+ 1;
1029 mvb
->dma_desc
= dma_alloc_coherent(cam
->dev
,
1030 ndesc
* sizeof(struct mcam_dma_desc
),
1031 &mvb
->dma_desc_pa
, GFP_KERNEL
);
1032 if (mvb
->dma_desc
== NULL
) {
1033 cam_err(cam
, "Unable to get DMA descriptor array\n");
1039 static int mcam_vb_sg_buf_prepare(struct vb2_buffer
*vb
)
1041 struct mcam_vb_buffer
*mvb
= vb_to_mvb(vb
);
1042 struct mcam_camera
*cam
= vb2_get_drv_priv(vb
->vb2_queue
);
1043 struct vb2_dma_sg_desc
*sgd
= vb2_dma_sg_plane_desc(vb
, 0);
1044 struct mcam_dma_desc
*desc
= mvb
->dma_desc
;
1045 struct scatterlist
*sg
;
1048 mvb
->dma_desc_nent
= dma_map_sg(cam
->dev
, sgd
->sglist
, sgd
->num_pages
,
1050 if (mvb
->dma_desc_nent
<= 0)
1051 return -EIO
; /* Not sure what's right here */
1052 for_each_sg(sgd
->sglist
, sg
, mvb
->dma_desc_nent
, i
) {
1053 desc
->dma_addr
= sg_dma_address(sg
);
1054 desc
->segment_len
= sg_dma_len(sg
);
1060 static int mcam_vb_sg_buf_finish(struct vb2_buffer
*vb
)
1062 struct mcam_camera
*cam
= vb2_get_drv_priv(vb
->vb2_queue
);
1063 struct vb2_dma_sg_desc
*sgd
= vb2_dma_sg_plane_desc(vb
, 0);
1065 dma_unmap_sg(cam
->dev
, sgd
->sglist
, sgd
->num_pages
, DMA_FROM_DEVICE
);
1069 static void mcam_vb_sg_buf_cleanup(struct vb2_buffer
*vb
)
1071 struct mcam_camera
*cam
= vb2_get_drv_priv(vb
->vb2_queue
);
1072 struct mcam_vb_buffer
*mvb
= vb_to_mvb(vb
);
1073 int ndesc
= cam
->pix_format
.sizeimage
/PAGE_SIZE
+ 1;
1075 dma_free_coherent(cam
->dev
, ndesc
* sizeof(struct mcam_dma_desc
),
1076 mvb
->dma_desc
, mvb
->dma_desc_pa
);
1080 static const struct vb2_ops mcam_vb2_sg_ops
= {
1081 .queue_setup
= mcam_vb_queue_setup
,
1082 .buf_init
= mcam_vb_sg_buf_init
,
1083 .buf_prepare
= mcam_vb_sg_buf_prepare
,
1084 .buf_queue
= mcam_vb_buf_queue
,
1085 .buf_finish
= mcam_vb_sg_buf_finish
,
1086 .buf_cleanup
= mcam_vb_sg_buf_cleanup
,
1087 .start_streaming
= mcam_vb_start_streaming
,
1088 .stop_streaming
= mcam_vb_stop_streaming
,
1089 .wait_prepare
= mcam_vb_wait_prepare
,
1090 .wait_finish
= mcam_vb_wait_finish
,
1093 #endif /* MCAM_MODE_DMA_SG */
1095 static int mcam_setup_vb2(struct mcam_camera
*cam
)
1097 struct vb2_queue
*vq
= &cam
->vb_queue
;
1099 memset(vq
, 0, sizeof(*vq
));
1100 vq
->type
= V4L2_BUF_TYPE_VIDEO_CAPTURE
;
1102 INIT_LIST_HEAD(&cam
->buffers
);
1103 switch (cam
->buffer_mode
) {
1105 #ifdef MCAM_MODE_DMA_CONTIG
1106 vq
->ops
= &mcam_vb2_ops
;
1107 vq
->mem_ops
= &vb2_dma_contig_memops
;
1108 cam
->vb_alloc_ctx
= vb2_dma_contig_init_ctx(cam
->dev
);
1109 vq
->io_modes
= VB2_MMAP
| VB2_USERPTR
;
1110 cam
->dma_setup
= mcam_ctlr_dma_contig
;
1111 cam
->frame_complete
= mcam_dma_contig_done
;
1115 #ifdef MCAM_MODE_DMA_SG
1116 vq
->ops
= &mcam_vb2_sg_ops
;
1117 vq
->mem_ops
= &vb2_dma_sg_memops
;
1118 vq
->io_modes
= VB2_MMAP
| VB2_USERPTR
;
1119 cam
->dma_setup
= mcam_ctlr_dma_sg
;
1120 cam
->frame_complete
= mcam_dma_sg_done
;
1124 #ifdef MCAM_MODE_VMALLOC
1125 tasklet_init(&cam
->s_tasklet
, mcam_frame_tasklet
,
1126 (unsigned long) cam
);
1127 vq
->ops
= &mcam_vb2_ops
;
1128 vq
->mem_ops
= &vb2_vmalloc_memops
;
1129 vq
->buf_struct_size
= sizeof(struct mcam_vb_buffer
);
1130 vq
->io_modes
= VB2_MMAP
;
1131 cam
->dma_setup
= mcam_ctlr_dma_vmalloc
;
1132 cam
->frame_complete
= mcam_vmalloc_done
;
1136 return vb2_queue_init(vq
);
1139 static void mcam_cleanup_vb2(struct mcam_camera
*cam
)
1141 vb2_queue_release(&cam
->vb_queue
);
1142 #ifdef MCAM_MODE_DMA_CONTIG
1143 if (cam
->buffer_mode
== B_DMA_contig
)
1144 vb2_dma_contig_cleanup_ctx(cam
->vb_alloc_ctx
);
1149 /* ---------------------------------------------------------------------- */
1151 * The long list of V4L2 ioctl() operations.
1154 static int mcam_vidioc_streamon(struct file
*filp
, void *priv
,
1155 enum v4l2_buf_type type
)
1157 struct mcam_camera
*cam
= filp
->private_data
;
1160 mutex_lock(&cam
->s_mutex
);
1161 ret
= vb2_streamon(&cam
->vb_queue
, type
);
1162 mutex_unlock(&cam
->s_mutex
);
1167 static int mcam_vidioc_streamoff(struct file
*filp
, void *priv
,
1168 enum v4l2_buf_type type
)
1170 struct mcam_camera
*cam
= filp
->private_data
;
1173 mutex_lock(&cam
->s_mutex
);
1174 ret
= vb2_streamoff(&cam
->vb_queue
, type
);
1175 mutex_unlock(&cam
->s_mutex
);
1180 static int mcam_vidioc_reqbufs(struct file
*filp
, void *priv
,
1181 struct v4l2_requestbuffers
*req
)
1183 struct mcam_camera
*cam
= filp
->private_data
;
1186 mutex_lock(&cam
->s_mutex
);
1187 ret
= vb2_reqbufs(&cam
->vb_queue
, req
);
1188 mutex_unlock(&cam
->s_mutex
);
1193 static int mcam_vidioc_querybuf(struct file
*filp
, void *priv
,
1194 struct v4l2_buffer
*buf
)
1196 struct mcam_camera
*cam
= filp
->private_data
;
1199 mutex_lock(&cam
->s_mutex
);
1200 ret
= vb2_querybuf(&cam
->vb_queue
, buf
);
1201 mutex_unlock(&cam
->s_mutex
);
1205 static int mcam_vidioc_qbuf(struct file
*filp
, void *priv
,
1206 struct v4l2_buffer
*buf
)
1208 struct mcam_camera
*cam
= filp
->private_data
;
1211 mutex_lock(&cam
->s_mutex
);
1212 ret
= vb2_qbuf(&cam
->vb_queue
, buf
);
1213 mutex_unlock(&cam
->s_mutex
);
1217 static int mcam_vidioc_dqbuf(struct file
*filp
, void *priv
,
1218 struct v4l2_buffer
*buf
)
1220 struct mcam_camera
*cam
= filp
->private_data
;
1223 mutex_lock(&cam
->s_mutex
);
1224 ret
= vb2_dqbuf(&cam
->vb_queue
, buf
, filp
->f_flags
& O_NONBLOCK
);
1225 mutex_unlock(&cam
->s_mutex
);
1229 static int mcam_vidioc_querycap(struct file
*file
, void *priv
,
1230 struct v4l2_capability
*cap
)
1232 strcpy(cap
->driver
, "marvell_ccic");
1233 strcpy(cap
->card
, "marvell_ccic");
1235 cap
->capabilities
= V4L2_CAP_VIDEO_CAPTURE
|
1236 V4L2_CAP_READWRITE
| V4L2_CAP_STREAMING
;
1241 static int mcam_vidioc_enum_fmt_vid_cap(struct file
*filp
,
1242 void *priv
, struct v4l2_fmtdesc
*fmt
)
1244 if (fmt
->index
>= N_MCAM_FMTS
)
1246 strlcpy(fmt
->description
, mcam_formats
[fmt
->index
].desc
,
1247 sizeof(fmt
->description
));
1248 fmt
->pixelformat
= mcam_formats
[fmt
->index
].pixelformat
;
1252 static int mcam_vidioc_try_fmt_vid_cap(struct file
*filp
, void *priv
,
1253 struct v4l2_format
*fmt
)
1255 struct mcam_camera
*cam
= priv
;
1256 struct mcam_format_struct
*f
;
1257 struct v4l2_pix_format
*pix
= &fmt
->fmt
.pix
;
1258 struct v4l2_mbus_framefmt mbus_fmt
;
1261 f
= mcam_find_format(pix
->pixelformat
);
1262 pix
->pixelformat
= f
->pixelformat
;
1263 v4l2_fill_mbus_format(&mbus_fmt
, pix
, f
->mbus_code
);
1264 mutex_lock(&cam
->s_mutex
);
1265 ret
= sensor_call(cam
, video
, try_mbus_fmt
, &mbus_fmt
);
1266 mutex_unlock(&cam
->s_mutex
);
1267 v4l2_fill_pix_format(pix
, &mbus_fmt
);
1268 pix
->bytesperline
= pix
->width
* f
->bpp
;
1269 pix
->sizeimage
= pix
->height
* pix
->bytesperline
;
1273 static int mcam_vidioc_s_fmt_vid_cap(struct file
*filp
, void *priv
,
1274 struct v4l2_format
*fmt
)
1276 struct mcam_camera
*cam
= priv
;
1277 struct mcam_format_struct
*f
;
1281 * Can't do anything if the device is not idle
1282 * Also can't if there are streaming buffers in place.
1284 if (cam
->state
!= S_IDLE
|| cam
->vb_queue
.num_buffers
> 0)
1287 f
= mcam_find_format(fmt
->fmt
.pix
.pixelformat
);
1290 * See if the formatting works in principle.
1292 ret
= mcam_vidioc_try_fmt_vid_cap(filp
, priv
, fmt
);
1296 * Now we start to change things for real, so let's do it
1299 mutex_lock(&cam
->s_mutex
);
1300 cam
->pix_format
= fmt
->fmt
.pix
;
1301 cam
->mbus_code
= f
->mbus_code
;
1304 * Make sure we have appropriate DMA buffers.
1306 if (cam
->buffer_mode
== B_vmalloc
) {
1307 ret
= mcam_check_dma_buffers(cam
);
1311 mcam_set_config_needed(cam
, 1);
1313 mutex_unlock(&cam
->s_mutex
);
1318 * Return our stored notion of how the camera is/should be configured.
1319 * The V4l2 spec wants us to be smarter, and actually get this from
1320 * the camera (and not mess with it at open time). Someday.
1322 static int mcam_vidioc_g_fmt_vid_cap(struct file
*filp
, void *priv
,
1323 struct v4l2_format
*f
)
1325 struct mcam_camera
*cam
= priv
;
1327 f
->fmt
.pix
= cam
->pix_format
;
1332 * We only have one input - the sensor - so minimize the nonsense here.
1334 static int mcam_vidioc_enum_input(struct file
*filp
, void *priv
,
1335 struct v4l2_input
*input
)
1337 if (input
->index
!= 0)
1340 input
->type
= V4L2_INPUT_TYPE_CAMERA
;
1341 input
->std
= V4L2_STD_ALL
; /* Not sure what should go here */
1342 strcpy(input
->name
, "Camera");
1346 static int mcam_vidioc_g_input(struct file
*filp
, void *priv
, unsigned int *i
)
1352 static int mcam_vidioc_s_input(struct file
*filp
, void *priv
, unsigned int i
)
1360 static int mcam_vidioc_s_std(struct file
*filp
, void *priv
, v4l2_std_id a
)
1366 * G/S_PARM. Most of this is done by the sensor, but we are
1367 * the level which controls the number of read buffers.
1369 static int mcam_vidioc_g_parm(struct file
*filp
, void *priv
,
1370 struct v4l2_streamparm
*parms
)
1372 struct mcam_camera
*cam
= priv
;
1375 mutex_lock(&cam
->s_mutex
);
1376 ret
= sensor_call(cam
, video
, g_parm
, parms
);
1377 mutex_unlock(&cam
->s_mutex
);
1378 parms
->parm
.capture
.readbuffers
= n_dma_bufs
;
1382 static int mcam_vidioc_s_parm(struct file
*filp
, void *priv
,
1383 struct v4l2_streamparm
*parms
)
1385 struct mcam_camera
*cam
= priv
;
1388 mutex_lock(&cam
->s_mutex
);
1389 ret
= sensor_call(cam
, video
, s_parm
, parms
);
1390 mutex_unlock(&cam
->s_mutex
);
1391 parms
->parm
.capture
.readbuffers
= n_dma_bufs
;
1395 static int mcam_vidioc_g_chip_ident(struct file
*file
, void *priv
,
1396 struct v4l2_dbg_chip_ident
*chip
)
1398 struct mcam_camera
*cam
= priv
;
1400 chip
->ident
= V4L2_IDENT_NONE
;
1402 if (v4l2_chip_match_host(&chip
->match
)) {
1403 chip
->ident
= cam
->chip_id
;
1406 return sensor_call(cam
, core
, g_chip_ident
, chip
);
1409 static int mcam_vidioc_enum_framesizes(struct file
*filp
, void *priv
,
1410 struct v4l2_frmsizeenum
*sizes
)
1412 struct mcam_camera
*cam
= priv
;
1415 mutex_lock(&cam
->s_mutex
);
1416 ret
= sensor_call(cam
, video
, enum_framesizes
, sizes
);
1417 mutex_unlock(&cam
->s_mutex
);
1421 static int mcam_vidioc_enum_frameintervals(struct file
*filp
, void *priv
,
1422 struct v4l2_frmivalenum
*interval
)
1424 struct mcam_camera
*cam
= priv
;
1427 mutex_lock(&cam
->s_mutex
);
1428 ret
= sensor_call(cam
, video
, enum_frameintervals
, interval
);
1429 mutex_unlock(&cam
->s_mutex
);
1433 #ifdef CONFIG_VIDEO_ADV_DEBUG
1434 static int mcam_vidioc_g_register(struct file
*file
, void *priv
,
1435 struct v4l2_dbg_register
*reg
)
1437 struct mcam_camera
*cam
= priv
;
1439 if (v4l2_chip_match_host(®
->match
)) {
1440 reg
->val
= mcam_reg_read(cam
, reg
->reg
);
1444 return sensor_call(cam
, core
, g_register
, reg
);
1447 static int mcam_vidioc_s_register(struct file
*file
, void *priv
,
1448 const struct v4l2_dbg_register
*reg
)
1450 struct mcam_camera
*cam
= priv
;
1452 if (v4l2_chip_match_host(®
->match
)) {
1453 mcam_reg_write(cam
, reg
->reg
, reg
->val
);
1456 return sensor_call(cam
, core
, s_register
, reg
);
1460 static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops
= {
1461 .vidioc_querycap
= mcam_vidioc_querycap
,
1462 .vidioc_enum_fmt_vid_cap
= mcam_vidioc_enum_fmt_vid_cap
,
1463 .vidioc_try_fmt_vid_cap
= mcam_vidioc_try_fmt_vid_cap
,
1464 .vidioc_s_fmt_vid_cap
= mcam_vidioc_s_fmt_vid_cap
,
1465 .vidioc_g_fmt_vid_cap
= mcam_vidioc_g_fmt_vid_cap
,
1466 .vidioc_enum_input
= mcam_vidioc_enum_input
,
1467 .vidioc_g_input
= mcam_vidioc_g_input
,
1468 .vidioc_s_input
= mcam_vidioc_s_input
,
1469 .vidioc_s_std
= mcam_vidioc_s_std
,
1470 .vidioc_reqbufs
= mcam_vidioc_reqbufs
,
1471 .vidioc_querybuf
= mcam_vidioc_querybuf
,
1472 .vidioc_qbuf
= mcam_vidioc_qbuf
,
1473 .vidioc_dqbuf
= mcam_vidioc_dqbuf
,
1474 .vidioc_streamon
= mcam_vidioc_streamon
,
1475 .vidioc_streamoff
= mcam_vidioc_streamoff
,
1476 .vidioc_g_parm
= mcam_vidioc_g_parm
,
1477 .vidioc_s_parm
= mcam_vidioc_s_parm
,
1478 .vidioc_enum_framesizes
= mcam_vidioc_enum_framesizes
,
1479 .vidioc_enum_frameintervals
= mcam_vidioc_enum_frameintervals
,
1480 .vidioc_g_chip_ident
= mcam_vidioc_g_chip_ident
,
1481 #ifdef CONFIG_VIDEO_ADV_DEBUG
1482 .vidioc_g_register
= mcam_vidioc_g_register
,
1483 .vidioc_s_register
= mcam_vidioc_s_register
,
1487 /* ---------------------------------------------------------------------- */
1489 * Our various file operations.
1491 static int mcam_v4l_open(struct file
*filp
)
1493 struct mcam_camera
*cam
= video_drvdata(filp
);
1496 filp
->private_data
= cam
;
1498 cam
->frame_state
.frames
= 0;
1499 cam
->frame_state
.singles
= 0;
1500 cam
->frame_state
.delivered
= 0;
1501 mutex_lock(&cam
->s_mutex
);
1502 if (cam
->users
== 0) {
1503 ret
= mcam_setup_vb2(cam
);
1506 mcam_ctlr_power_up(cam
);
1507 __mcam_cam_reset(cam
);
1508 mcam_set_config_needed(cam
, 1);
1512 mutex_unlock(&cam
->s_mutex
);
1517 static int mcam_v4l_release(struct file
*filp
)
1519 struct mcam_camera
*cam
= filp
->private_data
;
1521 cam_dbg(cam
, "Release, %d frames, %d singles, %d delivered\n",
1522 cam
->frame_state
.frames
, cam
->frame_state
.singles
,
1523 cam
->frame_state
.delivered
);
1524 mutex_lock(&cam
->s_mutex
);
1526 if (cam
->users
== 0) {
1527 mcam_ctlr_stop_dma(cam
);
1528 mcam_cleanup_vb2(cam
);
1529 mcam_ctlr_power_down(cam
);
1530 if (cam
->buffer_mode
== B_vmalloc
&& alloc_bufs_at_read
)
1531 mcam_free_dma_bufs(cam
);
1533 mutex_unlock(&cam
->s_mutex
);
1537 static ssize_t
mcam_v4l_read(struct file
*filp
,
1538 char __user
*buffer
, size_t len
, loff_t
*pos
)
1540 struct mcam_camera
*cam
= filp
->private_data
;
1543 mutex_lock(&cam
->s_mutex
);
1544 ret
= vb2_read(&cam
->vb_queue
, buffer
, len
, pos
,
1545 filp
->f_flags
& O_NONBLOCK
);
1546 mutex_unlock(&cam
->s_mutex
);
1552 static unsigned int mcam_v4l_poll(struct file
*filp
,
1553 struct poll_table_struct
*pt
)
1555 struct mcam_camera
*cam
= filp
->private_data
;
1558 mutex_lock(&cam
->s_mutex
);
1559 ret
= vb2_poll(&cam
->vb_queue
, filp
, pt
);
1560 mutex_unlock(&cam
->s_mutex
);
1565 static int mcam_v4l_mmap(struct file
*filp
, struct vm_area_struct
*vma
)
1567 struct mcam_camera
*cam
= filp
->private_data
;
1570 mutex_lock(&cam
->s_mutex
);
1571 ret
= vb2_mmap(&cam
->vb_queue
, vma
);
1572 mutex_unlock(&cam
->s_mutex
);
1578 static const struct v4l2_file_operations mcam_v4l_fops
= {
1579 .owner
= THIS_MODULE
,
1580 .open
= mcam_v4l_open
,
1581 .release
= mcam_v4l_release
,
1582 .read
= mcam_v4l_read
,
1583 .poll
= mcam_v4l_poll
,
1584 .mmap
= mcam_v4l_mmap
,
1585 .unlocked_ioctl
= video_ioctl2
,
1590 * This template device holds all of those v4l2 methods; we
1591 * clone it for specific real devices.
1593 static struct video_device mcam_v4l_template
= {
1595 .tvnorms
= V4L2_STD_NTSC_M
,
1596 .current_norm
= V4L2_STD_NTSC_M
, /* make mplayer happy */
1598 .fops
= &mcam_v4l_fops
,
1599 .ioctl_ops
= &mcam_v4l_ioctl_ops
,
1600 .release
= video_device_release_empty
,
1603 /* ---------------------------------------------------------------------- */
1605 * Interrupt handler stuff
1607 static void mcam_frame_complete(struct mcam_camera
*cam
, int frame
)
1610 * Basic frame housekeeping.
1612 set_bit(frame
, &cam
->flags
);
1613 clear_bit(CF_DMA_ACTIVE
, &cam
->flags
);
1614 cam
->next_buf
= frame
;
1615 cam
->buf_seq
[frame
] = ++(cam
->sequence
);
1616 cam
->frame_state
.frames
++;
1618 * "This should never happen"
1620 if (cam
->state
!= S_STREAMING
)
1623 * Process the frame and set up the next one.
1625 cam
->frame_complete(cam
, frame
);
1630 * The interrupt handler; this needs to be called from the
1631 * platform irq handler with the lock held.
1633 int mccic_irq(struct mcam_camera
*cam
, unsigned int irqs
)
1635 unsigned int frame
, handled
= 0;
1637 mcam_reg_write(cam
, REG_IRQSTAT
, FRAMEIRQS
); /* Clear'em all */
1639 * Handle any frame completions. There really should
1640 * not be more than one of these, or we have fallen
1643 * When running in S/G mode, the frame number lacks any
1644 * real meaning - there's only one descriptor array - but
1645 * the controller still picks a different one to signal
1648 for (frame
= 0; frame
< cam
->nbufs
; frame
++)
1649 if (irqs
& (IRQ_EOF0
<< frame
)) {
1650 mcam_frame_complete(cam
, frame
);
1652 if (cam
->buffer_mode
== B_DMA_sg
)
1656 * If a frame starts, note that we have DMA active. This
1657 * code assumes that we won't get multiple frame interrupts
1658 * at once; may want to rethink that.
1660 if (irqs
& (IRQ_SOF0
| IRQ_SOF1
| IRQ_SOF2
)) {
1661 set_bit(CF_DMA_ACTIVE
, &cam
->flags
);
1663 if (cam
->buffer_mode
== B_DMA_sg
)
1664 mcam_ctlr_stop(cam
);
1669 /* ---------------------------------------------------------------------- */
1671 * Registration and such.
1673 static struct ov7670_config sensor_cfg
= {
1675 * Exclude QCIF mode, because it only captures a tiny portion
1683 int mccic_register(struct mcam_camera
*cam
)
1685 struct i2c_board_info ov7670_info
= {
1688 .platform_data
= &sensor_cfg
,
1693 * Validate the requested buffer mode.
1695 if (buffer_mode
>= 0)
1696 cam
->buffer_mode
= buffer_mode
;
1697 if (cam
->buffer_mode
== B_DMA_sg
&&
1698 cam
->chip_id
== V4L2_IDENT_CAFE
) {
1699 printk(KERN_ERR
"marvell-cam: Cafe can't do S/G I/O, "
1700 "attempting vmalloc mode instead\n");
1701 cam
->buffer_mode
= B_vmalloc
;
1703 if (!mcam_buffer_mode_supported(cam
->buffer_mode
)) {
1704 printk(KERN_ERR
"marvell-cam: buffer mode %d unsupported\n",
1711 ret
= v4l2_device_register(cam
->dev
, &cam
->v4l2_dev
);
1715 mutex_init(&cam
->s_mutex
);
1716 cam
->state
= S_NOTREADY
;
1717 mcam_set_config_needed(cam
, 1);
1718 cam
->pix_format
= mcam_def_pix_format
;
1719 cam
->mbus_code
= mcam_def_mbus_code
;
1720 INIT_LIST_HEAD(&cam
->buffers
);
1721 mcam_ctlr_init(cam
);
1724 * Try to find the sensor.
1726 sensor_cfg
.clock_speed
= cam
->clock_speed
;
1727 sensor_cfg
.use_smbus
= cam
->use_smbus
;
1728 cam
->sensor_addr
= ov7670_info
.addr
;
1729 cam
->sensor
= v4l2_i2c_new_subdev_board(&cam
->v4l2_dev
,
1730 cam
->i2c_adapter
, &ov7670_info
, NULL
);
1731 if (cam
->sensor
== NULL
) {
1733 goto out_unregister
;
1736 ret
= mcam_cam_init(cam
);
1738 goto out_unregister
;
1740 * Get the v4l2 setup done.
1742 ret
= v4l2_ctrl_handler_init(&cam
->ctrl_handler
, 10);
1744 goto out_unregister
;
1745 cam
->v4l2_dev
.ctrl_handler
= &cam
->ctrl_handler
;
1747 mutex_lock(&cam
->s_mutex
);
1748 cam
->vdev
= mcam_v4l_template
;
1749 cam
->vdev
.debug
= 0;
1750 cam
->vdev
.v4l2_dev
= &cam
->v4l2_dev
;
1751 video_set_drvdata(&cam
->vdev
, cam
);
1752 ret
= video_register_device(&cam
->vdev
, VFL_TYPE_GRABBER
, -1);
1757 * If so requested, try to get our DMA buffers now.
1759 if (cam
->buffer_mode
== B_vmalloc
&& !alloc_bufs_at_read
) {
1760 if (mcam_alloc_dma_bufs(cam
, 1))
1761 cam_warn(cam
, "Unable to alloc DMA buffers at load"
1762 " will try again later.");
1766 v4l2_ctrl_handler_free(&cam
->ctrl_handler
);
1767 mutex_unlock(&cam
->s_mutex
);
1770 v4l2_device_unregister(&cam
->v4l2_dev
);
1775 void mccic_shutdown(struct mcam_camera
*cam
)
1778 * If we have no users (and we really, really should have no
1779 * users) the device will already be powered down. Trying to
1780 * take it down again will wedge the machine, which is frowned
1783 if (cam
->users
> 0) {
1784 cam_warn(cam
, "Removing a device with users!\n");
1785 mcam_ctlr_power_down(cam
);
1787 vb2_queue_release(&cam
->vb_queue
);
1788 if (cam
->buffer_mode
== B_vmalloc
)
1789 mcam_free_dma_bufs(cam
);
1790 video_unregister_device(&cam
->vdev
);
1791 v4l2_ctrl_handler_free(&cam
->ctrl_handler
);
1792 v4l2_device_unregister(&cam
->v4l2_dev
);
1800 void mccic_suspend(struct mcam_camera
*cam
)
1802 mutex_lock(&cam
->s_mutex
);
1803 if (cam
->users
> 0) {
1804 enum mcam_state cstate
= cam
->state
;
1806 mcam_ctlr_stop_dma(cam
);
1807 mcam_ctlr_power_down(cam
);
1808 cam
->state
= cstate
;
1810 mutex_unlock(&cam
->s_mutex
);
1813 int mccic_resume(struct mcam_camera
*cam
)
1817 mutex_lock(&cam
->s_mutex
);
1818 if (cam
->users
> 0) {
1819 mcam_ctlr_power_up(cam
);
1820 __mcam_cam_reset(cam
);
1822 mcam_ctlr_power_down(cam
);
1824 mutex_unlock(&cam
->s_mutex
);
1826 set_bit(CF_CONFIG_NEEDED
, &cam
->flags
);
1827 if (cam
->state
== S_STREAMING
) {
1829 * If there was a buffer in the DMA engine at suspend
1830 * time, put it back on the queue or we'll forget about it.
1832 if (cam
->buffer_mode
== B_DMA_sg
&& cam
->vb_bufs
[0])
1833 list_add(&cam
->vb_bufs
[0]->queue
, &cam
->buffers
);
1834 ret
= mcam_read_setup(cam
);
1838 #endif /* CONFIG_PM */