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Merge branch 'timer/cleanup' into late/mvebu2
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / pci / dm1105 / dm1105.c
1 /*
2 * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
3 *
4 * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21
22 #include <linux/i2c.h>
23 #include <linux/i2c-algo-bit.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/proc_fs.h>
29 #include <linux/pci.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/slab.h>
32 #include <media/rc-core.h>
33
34 #include "demux.h"
35 #include "dmxdev.h"
36 #include "dvb_demux.h"
37 #include "dvb_frontend.h"
38 #include "dvb_net.h"
39 #include "dvbdev.h"
40 #include "dvb-pll.h"
41
42 #include "stv0299.h"
43 #include "stv0288.h"
44 #include "stb6000.h"
45 #include "si21xx.h"
46 #include "cx24116.h"
47 #include "z0194a.h"
48 #include "ds3000.h"
49
50 #define MODULE_NAME "dm1105"
51
52 #define UNSET (-1U)
53
54 #define DM1105_BOARD_NOAUTO UNSET
55 #define DM1105_BOARD_UNKNOWN 0
56 #define DM1105_BOARD_DVBWORLD_2002 1
57 #define DM1105_BOARD_DVBWORLD_2004 2
58 #define DM1105_BOARD_AXESS_DM05 3
59 #define DM1105_BOARD_UNBRANDED_I2C_ON_GPIO 4
60
61 /* ----------------------------------------------- */
62 /*
63 * PCI ID's
64 */
65 #ifndef PCI_VENDOR_ID_TRIGEM
66 #define PCI_VENDOR_ID_TRIGEM 0x109f
67 #endif
68 #ifndef PCI_VENDOR_ID_AXESS
69 #define PCI_VENDOR_ID_AXESS 0x195d
70 #endif
71 #ifndef PCI_DEVICE_ID_DM1105
72 #define PCI_DEVICE_ID_DM1105 0x036f
73 #endif
74 #ifndef PCI_DEVICE_ID_DW2002
75 #define PCI_DEVICE_ID_DW2002 0x2002
76 #endif
77 #ifndef PCI_DEVICE_ID_DW2004
78 #define PCI_DEVICE_ID_DW2004 0x2004
79 #endif
80 #ifndef PCI_DEVICE_ID_DM05
81 #define PCI_DEVICE_ID_DM05 0x1105
82 #endif
83 /* ----------------------------------------------- */
84 /* sdmc dm1105 registers */
85
86 /* TS Control */
87 #define DM1105_TSCTR 0x00
88 #define DM1105_DTALENTH 0x04
89
90 /* GPIO Interface */
91 #define DM1105_GPIOVAL 0x08
92 #define DM1105_GPIOCTR 0x0c
93
94 /* PID serial number */
95 #define DM1105_PIDN 0x10
96
97 /* Odd-even secret key select */
98 #define DM1105_CWSEL 0x14
99
100 /* Host Command Interface */
101 #define DM1105_HOST_CTR 0x18
102 #define DM1105_HOST_AD 0x1c
103
104 /* PCI Interface */
105 #define DM1105_CR 0x30
106 #define DM1105_RST 0x34
107 #define DM1105_STADR 0x38
108 #define DM1105_RLEN 0x3c
109 #define DM1105_WRP 0x40
110 #define DM1105_INTCNT 0x44
111 #define DM1105_INTMAK 0x48
112 #define DM1105_INTSTS 0x4c
113
114 /* CW Value */
115 #define DM1105_ODD 0x50
116 #define DM1105_EVEN 0x58
117
118 /* PID Value */
119 #define DM1105_PID 0x60
120
121 /* IR Control */
122 #define DM1105_IRCTR 0x64
123 #define DM1105_IRMODE 0x68
124 #define DM1105_SYSTEMCODE 0x6c
125 #define DM1105_IRCODE 0x70
126
127 /* Unknown Values */
128 #define DM1105_ENCRYPT 0x74
129 #define DM1105_VER 0x7c
130
131 /* I2C Interface */
132 #define DM1105_I2CCTR 0x80
133 #define DM1105_I2CSTS 0x81
134 #define DM1105_I2CDAT 0x82
135 #define DM1105_I2C_RA 0x83
136 /* ----------------------------------------------- */
137 /* Interrupt Mask Bits */
138
139 #define INTMAK_TSIRQM 0x01
140 #define INTMAK_HIRQM 0x04
141 #define INTMAK_IRM 0x08
142 #define INTMAK_ALLMASK (INTMAK_TSIRQM | \
143 INTMAK_HIRQM | \
144 INTMAK_IRM)
145 #define INTMAK_NONEMASK 0x00
146
147 /* Interrupt Status Bits */
148 #define INTSTS_TSIRQ 0x01
149 #define INTSTS_HIRQ 0x04
150 #define INTSTS_IR 0x08
151
152 /* IR Control Bits */
153 #define DM1105_IR_EN 0x01
154 #define DM1105_SYS_CHK 0x02
155 #define DM1105_REP_FLG 0x08
156
157 /* EEPROM addr */
158 #define IIC_24C01_addr 0xa0
159 /* Max board count */
160 #define DM1105_MAX 0x04
161
162 #define DRIVER_NAME "dm1105"
163 #define DM1105_I2C_GPIO_NAME "dm1105-gpio"
164
165 #define DM1105_DMA_PACKETS 47
166 #define DM1105_DMA_PACKET_LENGTH (128*4)
167 #define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
168
169 /* */
170 #define GPIO08 (1 << 8)
171 #define GPIO13 (1 << 13)
172 #define GPIO14 (1 << 14)
173 #define GPIO15 (1 << 15)
174 #define GPIO16 (1 << 16)
175 #define GPIO17 (1 << 17)
176 #define GPIO_ALL 0x03ffff
177
178 /* GPIO's for LNB power control */
179 #define DM1105_LNB_MASK (GPIO_ALL & ~(GPIO14 | GPIO13))
180 #define DM1105_LNB_OFF GPIO17
181 #define DM1105_LNB_13V (GPIO16 | GPIO08)
182 #define DM1105_LNB_18V GPIO08
183
184 /* GPIO's for LNB power control for Axess DM05 */
185 #define DM05_LNB_MASK (GPIO_ALL & ~(GPIO14 | GPIO13))
186 #define DM05_LNB_OFF GPIO17/* actually 13v */
187 #define DM05_LNB_13V GPIO17
188 #define DM05_LNB_18V (GPIO17 | GPIO16)
189
190 /* GPIO's for LNB power control for unbranded with I2C on GPIO */
191 #define UNBR_LNB_MASK (GPIO17 | GPIO16)
192 #define UNBR_LNB_OFF 0
193 #define UNBR_LNB_13V GPIO17
194 #define UNBR_LNB_18V (GPIO17 | GPIO16)
195
196 static unsigned int card[] = {[0 ... 3] = UNSET };
197 module_param_array(card, int, NULL, 0444);
198 MODULE_PARM_DESC(card, "card type");
199
200 static int ir_debug;
201 module_param(ir_debug, int, 0644);
202 MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
203
204 static unsigned int dm1105_devcount;
205
206 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
207
208 struct dm1105_board {
209 char *name;
210 struct {
211 u32 mask, off, v13, v18;
212 } lnb;
213 u32 gpio_scl, gpio_sda;
214 };
215
216 struct dm1105_subid {
217 u16 subvendor;
218 u16 subdevice;
219 u32 card;
220 };
221
222 static const struct dm1105_board dm1105_boards[] = {
223 [DM1105_BOARD_UNKNOWN] = {
224 .name = "UNKNOWN/GENERIC",
225 .lnb = {
226 .mask = DM1105_LNB_MASK,
227 .off = DM1105_LNB_OFF,
228 .v13 = DM1105_LNB_13V,
229 .v18 = DM1105_LNB_18V,
230 },
231 },
232 [DM1105_BOARD_DVBWORLD_2002] = {
233 .name = "DVBWorld PCI 2002",
234 .lnb = {
235 .mask = DM1105_LNB_MASK,
236 .off = DM1105_LNB_OFF,
237 .v13 = DM1105_LNB_13V,
238 .v18 = DM1105_LNB_18V,
239 },
240 },
241 [DM1105_BOARD_DVBWORLD_2004] = {
242 .name = "DVBWorld PCI 2004",
243 .lnb = {
244 .mask = DM1105_LNB_MASK,
245 .off = DM1105_LNB_OFF,
246 .v13 = DM1105_LNB_13V,
247 .v18 = DM1105_LNB_18V,
248 },
249 },
250 [DM1105_BOARD_AXESS_DM05] = {
251 .name = "Axess/EasyTv DM05",
252 .lnb = {
253 .mask = DM05_LNB_MASK,
254 .off = DM05_LNB_OFF,
255 .v13 = DM05_LNB_13V,
256 .v18 = DM05_LNB_18V,
257 },
258 },
259 [DM1105_BOARD_UNBRANDED_I2C_ON_GPIO] = {
260 .name = "Unbranded DM1105 with i2c on GPIOs",
261 .lnb = {
262 .mask = UNBR_LNB_MASK,
263 .off = UNBR_LNB_OFF,
264 .v13 = UNBR_LNB_13V,
265 .v18 = UNBR_LNB_18V,
266 },
267 .gpio_scl = GPIO14,
268 .gpio_sda = GPIO13,
269 },
270 };
271
272 static const struct dm1105_subid dm1105_subids[] = {
273 {
274 .subvendor = 0x0000,
275 .subdevice = 0x2002,
276 .card = DM1105_BOARD_DVBWORLD_2002,
277 }, {
278 .subvendor = 0x0001,
279 .subdevice = 0x2002,
280 .card = DM1105_BOARD_DVBWORLD_2002,
281 }, {
282 .subvendor = 0x0000,
283 .subdevice = 0x2004,
284 .card = DM1105_BOARD_DVBWORLD_2004,
285 }, {
286 .subvendor = 0x0001,
287 .subdevice = 0x2004,
288 .card = DM1105_BOARD_DVBWORLD_2004,
289 }, {
290 .subvendor = 0x195d,
291 .subdevice = 0x1105,
292 .card = DM1105_BOARD_AXESS_DM05,
293 },
294 };
295
296 static void dm1105_card_list(struct pci_dev *pci)
297 {
298 int i;
299
300 if (0 == pci->subsystem_vendor &&
301 0 == pci->subsystem_device) {
302 printk(KERN_ERR
303 "dm1105: Your board has no valid PCI Subsystem ID\n"
304 "dm1105: and thus can't be autodetected\n"
305 "dm1105: Please pass card=<n> insmod option to\n"
306 "dm1105: workaround that. Redirect complaints to\n"
307 "dm1105: the vendor of the TV card. Best regards,\n"
308 "dm1105: -- tux\n");
309 } else {
310 printk(KERN_ERR
311 "dm1105: Your board isn't known (yet) to the driver.\n"
312 "dm1105: You can try to pick one of the existing\n"
313 "dm1105: card configs via card=<n> insmod option.\n"
314 "dm1105: Updating to the latest version might help\n"
315 "dm1105: as well.\n");
316 }
317 printk(KERN_ERR "Here is a list of valid choices for the card=<n> "
318 "insmod option:\n");
319 for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++)
320 printk(KERN_ERR "dm1105: card=%d -> %s\n",
321 i, dm1105_boards[i].name);
322 }
323
324 /* infrared remote control */
325 struct infrared {
326 struct rc_dev *dev;
327 char input_phys[32];
328 struct work_struct work;
329 u32 ir_command;
330 };
331
332 struct dm1105_dev {
333 /* pci */
334 struct pci_dev *pdev;
335 u8 __iomem *io_mem;
336
337 /* ir */
338 struct infrared ir;
339
340 /* dvb */
341 struct dmx_frontend hw_frontend;
342 struct dmx_frontend mem_frontend;
343 struct dmxdev dmxdev;
344 struct dvb_adapter dvb_adapter;
345 struct dvb_demux demux;
346 struct dvb_frontend *fe;
347 struct dvb_net dvbnet;
348 unsigned int full_ts_users;
349 unsigned int boardnr;
350 int nr;
351
352 /* i2c */
353 struct i2c_adapter i2c_adap;
354 struct i2c_adapter i2c_bb_adap;
355 struct i2c_algo_bit_data i2c_bit;
356
357 /* irq */
358 struct work_struct work;
359 struct workqueue_struct *wq;
360 char wqn[16];
361
362 /* dma */
363 dma_addr_t dma_addr;
364 unsigned char *ts_buf;
365 u32 wrp;
366 u32 nextwrp;
367 u32 buffer_size;
368 unsigned int PacketErrorCount;
369 unsigned int dmarst;
370 spinlock_t lock;
371 };
372
373 #define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg]))
374
375 #define dm_readb(reg) inb(dm_io_mem(reg))
376 #define dm_writeb(reg, value) outb((value), (dm_io_mem(reg)))
377
378 #define dm_readw(reg) inw(dm_io_mem(reg))
379 #define dm_writew(reg, value) outw((value), (dm_io_mem(reg)))
380
381 #define dm_readl(reg) inl(dm_io_mem(reg))
382 #define dm_writel(reg, value) outl((value), (dm_io_mem(reg)))
383
384 #define dm_andorl(reg, mask, value) \
385 outl((inl(dm_io_mem(reg)) & ~(mask)) |\
386 ((value) & (mask)), (dm_io_mem(reg)))
387
388 #define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit))
389 #define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0)
390
391 /* The chip has 18 GPIOs. In HOST mode GPIO's used as 15 bit address lines,
392 so we can use only 3 GPIO's from GPIO15 to GPIO17.
393 Here I don't check whether HOST is enebled as it is not implemented yet.
394 */
395 static void dm1105_gpio_set(struct dm1105_dev *dev, u32 mask)
396 {
397 if (mask & 0xfffc0000)
398 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
399
400 if (mask & 0x0003ffff)
401 dm_setl(DM1105_GPIOVAL, mask & 0x0003ffff);
402
403 }
404
405 static void dm1105_gpio_clear(struct dm1105_dev *dev, u32 mask)
406 {
407 if (mask & 0xfffc0000)
408 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
409
410 if (mask & 0x0003ffff)
411 dm_clearl(DM1105_GPIOVAL, mask & 0x0003ffff);
412
413 }
414
415 static void dm1105_gpio_andor(struct dm1105_dev *dev, u32 mask, u32 val)
416 {
417 if (mask & 0xfffc0000)
418 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
419
420 if (mask & 0x0003ffff)
421 dm_andorl(DM1105_GPIOVAL, mask & 0x0003ffff, val);
422
423 }
424
425 static u32 dm1105_gpio_get(struct dm1105_dev *dev, u32 mask)
426 {
427 if (mask & 0xfffc0000)
428 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
429
430 if (mask & 0x0003ffff)
431 return dm_readl(DM1105_GPIOVAL) & mask & 0x0003ffff;
432
433 return 0;
434 }
435
436 static void dm1105_gpio_enable(struct dm1105_dev *dev, u32 mask, int asoutput)
437 {
438 if (mask & 0xfffc0000)
439 printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
440
441 if ((mask & 0x0003ffff) && asoutput)
442 dm_clearl(DM1105_GPIOCTR, mask & 0x0003ffff);
443 else if ((mask & 0x0003ffff) && !asoutput)
444 dm_setl(DM1105_GPIOCTR, mask & 0x0003ffff);
445
446 }
447
448 static void dm1105_setline(struct dm1105_dev *dev, u32 line, int state)
449 {
450 if (state)
451 dm1105_gpio_enable(dev, line, 0);
452 else {
453 dm1105_gpio_enable(dev, line, 1);
454 dm1105_gpio_clear(dev, line);
455 }
456 }
457
458 static void dm1105_setsda(void *data, int state)
459 {
460 struct dm1105_dev *dev = data;
461
462 dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_sda, state);
463 }
464
465 static void dm1105_setscl(void *data, int state)
466 {
467 struct dm1105_dev *dev = data;
468
469 dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_scl, state);
470 }
471
472 static int dm1105_getsda(void *data)
473 {
474 struct dm1105_dev *dev = data;
475
476 return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_sda)
477 ? 1 : 0;
478 }
479
480 static int dm1105_getscl(void *data)
481 {
482 struct dm1105_dev *dev = data;
483
484 return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_scl)
485 ? 1 : 0;
486 }
487
488 static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
489 struct i2c_msg *msgs, int num)
490 {
491 struct dm1105_dev *dev ;
492
493 int addr, rc, i, j, k, len, byte, data;
494 u8 status;
495
496 dev = i2c_adap->algo_data;
497 for (i = 0; i < num; i++) {
498 dm_writeb(DM1105_I2CCTR, 0x00);
499 if (msgs[i].flags & I2C_M_RD) {
500 /* read bytes */
501 addr = msgs[i].addr << 1;
502 addr |= 1;
503 dm_writeb(DM1105_I2CDAT, addr);
504 for (byte = 0; byte < msgs[i].len; byte++)
505 dm_writeb(DM1105_I2CDAT + byte + 1, 0);
506
507 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
508 for (j = 0; j < 55; j++) {
509 mdelay(10);
510 status = dm_readb(DM1105_I2CSTS);
511 if ((status & 0xc0) == 0x40)
512 break;
513 }
514 if (j >= 55)
515 return -1;
516
517 for (byte = 0; byte < msgs[i].len; byte++) {
518 rc = dm_readb(DM1105_I2CDAT + byte + 1);
519 if (rc < 0)
520 goto err;
521 msgs[i].buf[byte] = rc;
522 }
523 } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
524 /* prepaired for cx24116 firmware */
525 /* Write in small blocks */
526 len = msgs[i].len - 1;
527 k = 1;
528 do {
529 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
530 dm_writeb(DM1105_I2CDAT + 1, 0xf7);
531 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
532 data = msgs[i].buf[k + byte];
533 dm_writeb(DM1105_I2CDAT + byte + 2, data);
534 }
535 dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
536 for (j = 0; j < 25; j++) {
537 mdelay(10);
538 status = dm_readb(DM1105_I2CSTS);
539 if ((status & 0xc0) == 0x40)
540 break;
541 }
542
543 if (j >= 25)
544 return -1;
545
546 k += 48;
547 len -= 48;
548 } while (len > 0);
549 } else {
550 /* write bytes */
551 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
552 for (byte = 0; byte < msgs[i].len; byte++) {
553 data = msgs[i].buf[byte];
554 dm_writeb(DM1105_I2CDAT + byte + 1, data);
555 }
556 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
557 for (j = 0; j < 25; j++) {
558 mdelay(10);
559 status = dm_readb(DM1105_I2CSTS);
560 if ((status & 0xc0) == 0x40)
561 break;
562 }
563
564 if (j >= 25)
565 return -1;
566 }
567 }
568 return num;
569 err:
570 return rc;
571 }
572
573 static u32 functionality(struct i2c_adapter *adap)
574 {
575 return I2C_FUNC_I2C;
576 }
577
578 static struct i2c_algorithm dm1105_algo = {
579 .master_xfer = dm1105_i2c_xfer,
580 .functionality = functionality,
581 };
582
583 static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
584 {
585 return container_of(feed->demux, struct dm1105_dev, demux);
586 }
587
588 static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
589 {
590 return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
591 }
592
593 static int dm1105_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
594 {
595 struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
596
597 dm1105_gpio_enable(dev, dm1105_boards[dev->boardnr].lnb.mask, 1);
598 if (voltage == SEC_VOLTAGE_18)
599 dm1105_gpio_andor(dev,
600 dm1105_boards[dev->boardnr].lnb.mask,
601 dm1105_boards[dev->boardnr].lnb.v18);
602 else if (voltage == SEC_VOLTAGE_13)
603 dm1105_gpio_andor(dev,
604 dm1105_boards[dev->boardnr].lnb.mask,
605 dm1105_boards[dev->boardnr].lnb.v13);
606 else
607 dm1105_gpio_andor(dev,
608 dm1105_boards[dev->boardnr].lnb.mask,
609 dm1105_boards[dev->boardnr].lnb.off);
610
611 return 0;
612 }
613
614 static void dm1105_set_dma_addr(struct dm1105_dev *dev)
615 {
616 dm_writel(DM1105_STADR, cpu_to_le32(dev->dma_addr));
617 }
618
619 static int dm1105_dma_map(struct dm1105_dev *dev)
620 {
621 dev->ts_buf = pci_alloc_consistent(dev->pdev,
622 6 * DM1105_DMA_BYTES,
623 &dev->dma_addr);
624
625 return !dev->ts_buf;
626 }
627
628 static void dm1105_dma_unmap(struct dm1105_dev *dev)
629 {
630 pci_free_consistent(dev->pdev,
631 6 * DM1105_DMA_BYTES,
632 dev->ts_buf,
633 dev->dma_addr);
634 }
635
636 static void dm1105_enable_irqs(struct dm1105_dev *dev)
637 {
638 dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
639 dm_writeb(DM1105_CR, 1);
640 }
641
642 static void dm1105_disable_irqs(struct dm1105_dev *dev)
643 {
644 dm_writeb(DM1105_INTMAK, INTMAK_IRM);
645 dm_writeb(DM1105_CR, 0);
646 }
647
648 static int dm1105_start_feed(struct dvb_demux_feed *f)
649 {
650 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
651
652 if (dev->full_ts_users++ == 0)
653 dm1105_enable_irqs(dev);
654
655 return 0;
656 }
657
658 static int dm1105_stop_feed(struct dvb_demux_feed *f)
659 {
660 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
661
662 if (--dev->full_ts_users == 0)
663 dm1105_disable_irqs(dev);
664
665 return 0;
666 }
667
668 /* ir work handler */
669 static void dm1105_emit_key(struct work_struct *work)
670 {
671 struct infrared *ir = container_of(work, struct infrared, work);
672 u32 ircom = ir->ir_command;
673 u8 data;
674
675 if (ir_debug)
676 printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
677
678 data = (ircom >> 8) & 0x7f;
679
680 rc_keydown(ir->dev, data, 0);
681 }
682
683 /* work handler */
684 static void dm1105_dmx_buffer(struct work_struct *work)
685 {
686 struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
687 unsigned int nbpackets;
688 u32 oldwrp = dev->wrp;
689 u32 nextwrp = dev->nextwrp;
690
691 if (!((dev->ts_buf[oldwrp] == 0x47) &&
692 (dev->ts_buf[oldwrp + 188] == 0x47) &&
693 (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
694 dev->PacketErrorCount++;
695 /* bad packet found */
696 if ((dev->PacketErrorCount >= 2) &&
697 (dev->dmarst == 0)) {
698 dm_writeb(DM1105_RST, 1);
699 dev->wrp = 0;
700 dev->PacketErrorCount = 0;
701 dev->dmarst = 0;
702 return;
703 }
704 }
705
706 if (nextwrp < oldwrp) {
707 memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
708 nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
709 } else
710 nbpackets = (nextwrp - oldwrp) / 188;
711
712 dev->wrp = nextwrp;
713 dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
714 }
715
716 static irqreturn_t dm1105_irq(int irq, void *dev_id)
717 {
718 struct dm1105_dev *dev = dev_id;
719
720 /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
721 unsigned int intsts = dm_readb(DM1105_INTSTS);
722 dm_writeb(DM1105_INTSTS, intsts);
723
724 switch (intsts) {
725 case INTSTS_TSIRQ:
726 case (INTSTS_TSIRQ | INTSTS_IR):
727 dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
728 queue_work(dev->wq, &dev->work);
729 break;
730 case INTSTS_IR:
731 dev->ir.ir_command = dm_readl(DM1105_IRCODE);
732 schedule_work(&dev->ir.work);
733 break;
734 }
735
736 return IRQ_HANDLED;
737 }
738
739 static int dm1105_ir_init(struct dm1105_dev *dm1105)
740 {
741 struct rc_dev *dev;
742 int err = -ENOMEM;
743
744 dev = rc_allocate_device();
745 if (!dev)
746 return -ENOMEM;
747
748 snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
749 "pci-%s/ir0", pci_name(dm1105->pdev));
750
751 dev->driver_name = MODULE_NAME;
752 dev->map_name = RC_MAP_DM1105_NEC;
753 dev->driver_type = RC_DRIVER_SCANCODE;
754 dev->input_name = "DVB on-card IR receiver";
755 dev->input_phys = dm1105->ir.input_phys;
756 dev->input_id.bustype = BUS_PCI;
757 dev->input_id.version = 1;
758 if (dm1105->pdev->subsystem_vendor) {
759 dev->input_id.vendor = dm1105->pdev->subsystem_vendor;
760 dev->input_id.product = dm1105->pdev->subsystem_device;
761 } else {
762 dev->input_id.vendor = dm1105->pdev->vendor;
763 dev->input_id.product = dm1105->pdev->device;
764 }
765 dev->dev.parent = &dm1105->pdev->dev;
766
767 INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
768
769 err = rc_register_device(dev);
770 if (err < 0) {
771 rc_free_device(dev);
772 return err;
773 }
774
775 dm1105->ir.dev = dev;
776 return 0;
777 }
778
779 static void dm1105_ir_exit(struct dm1105_dev *dm1105)
780 {
781 rc_unregister_device(dm1105->ir.dev);
782 }
783
784 static int dm1105_hw_init(struct dm1105_dev *dev)
785 {
786 dm1105_disable_irqs(dev);
787
788 dm_writeb(DM1105_HOST_CTR, 0);
789
790 /*DATALEN 188,*/
791 dm_writeb(DM1105_DTALENTH, 188);
792 /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
793 dm_writew(DM1105_TSCTR, 0xc10a);
794
795 /* map DMA and set address */
796 dm1105_dma_map(dev);
797 dm1105_set_dma_addr(dev);
798 /* big buffer */
799 dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
800 dm_writeb(DM1105_INTCNT, 47);
801
802 /* IR NEC mode enable */
803 dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
804 dm_writeb(DM1105_IRMODE, 0);
805 dm_writew(DM1105_SYSTEMCODE, 0);
806
807 return 0;
808 }
809
810 static void dm1105_hw_exit(struct dm1105_dev *dev)
811 {
812 dm1105_disable_irqs(dev);
813
814 /* IR disable */
815 dm_writeb(DM1105_IRCTR, 0);
816 dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
817
818 dm1105_dma_unmap(dev);
819 }
820
821 static struct stv0299_config sharp_z0194a_config = {
822 .demod_address = 0x68,
823 .inittab = sharp_z0194a_inittab,
824 .mclk = 88000000UL,
825 .invert = 1,
826 .skip_reinit = 0,
827 .lock_output = STV0299_LOCKOUTPUT_1,
828 .volt13_op0_op1 = STV0299_VOLT13_OP1,
829 .min_delay_ms = 100,
830 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
831 };
832
833 static struct stv0288_config earda_config = {
834 .demod_address = 0x68,
835 .min_delay_ms = 100,
836 };
837
838 static struct si21xx_config serit_config = {
839 .demod_address = 0x68,
840 .min_delay_ms = 100,
841
842 };
843
844 static struct cx24116_config serit_sp2633_config = {
845 .demod_address = 0x55,
846 };
847
848 static struct ds3000_config dvbworld_ds3000_config = {
849 .demod_address = 0x68,
850 };
851
852 static int frontend_init(struct dm1105_dev *dev)
853 {
854 int ret;
855
856 switch (dev->boardnr) {
857 case DM1105_BOARD_UNBRANDED_I2C_ON_GPIO:
858 dm1105_gpio_enable(dev, GPIO15, 1);
859 dm1105_gpio_clear(dev, GPIO15);
860 msleep(100);
861 dm1105_gpio_set(dev, GPIO15);
862 msleep(200);
863 dev->fe = dvb_attach(
864 stv0299_attach, &sharp_z0194a_config,
865 &dev->i2c_bb_adap);
866 if (dev->fe) {
867 dev->fe->ops.set_voltage = dm1105_set_voltage;
868 dvb_attach(dvb_pll_attach, dev->fe, 0x60,
869 &dev->i2c_bb_adap, DVB_PLL_OPERA1);
870 break;
871 }
872
873 dev->fe = dvb_attach(
874 stv0288_attach, &earda_config,
875 &dev->i2c_bb_adap);
876 if (dev->fe) {
877 dev->fe->ops.set_voltage = dm1105_set_voltage;
878 dvb_attach(stb6000_attach, dev->fe, 0x61,
879 &dev->i2c_bb_adap);
880 break;
881 }
882
883 dev->fe = dvb_attach(
884 si21xx_attach, &serit_config,
885 &dev->i2c_bb_adap);
886 if (dev->fe)
887 dev->fe->ops.set_voltage = dm1105_set_voltage;
888 break;
889 case DM1105_BOARD_DVBWORLD_2004:
890 dev->fe = dvb_attach(
891 cx24116_attach, &serit_sp2633_config,
892 &dev->i2c_adap);
893 if (dev->fe) {
894 dev->fe->ops.set_voltage = dm1105_set_voltage;
895 break;
896 }
897
898 dev->fe = dvb_attach(
899 ds3000_attach, &dvbworld_ds3000_config,
900 &dev->i2c_adap);
901 if (dev->fe)
902 dev->fe->ops.set_voltage = dm1105_set_voltage;
903
904 break;
905 case DM1105_BOARD_DVBWORLD_2002:
906 case DM1105_BOARD_AXESS_DM05:
907 default:
908 dev->fe = dvb_attach(
909 stv0299_attach, &sharp_z0194a_config,
910 &dev->i2c_adap);
911 if (dev->fe) {
912 dev->fe->ops.set_voltage = dm1105_set_voltage;
913 dvb_attach(dvb_pll_attach, dev->fe, 0x60,
914 &dev->i2c_adap, DVB_PLL_OPERA1);
915 break;
916 }
917
918 dev->fe = dvb_attach(
919 stv0288_attach, &earda_config,
920 &dev->i2c_adap);
921 if (dev->fe) {
922 dev->fe->ops.set_voltage = dm1105_set_voltage;
923 dvb_attach(stb6000_attach, dev->fe, 0x61,
924 &dev->i2c_adap);
925 break;
926 }
927
928 dev->fe = dvb_attach(
929 si21xx_attach, &serit_config,
930 &dev->i2c_adap);
931 if (dev->fe)
932 dev->fe->ops.set_voltage = dm1105_set_voltage;
933
934 }
935
936 if (!dev->fe) {
937 dev_err(&dev->pdev->dev, "could not attach frontend\n");
938 return -ENODEV;
939 }
940
941 ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
942 if (ret < 0) {
943 if (dev->fe->ops.release)
944 dev->fe->ops.release(dev->fe);
945 dev->fe = NULL;
946 return ret;
947 }
948
949 return 0;
950 }
951
952 static void dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
953 {
954 static u8 command[1] = { 0x28 };
955
956 struct i2c_msg msg[] = {
957 {
958 .addr = IIC_24C01_addr >> 1,
959 .flags = 0,
960 .buf = command,
961 .len = 1
962 }, {
963 .addr = IIC_24C01_addr >> 1,
964 .flags = I2C_M_RD,
965 .buf = mac,
966 .len = 6
967 },
968 };
969
970 dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
971 dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
972 }
973
974 static int dm1105_probe(struct pci_dev *pdev,
975 const struct pci_device_id *ent)
976 {
977 struct dm1105_dev *dev;
978 struct dvb_adapter *dvb_adapter;
979 struct dvb_demux *dvbdemux;
980 struct dmx_demux *dmx;
981 int ret = -ENOMEM;
982 int i;
983
984 dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
985 if (!dev)
986 return -ENOMEM;
987
988 /* board config */
989 dev->nr = dm1105_devcount;
990 dev->boardnr = UNSET;
991 if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
992 dev->boardnr = card[dev->nr];
993 for (i = 0; UNSET == dev->boardnr &&
994 i < ARRAY_SIZE(dm1105_subids); i++)
995 if (pdev->subsystem_vendor ==
996 dm1105_subids[i].subvendor &&
997 pdev->subsystem_device ==
998 dm1105_subids[i].subdevice)
999 dev->boardnr = dm1105_subids[i].card;
1000
1001 if (UNSET == dev->boardnr) {
1002 dev->boardnr = DM1105_BOARD_UNKNOWN;
1003 dm1105_card_list(pdev);
1004 }
1005
1006 dm1105_devcount++;
1007 dev->pdev = pdev;
1008 dev->buffer_size = 5 * DM1105_DMA_BYTES;
1009 dev->PacketErrorCount = 0;
1010 dev->dmarst = 0;
1011
1012 ret = pci_enable_device(pdev);
1013 if (ret < 0)
1014 goto err_kfree;
1015
1016 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1017 if (ret < 0)
1018 goto err_pci_disable_device;
1019
1020 pci_set_master(pdev);
1021
1022 ret = pci_request_regions(pdev, DRIVER_NAME);
1023 if (ret < 0)
1024 goto err_pci_disable_device;
1025
1026 dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
1027 if (!dev->io_mem) {
1028 ret = -EIO;
1029 goto err_pci_release_regions;
1030 }
1031
1032 spin_lock_init(&dev->lock);
1033 pci_set_drvdata(pdev, dev);
1034
1035 ret = dm1105_hw_init(dev);
1036 if (ret < 0)
1037 goto err_pci_iounmap;
1038
1039 /* i2c */
1040 i2c_set_adapdata(&dev->i2c_adap, dev);
1041 strcpy(dev->i2c_adap.name, DRIVER_NAME);
1042 dev->i2c_adap.owner = THIS_MODULE;
1043 dev->i2c_adap.dev.parent = &pdev->dev;
1044 dev->i2c_adap.algo = &dm1105_algo;
1045 dev->i2c_adap.algo_data = dev;
1046 ret = i2c_add_adapter(&dev->i2c_adap);
1047
1048 if (ret < 0)
1049 goto err_dm1105_hw_exit;
1050
1051 i2c_set_adapdata(&dev->i2c_bb_adap, dev);
1052 strcpy(dev->i2c_bb_adap.name, DM1105_I2C_GPIO_NAME);
1053 dev->i2c_bb_adap.owner = THIS_MODULE;
1054 dev->i2c_bb_adap.dev.parent = &pdev->dev;
1055 dev->i2c_bb_adap.algo_data = &dev->i2c_bit;
1056 dev->i2c_bit.data = dev;
1057 dev->i2c_bit.setsda = dm1105_setsda;
1058 dev->i2c_bit.setscl = dm1105_setscl;
1059 dev->i2c_bit.getsda = dm1105_getsda;
1060 dev->i2c_bit.getscl = dm1105_getscl;
1061 dev->i2c_bit.udelay = 10;
1062 dev->i2c_bit.timeout = 10;
1063
1064 /* Raise SCL and SDA */
1065 dm1105_setsda(dev, 1);
1066 dm1105_setscl(dev, 1);
1067
1068 ret = i2c_bit_add_bus(&dev->i2c_bb_adap);
1069 if (ret < 0)
1070 goto err_i2c_del_adapter;
1071
1072 /* dvb */
1073 ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
1074 THIS_MODULE, &pdev->dev, adapter_nr);
1075 if (ret < 0)
1076 goto err_i2c_del_adapters;
1077
1078 dvb_adapter = &dev->dvb_adapter;
1079
1080 dm1105_read_mac(dev, dvb_adapter->proposed_mac);
1081
1082 dvbdemux = &dev->demux;
1083 dvbdemux->filternum = 256;
1084 dvbdemux->feednum = 256;
1085 dvbdemux->start_feed = dm1105_start_feed;
1086 dvbdemux->stop_feed = dm1105_stop_feed;
1087 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
1088 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
1089 ret = dvb_dmx_init(dvbdemux);
1090 if (ret < 0)
1091 goto err_dvb_unregister_adapter;
1092
1093 dmx = &dvbdemux->dmx;
1094 dev->dmxdev.filternum = 256;
1095 dev->dmxdev.demux = dmx;
1096 dev->dmxdev.capabilities = 0;
1097
1098 ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
1099 if (ret < 0)
1100 goto err_dvb_dmx_release;
1101
1102 dev->hw_frontend.source = DMX_FRONTEND_0;
1103
1104 ret = dmx->add_frontend(dmx, &dev->hw_frontend);
1105 if (ret < 0)
1106 goto err_dvb_dmxdev_release;
1107
1108 dev->mem_frontend.source = DMX_MEMORY_FE;
1109
1110 ret = dmx->add_frontend(dmx, &dev->mem_frontend);
1111 if (ret < 0)
1112 goto err_remove_hw_frontend;
1113
1114 ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
1115 if (ret < 0)
1116 goto err_remove_mem_frontend;
1117
1118 ret = dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
1119 if (ret < 0)
1120 goto err_disconnect_frontend;
1121
1122 ret = frontend_init(dev);
1123 if (ret < 0)
1124 goto err_dvb_net;
1125
1126 dm1105_ir_init(dev);
1127
1128 INIT_WORK(&dev->work, dm1105_dmx_buffer);
1129 sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
1130 dev->wq = create_singlethread_workqueue(dev->wqn);
1131 if (!dev->wq) {
1132 ret = -ENOMEM;
1133 goto err_dvb_net;
1134 }
1135
1136 ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
1137 DRIVER_NAME, dev);
1138 if (ret < 0)
1139 goto err_workqueue;
1140
1141 return 0;
1142
1143 err_workqueue:
1144 destroy_workqueue(dev->wq);
1145 err_dvb_net:
1146 dvb_net_release(&dev->dvbnet);
1147 err_disconnect_frontend:
1148 dmx->disconnect_frontend(dmx);
1149 err_remove_mem_frontend:
1150 dmx->remove_frontend(dmx, &dev->mem_frontend);
1151 err_remove_hw_frontend:
1152 dmx->remove_frontend(dmx, &dev->hw_frontend);
1153 err_dvb_dmxdev_release:
1154 dvb_dmxdev_release(&dev->dmxdev);
1155 err_dvb_dmx_release:
1156 dvb_dmx_release(dvbdemux);
1157 err_dvb_unregister_adapter:
1158 dvb_unregister_adapter(dvb_adapter);
1159 err_i2c_del_adapters:
1160 i2c_del_adapter(&dev->i2c_bb_adap);
1161 err_i2c_del_adapter:
1162 i2c_del_adapter(&dev->i2c_adap);
1163 err_dm1105_hw_exit:
1164 dm1105_hw_exit(dev);
1165 err_pci_iounmap:
1166 pci_iounmap(pdev, dev->io_mem);
1167 err_pci_release_regions:
1168 pci_release_regions(pdev);
1169 err_pci_disable_device:
1170 pci_disable_device(pdev);
1171 err_kfree:
1172 pci_set_drvdata(pdev, NULL);
1173 kfree(dev);
1174 return ret;
1175 }
1176
1177 static void dm1105_remove(struct pci_dev *pdev)
1178 {
1179 struct dm1105_dev *dev = pci_get_drvdata(pdev);
1180 struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
1181 struct dvb_demux *dvbdemux = &dev->demux;
1182 struct dmx_demux *dmx = &dvbdemux->dmx;
1183
1184 dm1105_ir_exit(dev);
1185 dmx->close(dmx);
1186 dvb_net_release(&dev->dvbnet);
1187 if (dev->fe)
1188 dvb_unregister_frontend(dev->fe);
1189
1190 dmx->disconnect_frontend(dmx);
1191 dmx->remove_frontend(dmx, &dev->mem_frontend);
1192 dmx->remove_frontend(dmx, &dev->hw_frontend);
1193 dvb_dmxdev_release(&dev->dmxdev);
1194 dvb_dmx_release(dvbdemux);
1195 dvb_unregister_adapter(dvb_adapter);
1196 if (&dev->i2c_adap)
1197 i2c_del_adapter(&dev->i2c_adap);
1198
1199 dm1105_hw_exit(dev);
1200 synchronize_irq(pdev->irq);
1201 free_irq(pdev->irq, dev);
1202 pci_iounmap(pdev, dev->io_mem);
1203 pci_release_regions(pdev);
1204 pci_disable_device(pdev);
1205 pci_set_drvdata(pdev, NULL);
1206 dm1105_devcount--;
1207 kfree(dev);
1208 }
1209
1210 static struct pci_device_id dm1105_id_table[] = {
1211 {
1212 .vendor = PCI_VENDOR_ID_TRIGEM,
1213 .device = PCI_DEVICE_ID_DM1105,
1214 .subvendor = PCI_ANY_ID,
1215 .subdevice = PCI_ANY_ID,
1216 }, {
1217 .vendor = PCI_VENDOR_ID_AXESS,
1218 .device = PCI_DEVICE_ID_DM05,
1219 .subvendor = PCI_ANY_ID,
1220 .subdevice = PCI_ANY_ID,
1221 }, {
1222 /* empty */
1223 },
1224 };
1225
1226 MODULE_DEVICE_TABLE(pci, dm1105_id_table);
1227
1228 static struct pci_driver dm1105_driver = {
1229 .name = DRIVER_NAME,
1230 .id_table = dm1105_id_table,
1231 .probe = dm1105_probe,
1232 .remove = dm1105_remove,
1233 };
1234
1235 static int __init dm1105_init(void)
1236 {
1237 return pci_register_driver(&dm1105_driver);
1238 }
1239
1240 static void __exit dm1105_exit(void)
1241 {
1242 pci_unregister_driver(&dm1105_driver);
1243 }
1244
1245 module_init(dm1105_init);
1246 module_exit(dm1105_exit);
1247
1248 MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
1249 MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
1250 MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)