drivers/media/dvb/frontends/lgdt330x.c

   1 /*
   2  *    Support for LGDT3302 and LGDT3303 - VSB/QAM
   3  *
   4  *    Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; either version 2 of the License, or
   9  *    (at your option) any later version.
  10  *
  11  *    This program is distributed in the hope that it will be useful,
  12  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *    GNU General Public License for more details.
  15  *
  16  *    You should have received a copy of the GNU General Public License
  17  *    along with this program; if not, write to the Free Software
  18  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  *
  20  */
  21
  22 /*
  23  *                      NOTES ABOUT THIS DRIVER
  24  *
  25  * This Linux driver supports:
  26  *   DViCO FusionHDTV 3 Gold-Q
  27  *   DViCO FusionHDTV 3 Gold-T
  28  *   DViCO FusionHDTV 5 Gold
  29  *   DViCO FusionHDTV 5 Lite
  30  *   DViCO FusionHDTV 5 USB Gold
  31  *   Air2PC/AirStar 2 ATSC 3rd generation (HD5000)
  32  *
  33  * TODO:
  34  * signal strength always returns 0.
  35  *
  36  */
  37
  38 #include <linux/kernel.h>
  39 #include <linux/module.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/init.h>
  42 #include <linux/delay.h>
  43 #include <linux/string.h>
  44 #include <linux/slab.h>
  45 #include <asm/byteorder.h>
  46
  47 #include "dvb_frontend.h"
  48 #include "lgdt330x_priv.h"
  49 #include "lgdt330x.h"
  50
  51 static int debug = 0;
  52 module_param(debug, int, 0644);
  53 MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off).");
  54 #define dprintk(args...) \
  55 do { \
  56 if (debug) printk(KERN_DEBUG "lgdt330x: " args); \
  57 } while (0)
  58
  59 struct lgdt330x_state
  60 {
  61         struct i2c_adapter* i2c;
  62         struct dvb_frontend_ops ops;
  63
  64         /* Configuration settings */
  65         const struct lgdt330x_config* config;
  66
  67         struct dvb_frontend frontend;
  68
  69         /* Demodulator private data */
  70         fe_modulation_t current_modulation;
  71
  72         /* Tuner private data */
  73         u32 current_frequency;
  74 };
  75
  76 static int i2c_write_demod_bytes (struct lgdt330x_state* state,
  77                                   u8 *buf, /* data bytes to send */
  78                                   int len  /* number of bytes to send */ )
  79 {
  80         struct i2c_msg msg =
  81                 { .addr = state->config->demod_address,
  82                   .flags = 0,
  83                   .buf = buf,
  84                   .len = 2 };
  85         int i;
  86         int err;
  87
  88         for (i=0; i<len-1; i+=2){
  89                 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  90                         printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __FUNCTION__, msg.buf[0], msg.buf[1], err);
  91                         if (err < 0)
  92                                 return err;
  93                         else
  94                                 return -EREMOTEIO;
  95                 }
  96                 msg.buf += 2;
  97         }
  98         return 0;
  99 }
 100
 101 /*
 102  * This routine writes the register (reg) to the demod bus
 103  * then reads the data returned for (len) bytes.
 104  */
 105
 106 static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
 107                                enum I2C_REG reg, u8* buf, int len)
 108 {
 109         u8 wr [] = { reg };
 110         struct i2c_msg msg [] = {
 111                 { .addr = state->config->demod_address,
 112                   .flags = 0, .buf = wr,  .len = 1 },
 113                 { .addr = state->config->demod_address,
 114                   .flags = I2C_M_RD, .buf = buf, .len = len },
 115         };
 116         int ret;
 117         ret = i2c_transfer(state->i2c, msg, 2);
 118         if (ret != 2) {
 119                 printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __FUNCTION__, state->config->demod_address, reg, ret);
 120         } else {
 121                 ret = 0;
 122         }
 123         return ret;
 124 }
 125
 126 /* Software reset */
 127 static int lgdt3302_SwReset(struct lgdt330x_state* state)
 128 {
 129         u8 ret;
 130         u8 reset[] = {
 131                 IRQ_MASK,
 132                 0x00 /* bit 6 is active low software reset
 133                       * bits 5-0 are 1 to mask interrupts */
 134         };
 135
 136         ret = i2c_write_demod_bytes(state,
 137                                     reset, sizeof(reset));
 138         if (ret == 0) {
 139
 140                 /* force reset high (inactive) and unmask interrupts */
 141                 reset[1] = 0x7f;
 142                 ret = i2c_write_demod_bytes(state,
 143                                             reset, sizeof(reset));
 144         }
 145         return ret;
 146 }
 147
 148 static int lgdt3303_SwReset(struct lgdt330x_state* state)
 149 {
 150         u8 ret;
 151         u8 reset[] = {
 152                 0x02,
 153                 0x00 /* bit 0 is active low software reset */
 154         };
 155
 156         ret = i2c_write_demod_bytes(state,
 157                                     reset, sizeof(reset));
 158         if (ret == 0) {
 159
 160                 /* force reset high (inactive) */
 161                 reset[1] = 0x01;
 162                 ret = i2c_write_demod_bytes(state,
 163                                             reset, sizeof(reset));
 164         }
 165         return ret;
 166 }
 167
 168 static int lgdt330x_SwReset(struct lgdt330x_state* state)
 169 {
 170         switch (state->config->demod_chip) {
 171         case LGDT3302:
 172                 return lgdt3302_SwReset(state);
 173         case LGDT3303:
 174                 return lgdt3303_SwReset(state);
 175         default:
 176                 return -ENODEV;
 177         }
 178 }
 179
 180 static int lgdt330x_init(struct dvb_frontend* fe)
 181 {
 182         /* Hardware reset is done using gpio[0] of cx23880x chip.
 183          * I'd like to do it here, but don't know how to find chip address.
 184          * cx88-cards.c arranges for the reset bit to be inactive (high).
 185          * Maybe there needs to be a callable function in cx88-core or
 186          * the caller of this function needs to do it. */
 187
 188         /*
 189          * Array of byte pairs <address, value>
 190          * to initialize each different chip
 191          */
 192         static u8 lgdt3302_init_data[] = {
 193                 /* Use 50MHz parameter values from spec sheet since xtal is 50 */
 194                 /* Change the value of NCOCTFV[25:0] of carrier
 195                    recovery center frequency register */
 196                 VSB_CARRIER_FREQ0, 0x00,
 197                 VSB_CARRIER_FREQ1, 0x87,
 198                 VSB_CARRIER_FREQ2, 0x8e,
 199                 VSB_CARRIER_FREQ3, 0x01,
 200                 /* Change the TPCLK pin polarity
 201                    data is valid on falling clock */
 202                 DEMUX_CONTROL, 0xfb,
 203                 /* Change the value of IFBW[11:0] of
 204                    AGC IF/RF loop filter bandwidth register */
 205                 AGC_RF_BANDWIDTH0, 0x40,
 206                 AGC_RF_BANDWIDTH1, 0x93,
 207                 AGC_RF_BANDWIDTH2, 0x00,
 208                 /* Change the value of bit 6, 'nINAGCBY' and
 209                    'NSSEL[1:0] of ACG function control register 2 */
 210                 AGC_FUNC_CTRL2, 0xc6,
 211                 /* Change the value of bit 6 'RFFIX'
 212                    of AGC function control register 3 */
 213                 AGC_FUNC_CTRL3, 0x40,
 214                 /* Set the value of 'INLVTHD' register 0x2a/0x2c
 215                    to 0x7fe */
 216                 AGC_DELAY0, 0x07,
 217                 AGC_DELAY2, 0xfe,
 218                 /* Change the value of IAGCBW[15:8]
 219                    of inner AGC loop filter bandwith */
 220                 AGC_LOOP_BANDWIDTH0, 0x08,
 221                 AGC_LOOP_BANDWIDTH1, 0x9a
 222         };
 223
 224         static u8 lgdt3303_init_data[] = {
 225                 0x4c, 0x14
 226         };
 227
 228         static u8 flip_lgdt3303_init_data[] = {
 229                 0x4c, 0x14,
 230                 0x87, 0xf3
 231         };
 232
 233         struct lgdt330x_state* state = fe->demodulator_priv;
 234         char  *chip_name;
 235         int    err;
 236
 237         switch (state->config->demod_chip) {
 238         case LGDT3302:
 239                 chip_name = "LGDT3302";
 240                 err = i2c_write_demod_bytes(state, lgdt3302_init_data,
 241                                             sizeof(lgdt3302_init_data));
 242                 break;
 243         case LGDT3303:
 244                 chip_name = "LGDT3303";
 245                 if (state->config->clock_polarity_flip) {
 246                         err = i2c_write_demod_bytes(state, flip_lgdt3303_init_data,
 247                                                     sizeof(flip_lgdt3303_init_data));
 248                 } else {
 249                         err = i2c_write_demod_bytes(state, lgdt3303_init_data,
 250                                                     sizeof(lgdt3303_init_data));
 251                 }
 252                 break;
 253         default:
 254                 chip_name = "undefined";
 255                 printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n");
 256                 err = -ENODEV;
 257         }
 258         dprintk("%s entered as %s\n", __FUNCTION__, chip_name);
 259         if (err < 0)
 260                 return err;
 261         return lgdt330x_SwReset(state);
 262 }
 263
 264 static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber)
 265 {
 266         *ber = 0; /* Not supplied by the demod chips */
 267         return 0;
 268 }
 269
 270 static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 271 {
 272         struct lgdt330x_state* state = fe->demodulator_priv;
 273         int err;
 274         u8 buf[2];
 275
 276         switch (state->config->demod_chip) {
 277         case LGDT3302:
 278                 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
 279                                            buf, sizeof(buf));
 280                 break;
 281         case LGDT3303:
 282                 err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
 283                                            buf, sizeof(buf));
 284                 break;
 285         default:
 286                 printk(KERN_WARNING
 287                        "Only LGDT3302 and LGDT3303 are supported chips.\n");
 288                 err = -ENODEV;
 289         }
 290
 291         *ucblocks = (buf[0] << 8) | buf[1];
 292         return 0;
 293 }
 294
 295 static int lgdt330x_set_parameters(struct dvb_frontend* fe,
 296                                    struct dvb_frontend_parameters *param)
 297 {
 298         /*
 299          * Array of byte pairs <address, value>
 300          * to initialize 8VSB for lgdt3303 chip 50 MHz IF
 301          */
 302         static u8 lgdt3303_8vsb_44_data[] = {
 303                 0x04, 0x00,
 304                 0x0d, 0x40,
 305         0x0e, 0x87,
 306         0x0f, 0x8e,
 307         0x10, 0x01,
 308         0x47, 0x8b };
 309
 310         /*
 311          * Array of byte pairs <address, value>
 312          * to initialize QAM for lgdt3303 chip
 313          */
 314         static u8 lgdt3303_qam_data[] = {
 315                 0x04, 0x00,
 316                 0x0d, 0x00,
 317                 0x0e, 0x00,
 318                 0x0f, 0x00,
 319                 0x10, 0x00,
 320                 0x51, 0x63,
 321                 0x47, 0x66,
 322                 0x48, 0x66,
 323                 0x4d, 0x1a,
 324                 0x49, 0x08,
 325                 0x4a, 0x9b };
 326
 327         struct lgdt330x_state* state = fe->demodulator_priv;
 328
 329         static u8 top_ctrl_cfg[]   = { TOP_CONTROL, 0x03 };
 330
 331         int err;
 332         /* Change only if we are actually changing the modulation */
 333         if (state->current_modulation != param->u.vsb.modulation) {
 334                 switch(param->u.vsb.modulation) {
 335                 case VSB_8:
 336                         dprintk("%s: VSB_8 MODE\n", __FUNCTION__);
 337
 338                         /* Select VSB mode */
 339                         top_ctrl_cfg[1] = 0x03;
 340
 341                         /* Select ANT connector if supported by card */
 342                         if (state->config->pll_rf_set)
 343                                 state->config->pll_rf_set(fe, 1);
 344
 345                         if (state->config->demod_chip == LGDT3303) {
 346                                 err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data,
 347                                                             sizeof(lgdt3303_8vsb_44_data));
 348                         }
 349                         break;
 350
 351                 case QAM_64:
 352                         dprintk("%s: QAM_64 MODE\n", __FUNCTION__);
 353
 354                         /* Select QAM_64 mode */
 355                         top_ctrl_cfg[1] = 0x00;
 356
 357                         /* Select CABLE connector if supported by card */
 358                         if (state->config->pll_rf_set)
 359                                 state->config->pll_rf_set(fe, 0);
 360
 361                         if (state->config->demod_chip == LGDT3303) {
 362                                 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
 363                                                                                         sizeof(lgdt3303_qam_data));
 364                         }
 365                         break;
 366
 367                 case QAM_256:
 368                         dprintk("%s: QAM_256 MODE\n", __FUNCTION__);
 369
 370                         /* Select QAM_256 mode */
 371                         top_ctrl_cfg[1] = 0x01;
 372
 373                         /* Select CABLE connector if supported by card */
 374                         if (state->config->pll_rf_set)
 375                                 state->config->pll_rf_set(fe, 0);
 376
 377                         if (state->config->demod_chip == LGDT3303) {
 378                                 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
 379                                                                                         sizeof(lgdt3303_qam_data));
 380                         }
 381                         break;
 382                 default:
 383                         printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __FUNCTION__, param->u.vsb.modulation);
 384                         return -1;
 385                 }
 386                 /*
 387                  * select serial or parallel MPEG harware interface
 388                  * Serial:   0x04 for LGDT3302 or 0x40 for LGDT3303
 389                  * Parallel: 0x00
 390                  */
 391                 top_ctrl_cfg[1] |= state->config->serial_mpeg;
 392
 393                 /* Select the requested mode */
 394                 i2c_write_demod_bytes(state, top_ctrl_cfg,
 395                                       sizeof(top_ctrl_cfg));
 396                 if (state->config->set_ts_params)
 397                         state->config->set_ts_params(fe, 0);
 398                 state->current_modulation = param->u.vsb.modulation;
 399         }
 400
 401         /* Tune to the specified frequency */
 402         if (state->config->pll_set)
 403                 state->config->pll_set(fe, param);
 404
 405         /* Keep track of the new frequency */
 406         /* FIXME this is the wrong way to do this...           */
 407         /* The tuner is shared with the video4linux analog API */
 408         state->current_frequency = param->frequency;
 409
 410         lgdt330x_SwReset(state);
 411         return 0;
 412 }
 413
 414 static int lgdt330x_get_frontend(struct dvb_frontend* fe,
 415                                  struct dvb_frontend_parameters* param)
 416 {
 417         struct lgdt330x_state *state = fe->demodulator_priv;
 418         param->frequency = state->current_frequency;
 419         return 0;
 420 }
 421
 422 static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status)
 423 {
 424         struct lgdt330x_state* state = fe->demodulator_priv;
 425         u8 buf[3];
 426
 427         *status = 0; /* Reset status result */
 428
 429         /* AGC status register */
 430         i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
 431         dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
 432         if ((buf[0] & 0x0c) == 0x8){
 433                 /* Test signal does not exist flag */
 434                 /* as well as the AGC lock flag.   */
 435                 *status |= FE_HAS_SIGNAL;
 436         } else {
 437                 /* Without a signal all other status bits are meaningless */
 438                 return 0;
 439         }
 440
 441         /*
 442          * You must set the Mask bits to 1 in the IRQ_MASK in order
 443          * to see that status bit in the IRQ_STATUS register.
 444          * This is done in SwReset();
 445          */
 446         /* signal status */
 447         i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
 448         dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __FUNCTION__, buf[0], buf[1], buf[2]);
 449
 450
 451         /* sync status */
 452         if ((buf[2] & 0x03) == 0x01) {
 453                 *status |= FE_HAS_SYNC;
 454         }
 455
 456         /* FEC error status */
 457         if ((buf[2] & 0x0c) == 0x08) {
 458                 *status |= FE_HAS_LOCK;
 459                 *status |= FE_HAS_VITERBI;
 460         }
 461
 462         /* Carrier Recovery Lock Status Register */
 463         i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
 464         dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
 465         switch (state->current_modulation) {
 466         case QAM_256:
 467         case QAM_64:
 468                 /* Need to undestand why there are 3 lock levels here */
 469                 if ((buf[0] & 0x07) == 0x07)
 470                         *status |= FE_HAS_CARRIER;
 471                 break;
 472         case VSB_8:
 473                 if ((buf[0] & 0x80) == 0x80)
 474                         *status |= FE_HAS_CARRIER;
 475                 break;
 476         default:
 477                 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
 478         }
 479
 480         return 0;
 481 }
 482
 483 static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status)
 484 {
 485         struct lgdt330x_state* state = fe->demodulator_priv;
 486         int err;
 487         u8 buf[3];
 488
 489         *status = 0; /* Reset status result */
 490
 491         /* lgdt3303 AGC status register */
 492         err = i2c_read_demod_bytes(state, 0x58, buf, 1);
 493         if (err < 0)
 494                 return err;
 495
 496         dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
 497         if ((buf[0] & 0x21) == 0x01){
 498                 /* Test input signal does not exist flag */
 499                 /* as well as the AGC lock flag.   */
 500                 *status |= FE_HAS_SIGNAL;
 501         } else {
 502                 /* Without a signal all other status bits are meaningless */
 503                 return 0;
 504         }
 505
 506         /* Carrier Recovery Lock Status Register */
 507         i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
 508         dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
 509         switch (state->current_modulation) {
 510         case QAM_256:
 511         case QAM_64:
 512                 /* Need to undestand why there are 3 lock levels here */
 513                 if ((buf[0] & 0x07) == 0x07)
 514                         *status |= FE_HAS_CARRIER;
 515                 else
 516                         break;
 517                 i2c_read_demod_bytes(state, 0x8a, buf, 1);
 518                 if ((buf[0] & 0x04) == 0x04)
 519                         *status |= FE_HAS_SYNC;
 520                 if ((buf[0] & 0x01) == 0x01)
 521                         *status |= FE_HAS_LOCK;
 522                 if ((buf[0] & 0x08) == 0x08)
 523                         *status |= FE_HAS_VITERBI;
 524                 break;
 525         case VSB_8:
 526                 if ((buf[0] & 0x80) == 0x80)
 527                         *status |= FE_HAS_CARRIER;
 528                 else
 529                         break;
 530                 i2c_read_demod_bytes(state, 0x38, buf, 1);
 531                 if ((buf[0] & 0x02) == 0x00)
 532                         *status |= FE_HAS_SYNC;
 533                 if ((buf[0] & 0x01) == 0x01) {
 534                         *status |= FE_HAS_LOCK;
 535                         *status |= FE_HAS_VITERBI;
 536                 }
 537                 break;
 538         default:
 539                 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
 540         }
 541         return 0;
 542 }
 543
 544 static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 545 {
 546         /* not directly available. */
 547         *strength = 0;
 548         return 0;
 549 }
 550
 551 static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr)
 552 {
 553 #ifdef SNR_IN_DB
 554         /*
 555          * Spec sheet shows formula for SNR_EQ = 10 log10(25 * 24**2 / noise)
 556          * and SNR_PH = 10 log10(25 * 32**2 / noise) for equalizer and phase tracker
 557          * respectively. The following tables are built on these formulas.
 558          * The usual definition is SNR = 20 log10(signal/noise)
 559          * If the specification is wrong the value retuned is 1/2 the actual SNR in db.
 560          *
 561          * This table is a an ordered list of noise values computed by the
 562          * formula from the spec sheet such that the index into the table
 563          * starting at 43 or 45 is the SNR value in db. There are duplicate noise
 564          * value entries at the beginning because the SNR varies more than
 565          * 1 db for a change of 1 digit in noise at very small values of noise.
 566          *
 567          * Examples from SNR_EQ table:
 568          * noise SNR
 569          *   0    43
 570          *   1    42
 571          *   2    39
 572          *   3    37
 573          *   4    36
 574          *   5    35
 575          *   6    34
 576          *   7    33
 577          *   8    33
 578          *   9    32
 579          *   10   32
 580          *   11   31
 581          *   12   31
 582          *   13   30
 583          */
 584
 585         static const u32 SNR_EQ[] =
 586                 { 1,     2,      2,      2, 3,      3,      4,     4,     5,     7,
 587                   9,     11,     13,     17, 21,     26,     33,    41,    52,    65,
 588                   81,    102,    129,    162, 204,    257,    323,   406,   511,   644,
 589                   810,   1020,   1284,   1616, 2035,   2561,   3224,  4059,  5110,  6433,
 590                   8098,  10195,  12835,  16158, 20341,  25608,  32238, 40585, 51094, 64323,
 591                   80978, 101945, 128341, 161571, 203406, 256073, 0x40000
 592                 };
 593
 594         static const u32 SNR_PH[] =
 595                 { 1,     2,      2,      2,      3,      3,     4,     5,     6,     8,
 596                   10,    12,     15,     19,     23,     29, 37,    46,    58,    73,
 597                   91,    115,    144,    182,    229,    288, 362,   456,   574,   722,
 598                   909,   1144,   1440,   1813,   2282,   2873, 3617,  4553,  5732,  7216,
 599                   9084,  11436,  14396,  18124,  22817,  28724,  36161, 45524, 57312, 72151,
 600                   90833, 114351, 143960, 181235, 228161, 0x080000
 601                 };
 602
 603         static u8 buf[5];/* read data buffer */
 604         static u32 noise;   /* noise value */
 605         static u32 snr_db;  /* index into SNR_EQ[] */
 606         struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
 607
 608         /* read both equalizer and phase tracker noise data */
 609         i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
 610
 611         if (state->current_modulation == VSB_8) {
 612                 /* Equalizer Mean-Square Error Register for VSB */
 613                 noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
 614
 615                 /*
 616                  * Look up noise value in table.
 617                  * A better search algorithm could be used...
 618                  * watch out there are duplicate entries.
 619                  */
 620                 for (snr_db = 0; snr_db < sizeof(SNR_EQ); snr_db++) {
 621                         if (noise < SNR_EQ[snr_db]) {
 622                                 *snr = 43 - snr_db;
 623                                 break;
 624                         }
 625                 }
 626         } else {
 627                 /* Phase Tracker Mean-Square Error Register for QAM */
 628                 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
 629
 630                 /* Look up noise value in table. */
 631                 for (snr_db = 0; snr_db < sizeof(SNR_PH); snr_db++) {
 632                         if (noise < SNR_PH[snr_db]) {
 633                                 *snr = 45 - snr_db;
 634                                 break;
 635                         }
 636                 }
 637         }
 638 #else
 639         /* Return the raw noise value */
 640         static u8 buf[5];/* read data buffer */
 641         static u32 noise;   /* noise value */
 642         struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
 643
 644         /* read both equalizer and pase tracker noise data */
 645         i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
 646
 647         if (state->current_modulation == VSB_8) {
 648                 /* Phase Tracker Mean-Square Error Register for VSB */
 649                 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
 650         } else {
 651
 652                 /* Carrier Recovery Mean-Square Error for QAM */
 653                 i2c_read_demod_bytes(state, 0x1a, buf, 2);
 654                 noise = ((buf[0] & 3) << 8) | buf[1];
 655         }
 656
 657         /* Small values for noise mean signal is better so invert noise */
 658         *snr = ~noise;
 659 #endif
 660
 661         dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
 662
 663         return 0;
 664 }
 665
 666 static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr)
 667 {
 668         /* Return the raw noise value */
 669         static u8 buf[5];/* read data buffer */
 670         static u32 noise;   /* noise value */
 671         struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
 672
 673         if (state->current_modulation == VSB_8) {
 674
 675                 /* Phase Tracker Mean-Square Error Register for VSB */
 676                 noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
 677         } else {
 678
 679                 /* Carrier Recovery Mean-Square Error for QAM */
 680                 i2c_read_demod_bytes(state, 0x1a, buf, 2);
 681                 noise = (buf[0] << 8) | buf[1];
 682         }
 683
 684         /* Small values for noise mean signal is better so invert noise */
 685         *snr = ~noise;
 686
 687         dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
 688
 689         return 0;
 690 }
 691
 692 static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
 693 {
 694         /* I have no idea about this - it may not be needed */
 695         fe_tune_settings->min_delay_ms = 500;
 696         fe_tune_settings->step_size = 0;
 697         fe_tune_settings->max_drift = 0;
 698         return 0;
 699 }
 700
 701 static void lgdt330x_release(struct dvb_frontend* fe)
 702 {
 703         struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
 704         kfree(state);
 705 }
 706
 707 static struct dvb_frontend_ops lgdt3302_ops;
 708 static struct dvb_frontend_ops lgdt3303_ops;
 709
 710 struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
 711                                      struct i2c_adapter* i2c)
 712 {
 713         struct lgdt330x_state* state = NULL;
 714         u8 buf[1];
 715
 716         /* Allocate memory for the internal state */
 717         state = kzalloc(sizeof(struct lgdt330x_state), GFP_KERNEL);
 718         if (state == NULL)
 719                 goto error;
 720
 721         /* Setup the state */
 722         state->config = config;
 723         state->i2c = i2c;
 724         switch (config->demod_chip) {
 725         case LGDT3302:
 726                 memcpy(&state->ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops));
 727                 break;
 728         case LGDT3303:
 729                 memcpy(&state->ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops));
 730                 break;
 731         default:
 732                 goto error;
 733         }
 734
 735         /* Verify communication with demod chip */
 736         if (i2c_read_demod_bytes(state, 2, buf, 1))
 737                 goto error;
 738
 739         state->current_frequency = -1;
 740         state->current_modulation = -1;
 741
 742         /* Create dvb_frontend */
 743         state->frontend.ops = &state->ops;
 744         state->frontend.demodulator_priv = state;
 745         return &state->frontend;
 746
 747 error:
 748         kfree(state);
 749         dprintk("%s: ERROR\n",__FUNCTION__);
 750         return NULL;
 751 }
 752
 753 static struct dvb_frontend_ops lgdt3302_ops = {
 754         .info = {
 755                 .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
 756                 .type = FE_ATSC,
 757                 .frequency_min= 54000000,
 758                 .frequency_max= 858000000,
 759                 .frequency_stepsize= 62500,
 760                 .symbol_rate_min    = 5056941,  /* QAM 64 */
 761                 .symbol_rate_max    = 10762000, /* VSB 8  */
 762                 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
 763         },
 764         .init                 = lgdt330x_init,
 765         .set_frontend         = lgdt330x_set_parameters,
 766         .get_frontend         = lgdt330x_get_frontend,
 767         .get_tune_settings    = lgdt330x_get_tune_settings,
 768         .read_status          = lgdt3302_read_status,
 769         .read_ber             = lgdt330x_read_ber,
 770         .read_signal_strength = lgdt330x_read_signal_strength,
 771         .read_snr             = lgdt3302_read_snr,
 772         .read_ucblocks        = lgdt330x_read_ucblocks,
 773         .release              = lgdt330x_release,
 774 };
 775
 776 static struct dvb_frontend_ops lgdt3303_ops = {
 777         .info = {
 778                 .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
 779                 .type = FE_ATSC,
 780                 .frequency_min= 54000000,
 781                 .frequency_max= 858000000,
 782                 .frequency_stepsize= 62500,
 783                 .symbol_rate_min    = 5056941,  /* QAM 64 */
 784                 .symbol_rate_max    = 10762000, /* VSB 8  */
 785                 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
 786         },
 787         .init                 = lgdt330x_init,
 788         .set_frontend         = lgdt330x_set_parameters,
 789         .get_frontend         = lgdt330x_get_frontend,
 790         .get_tune_settings    = lgdt330x_get_tune_settings,
 791         .read_status          = lgdt3303_read_status,
 792         .read_ber             = lgdt330x_read_ber,
 793         .read_signal_strength = lgdt330x_read_signal_strength,
 794         .read_snr             = lgdt3303_read_snr,
 795         .read_ucblocks        = lgdt330x_read_ucblocks,
 796         .release              = lgdt330x_release,
 797 };
 798
 799 MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
 800 MODULE_AUTHOR("Wilson Michaels");
 801 MODULE_LICENSE("GPL");
 802
 803 EXPORT_SYMBOL(lgdt330x_attach);
 804
 805 /*
 806  * Local variables:
 807  * c-basic-offset: 8
 808  * End:
 809  */