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Merge branch 'x86/ptrace' into x86/tsc
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / media / dvb / frontends / af9013.c
1 /*
2 * DVB USB Linux driver for Afatech AF9015 DVB-T USB2.0 receiver
3 *
4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
5 *
6 * Thanks to Afatech who kindly provided information.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 */
23
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/moduleparam.h>
27 #include <linux/init.h>
28 #include <linux/delay.h>
29 #include <linux/string.h>
30 #include <linux/slab.h>
31 #include <linux/firmware.h>
32
33 #include "dvb_frontend.h"
34 #include "af9013_priv.h"
35 #include "af9013.h"
36
37 int af9013_debug;
38
39 struct af9013_state {
40 struct i2c_adapter *i2c;
41 struct dvb_frontend frontend;
42
43 struct af9013_config config;
44
45 u16 signal_strength;
46 u32 ber;
47 u32 ucblocks;
48 u16 snr;
49 u32 frequency;
50 unsigned long next_statistics_check;
51 };
52
53 static u8 regmask[8] = { 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff };
54
55 static int af9013_write_regs(struct af9013_state *state, u8 mbox, u16 reg,
56 u8 *val, u8 len)
57 {
58 u8 buf[3+len];
59 struct i2c_msg msg = {
60 .addr = state->config.demod_address,
61 .flags = 0,
62 .len = sizeof(buf),
63 .buf = buf };
64
65 buf[0] = reg >> 8;
66 buf[1] = reg & 0xff;
67 buf[2] = mbox;
68 memcpy(&buf[3], val, len);
69
70 if (i2c_transfer(state->i2c, &msg, 1) != 1) {
71 warn("I2C write failed reg:%04x len:%d", reg, len);
72 return -EREMOTEIO;
73 }
74 return 0;
75 }
76
77 static int af9013_write_ofdm_regs(struct af9013_state *state, u16 reg, u8 *val,
78 u8 len)
79 {
80 u8 mbox = (1 << 0)|(1 << 1)|((len - 1) << 2)|(0 << 6)|(0 << 7);
81 return af9013_write_regs(state, mbox, reg, val, len);
82 }
83
84 static int af9013_write_ofsm_regs(struct af9013_state *state, u16 reg, u8 *val,
85 u8 len)
86 {
87 u8 mbox = (1 << 0)|(1 << 1)|((len - 1) << 2)|(1 << 6)|(1 << 7);
88 return af9013_write_regs(state, mbox, reg, val, len);
89 }
90
91 /* write single register */
92 static int af9013_write_reg(struct af9013_state *state, u16 reg, u8 val)
93 {
94 return af9013_write_ofdm_regs(state, reg, &val, 1);
95 }
96
97 /* read single register */
98 static int af9013_read_reg(struct af9013_state *state, u16 reg, u8 *val)
99 {
100 u8 obuf[3] = { reg >> 8, reg & 0xff, 0 };
101 u8 ibuf[1];
102 struct i2c_msg msg[2] = {
103 {
104 .addr = state->config.demod_address,
105 .flags = 0,
106 .len = sizeof(obuf),
107 .buf = obuf
108 }, {
109 .addr = state->config.demod_address,
110 .flags = I2C_M_RD,
111 .len = sizeof(ibuf),
112 .buf = ibuf
113 }
114 };
115
116 if (i2c_transfer(state->i2c, msg, 2) != 2) {
117 warn("I2C read failed reg:%04x", reg);
118 return -EREMOTEIO;
119 }
120 *val = ibuf[0];
121 return 0;
122 }
123
124 static int af9013_write_reg_bits(struct af9013_state *state, u16 reg, u8 pos,
125 u8 len, u8 val)
126 {
127 int ret;
128 u8 tmp, mask;
129
130 ret = af9013_read_reg(state, reg, &tmp);
131 if (ret)
132 return ret;
133
134 mask = regmask[len - 1] << pos;
135 tmp = (tmp & ~mask) | ((val << pos) & mask);
136
137 return af9013_write_reg(state, reg, tmp);
138 }
139
140 static int af9013_read_reg_bits(struct af9013_state *state, u16 reg, u8 pos,
141 u8 len, u8 *val)
142 {
143 int ret;
144 u8 tmp;
145
146 ret = af9013_read_reg(state, reg, &tmp);
147 if (ret)
148 return ret;
149 *val = (tmp >> pos) & regmask[len - 1];
150 return 0;
151 }
152
153 static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval)
154 {
155 int ret;
156 u8 pos;
157 u16 addr;
158 deb_info("%s: gpio:%d gpioval:%02x\n", __func__, gpio, gpioval);
159
160 /* GPIO0 & GPIO1 0xd735
161 GPIO2 & GPIO3 0xd736 */
162
163 switch (gpio) {
164 case 0:
165 case 1:
166 addr = 0xd735;
167 break;
168 case 2:
169 case 3:
170 addr = 0xd736;
171 break;
172
173 default:
174 err("invalid gpio:%d\n", gpio);
175 ret = -EINVAL;
176 goto error;
177 };
178
179 switch (gpio) {
180 case 0:
181 case 2:
182 pos = 0;
183 break;
184 case 1:
185 case 3:
186 default:
187 pos = 4;
188 break;
189 };
190
191 ret = af9013_write_reg_bits(state, addr, pos, 4, gpioval);
192
193 error:
194 return ret;
195 }
196
197 static u32 af913_div(u32 a, u32 b, u32 x)
198 {
199 u32 r = 0, c = 0, i;
200 deb_info("%s: a:%d b:%d x:%d\n", __func__, a, b, x);
201
202 if (a > b) {
203 c = a / b;
204 a = a - c * b;
205 }
206
207 for (i = 0; i < x; i++) {
208 if (a >= b) {
209 r += 1;
210 a -= b;
211 }
212 a <<= 1;
213 r <<= 1;
214 }
215 r = (c << (u32)x) + r;
216
217 deb_info("%s: a:%d b:%d x:%d r:%d r:%x\n", __func__, a, b, x, r, r);
218 return r;
219 }
220
221 static int af9013_set_coeff(struct af9013_state *state, fe_bandwidth_t bw)
222 {
223 int ret = 0;
224 u8 i = 0;
225 u8 buf[24];
226 u32 ns_coeff1_2048nu;
227 u32 ns_coeff1_8191nu;
228 u32 ns_coeff1_8192nu;
229 u32 ns_coeff1_8193nu;
230 u32 ns_coeff2_2k;
231 u32 ns_coeff2_8k;
232
233 deb_info("%s: adc_clock:%d bw:%d\n", __func__,
234 state->config.adc_clock, bw);
235
236 switch (state->config.adc_clock) {
237 case 28800: /* 28.800 MHz */
238 switch (bw) {
239 case BANDWIDTH_6_MHZ:
240 ns_coeff1_2048nu = 0x01e79e7a;
241 ns_coeff1_8191nu = 0x0079eb6e;
242 ns_coeff1_8192nu = 0x0079e79e;
243 ns_coeff1_8193nu = 0x0079e3cf;
244 ns_coeff2_2k = 0x00f3cf3d;
245 ns_coeff2_8k = 0x003cf3cf;
246 break;
247 case BANDWIDTH_7_MHZ:
248 ns_coeff1_2048nu = 0x0238e38e;
249 ns_coeff1_8191nu = 0x008e3d55;
250 ns_coeff1_8192nu = 0x008e38e4;
251 ns_coeff1_8193nu = 0x008e3472;
252 ns_coeff2_2k = 0x011c71c7;
253 ns_coeff2_8k = 0x00471c72;
254 break;
255 case BANDWIDTH_8_MHZ:
256 ns_coeff1_2048nu = 0x028a28a3;
257 ns_coeff1_8191nu = 0x00a28f3d;
258 ns_coeff1_8192nu = 0x00a28a29;
259 ns_coeff1_8193nu = 0x00a28514;
260 ns_coeff2_2k = 0x01451451;
261 ns_coeff2_8k = 0x00514514;
262 break;
263 default:
264 ret = -EINVAL;
265 }
266 break;
267 case 20480: /* 20.480 MHz */
268 switch (bw) {
269 case BANDWIDTH_6_MHZ:
270 ns_coeff1_2048nu = 0x02adb6dc;
271 ns_coeff1_8191nu = 0x00ab7313;
272 ns_coeff1_8192nu = 0x00ab6db7;
273 ns_coeff1_8193nu = 0x00ab685c;
274 ns_coeff2_2k = 0x0156db6e;
275 ns_coeff2_8k = 0x0055b6dc;
276 break;
277 case BANDWIDTH_7_MHZ:
278 ns_coeff1_2048nu = 0x03200001;
279 ns_coeff1_8191nu = 0x00c80640;
280 ns_coeff1_8192nu = 0x00c80000;
281 ns_coeff1_8193nu = 0x00c7f9c0;
282 ns_coeff2_2k = 0x01900000;
283 ns_coeff2_8k = 0x00640000;
284 break;
285 case BANDWIDTH_8_MHZ:
286 ns_coeff1_2048nu = 0x03924926;
287 ns_coeff1_8191nu = 0x00e4996e;
288 ns_coeff1_8192nu = 0x00e49249;
289 ns_coeff1_8193nu = 0x00e48b25;
290 ns_coeff2_2k = 0x01c92493;
291 ns_coeff2_8k = 0x00724925;
292 break;
293 default:
294 ret = -EINVAL;
295 }
296 break;
297 case 28000: /* 28.000 MHz */
298 switch (bw) {
299 case BANDWIDTH_6_MHZ:
300 ns_coeff1_2048nu = 0x01f58d10;
301 ns_coeff1_8191nu = 0x007d672f;
302 ns_coeff1_8192nu = 0x007d6344;
303 ns_coeff1_8193nu = 0x007d5f59;
304 ns_coeff2_2k = 0x00fac688;
305 ns_coeff2_8k = 0x003eb1a2;
306 break;
307 case BANDWIDTH_7_MHZ:
308 ns_coeff1_2048nu = 0x02492492;
309 ns_coeff1_8191nu = 0x00924db7;
310 ns_coeff1_8192nu = 0x00924925;
311 ns_coeff1_8193nu = 0x00924492;
312 ns_coeff2_2k = 0x01249249;
313 ns_coeff2_8k = 0x00492492;
314 break;
315 case BANDWIDTH_8_MHZ:
316 ns_coeff1_2048nu = 0x029cbc15;
317 ns_coeff1_8191nu = 0x00a7343f;
318 ns_coeff1_8192nu = 0x00a72f05;
319 ns_coeff1_8193nu = 0x00a729cc;
320 ns_coeff2_2k = 0x014e5e0a;
321 ns_coeff2_8k = 0x00539783;
322 break;
323 default:
324 ret = -EINVAL;
325 }
326 break;
327 case 25000: /* 25.000 MHz */
328 switch (bw) {
329 case BANDWIDTH_6_MHZ:
330 ns_coeff1_2048nu = 0x0231bcb5;
331 ns_coeff1_8191nu = 0x008c7391;
332 ns_coeff1_8192nu = 0x008c6f2d;
333 ns_coeff1_8193nu = 0x008c6aca;
334 ns_coeff2_2k = 0x0118de5b;
335 ns_coeff2_8k = 0x00463797;
336 break;
337 case BANDWIDTH_7_MHZ:
338 ns_coeff1_2048nu = 0x028f5c29;
339 ns_coeff1_8191nu = 0x00a3dc29;
340 ns_coeff1_8192nu = 0x00a3d70a;
341 ns_coeff1_8193nu = 0x00a3d1ec;
342 ns_coeff2_2k = 0x0147ae14;
343 ns_coeff2_8k = 0x0051eb85;
344 break;
345 case BANDWIDTH_8_MHZ:
346 ns_coeff1_2048nu = 0x02ecfb9d;
347 ns_coeff1_8191nu = 0x00bb44c1;
348 ns_coeff1_8192nu = 0x00bb3ee7;
349 ns_coeff1_8193nu = 0x00bb390d;
350 ns_coeff2_2k = 0x01767dce;
351 ns_coeff2_8k = 0x005d9f74;
352 break;
353 default:
354 ret = -EINVAL;
355 }
356 break;
357 default:
358 err("invalid xtal");
359 return -EINVAL;
360 }
361 if (ret) {
362 err("invalid bandwidth");
363 return ret;
364 }
365
366 buf[i++] = (u8) ((ns_coeff1_2048nu & 0x03000000) >> 24);
367 buf[i++] = (u8) ((ns_coeff1_2048nu & 0x00ff0000) >> 16);
368 buf[i++] = (u8) ((ns_coeff1_2048nu & 0x0000ff00) >> 8);
369 buf[i++] = (u8) ((ns_coeff1_2048nu & 0x000000ff));
370 buf[i++] = (u8) ((ns_coeff2_2k & 0x01c00000) >> 22);
371 buf[i++] = (u8) ((ns_coeff2_2k & 0x003fc000) >> 14);
372 buf[i++] = (u8) ((ns_coeff2_2k & 0x00003fc0) >> 6);
373 buf[i++] = (u8) ((ns_coeff2_2k & 0x0000003f));
374 buf[i++] = (u8) ((ns_coeff1_8191nu & 0x03000000) >> 24);
375 buf[i++] = (u8) ((ns_coeff1_8191nu & 0x00ffc000) >> 16);
376 buf[i++] = (u8) ((ns_coeff1_8191nu & 0x0000ff00) >> 8);
377 buf[i++] = (u8) ((ns_coeff1_8191nu & 0x000000ff));
378 buf[i++] = (u8) ((ns_coeff1_8192nu & 0x03000000) >> 24);
379 buf[i++] = (u8) ((ns_coeff1_8192nu & 0x00ffc000) >> 16);
380 buf[i++] = (u8) ((ns_coeff1_8192nu & 0x0000ff00) >> 8);
381 buf[i++] = (u8) ((ns_coeff1_8192nu & 0x000000ff));
382 buf[i++] = (u8) ((ns_coeff1_8193nu & 0x03000000) >> 24);
383 buf[i++] = (u8) ((ns_coeff1_8193nu & 0x00ffc000) >> 16);
384 buf[i++] = (u8) ((ns_coeff1_8193nu & 0x0000ff00) >> 8);
385 buf[i++] = (u8) ((ns_coeff1_8193nu & 0x000000ff));
386 buf[i++] = (u8) ((ns_coeff2_8k & 0x01c00000) >> 22);
387 buf[i++] = (u8) ((ns_coeff2_8k & 0x003fc000) >> 14);
388 buf[i++] = (u8) ((ns_coeff2_8k & 0x00003fc0) >> 6);
389 buf[i++] = (u8) ((ns_coeff2_8k & 0x0000003f));
390
391 deb_info("%s: coeff:", __func__);
392 debug_dump(buf, sizeof(buf), deb_info);
393
394 /* program */
395 for (i = 0; i < sizeof(buf); i++) {
396 ret = af9013_write_reg(state, 0xae00 + i, buf[i]);
397 if (ret)
398 break;
399 }
400
401 return ret;
402 }
403
404 static int af9013_set_adc_ctrl(struct af9013_state *state)
405 {
406 int ret;
407 u8 buf[3], tmp, i;
408 u32 adc_cw;
409
410 deb_info("%s: adc_clock:%d\n", __func__, state->config.adc_clock);
411
412 /* adc frequency type */
413 switch (state->config.adc_clock) {
414 case 28800: /* 28.800 MHz */
415 tmp = 0;
416 break;
417 case 20480: /* 20.480 MHz */
418 tmp = 1;
419 break;
420 case 28000: /* 28.000 MHz */
421 tmp = 2;
422 break;
423 case 25000: /* 25.000 MHz */
424 tmp = 3;
425 break;
426 default:
427 err("invalid xtal");
428 return -EINVAL;
429 }
430
431 adc_cw = af913_div(state->config.adc_clock*1000, 1000000ul, 19ul);
432
433 buf[0] = (u8) ((adc_cw & 0x000000ff));
434 buf[1] = (u8) ((adc_cw & 0x0000ff00) >> 8);
435 buf[2] = (u8) ((adc_cw & 0x00ff0000) >> 16);
436
437 deb_info("%s: adc_cw:", __func__);
438 debug_dump(buf, sizeof(buf), deb_info);
439
440 /* program */
441 for (i = 0; i < sizeof(buf); i++) {
442 ret = af9013_write_reg(state, 0xd180 + i, buf[i]);
443 if (ret)
444 goto error;
445 }
446 ret = af9013_write_reg_bits(state, 0x9bd2, 0, 4, tmp);
447 error:
448 return ret;
449 }
450
451 static int af9013_set_freq_ctrl(struct af9013_state *state, fe_bandwidth_t bw)
452 {
453 int ret;
454 u16 addr;
455 u8 buf[3], i, j;
456 u32 adc_freq, freq_cw;
457 s8 bfs_spec_inv;
458 int if_sample_freq;
459
460 for (j = 0; j < 3; j++) {
461 if (j == 0) {
462 addr = 0xd140; /* fcw normal */
463 bfs_spec_inv = state->config.rf_spec_inv ? -1 : 1;
464 } else if (j == 1) {
465 addr = 0x9be7; /* fcw dummy ram */
466 bfs_spec_inv = state->config.rf_spec_inv ? -1 : 1;
467 } else {
468 addr = 0x9bea; /* fcw inverted */
469 bfs_spec_inv = state->config.rf_spec_inv ? 1 : -1;
470 }
471
472 adc_freq = state->config.adc_clock * 1000;
473 if_sample_freq = state->config.tuner_if * 1000;
474
475 /* TDA18271 uses different sampling freq for every bw */
476 if (state->config.tuner == AF9013_TUNER_TDA18271) {
477 switch (bw) {
478 case BANDWIDTH_6_MHZ:
479 if_sample_freq = 3300000; /* 3.3 MHz */
480 break;
481 case BANDWIDTH_7_MHZ:
482 if_sample_freq = 3800000; /* 3.8 MHz */
483 break;
484 case BANDWIDTH_8_MHZ:
485 default:
486 if_sample_freq = 4300000; /* 4.3 MHz */
487 break;
488 }
489 }
490
491 while (if_sample_freq > (adc_freq / 2))
492 if_sample_freq = if_sample_freq - adc_freq;
493
494 if (if_sample_freq >= 0)
495 bfs_spec_inv = bfs_spec_inv * (-1);
496 else
497 if_sample_freq = if_sample_freq * (-1);
498
499 freq_cw = af913_div(if_sample_freq, adc_freq, 23ul);
500
501 if (bfs_spec_inv == -1)
502 freq_cw = 0x00800000 - freq_cw;
503
504 buf[0] = (u8) ((freq_cw & 0x000000ff));
505 buf[1] = (u8) ((freq_cw & 0x0000ff00) >> 8);
506 buf[2] = (u8) ((freq_cw & 0x007f0000) >> 16);
507
508
509 deb_info("%s: freq_cw:", __func__);
510 debug_dump(buf, sizeof(buf), deb_info);
511
512 /* program */
513 for (i = 0; i < sizeof(buf); i++) {
514 ret = af9013_write_reg(state, addr++, buf[i]);
515 if (ret)
516 goto error;
517 }
518 }
519 error:
520 return ret;
521 }
522
523 static int af9013_set_ofdm_params(struct af9013_state *state,
524 struct dvb_ofdm_parameters *params, u8 *auto_mode)
525 {
526 int ret;
527 u8 i, buf[3] = {0, 0, 0};
528 *auto_mode = 0; /* set if parameters are requested to auto set */
529
530 switch (params->transmission_mode) {
531 case TRANSMISSION_MODE_AUTO:
532 *auto_mode = 1;
533 case TRANSMISSION_MODE_2K:
534 break;
535 case TRANSMISSION_MODE_8K:
536 buf[0] |= (1 << 0);
537 break;
538 default:
539 return -EINVAL;
540 }
541
542 switch (params->guard_interval) {
543 case GUARD_INTERVAL_AUTO:
544 *auto_mode = 1;
545 case GUARD_INTERVAL_1_32:
546 break;
547 case GUARD_INTERVAL_1_16:
548 buf[0] |= (1 << 2);
549 break;
550 case GUARD_INTERVAL_1_8:
551 buf[0] |= (2 << 2);
552 break;
553 case GUARD_INTERVAL_1_4:
554 buf[0] |= (3 << 2);
555 break;
556 default:
557 return -EINVAL;
558 }
559
560 switch (params->hierarchy_information) {
561 case HIERARCHY_AUTO:
562 *auto_mode = 1;
563 case HIERARCHY_NONE:
564 break;
565 case HIERARCHY_1:
566 buf[0] |= (1 << 4);
567 break;
568 case HIERARCHY_2:
569 buf[0] |= (2 << 4);
570 break;
571 case HIERARCHY_4:
572 buf[0] |= (3 << 4);
573 break;
574 default:
575 return -EINVAL;
576 };
577
578 switch (params->constellation) {
579 case QAM_AUTO:
580 *auto_mode = 1;
581 case QPSK:
582 break;
583 case QAM_16:
584 buf[1] |= (1 << 6);
585 break;
586 case QAM_64:
587 buf[1] |= (2 << 6);
588 break;
589 default:
590 return -EINVAL;
591 }
592
593 /* Use HP. How and which case we can switch to LP? */
594 buf[1] |= (1 << 4);
595
596 switch (params->code_rate_HP) {
597 case FEC_AUTO:
598 *auto_mode = 1;
599 case FEC_1_2:
600 break;
601 case FEC_2_3:
602 buf[2] |= (1 << 0);
603 break;
604 case FEC_3_4:
605 buf[2] |= (2 << 0);
606 break;
607 case FEC_5_6:
608 buf[2] |= (3 << 0);
609 break;
610 case FEC_7_8:
611 buf[2] |= (4 << 0);
612 break;
613 default:
614 return -EINVAL;
615 }
616
617 switch (params->code_rate_LP) {
618 case FEC_AUTO:
619 /* if HIERARCHY_NONE and FEC_NONE then LP FEC is set to FEC_AUTO
620 by dvb_frontend.c for compatibility */
621 if (params->hierarchy_information != HIERARCHY_NONE)
622 *auto_mode = 1;
623 case FEC_1_2:
624 break;
625 case FEC_2_3:
626 buf[2] |= (1 << 3);
627 break;
628 case FEC_3_4:
629 buf[2] |= (2 << 3);
630 break;
631 case FEC_5_6:
632 buf[2] |= (3 << 3);
633 break;
634 case FEC_7_8:
635 buf[2] |= (4 << 3);
636 break;
637 case FEC_NONE:
638 if (params->hierarchy_information == HIERARCHY_AUTO)
639 break;
640 default:
641 return -EINVAL;
642 }
643
644 switch (params->bandwidth) {
645 case BANDWIDTH_6_MHZ:
646 break;
647 case BANDWIDTH_7_MHZ:
648 buf[1] |= (1 << 2);
649 break;
650 case BANDWIDTH_8_MHZ:
651 buf[1] |= (2 << 2);
652 break;
653 default:
654 return -EINVAL;
655 }
656
657 /* program */
658 for (i = 0; i < sizeof(buf); i++) {
659 ret = af9013_write_reg(state, 0xd3c0 + i, buf[i]);
660 if (ret)
661 break;
662 }
663
664 return ret;
665 }
666
667 static int af9013_reset(struct af9013_state *state, u8 sleep)
668 {
669 int ret;
670 u8 tmp, i;
671 deb_info("%s\n", __func__);
672
673 /* enable OFDM reset */
674 ret = af9013_write_reg_bits(state, 0xd417, 4, 1, 1);
675 if (ret)
676 goto error;
677
678 /* start reset mechanism */
679 ret = af9013_write_reg(state, 0xaeff, 1);
680 if (ret)
681 goto error;
682
683 /* reset is done when bit 1 is set */
684 for (i = 0; i < 150; i++) {
685 ret = af9013_read_reg_bits(state, 0xd417, 1, 1, &tmp);
686 if (ret)
687 goto error;
688 if (tmp)
689 break; /* reset done */
690 msleep(10);
691 }
692 if (!tmp)
693 return -ETIMEDOUT;
694
695 /* don't clear reset when going to sleep */
696 if (!sleep) {
697 /* clear OFDM reset */
698 ret = af9013_write_reg_bits(state, 0xd417, 1, 1, 0);
699 if (ret)
700 goto error;
701
702 /* disable OFDM reset */
703 ret = af9013_write_reg_bits(state, 0xd417, 4, 1, 0);
704 }
705 error:
706 return ret;
707 }
708
709 static int af9013_power_ctrl(struct af9013_state *state, u8 onoff)
710 {
711 int ret;
712 deb_info("%s: onoff:%d\n", __func__, onoff);
713
714 if (onoff) {
715 /* power on */
716 ret = af9013_write_reg_bits(state, 0xd73a, 3, 1, 0);
717 if (ret)
718 goto error;
719 ret = af9013_write_reg_bits(state, 0xd417, 1, 1, 0);
720 if (ret)
721 goto error;
722 ret = af9013_write_reg_bits(state, 0xd417, 4, 1, 0);
723 } else {
724 /* power off */
725 ret = af9013_reset(state, 1);
726 if (ret)
727 goto error;
728 ret = af9013_write_reg_bits(state, 0xd73a, 3, 1, 1);
729 }
730 error:
731 return ret;
732 }
733
734 static int af9013_lock_led(struct af9013_state *state, u8 onoff)
735 {
736 deb_info("%s: onoff:%d\n", __func__, onoff);
737
738 return af9013_write_reg_bits(state, 0xd730, 0, 1, onoff);
739 }
740
741 static int af9013_set_frontend(struct dvb_frontend *fe,
742 struct dvb_frontend_parameters *params)
743 {
744 struct af9013_state *state = fe->demodulator_priv;
745 int ret;
746 u8 auto_mode; /* auto set TPS */
747
748 deb_info("%s: freq:%d bw:%d\n", __func__, params->frequency,
749 params->u.ofdm.bandwidth);
750
751 state->frequency = params->frequency;
752
753 /* program CFOE coefficients */
754 ret = af9013_set_coeff(state, params->u.ofdm.bandwidth);
755 if (ret)
756 goto error;
757
758 /* program frequency control */
759 ret = af9013_set_freq_ctrl(state, params->u.ofdm.bandwidth);
760 if (ret)
761 goto error;
762
763 /* clear TPS lock flag (inverted flag) */
764 ret = af9013_write_reg_bits(state, 0xd330, 3, 1, 1);
765 if (ret)
766 goto error;
767
768 /* clear MPEG2 lock flag */
769 ret = af9013_write_reg_bits(state, 0xd507, 6, 1, 0);
770 if (ret)
771 goto error;
772
773 /* empty channel function */
774 ret = af9013_write_reg_bits(state, 0x9bfe, 0, 1, 0);
775 if (ret)
776 goto error;
777
778 /* empty DVB-T channel function */
779 ret = af9013_write_reg_bits(state, 0x9bc2, 0, 1, 0);
780 if (ret)
781 goto error;
782
783 /* program tuner */
784 if (fe->ops.tuner_ops.set_params)
785 fe->ops.tuner_ops.set_params(fe, params);
786
787 /* program TPS and bandwidth, check if auto mode needed */
788 ret = af9013_set_ofdm_params(state, &params->u.ofdm, &auto_mode);
789 if (ret)
790 goto error;
791
792 if (auto_mode) {
793 /* clear easy mode flag */
794 ret = af9013_write_reg(state, 0xaefd, 0);
795 deb_info("%s: auto TPS\n", __func__);
796 } else {
797 /* set easy mode flag */
798 ret = af9013_write_reg(state, 0xaefd, 1);
799 if (ret)
800 goto error;
801 ret = af9013_write_reg(state, 0xaefe, 0);
802 deb_info("%s: manual TPS\n", __func__);
803 }
804 if (ret)
805 goto error;
806
807 /* everything is set, lets try to receive channel - OFSM GO! */
808 ret = af9013_write_reg(state, 0xffff, 0);
809 if (ret)
810 goto error;
811
812 error:
813 return ret;
814 }
815
816 static int af9013_get_frontend(struct dvb_frontend *fe,
817 struct dvb_frontend_parameters *p)
818 {
819 struct af9013_state *state = fe->demodulator_priv;
820 int ret;
821 u8 i, buf[3];
822 deb_info("%s\n", __func__);
823
824 /* read TPS registers */
825 for (i = 0; i < 3; i++) {
826 ret = af9013_read_reg(state, 0xd3c0 + i, &buf[i]);
827 if (ret)
828 goto error;
829 }
830
831 switch ((buf[1] >> 6) & 3) {
832 case 0:
833 p->u.ofdm.constellation = QPSK;
834 break;
835 case 1:
836 p->u.ofdm.constellation = QAM_16;
837 break;
838 case 2:
839 p->u.ofdm.constellation = QAM_64;
840 break;
841 }
842
843 switch ((buf[0] >> 0) & 3) {
844 case 0:
845 p->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K;
846 break;
847 case 1:
848 p->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K;
849 }
850
851 switch ((buf[0] >> 2) & 3) {
852 case 0:
853 p->u.ofdm.guard_interval = GUARD_INTERVAL_1_32;
854 break;
855 case 1:
856 p->u.ofdm.guard_interval = GUARD_INTERVAL_1_16;
857 break;
858 case 2:
859 p->u.ofdm.guard_interval = GUARD_INTERVAL_1_8;
860 break;
861 case 3:
862 p->u.ofdm.guard_interval = GUARD_INTERVAL_1_4;
863 break;
864 }
865
866 switch ((buf[0] >> 4) & 7) {
867 case 0:
868 p->u.ofdm.hierarchy_information = HIERARCHY_NONE;
869 break;
870 case 1:
871 p->u.ofdm.hierarchy_information = HIERARCHY_1;
872 break;
873 case 2:
874 p->u.ofdm.hierarchy_information = HIERARCHY_2;
875 break;
876 case 3:
877 p->u.ofdm.hierarchy_information = HIERARCHY_4;
878 break;
879 }
880
881 switch ((buf[2] >> 0) & 7) {
882 case 0:
883 p->u.ofdm.code_rate_HP = FEC_1_2;
884 break;
885 case 1:
886 p->u.ofdm.code_rate_HP = FEC_2_3;
887 break;
888 case 2:
889 p->u.ofdm.code_rate_HP = FEC_3_4;
890 break;
891 case 3:
892 p->u.ofdm.code_rate_HP = FEC_5_6;
893 break;
894 case 4:
895 p->u.ofdm.code_rate_HP = FEC_7_8;
896 break;
897 }
898
899 switch ((buf[2] >> 3) & 7) {
900 case 0:
901 p->u.ofdm.code_rate_LP = FEC_1_2;
902 break;
903 case 1:
904 p->u.ofdm.code_rate_LP = FEC_2_3;
905 break;
906 case 2:
907 p->u.ofdm.code_rate_LP = FEC_3_4;
908 break;
909 case 3:
910 p->u.ofdm.code_rate_LP = FEC_5_6;
911 break;
912 case 4:
913 p->u.ofdm.code_rate_LP = FEC_7_8;
914 break;
915 }
916
917 switch ((buf[1] >> 2) & 3) {
918 case 0:
919 p->u.ofdm.bandwidth = BANDWIDTH_6_MHZ;
920 break;
921 case 1:
922 p->u.ofdm.bandwidth = BANDWIDTH_7_MHZ;
923 break;
924 case 2:
925 p->u.ofdm.bandwidth = BANDWIDTH_8_MHZ;
926 break;
927 }
928
929 p->inversion = INVERSION_AUTO;
930 p->frequency = state->frequency;
931
932 error:
933 return ret;
934 }
935
936 static int af9013_update_ber_unc(struct dvb_frontend *fe)
937 {
938 struct af9013_state *state = fe->demodulator_priv;
939 int ret;
940 u8 buf[3], i;
941 u32 error_bit_count = 0;
942 u32 total_bit_count = 0;
943 u32 abort_packet_count = 0;
944
945 state->ber = 0;
946
947 /* check if error bit count is ready */
948 ret = af9013_read_reg_bits(state, 0xd391, 4, 1, &buf[0]);
949 if (ret)
950 goto error;
951 if (!buf[0])
952 goto exit;
953
954 /* get RSD packet abort count */
955 for (i = 0; i < 2; i++) {
956 ret = af9013_read_reg(state, 0xd38a + i, &buf[i]);
957 if (ret)
958 goto error;
959 }
960 abort_packet_count = (buf[1] << 8) + buf[0];
961
962 /* get error bit count */
963 for (i = 0; i < 3; i++) {
964 ret = af9013_read_reg(state, 0xd387 + i, &buf[i]);
965 if (ret)
966 goto error;
967 }
968 error_bit_count = (buf[2] << 16) + (buf[1] << 8) + buf[0];
969 error_bit_count = error_bit_count - abort_packet_count * 8 * 8;
970
971 /* get used RSD counting period (10000 RSD packets used) */
972 for (i = 0; i < 2; i++) {
973 ret = af9013_read_reg(state, 0xd385 + i, &buf[i]);
974 if (ret)
975 goto error;
976 }
977 total_bit_count = (buf[1] << 8) + buf[0];
978 total_bit_count = total_bit_count - abort_packet_count;
979 total_bit_count = total_bit_count * 204 * 8;
980
981 if (total_bit_count)
982 state->ber = error_bit_count * 1000000000 / total_bit_count;
983
984 state->ucblocks += abort_packet_count;
985
986 deb_info("%s: err bits:%d total bits:%d abort count:%d\n", __func__,
987 error_bit_count, total_bit_count, abort_packet_count);
988
989 /* set BER counting range */
990 ret = af9013_write_reg(state, 0xd385, 10000 & 0xff);
991 if (ret)
992 goto error;
993 ret = af9013_write_reg(state, 0xd386, 10000 >> 8);
994 if (ret)
995 goto error;
996 /* reset and start BER counter */
997 ret = af9013_write_reg_bits(state, 0xd391, 4, 1, 1);
998 if (ret)
999 goto error;
1000
1001 exit:
1002 error:
1003 return ret;
1004 }
1005
1006 static int af9013_update_snr(struct dvb_frontend *fe)
1007 {
1008 struct af9013_state *state = fe->demodulator_priv;
1009 int ret;
1010 u8 buf[3], i, len;
1011 u32 quant = 0;
1012 struct snr_table *snr_table;
1013
1014 /* check if quantizer ready (for snr) */
1015 ret = af9013_read_reg_bits(state, 0xd2e1, 3, 1, &buf[0]);
1016 if (ret)
1017 goto error;
1018 if (buf[0]) {
1019 /* quantizer ready - read it */
1020 for (i = 0; i < 3; i++) {
1021 ret = af9013_read_reg(state, 0xd2e3 + i, &buf[i]);
1022 if (ret)
1023 goto error;
1024 }
1025 quant = (buf[2] << 16) + (buf[1] << 8) + buf[0];
1026
1027 /* read current constellation */
1028 ret = af9013_read_reg(state, 0xd3c1, &buf[0]);
1029 if (ret)
1030 goto error;
1031
1032 switch ((buf[0] >> 6) & 3) {
1033 case 0:
1034 len = ARRAY_SIZE(qpsk_snr_table);
1035 snr_table = qpsk_snr_table;
1036 break;
1037 case 1:
1038 len = ARRAY_SIZE(qam16_snr_table);
1039 snr_table = qam16_snr_table;
1040 break;
1041 case 2:
1042 len = ARRAY_SIZE(qam64_snr_table);
1043 snr_table = qam64_snr_table;
1044 break;
1045 default:
1046 len = 0;
1047 break;
1048 }
1049
1050 if (len) {
1051 for (i = 0; i < len; i++) {
1052 if (quant < snr_table[i].val) {
1053 state->snr = snr_table[i].snr * 10;
1054 break;
1055 }
1056 }
1057 }
1058
1059 /* set quantizer super frame count */
1060 ret = af9013_write_reg(state, 0xd2e2, 1);
1061 if (ret)
1062 goto error;
1063
1064 /* check quantizer availability */
1065 for (i = 0; i < 10; i++) {
1066 msleep(10);
1067 ret = af9013_read_reg_bits(state, 0xd2e6, 0, 1,
1068 &buf[0]);
1069 if (ret)
1070 goto error;
1071 if (!buf[0])
1072 break;
1073 }
1074
1075 /* reset quantizer */
1076 ret = af9013_write_reg_bits(state, 0xd2e1, 3, 1, 1);
1077 if (ret)
1078 goto error;
1079 }
1080
1081 error:
1082 return ret;
1083 }
1084
1085 static int af9013_update_signal_strength(struct dvb_frontend *fe)
1086 {
1087 struct af9013_state *state = fe->demodulator_priv;
1088 int ret;
1089 u8 tmp0;
1090 u8 rf_gain, rf_50, rf_80, if_gain, if_50, if_80;
1091 int signal_strength;
1092
1093 deb_info("%s\n", __func__);
1094
1095 state->signal_strength = 0;
1096
1097 ret = af9013_read_reg_bits(state, 0x9bee, 0, 1, &tmp0);
1098 if (ret)
1099 goto error;
1100 if (tmp0) {
1101 ret = af9013_read_reg(state, 0x9bbd, &rf_50);
1102 if (ret)
1103 goto error;
1104 ret = af9013_read_reg(state, 0x9bd0, &rf_80);
1105 if (ret)
1106 goto error;
1107 ret = af9013_read_reg(state, 0x9be2, &if_50);
1108 if (ret)
1109 goto error;
1110 ret = af9013_read_reg(state, 0x9be4, &if_80);
1111 if (ret)
1112 goto error;
1113 ret = af9013_read_reg(state, 0xd07c, &rf_gain);
1114 if (ret)
1115 goto error;
1116 ret = af9013_read_reg(state, 0xd07d, &if_gain);
1117 if (ret)
1118 goto error;
1119 signal_strength = (0xffff / (9 * (rf_50 + if_50) - \
1120 11 * (rf_80 + if_80))) * (10 * (rf_gain + if_gain) - \
1121 11 * (rf_80 + if_80));
1122 if (signal_strength < 0)
1123 signal_strength = 0;
1124 else if (signal_strength > 0xffff)
1125 signal_strength = 0xffff;
1126
1127 state->signal_strength = signal_strength;
1128 }
1129
1130 error:
1131 return ret;
1132 }
1133
1134 static int af9013_update_statistics(struct dvb_frontend *fe)
1135 {
1136 struct af9013_state *state = fe->demodulator_priv;
1137 int ret;
1138
1139 if (time_before(jiffies, state->next_statistics_check))
1140 return 0;
1141
1142 /* set minimum statistic update interval */
1143 state->next_statistics_check = jiffies + msecs_to_jiffies(1200);
1144
1145 ret = af9013_update_signal_strength(fe);
1146 if (ret)
1147 goto error;
1148 ret = af9013_update_snr(fe);
1149 if (ret)
1150 goto error;
1151 ret = af9013_update_ber_unc(fe);
1152 if (ret)
1153 goto error;
1154
1155 error:
1156 return ret;
1157 }
1158
1159 static int af9013_get_tune_settings(struct dvb_frontend *fe,
1160 struct dvb_frontend_tune_settings *fesettings)
1161 {
1162 fesettings->min_delay_ms = 800;
1163 fesettings->step_size = 0;
1164 fesettings->max_drift = 0;
1165
1166 return 0;
1167 }
1168
1169 static int af9013_read_status(struct dvb_frontend *fe, fe_status_t *status)
1170 {
1171 struct af9013_state *state = fe->demodulator_priv;
1172 int ret = 0;
1173 u8 tmp;
1174 *status = 0;
1175
1176 /* TPS lock */
1177 ret = af9013_read_reg_bits(state, 0xd330, 3, 1, &tmp);
1178 if (ret)
1179 goto error;
1180 if (tmp)
1181 *status |= FE_HAS_VITERBI | FE_HAS_CARRIER | FE_HAS_SIGNAL;
1182
1183 /* MPEG2 lock */
1184 ret = af9013_read_reg_bits(state, 0xd507, 6, 1, &tmp);
1185 if (ret)
1186 goto error;
1187 if (tmp)
1188 *status |= FE_HAS_SYNC | FE_HAS_LOCK;
1189
1190 if (!(*status & FE_HAS_SIGNAL)) {
1191 /* AGC lock */
1192 ret = af9013_read_reg_bits(state, 0xd1a0, 6, 1, &tmp);
1193 if (ret)
1194 goto error;
1195 if (tmp)
1196 *status |= FE_HAS_SIGNAL;
1197 }
1198
1199 if (!(*status & FE_HAS_CARRIER)) {
1200 /* CFO lock */
1201 ret = af9013_read_reg_bits(state, 0xd333, 7, 1, &tmp);
1202 if (ret)
1203 goto error;
1204 if (tmp)
1205 *status |= FE_HAS_CARRIER;
1206 }
1207
1208 if (!(*status & FE_HAS_CARRIER)) {
1209 /* SFOE lock */
1210 ret = af9013_read_reg_bits(state, 0xd334, 6, 1, &tmp);
1211 if (ret)
1212 goto error;
1213 if (tmp)
1214 *status |= FE_HAS_CARRIER;
1215 }
1216
1217 ret = af9013_update_statistics(fe);
1218
1219 error:
1220 return ret;
1221 }
1222
1223
1224 static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber)
1225 {
1226 struct af9013_state *state = fe->demodulator_priv;
1227 int ret;
1228 ret = af9013_update_statistics(fe);
1229 *ber = state->ber;
1230 return ret;
1231 }
1232
1233 static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1234 {
1235 struct af9013_state *state = fe->demodulator_priv;
1236 int ret;
1237 ret = af9013_update_statistics(fe);
1238 *strength = state->signal_strength;
1239 return ret;
1240 }
1241
1242 static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr)
1243 {
1244 struct af9013_state *state = fe->demodulator_priv;
1245 int ret;
1246 ret = af9013_update_statistics(fe);
1247 *snr = state->snr;
1248 return ret;
1249 }
1250
1251 static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1252 {
1253 struct af9013_state *state = fe->demodulator_priv;
1254 int ret;
1255 ret = af9013_update_statistics(fe);
1256 *ucblocks = state->ucblocks;
1257 return ret;
1258 }
1259
1260 static int af9013_sleep(struct dvb_frontend *fe)
1261 {
1262 struct af9013_state *state = fe->demodulator_priv;
1263 int ret;
1264 deb_info("%s\n", __func__);
1265
1266 ret = af9013_lock_led(state, 0);
1267 if (ret)
1268 goto error;
1269
1270 ret = af9013_power_ctrl(state, 0);
1271 error:
1272 return ret;
1273 }
1274
1275 static int af9013_init(struct dvb_frontend *fe)
1276 {
1277 struct af9013_state *state = fe->demodulator_priv;
1278 int ret, i, len;
1279 u8 tmp0, tmp1;
1280 struct regdesc *init;
1281 deb_info("%s\n", __func__);
1282
1283 /* reset OFDM */
1284 ret = af9013_reset(state, 0);
1285 if (ret)
1286 goto error;
1287
1288 /* power on */
1289 ret = af9013_power_ctrl(state, 1);
1290 if (ret)
1291 goto error;
1292
1293 /* enable ADC */
1294 ret = af9013_write_reg(state, 0xd73a, 0xa4);
1295 if (ret)
1296 goto error;
1297
1298 /* write API version to firmware */
1299 for (i = 0; i < sizeof(state->config.api_version); i++) {
1300 ret = af9013_write_reg(state, 0x9bf2 + i,
1301 state->config.api_version[i]);
1302 if (ret)
1303 goto error;
1304 }
1305
1306 /* program ADC control */
1307 ret = af9013_set_adc_ctrl(state);
1308 if (ret)
1309 goto error;
1310
1311 /* set I2C master clock */
1312 ret = af9013_write_reg(state, 0xd416, 0x14);
1313 if (ret)
1314 goto error;
1315
1316 /* set 16 embx */
1317 ret = af9013_write_reg_bits(state, 0xd700, 1, 1, 1);
1318 if (ret)
1319 goto error;
1320
1321 /* set no trigger */
1322 ret = af9013_write_reg_bits(state, 0xd700, 2, 1, 0);
1323 if (ret)
1324 goto error;
1325
1326 /* set read-update bit for constellation */
1327 ret = af9013_write_reg_bits(state, 0xd371, 1, 1, 1);
1328 if (ret)
1329 goto error;
1330
1331 /* enable FEC monitor */
1332 ret = af9013_write_reg_bits(state, 0xd392, 1, 1, 1);
1333 if (ret)
1334 goto error;
1335
1336 /* load OFSM settings */
1337 deb_info("%s: load ofsm settings\n", __func__);
1338 len = ARRAY_SIZE(ofsm_init);
1339 init = ofsm_init;
1340 for (i = 0; i < len; i++) {
1341 ret = af9013_write_reg_bits(state, init[i].addr, init[i].pos,
1342 init[i].len, init[i].val);
1343 if (ret)
1344 goto error;
1345 }
1346
1347 /* load tuner specific settings */
1348 deb_info("%s: load tuner specific settings\n", __func__);
1349 switch (state->config.tuner) {
1350 case AF9013_TUNER_MXL5003D:
1351 len = ARRAY_SIZE(tuner_init_mxl5003d);
1352 init = tuner_init_mxl5003d;
1353 break;
1354 case AF9013_TUNER_MXL5005D:
1355 case AF9013_TUNER_MXL5005R:
1356 len = ARRAY_SIZE(tuner_init_mxl5005);
1357 init = tuner_init_mxl5005;
1358 break;
1359 case AF9013_TUNER_ENV77H11D5:
1360 len = ARRAY_SIZE(tuner_init_env77h11d5);
1361 init = tuner_init_env77h11d5;
1362 break;
1363 case AF9013_TUNER_MT2060:
1364 len = ARRAY_SIZE(tuner_init_mt2060);
1365 init = tuner_init_mt2060;
1366 break;
1367 case AF9013_TUNER_MC44S803:
1368 len = ARRAY_SIZE(tuner_init_mc44s803);
1369 init = tuner_init_mc44s803;
1370 break;
1371 case AF9013_TUNER_QT1010:
1372 case AF9013_TUNER_QT1010A:
1373 len = ARRAY_SIZE(tuner_init_qt1010);
1374 init = tuner_init_qt1010;
1375 break;
1376 case AF9013_TUNER_MT2060_2:
1377 len = ARRAY_SIZE(tuner_init_mt2060_2);
1378 init = tuner_init_mt2060_2;
1379 break;
1380 case AF9013_TUNER_TDA18271:
1381 len = ARRAY_SIZE(tuner_init_tda18271);
1382 init = tuner_init_tda18271;
1383 break;
1384 case AF9013_TUNER_UNKNOWN:
1385 default:
1386 len = ARRAY_SIZE(tuner_init_unknown);
1387 init = tuner_init_unknown;
1388 break;
1389 }
1390
1391 for (i = 0; i < len; i++) {
1392 ret = af9013_write_reg_bits(state, init[i].addr, init[i].pos,
1393 init[i].len, init[i].val);
1394 if (ret)
1395 goto error;
1396 }
1397
1398 /* set TS mode */
1399 deb_info("%s: setting ts mode\n", __func__);
1400 tmp0 = 0; /* parallel mode */
1401 tmp1 = 0; /* serial mode */
1402 switch (state->config.output_mode) {
1403 case AF9013_OUTPUT_MODE_PARALLEL:
1404 tmp0 = 1;
1405 break;
1406 case AF9013_OUTPUT_MODE_SERIAL:
1407 tmp1 = 1;
1408 break;
1409 case AF9013_OUTPUT_MODE_USB:
1410 /* usb mode for AF9015 */
1411 default:
1412 break;
1413 }
1414 ret = af9013_write_reg_bits(state, 0xd500, 1, 1, tmp0); /* parallel */
1415 if (ret)
1416 goto error;
1417 ret = af9013_write_reg_bits(state, 0xd500, 2, 1, tmp1); /* serial */
1418 if (ret)
1419 goto error;
1420
1421 /* enable lock led */
1422 ret = af9013_lock_led(state, 1);
1423 if (ret)
1424 goto error;
1425
1426 error:
1427 return ret;
1428 }
1429
1430 static struct dvb_frontend_ops af9013_ops;
1431
1432 static int af9013_download_firmware(struct af9013_state *state)
1433 {
1434 int i, len, packets, remainder, ret;
1435 const struct firmware *fw;
1436 u16 addr = 0x5100; /* firmware start address */
1437 u16 checksum = 0;
1438 u8 val;
1439 u8 fw_params[4];
1440 u8 *data;
1441 u8 *fw_file = AF9013_DEFAULT_FIRMWARE;
1442
1443 msleep(100);
1444 /* check whether firmware is already running */
1445 ret = af9013_read_reg(state, 0x98be, &val);
1446 if (ret)
1447 goto error;
1448 else
1449 deb_info("%s: firmware status:%02x\n", __func__, val);
1450
1451 if (val == 0x0c) /* fw is running, no need for download */
1452 goto exit;
1453
1454 info("found a '%s' in cold state, will try to load a firmware",
1455 af9013_ops.info.name);
1456
1457 /* request the firmware, this will block and timeout */
1458 ret = request_firmware(&fw, fw_file, &state->i2c->dev);
1459 if (ret) {
1460 err("did not find the firmware file. (%s) "
1461 "Please see linux/Documentation/dvb/ for more details" \
1462 " on firmware-problems. (%d)",
1463 fw_file, ret);
1464 goto error;
1465 }
1466
1467 info("downloading firmware from file '%s'", fw_file);
1468
1469 /* calc checksum */
1470 for (i = 0; i < fw->size; i++)
1471 checksum += fw->data[i];
1472
1473 fw_params[0] = checksum >> 8;
1474 fw_params[1] = checksum & 0xff;
1475 fw_params[2] = fw->size >> 8;
1476 fw_params[3] = fw->size & 0xff;
1477
1478 /* write fw checksum & size */
1479 ret = af9013_write_ofsm_regs(state, 0x50fc,
1480 fw_params, sizeof(fw_params));
1481 if (ret)
1482 goto error_release;
1483
1484 #define FW_PACKET_MAX_DATA 16
1485
1486 packets = fw->size / FW_PACKET_MAX_DATA;
1487 remainder = fw->size % FW_PACKET_MAX_DATA;
1488 len = FW_PACKET_MAX_DATA;
1489 for (i = 0; i <= packets; i++) {
1490 if (i == packets) /* set size of the last packet */
1491 len = remainder;
1492
1493 data = (u8 *)(fw->data + i * FW_PACKET_MAX_DATA);
1494 ret = af9013_write_ofsm_regs(state, addr, data, len);
1495 addr += FW_PACKET_MAX_DATA;
1496
1497 if (ret) {
1498 err("firmware download failed at %d with %d", i, ret);
1499 goto error_release;
1500 }
1501 }
1502
1503 /* request boot firmware */
1504 ret = af9013_write_reg(state, 0xe205, 1);
1505 if (ret)
1506 goto error_release;
1507
1508 for (i = 0; i < 15; i++) {
1509 msleep(100);
1510
1511 /* check firmware status */
1512 ret = af9013_read_reg(state, 0x98be, &val);
1513 if (ret)
1514 goto error_release;
1515
1516 deb_info("%s: firmware status:%02x\n", __func__, val);
1517
1518 if (val == 0x0c || val == 0x04) /* success or fail */
1519 break;
1520 }
1521
1522 if (val == 0x04) {
1523 err("firmware did not run");
1524 ret = -1;
1525 } else if (val != 0x0c) {
1526 err("firmware boot timeout");
1527 ret = -1;
1528 }
1529
1530 error_release:
1531 release_firmware(fw);
1532 error:
1533 exit:
1534 if (!ret)
1535 info("found a '%s' in warm state.", af9013_ops.info.name);
1536 return ret;
1537 }
1538
1539 static int af9013_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
1540 {
1541 int ret;
1542 struct af9013_state *state = fe->demodulator_priv;
1543 deb_info("%s: enable:%d\n", __func__, enable);
1544
1545 if (state->config.output_mode == AF9013_OUTPUT_MODE_USB)
1546 ret = af9013_write_reg_bits(state, 0xd417, 3, 1, enable);
1547 else
1548 ret = af9013_write_reg_bits(state, 0xd607, 2, 1, enable);
1549
1550 return ret;
1551 }
1552
1553 static void af9013_release(struct dvb_frontend *fe)
1554 {
1555 struct af9013_state *state = fe->demodulator_priv;
1556 kfree(state);
1557 }
1558
1559 static struct dvb_frontend_ops af9013_ops;
1560
1561 struct dvb_frontend *af9013_attach(const struct af9013_config *config,
1562 struct i2c_adapter *i2c)
1563 {
1564 int ret;
1565 struct af9013_state *state = NULL;
1566 u8 buf[3], i;
1567
1568 /* allocate memory for the internal state */
1569 state = kzalloc(sizeof(struct af9013_state), GFP_KERNEL);
1570 if (state == NULL)
1571 goto error;
1572
1573 /* setup the state */
1574 state->i2c = i2c;
1575 memcpy(&state->config, config, sizeof(struct af9013_config));
1576
1577 /* chip version */
1578 ret = af9013_read_reg_bits(state, 0xd733, 4, 4, &buf[2]);
1579 if (ret)
1580 goto error;
1581
1582 /* ROM version */
1583 for (i = 0; i < 2; i++) {
1584 ret = af9013_read_reg(state, 0x116b + i, &buf[i]);
1585 if (ret)
1586 goto error;
1587 }
1588 deb_info("%s: chip version:%d ROM version:%d.%d\n", __func__,
1589 buf[2], buf[0], buf[1]);
1590
1591 /* download firmware */
1592 if (state->config.output_mode != AF9013_OUTPUT_MODE_USB) {
1593 ret = af9013_download_firmware(state);
1594 if (ret)
1595 goto error;
1596 }
1597
1598 /* firmware version */
1599 for (i = 0; i < 3; i++) {
1600 ret = af9013_read_reg(state, 0x5103 + i, &buf[i]);
1601 if (ret)
1602 goto error;
1603 }
1604 info("firmware version:%d.%d.%d", buf[0], buf[1], buf[2]);
1605
1606 /* settings for mp2if */
1607 if (state->config.output_mode == AF9013_OUTPUT_MODE_USB) {
1608 /* AF9015 split PSB to 1.5k + 0.5k */
1609 ret = af9013_write_reg_bits(state, 0xd50b, 2, 1, 1);
1610 } else {
1611 /* AF9013 change the output bit to data7 */
1612 ret = af9013_write_reg_bits(state, 0xd500, 3, 1, 1);
1613 if (ret)
1614 goto error;
1615 /* AF9013 set mpeg to full speed */
1616 ret = af9013_write_reg_bits(state, 0xd502, 4, 1, 1);
1617 }
1618 if (ret)
1619 goto error;
1620 ret = af9013_write_reg_bits(state, 0xd520, 4, 1, 1);
1621 if (ret)
1622 goto error;
1623
1624 /* set GPIOs */
1625 for (i = 0; i < sizeof(state->config.gpio); i++) {
1626 ret = af9013_set_gpio(state, i, state->config.gpio[i]);
1627 if (ret)
1628 goto error;
1629 }
1630
1631 /* create dvb_frontend */
1632 memcpy(&state->frontend.ops, &af9013_ops,
1633 sizeof(struct dvb_frontend_ops));
1634 state->frontend.demodulator_priv = state;
1635
1636 return &state->frontend;
1637 error:
1638 kfree(state);
1639 return NULL;
1640 }
1641 EXPORT_SYMBOL(af9013_attach);
1642
1643 static struct dvb_frontend_ops af9013_ops = {
1644 .info = {
1645 .name = "Afatech AF9013 DVB-T",
1646 .type = FE_OFDM,
1647 .frequency_min = 174000000,
1648 .frequency_max = 862000000,
1649 .frequency_stepsize = 250000,
1650 .frequency_tolerance = 0,
1651 .caps =
1652 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1653 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1654 FE_CAN_QPSK | FE_CAN_QAM_16 |
1655 FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
1656 FE_CAN_TRANSMISSION_MODE_AUTO |
1657 FE_CAN_GUARD_INTERVAL_AUTO |
1658 FE_CAN_HIERARCHY_AUTO |
1659 FE_CAN_RECOVER |
1660 FE_CAN_MUTE_TS
1661 },
1662
1663 .release = af9013_release,
1664 .init = af9013_init,
1665 .sleep = af9013_sleep,
1666 .i2c_gate_ctrl = af9013_i2c_gate_ctrl,
1667
1668 .set_frontend = af9013_set_frontend,
1669 .get_frontend = af9013_get_frontend,
1670
1671 .get_tune_settings = af9013_get_tune_settings,
1672
1673 .read_status = af9013_read_status,
1674 .read_ber = af9013_read_ber,
1675 .read_signal_strength = af9013_read_signal_strength,
1676 .read_snr = af9013_read_snr,
1677 .read_ucblocks = af9013_read_ucblocks,
1678 };
1679
1680 module_param_named(debug, af9013_debug, int, 0644);
1681 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1682
1683 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1684 MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver");
1685 MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)