2 * Driver for Maxim MAX2165 silicon tuner
4 * Copyright (c) 2009 David T. L. Wong <davidtlwong@gmail.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/videodev2.h>
25 #include <linux/delay.h>
26 #include <linux/dvb/frontend.h>
27 #include <linux/i2c.h>
29 #include "dvb_frontend.h"
32 #include "max2165_priv.h"
33 #include "tuner-i2c.h"
35 #define dprintk(args...) \
38 printk(KERN_DEBUG "max2165: " args); \
42 module_param(debug
, int, 0644);
43 MODULE_PARM_DESC(debug
, "Turn on/off debugging (default:off).");
45 static int max2165_write_reg(struct max2165_priv
*priv
, u8 reg
, u8 data
)
48 u8 buf
[] = { reg
, data
};
49 struct i2c_msg msg
= { .flags
= 0, .buf
= buf
, .len
= 2 };
51 msg
.addr
= priv
->config
->i2c_address
;
54 printk(KERN_DEBUG
"%s: reg=0x%02X, data=0x%02X\n",
57 ret
= i2c_transfer(priv
->i2c
, &msg
, 1);
60 dprintk(KERN_DEBUG
"%s: error reg=0x%x, data=0x%x, ret=%i\n",
61 __func__
, reg
, data
, ret
);
63 return (ret
!= 1) ? -EIO
: 0;
66 static int max2165_read_reg(struct max2165_priv
*priv
, u8 reg
, u8
*p_data
)
69 u8 dev_addr
= priv
->config
->i2c_address
;
73 struct i2c_msg msg
[] = {
74 { .addr
= dev_addr
, .flags
= 0, .buf
= b0
, .len
= 1 },
75 { .addr
= dev_addr
, .flags
= I2C_M_RD
, .buf
= b1
, .len
= 1 },
78 ret
= i2c_transfer(priv
->i2c
, msg
, 2);
80 dprintk(KERN_DEBUG
"%s: error reg=0x%x, ret=%i\n",
87 printk(KERN_DEBUG
"%s: reg=0x%02X, data=0x%02X\n",
88 __func__
, reg
, b1
[0]);
92 static int max2165_mask_write_reg(struct max2165_priv
*priv
, u8 reg
,
99 ret
= max2165_read_reg(priv
, reg
, &v
);
104 ret
= max2165_write_reg(priv
, reg
, v
);
109 static int max2165_read_rom_table(struct max2165_priv
*priv
)
114 for (i
= 0; i
< 3; i
++) {
115 max2165_write_reg(priv
, REG_ROM_TABLE_ADDR
, i
+ 1);
116 max2165_read_reg(priv
, REG_ROM_TABLE_DATA
, &dat
[i
]);
119 priv
->tf_ntch_low_cfg
= dat
[0] >> 4;
120 priv
->tf_ntch_hi_cfg
= dat
[0] & 0x0F;
121 priv
->tf_balun_low_ref
= dat
[1] & 0x0F;
122 priv
->tf_balun_hi_ref
= dat
[1] >> 4;
123 priv
->bb_filter_7mhz_cfg
= dat
[2] & 0x0F;
124 priv
->bb_filter_8mhz_cfg
= dat
[2] >> 4;
126 dprintk("tf_ntch_low_cfg = 0x%X\n", priv
->tf_ntch_low_cfg
);
127 dprintk("tf_ntch_hi_cfg = 0x%X\n", priv
->tf_ntch_hi_cfg
);
128 dprintk("tf_balun_low_ref = 0x%X\n", priv
->tf_balun_low_ref
);
129 dprintk("tf_balun_hi_ref = 0x%X\n", priv
->tf_balun_hi_ref
);
130 dprintk("bb_filter_7mhz_cfg = 0x%X\n", priv
->bb_filter_7mhz_cfg
);
131 dprintk("bb_filter_8mhz_cfg = 0x%X\n", priv
->bb_filter_8mhz_cfg
);
136 static int max2165_set_osc(struct max2165_priv
*priv
, u8 osc
/*MHz*/)
146 max2165_mask_write_reg(priv
, REG_PLL_CFG
, 0x07, v
);
151 static int max2165_set_bandwidth(struct max2165_priv
*priv
, u32 bw
)
155 if (bw
== BANDWIDTH_8_MHZ
)
156 val
= priv
->bb_filter_8mhz_cfg
;
158 val
= priv
->bb_filter_7mhz_cfg
;
160 max2165_mask_write_reg(priv
, REG_BASEBAND_CTRL
, 0xF0, val
<< 4);
165 int fixpt_div32(u32 dividend
, u32 divisor
, u32
*quotient
, u32
*fraction
)
174 q
= dividend
/ divisor
;
175 remainder
= dividend
- q
* divisor
;
177 for (i
= 0; i
< 31; i
++) {
179 if (remainder
>= divisor
) {
181 remainder
-= divisor
;
192 static int max2165_set_rf(struct max2165_priv
*priv
, u32 freq
)
197 u32 quotient
, fraction
;
199 /* Set PLL divider according to RF frequency */
200 fixpt_div32(freq
/ 1000, priv
->config
->osc_clk
* 1000,
201 "ient
, &fraction
);
203 /* 20-bit fraction */
206 max2165_write_reg(priv
, REG_NDIV_INT
, quotient
);
207 max2165_mask_write_reg(priv
, REG_NDIV_FRAC2
, 0x0F, fraction
>> 16);
208 max2165_write_reg(priv
, REG_NDIV_FRAC1
, fraction
>> 8);
209 max2165_write_reg(priv
, REG_NDIV_FRAC0
, fraction
);
212 tf_ntch
= (freq
< 725000000) ?
213 priv
->tf_ntch_low_cfg
: priv
->tf_ntch_hi_cfg
;
215 /* Tracking filter balun */
216 t
= priv
->tf_balun_low_ref
;
217 t
+= (priv
->tf_balun_hi_ref
- priv
->tf_balun_low_ref
)
218 * (freq
/ 1000 - 470000) / (780000 - 470000);
221 dprintk("tf = %X\n", tf
);
224 max2165_write_reg(priv
, REG_TRACK_FILTER
, tf
);
229 static void max2165_debug_status(struct max2165_priv
*priv
)
232 u8 auto_vco_success
, auto_vco_active
;
234 u8 dc_offset_low
, dc_offset_hi
;
235 u8 signal_lv_over_threshold
;
236 u8 vco
, vco_sub_band
, adc
;
238 max2165_read_reg(priv
, REG_STATUS
, &status
);
239 max2165_read_reg(priv
, REG_AUTOTUNE
, &autotune
);
241 auto_vco_success
= (status
>> 6) & 0x01;
242 auto_vco_active
= (status
>> 5) & 0x01;
243 pll_locked
= (status
>> 4) & 0x01;
244 dc_offset_low
= (status
>> 3) & 0x01;
245 dc_offset_hi
= (status
>> 2) & 0x01;
246 signal_lv_over_threshold
= status
& 0x01;
249 vco_sub_band
= (autotune
>> 3) & 0x7;
250 adc
= autotune
& 0x7;
252 dprintk("auto VCO active: %d, auto VCO success: %d\n",
253 auto_vco_active
, auto_vco_success
);
254 dprintk("PLL locked: %d\n", pll_locked
);
255 dprintk("DC offset low: %d, DC offset high: %d\n",
256 dc_offset_low
, dc_offset_hi
);
257 dprintk("Signal lvl over threshold: %d\n", signal_lv_over_threshold
);
258 dprintk("VCO: %d, VCO Sub-band: %d, ADC: %d\n", vco
, vco_sub_band
, adc
);
261 static int max2165_set_params(struct dvb_frontend
*fe
,
262 struct dvb_frontend_parameters
*params
)
264 struct max2165_priv
*priv
= fe
->tuner_priv
;
267 dprintk("%s() frequency=%d (Hz)\n", __func__
, params
->frequency
);
268 if (fe
->ops
.info
.type
== FE_ATSC
) {
270 } else if (fe
->ops
.info
.type
== FE_OFDM
) {
271 dprintk("%s() OFDM\n", __func__
);
272 switch (params
->u
.ofdm
.bandwidth
) {
273 case BANDWIDTH_6_MHZ
:
275 case BANDWIDTH_7_MHZ
:
276 case BANDWIDTH_8_MHZ
:
277 priv
->frequency
= params
->frequency
;
278 priv
->bandwidth
= params
->u
.ofdm
.bandwidth
;
281 printk(KERN_ERR
"MAX2165 bandwidth not set!\n");
285 printk(KERN_ERR
"MAX2165 modulation type not supported!\n");
289 dprintk("%s() frequency=%d\n", __func__
, priv
->frequency
);
291 if (fe
->ops
.i2c_gate_ctrl
)
292 fe
->ops
.i2c_gate_ctrl(fe
, 1);
293 max2165_set_bandwidth(priv
, priv
->bandwidth
);
294 ret
= max2165_set_rf(priv
, priv
->frequency
);
296 max2165_debug_status(priv
);
297 if (fe
->ops
.i2c_gate_ctrl
)
298 fe
->ops
.i2c_gate_ctrl(fe
, 0);
306 static int max2165_get_frequency(struct dvb_frontend
*fe
, u32
*freq
)
308 struct max2165_priv
*priv
= fe
->tuner_priv
;
309 dprintk("%s()\n", __func__
);
310 *freq
= priv
->frequency
;
314 static int max2165_get_bandwidth(struct dvb_frontend
*fe
, u32
*bw
)
316 struct max2165_priv
*priv
= fe
->tuner_priv
;
317 dprintk("%s()\n", __func__
);
319 *bw
= priv
->bandwidth
;
323 static int max2165_get_status(struct dvb_frontend
*fe
, u32
*status
)
325 struct max2165_priv
*priv
= fe
->tuner_priv
;
328 dprintk("%s()\n", __func__
);
330 if (fe
->ops
.i2c_gate_ctrl
)
331 fe
->ops
.i2c_gate_ctrl(fe
, 1);
333 max2165_debug_status(priv
);
334 *status
= lock_status
;
336 if (fe
->ops
.i2c_gate_ctrl
)
337 fe
->ops
.i2c_gate_ctrl(fe
, 0);
342 static int max2165_sleep(struct dvb_frontend
*fe
)
344 dprintk("%s()\n", __func__
);
348 static int max2165_init(struct dvb_frontend
*fe
)
350 struct max2165_priv
*priv
= fe
->tuner_priv
;
351 dprintk("%s()\n", __func__
);
353 if (fe
->ops
.i2c_gate_ctrl
)
354 fe
->ops
.i2c_gate_ctrl(fe
, 1);
356 /* Setup initial values */
357 /* Fractional Mode on */
358 max2165_write_reg(priv
, REG_NDIV_FRAC2
, 0x18);
360 max2165_write_reg(priv
, REG_LNA
, 0x01);
361 max2165_write_reg(priv
, REG_PLL_CFG
, 0x7A);
362 max2165_write_reg(priv
, REG_TEST
, 0x08);
363 max2165_write_reg(priv
, REG_SHUTDOWN
, 0x40);
364 max2165_write_reg(priv
, REG_VCO_CTRL
, 0x84);
365 max2165_write_reg(priv
, REG_BASEBAND_CTRL
, 0xC3);
366 max2165_write_reg(priv
, REG_DC_OFFSET_CTRL
, 0x75);
367 max2165_write_reg(priv
, REG_DC_OFFSET_DAC
, 0x00);
368 max2165_write_reg(priv
, REG_ROM_TABLE_ADDR
, 0x00);
370 max2165_set_osc(priv
, priv
->config
->osc_clk
);
372 max2165_read_rom_table(priv
);
374 max2165_set_bandwidth(priv
, BANDWIDTH_8_MHZ
);
376 if (fe
->ops
.i2c_gate_ctrl
)
377 fe
->ops
.i2c_gate_ctrl(fe
, 0);
382 static int max2165_release(struct dvb_frontend
*fe
)
384 struct max2165_priv
*priv
= fe
->tuner_priv
;
385 dprintk("%s()\n", __func__
);
388 fe
->tuner_priv
= NULL
;
393 static const struct dvb_tuner_ops max2165_tuner_ops
= {
395 .name
= "Maxim MAX2165",
396 .frequency_min
= 470000000,
397 .frequency_max
= 780000000,
398 .frequency_step
= 50000,
401 .release
= max2165_release
,
402 .init
= max2165_init
,
403 .sleep
= max2165_sleep
,
405 .set_params
= max2165_set_params
,
406 .set_analog_params
= NULL
,
407 .get_frequency
= max2165_get_frequency
,
408 .get_bandwidth
= max2165_get_bandwidth
,
409 .get_status
= max2165_get_status
412 struct dvb_frontend
*max2165_attach(struct dvb_frontend
*fe
,
413 struct i2c_adapter
*i2c
,
414 struct max2165_config
*cfg
)
416 struct max2165_priv
*priv
= NULL
;
418 dprintk("%s(%d-%04x)\n", __func__
,
419 i2c
? i2c_adapter_id(i2c
) : -1,
420 cfg
? cfg
->i2c_address
: -1);
422 priv
= kzalloc(sizeof(struct max2165_priv
), GFP_KERNEL
);
426 memcpy(&fe
->ops
.tuner_ops
, &max2165_tuner_ops
,
427 sizeof(struct dvb_tuner_ops
));
431 fe
->tuner_priv
= priv
;
434 max2165_debug_status(priv
);
438 EXPORT_SYMBOL(max2165_attach
);
440 MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>");
441 MODULE_DESCRIPTION("Maxim MAX2165 silicon tuner driver");
442 MODULE_LICENSE("GPL");