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IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / macintosh / via-pmu68k.c
1 /*
2 * Device driver for the PMU on 68K-based Apple PowerBooks
3 *
4 * The VIA (versatile interface adapter) interfaces to the PMU,
5 * a 6805 microprocessor core whose primary function is to control
6 * battery charging and system power on the PowerBooks.
7 * The PMU also controls the ADB (Apple Desktop Bus) which connects
8 * to the keyboard and mouse, as well as the non-volatile RAM
9 * and the RTC (real time clock) chip.
10 *
11 * Adapted for 68K PMU by Joshua M. Thompson
12 *
13 * Based largely on the PowerMac PMU code by Paul Mackerras and
14 * Fabio Riccardi.
15 *
16 * Also based on the PMU driver from MkLinux by Apple Computer, Inc.
17 * and the Open Software Foundation, Inc.
18 */
19
20 #include <stdarg.h>
21 #include <linux/types.h>
22 #include <linux/errno.h>
23 #include <linux/kernel.h>
24 #include <linux/delay.h>
25 #include <linux/sched.h>
26 #include <linux/miscdevice.h>
27 #include <linux/blkdev.h>
28 #include <linux/pci.h>
29 #include <linux/slab.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32
33 #include <linux/adb.h>
34 #include <linux/pmu.h>
35 #include <linux/cuda.h>
36
37 #include <asm/macintosh.h>
38 #include <asm/macints.h>
39 #include <asm/machw.h>
40 #include <asm/mac_via.h>
41
42 #include <asm/pgtable.h>
43 #include <asm/system.h>
44 #include <asm/irq.h>
45 #include <asm/uaccess.h>
46
47 /* Misc minor number allocated for /dev/pmu */
48 #define PMU_MINOR 154
49
50 /* VIA registers - spaced 0x200 bytes apart */
51 #define RS 0x200 /* skip between registers */
52 #define B 0 /* B-side data */
53 #define A RS /* A-side data */
54 #define DIRB (2*RS) /* B-side direction (1=output) */
55 #define DIRA (3*RS) /* A-side direction (1=output) */
56 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
57 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
58 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
59 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
60 #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
61 #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
62 #define SR (10*RS) /* Shift register */
63 #define ACR (11*RS) /* Auxiliary control register */
64 #define PCR (12*RS) /* Peripheral control register */
65 #define IFR (13*RS) /* Interrupt flag register */
66 #define IER (14*RS) /* Interrupt enable register */
67 #define ANH (15*RS) /* A-side data, no handshake */
68
69 /* Bits in B data register: both active low */
70 #define TACK 0x02 /* Transfer acknowledge (input) */
71 #define TREQ 0x04 /* Transfer request (output) */
72
73 /* Bits in ACR */
74 #define SR_CTRL 0x1c /* Shift register control bits */
75 #define SR_EXT 0x0c /* Shift on external clock */
76 #define SR_OUT 0x10 /* Shift out if 1 */
77
78 /* Bits in IFR and IER */
79 #define SR_INT 0x04 /* Shift register full/empty */
80 #define CB1_INT 0x10 /* transition on CB1 input */
81
82 static enum pmu_state {
83 idle,
84 sending,
85 intack,
86 reading,
87 reading_intr,
88 } pmu_state;
89
90 static struct adb_request *current_req;
91 static struct adb_request *last_req;
92 static struct adb_request *req_awaiting_reply;
93 static unsigned char interrupt_data[32];
94 static unsigned char *reply_ptr;
95 static int data_index;
96 static int data_len;
97 static int adb_int_pending;
98 static int pmu_adb_flags;
99 static int adb_dev_map = 0;
100 static struct adb_request bright_req_1, bright_req_2, bright_req_3;
101 static int pmu_kind = PMU_UNKNOWN;
102 static int pmu_fully_inited = 0;
103
104 int asleep;
105 BLOCKING_NOTIFIER_HEAD(sleep_notifier_list);
106
107 static int pmu_probe(void);
108 static int pmu_init(void);
109 static void pmu_start(void);
110 static irqreturn_t pmu_interrupt(int irq, void *arg);
111 static int pmu_send_request(struct adb_request *req, int sync);
112 static int pmu_autopoll(int devs);
113 void pmu_poll(void);
114 static int pmu_reset_bus(void);
115 static int pmu_queue_request(struct adb_request *req);
116
117 static void pmu_start(void);
118 static void send_byte(int x);
119 static void recv_byte(void);
120 static void pmu_done(struct adb_request *req);
121 static void pmu_handle_data(unsigned char *data, int len);
122 static void set_volume(int level);
123 static void pmu_enable_backlight(int on);
124 static void pmu_set_brightness(int level);
125
126 struct adb_driver via_pmu_driver = {
127 "68K PMU",
128 pmu_probe,
129 pmu_init,
130 pmu_send_request,
131 pmu_autopoll,
132 pmu_poll,
133 pmu_reset_bus
134 };
135
136 /*
137 * This table indicates for each PMU opcode:
138 * - the number of data bytes to be sent with the command, or -1
139 * if a length byte should be sent,
140 * - the number of response bytes which the PMU will return, or
141 * -1 if it will send a length byte.
142 */
143 static s8 pmu_data_len[256][2] = {
144 /* 0 1 2 3 4 5 6 7 */
145 /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
146 /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
147 /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
148 /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
149 /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
150 /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
151 /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
152 /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
153 /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
154 /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
155 /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
156 /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
157 /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
158 /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
159 /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
160 /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
161 /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
162 /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
163 /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
164 /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
165 /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
166 /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
167 /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
168 /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
169 /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
170 /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
171 /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
172 /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
173 /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
174 /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
175 /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
176 /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
177 };
178
179 int pmu_probe(void)
180 {
181 if (macintosh_config->adb_type == MAC_ADB_PB1) {
182 pmu_kind = PMU_68K_V1;
183 } else if (macintosh_config->adb_type == MAC_ADB_PB2) {
184 pmu_kind = PMU_68K_V2;
185 } else {
186 return -ENODEV;
187 }
188
189 pmu_state = idle;
190
191 return 0;
192 }
193
194 static int
195 pmu_init(void)
196 {
197 int timeout;
198 volatile struct adb_request req;
199
200 via2[B] |= TREQ; /* negate TREQ */
201 via2[DIRB] = (via2[DIRB] | TREQ) & ~TACK; /* TACK in, TREQ out */
202
203 pmu_request((struct adb_request *) &req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB);
204 timeout = 100000;
205 while (!req.complete) {
206 if (--timeout < 0) {
207 printk(KERN_ERR "pmu_init: no response from PMU\n");
208 return -EAGAIN;
209 }
210 udelay(10);
211 pmu_poll();
212 }
213
214 /* ack all pending interrupts */
215 timeout = 100000;
216 interrupt_data[0] = 1;
217 while (interrupt_data[0] || pmu_state != idle) {
218 if (--timeout < 0) {
219 printk(KERN_ERR "pmu_init: timed out acking intrs\n");
220 return -EAGAIN;
221 }
222 if (pmu_state == idle) {
223 adb_int_pending = 1;
224 pmu_interrupt(0, NULL, NULL);
225 }
226 pmu_poll();
227 udelay(10);
228 }
229
230 pmu_request((struct adb_request *) &req, NULL, 2, PMU_SET_INTR_MASK,
231 PMU_INT_ADB_AUTO|PMU_INT_SNDBRT|PMU_INT_ADB);
232 timeout = 100000;
233 while (!req.complete) {
234 if (--timeout < 0) {
235 printk(KERN_ERR "pmu_init: no response from PMU\n");
236 return -EAGAIN;
237 }
238 udelay(10);
239 pmu_poll();
240 }
241
242 bright_req_1.complete = 1;
243 bright_req_2.complete = 1;
244 bright_req_3.complete = 1;
245
246 if (request_irq(IRQ_MAC_ADB_SR, pmu_interrupt, 0, "pmu-shift",
247 pmu_interrupt)) {
248 printk(KERN_ERR "pmu_init: can't get irq %d\n",
249 IRQ_MAC_ADB_SR);
250 return -EAGAIN;
251 }
252 if (request_irq(IRQ_MAC_ADB_CL, pmu_interrupt, 0, "pmu-clock",
253 pmu_interrupt)) {
254 printk(KERN_ERR "pmu_init: can't get irq %d\n",
255 IRQ_MAC_ADB_CL);
256 free_irq(IRQ_MAC_ADB_SR, pmu_interrupt);
257 return -EAGAIN;
258 }
259
260 pmu_fully_inited = 1;
261
262 /* Enable backlight */
263 pmu_enable_backlight(1);
264
265 printk("adb: PMU 68K driver v0.5 for Unified ADB.\n");
266
267 return 0;
268 }
269
270 int
271 pmu_get_model(void)
272 {
273 return pmu_kind;
274 }
275
276 /* Send an ADB command */
277 static int
278 pmu_send_request(struct adb_request *req, int sync)
279 {
280 int i, ret;
281
282 if (!pmu_fully_inited)
283 {
284 req->complete = 1;
285 return -ENXIO;
286 }
287
288 ret = -EINVAL;
289
290 switch (req->data[0]) {
291 case PMU_PACKET:
292 for (i = 0; i < req->nbytes - 1; ++i)
293 req->data[i] = req->data[i+1];
294 --req->nbytes;
295 if (pmu_data_len[req->data[0]][1] != 0) {
296 req->reply[0] = ADB_RET_OK;
297 req->reply_len = 1;
298 } else
299 req->reply_len = 0;
300 ret = pmu_queue_request(req);
301 break;
302 case CUDA_PACKET:
303 switch (req->data[1]) {
304 case CUDA_GET_TIME:
305 if (req->nbytes != 2)
306 break;
307 req->data[0] = PMU_READ_RTC;
308 req->nbytes = 1;
309 req->reply_len = 3;
310 req->reply[0] = CUDA_PACKET;
311 req->reply[1] = 0;
312 req->reply[2] = CUDA_GET_TIME;
313 ret = pmu_queue_request(req);
314 break;
315 case CUDA_SET_TIME:
316 if (req->nbytes != 6)
317 break;
318 req->data[0] = PMU_SET_RTC;
319 req->nbytes = 5;
320 for (i = 1; i <= 4; ++i)
321 req->data[i] = req->data[i+1];
322 req->reply_len = 3;
323 req->reply[0] = CUDA_PACKET;
324 req->reply[1] = 0;
325 req->reply[2] = CUDA_SET_TIME;
326 ret = pmu_queue_request(req);
327 break;
328 case CUDA_GET_PRAM:
329 if (req->nbytes != 4)
330 break;
331 req->data[0] = PMU_READ_NVRAM;
332 req->data[1] = req->data[2];
333 req->data[2] = req->data[3];
334 req->nbytes = 3;
335 req->reply_len = 3;
336 req->reply[0] = CUDA_PACKET;
337 req->reply[1] = 0;
338 req->reply[2] = CUDA_GET_PRAM;
339 ret = pmu_queue_request(req);
340 break;
341 case CUDA_SET_PRAM:
342 if (req->nbytes != 5)
343 break;
344 req->data[0] = PMU_WRITE_NVRAM;
345 req->data[1] = req->data[2];
346 req->data[2] = req->data[3];
347 req->data[3] = req->data[4];
348 req->nbytes = 4;
349 req->reply_len = 3;
350 req->reply[0] = CUDA_PACKET;
351 req->reply[1] = 0;
352 req->reply[2] = CUDA_SET_PRAM;
353 ret = pmu_queue_request(req);
354 break;
355 }
356 break;
357 case ADB_PACKET:
358 for (i = req->nbytes - 1; i > 1; --i)
359 req->data[i+2] = req->data[i];
360 req->data[3] = req->nbytes - 2;
361 req->data[2] = pmu_adb_flags;
362 /*req->data[1] = req->data[1];*/
363 req->data[0] = PMU_ADB_CMD;
364 req->nbytes += 2;
365 req->reply_expected = 1;
366 req->reply_len = 0;
367 ret = pmu_queue_request(req);
368 break;
369 }
370 if (ret)
371 {
372 req->complete = 1;
373 return ret;
374 }
375
376 if (sync) {
377 while (!req->complete)
378 pmu_poll();
379 }
380
381 return 0;
382 }
383
384 /* Enable/disable autopolling */
385 static int
386 pmu_autopoll(int devs)
387 {
388 struct adb_request req;
389
390 if (!pmu_fully_inited) return -ENXIO;
391
392 if (devs) {
393 adb_dev_map = devs;
394 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
395 adb_dev_map >> 8, adb_dev_map);
396 pmu_adb_flags = 2;
397 } else {
398 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
399 pmu_adb_flags = 0;
400 }
401 while (!req.complete)
402 pmu_poll();
403 return 0;
404 }
405
406 /* Reset the ADB bus */
407 static int
408 pmu_reset_bus(void)
409 {
410 struct adb_request req;
411 long timeout;
412 int save_autopoll = adb_dev_map;
413
414 if (!pmu_fully_inited) return -ENXIO;
415
416 /* anyone got a better idea?? */
417 pmu_autopoll(0);
418
419 req.nbytes = 5;
420 req.done = NULL;
421 req.data[0] = PMU_ADB_CMD;
422 req.data[1] = 0;
423 req.data[2] = 3; /* ADB_BUSRESET ??? */
424 req.data[3] = 0;
425 req.data[4] = 0;
426 req.reply_len = 0;
427 req.reply_expected = 1;
428 if (pmu_queue_request(&req) != 0)
429 {
430 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
431 return -EIO;
432 }
433 while (!req.complete)
434 pmu_poll();
435 timeout = 100000;
436 while (!req.complete) {
437 if (--timeout < 0) {
438 printk(KERN_ERR "pmu_adb_reset_bus (reset): no response from PMU\n");
439 return -EIO;
440 }
441 udelay(10);
442 pmu_poll();
443 }
444
445 if (save_autopoll != 0)
446 pmu_autopoll(save_autopoll);
447
448 return 0;
449 }
450
451 /* Construct and send a pmu request */
452 int
453 pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
454 int nbytes, ...)
455 {
456 va_list list;
457 int i;
458
459 if (nbytes < 0 || nbytes > 32) {
460 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
461 req->complete = 1;
462 return -EINVAL;
463 }
464 req->nbytes = nbytes;
465 req->done = done;
466 va_start(list, nbytes);
467 for (i = 0; i < nbytes; ++i)
468 req->data[i] = va_arg(list, int);
469 va_end(list);
470 if (pmu_data_len[req->data[0]][1] != 0) {
471 req->reply[0] = ADB_RET_OK;
472 req->reply_len = 1;
473 } else
474 req->reply_len = 0;
475 req->reply_expected = 0;
476 return pmu_queue_request(req);
477 }
478
479 static int
480 pmu_queue_request(struct adb_request *req)
481 {
482 unsigned long flags;
483 int nsend;
484
485 if (req->nbytes <= 0) {
486 req->complete = 1;
487 return 0;
488 }
489 nsend = pmu_data_len[req->data[0]][0];
490 if (nsend >= 0 && req->nbytes != nsend + 1) {
491 req->complete = 1;
492 return -EINVAL;
493 }
494
495 req->next = NULL;
496 req->sent = 0;
497 req->complete = 0;
498 local_irq_save(flags);
499
500 if (current_req != 0) {
501 last_req->next = req;
502 last_req = req;
503 } else {
504 current_req = req;
505 last_req = req;
506 if (pmu_state == idle)
507 pmu_start();
508 }
509
510 local_irq_restore(flags);
511 return 0;
512 }
513
514 static void
515 send_byte(int x)
516 {
517 via1[ACR] |= SR_CTRL;
518 via1[SR] = x;
519 via2[B] &= ~TREQ; /* assert TREQ */
520 }
521
522 static void
523 recv_byte(void)
524 {
525 char c;
526
527 via1[ACR] = (via1[ACR] | SR_EXT) & ~SR_OUT;
528 c = via1[SR]; /* resets SR */
529 via2[B] &= ~TREQ;
530 }
531
532 static void
533 pmu_start(void)
534 {
535 unsigned long flags;
536 struct adb_request *req;
537
538 /* assert pmu_state == idle */
539 /* get the packet to send */
540 local_irq_save(flags);
541 req = current_req;
542 if (req == 0 || pmu_state != idle
543 || (req->reply_expected && req_awaiting_reply))
544 goto out;
545
546 pmu_state = sending;
547 data_index = 1;
548 data_len = pmu_data_len[req->data[0]][0];
549
550 /* set the shift register to shift out and send a byte */
551 send_byte(req->data[0]);
552
553 out:
554 local_irq_restore(flags);
555 }
556
557 void
558 pmu_poll(void)
559 {
560 unsigned long flags;
561
562 local_irq_save(flags);
563 if (via1[IFR] & SR_INT) {
564 via1[IFR] = SR_INT;
565 pmu_interrupt(IRQ_MAC_ADB_SR, NULL, NULL);
566 }
567 if (via1[IFR] & CB1_INT) {
568 via1[IFR] = CB1_INT;
569 pmu_interrupt(IRQ_MAC_ADB_CL, NULL, NULL);
570 }
571 local_irq_restore(flags);
572 }
573
574 static irqreturn_t
575 pmu_interrupt(int irq, void *dev_id)
576 {
577 struct adb_request *req;
578 int timeout, bite = 0; /* to prevent compiler warning */
579
580 #if 0
581 printk("pmu_interrupt: irq %d state %d acr %02X, b %02X data_index %d/%d adb_int_pending %d\n",
582 irq, pmu_state, (uint) via1[ACR], (uint) via2[B], data_index, data_len, adb_int_pending);
583 #endif
584
585 if (irq == IRQ_MAC_ADB_CL) { /* CB1 interrupt */
586 adb_int_pending = 1;
587 } else if (irq == IRQ_MAC_ADB_SR) { /* SR interrupt */
588 if (via2[B] & TACK) {
589 printk(KERN_DEBUG "PMU: SR_INT but ack still high! (%x)\n", via2[B]);
590 }
591
592 /* if reading grab the byte */
593 if ((via1[ACR] & SR_OUT) == 0) bite = via1[SR];
594
595 /* reset TREQ and wait for TACK to go high */
596 via2[B] |= TREQ;
597 timeout = 3200;
598 while (!(via2[B] & TACK)) {
599 if (--timeout < 0) {
600 printk(KERN_ERR "PMU not responding (!ack)\n");
601 goto finish;
602 }
603 udelay(10);
604 }
605
606 switch (pmu_state) {
607 case sending:
608 req = current_req;
609 if (data_len < 0) {
610 data_len = req->nbytes - 1;
611 send_byte(data_len);
612 break;
613 }
614 if (data_index <= data_len) {
615 send_byte(req->data[data_index++]);
616 break;
617 }
618 req->sent = 1;
619 data_len = pmu_data_len[req->data[0]][1];
620 if (data_len == 0) {
621 pmu_state = idle;
622 current_req = req->next;
623 if (req->reply_expected)
624 req_awaiting_reply = req;
625 else
626 pmu_done(req);
627 } else {
628 pmu_state = reading;
629 data_index = 0;
630 reply_ptr = req->reply + req->reply_len;
631 recv_byte();
632 }
633 break;
634
635 case intack:
636 data_index = 0;
637 data_len = -1;
638 pmu_state = reading_intr;
639 reply_ptr = interrupt_data;
640 recv_byte();
641 break;
642
643 case reading:
644 case reading_intr:
645 if (data_len == -1) {
646 data_len = bite;
647 if (bite > 32)
648 printk(KERN_ERR "PMU: bad reply len %d\n",
649 bite);
650 } else {
651 reply_ptr[data_index++] = bite;
652 }
653 if (data_index < data_len) {
654 recv_byte();
655 break;
656 }
657
658 if (pmu_state == reading_intr) {
659 pmu_handle_data(interrupt_data, data_index);
660 } else {
661 req = current_req;
662 current_req = req->next;
663 req->reply_len += data_index;
664 pmu_done(req);
665 }
666 pmu_state = idle;
667
668 break;
669
670 default:
671 printk(KERN_ERR "pmu_interrupt: unknown state %d?\n",
672 pmu_state);
673 }
674 }
675 finish:
676 if (pmu_state == idle) {
677 if (adb_int_pending) {
678 pmu_state = intack;
679 send_byte(PMU_INT_ACK);
680 adb_int_pending = 0;
681 } else if (current_req) {
682 pmu_start();
683 }
684 }
685
686 #if 0
687 printk("pmu_interrupt: exit state %d acr %02X, b %02X data_index %d/%d adb_int_pending %d\n",
688 pmu_state, (uint) via1[ACR], (uint) via2[B], data_index, data_len, adb_int_pending);
689 #endif
690 return IRQ_HANDLED;
691 }
692
693 static void
694 pmu_done(struct adb_request *req)
695 {
696 req->complete = 1;
697 if (req->done)
698 (*req->done)(req);
699 }
700
701 /* Interrupt data could be the result data from an ADB cmd */
702 static void
703 pmu_handle_data(unsigned char *data, int len)
704 {
705 static int show_pmu_ints = 1;
706
707 asleep = 0;
708 if (len < 1) {
709 adb_int_pending = 0;
710 return;
711 }
712 if (data[0] & PMU_INT_ADB) {
713 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
714 struct adb_request *req = req_awaiting_reply;
715 if (req == 0) {
716 printk(KERN_ERR "PMU: extra ADB reply\n");
717 return;
718 }
719 req_awaiting_reply = NULL;
720 if (len <= 2)
721 req->reply_len = 0;
722 else {
723 memcpy(req->reply, data + 1, len - 1);
724 req->reply_len = len - 1;
725 }
726 pmu_done(req);
727 } else {
728 adb_input(data+1, len-1, 1);
729 }
730 } else {
731 if (data[0] == 0x08 && len == 3) {
732 /* sound/brightness buttons pressed */
733 pmu_set_brightness(data[1] >> 3);
734 set_volume(data[2]);
735 } else if (show_pmu_ints
736 && !(data[0] == PMU_INT_TICK && len == 1)) {
737 int i;
738 printk(KERN_DEBUG "pmu intr");
739 for (i = 0; i < len; ++i)
740 printk(" %.2x", data[i]);
741 printk("\n");
742 }
743 }
744 }
745
746 int backlight_level = -1;
747 int backlight_enabled = 0;
748
749 #define LEVEL_TO_BRIGHT(lev) ((lev) < 1? 0x7f: 0x4a - ((lev) << 1))
750
751 static void
752 pmu_enable_backlight(int on)
753 {
754 struct adb_request req;
755
756 if (on) {
757 /* first call: get current backlight value */
758 if (backlight_level < 0) {
759 switch(pmu_kind) {
760 case PMU_68K_V1:
761 case PMU_68K_V2:
762 pmu_request(&req, NULL, 3, PMU_READ_NVRAM, 0x14, 0xe);
763 while (!req.complete)
764 pmu_poll();
765 printk(KERN_DEBUG "pmu: nvram returned bright: %d\n", (int)req.reply[1]);
766 backlight_level = req.reply[1];
767 break;
768 default:
769 backlight_enabled = 0;
770 return;
771 }
772 }
773 pmu_request(&req, NULL, 2, PMU_BACKLIGHT_BRIGHT,
774 LEVEL_TO_BRIGHT(backlight_level));
775 while (!req.complete)
776 pmu_poll();
777 }
778 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
779 PMU_POW_BACKLIGHT | (on ? PMU_POW_ON : PMU_POW_OFF));
780 while (!req.complete)
781 pmu_poll();
782 backlight_enabled = on;
783 }
784
785 static void
786 pmu_set_brightness(int level)
787 {
788 int bright;
789
790 backlight_level = level;
791 bright = LEVEL_TO_BRIGHT(level);
792 if (!backlight_enabled)
793 return;
794 if (bright_req_1.complete)
795 pmu_request(&bright_req_1, NULL, 2, PMU_BACKLIGHT_BRIGHT,
796 bright);
797 if (bright_req_2.complete)
798 pmu_request(&bright_req_2, NULL, 2, PMU_POWER_CTRL,
799 PMU_POW_BACKLIGHT | (bright < 0x7f ? PMU_POW_ON : PMU_POW_OFF));
800 }
801
802 void
803 pmu_enable_irled(int on)
804 {
805 struct adb_request req;
806
807 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
808 (on ? PMU_POW_ON : PMU_POW_OFF));
809 while (!req.complete)
810 pmu_poll();
811 }
812
813 static void
814 set_volume(int level)
815 {
816 }
817
818 int
819 pmu_present(void)
820 {
821 return (pmu_kind != PMU_UNKNOWN);
822 }
823
824 #if 0 /* needs some work for 68K */
825
826 /*
827 * This struct is used to store config register values for
828 * PCI devices which may get powered off when we sleep.
829 */
830 static struct pci_save {
831 u16 command;
832 u16 cache_lat;
833 u16 intr;
834 } *pbook_pci_saves;
835 static int n_pbook_pci_saves;
836
837 static inline void
838 pbook_pci_save(void)
839 {
840 int npci;
841 struct pci_dev *pd = NULL;
842 struct pci_save *ps;
843
844 npci = 0;
845 while ((pd = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL)
846 ++npci;
847 n_pbook_pci_saves = npci;
848 if (npci == 0)
849 return;
850 ps = (struct pci_save *) kmalloc(npci * sizeof(*ps), GFP_KERNEL);
851 pbook_pci_saves = ps;
852 if (ps == NULL)
853 return;
854
855 pd = NULL;
856 while ((pd = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) {
857 pci_read_config_word(pd, PCI_COMMAND, &ps->command);
858 pci_read_config_word(pd, PCI_CACHE_LINE_SIZE, &ps->cache_lat);
859 pci_read_config_word(pd, PCI_INTERRUPT_LINE, &ps->intr);
860 ++ps;
861 --npci;
862 }
863 }
864
865 static inline void
866 pbook_pci_restore(void)
867 {
868 u16 cmd;
869 struct pci_save *ps = pbook_pci_saves;
870 struct pci_dev *pd = NULL;
871 int j;
872
873 while ((pd = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) {
874 if (ps->command == 0)
875 continue;
876 pci_read_config_word(pd, PCI_COMMAND, &cmd);
877 if ((ps->command & ~cmd) == 0)
878 continue;
879 switch (pd->hdr_type) {
880 case PCI_HEADER_TYPE_NORMAL:
881 for (j = 0; j < 6; ++j)
882 pci_write_config_dword(pd,
883 PCI_BASE_ADDRESS_0 + j*4,
884 pd->resource[j].start);
885 pci_write_config_dword(pd, PCI_ROM_ADDRESS,
886 pd->resource[PCI_ROM_RESOURCE].start);
887 pci_write_config_word(pd, PCI_CACHE_LINE_SIZE,
888 ps->cache_lat);
889 pci_write_config_word(pd, PCI_INTERRUPT_LINE,
890 ps->intr);
891 pci_write_config_word(pd, PCI_COMMAND, ps->command);
892 break;
893 /* other header types not restored at present */
894 }
895 }
896 }
897
898 /*
899 * Put the powerbook to sleep.
900 */
901 #define IRQ_ENABLE ((unsigned int *)0xf3000024)
902 #define MEM_CTRL ((unsigned int *)0xf8000070)
903
904 int powerbook_sleep(void)
905 {
906 int ret, i, x;
907 static int save_backlight;
908 static unsigned int save_irqen;
909 unsigned long msr;
910 unsigned int hid0;
911 unsigned long p, wait;
912 struct adb_request sleep_req;
913
914 /* Notify device drivers */
915 ret = blocking_notifier_call_chain(&sleep_notifier_list,
916 PBOOK_SLEEP, NULL);
917 if (ret & NOTIFY_STOP_MASK)
918 return -EBUSY;
919
920 /* Sync the disks. */
921 /* XXX It would be nice to have some way to ensure that
922 * nobody is dirtying any new buffers while we wait. */
923 sys_sync();
924
925 /* Turn off the display backlight */
926 save_backlight = backlight_enabled;
927 if (save_backlight)
928 pmu_enable_backlight(0);
929
930 /* Give the disks a little time to actually finish writing */
931 for (wait = jiffies + (HZ/4); time_before(jiffies, wait); )
932 mb();
933
934 /* Disable all interrupts except pmu */
935 save_irqen = in_le32(IRQ_ENABLE);
936 for (i = 0; i < 32; ++i)
937 if (i != vias->intrs[0].line && (save_irqen & (1 << i)))
938 disable_irq(i);
939 asm volatile("mtdec %0" : : "r" (0x7fffffff));
940
941 /* Save the state of PCI config space for some slots */
942 pbook_pci_save();
943
944 /* Set the memory controller to keep the memory refreshed
945 while we're asleep */
946 for (i = 0x403f; i >= 0x4000; --i) {
947 out_be32(MEM_CTRL, i);
948 do {
949 x = (in_be32(MEM_CTRL) >> 16) & 0x3ff;
950 } while (x == 0);
951 if (x >= 0x100)
952 break;
953 }
954
955 /* Ask the PMU to put us to sleep */
956 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
957 while (!sleep_req.complete)
958 mb();
959 /* displacement-flush the L2 cache - necessary? */
960 for (p = KERNELBASE; p < KERNELBASE + 0x100000; p += 0x1000)
961 i = *(volatile int *)p;
962 asleep = 1;
963
964 /* Put the CPU into sleep mode */
965 asm volatile("mfspr %0,1008" : "=r" (hid0) :);
966 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
967 asm volatile("mtspr 1008,%0" : : "r" (hid0));
968 local_save_flags(msr);
969 msr |= MSR_POW | MSR_EE;
970 local_irq_restore(msr);
971 udelay(10);
972
973 /* OK, we're awake again, start restoring things */
974 out_be32(MEM_CTRL, 0x3f);
975 pbook_pci_restore();
976
977 /* wait for the PMU interrupt sequence to complete */
978 while (asleep)
979 mb();
980
981 /* reenable interrupts */
982 for (i = 0; i < 32; ++i)
983 if (i != vias->intrs[0].line && (save_irqen & (1 << i)))
984 enable_irq(i);
985
986 /* Notify drivers */
987 blocking_notifier_call_chain(&sleep_notifier_list, PBOOK_WAKE, NULL);
988
989 /* reenable ADB autopoll */
990 pmu_adb_autopoll(adb_dev_map);
991
992 /* Turn on the screen backlight, if it was on before */
993 if (save_backlight)
994 pmu_enable_backlight(1);
995
996 /* Wait for the hard disk to spin up */
997
998 return 0;
999 }
1000
1001 /*
1002 * Support for /dev/pmu device
1003 */
1004 static int pmu_open(struct inode *inode, struct file *file)
1005 {
1006 return 0;
1007 }
1008
1009 static ssize_t pmu_read(struct file *file, char *buf,
1010 size_t count, loff_t *ppos)
1011 {
1012 return 0;
1013 }
1014
1015 static ssize_t pmu_write(struct file *file, const char *buf,
1016 size_t count, loff_t *ppos)
1017 {
1018 return 0;
1019 }
1020
1021 static int pmu_ioctl(struct inode * inode, struct file *filp,
1022 u_int cmd, u_long arg)
1023 {
1024 int error;
1025 __u32 value;
1026
1027 switch (cmd) {
1028 case PMU_IOC_SLEEP:
1029 return -ENOSYS;
1030 case PMU_IOC_GET_BACKLIGHT:
1031 return put_user(backlight_level, (__u32 *)arg);
1032 case PMU_IOC_SET_BACKLIGHT:
1033 error = get_user(value, (__u32 *)arg);
1034 if (!error)
1035 pmu_set_brightness(value);
1036 return error;
1037 case PMU_IOC_GET_MODEL:
1038 return put_user(pmu_kind, (__u32 *)arg);
1039 }
1040 return -EINVAL;
1041 }
1042
1043 static struct file_operations pmu_device_fops = {
1044 .read = pmu_read,
1045 .write = pmu_write,
1046 .ioctl = pmu_ioctl,
1047 .open = pmu_open,
1048 };
1049
1050 static struct miscdevice pmu_device = {
1051 PMU_MINOR, "pmu", &pmu_device_fops
1052 };
1053
1054 void pmu_device_init(void)
1055 {
1056 if (!via)
1057 return;
1058 if (misc_register(&pmu_device) < 0)
1059 printk(KERN_ERR "via-pmu68k: cannot register misc device.\n");
1060 }
1061 #endif /* CONFIG_PMAC_PBOOK */
1062
kernel source for telekom puls (alcatel/mediatek)