lguest: Fix in/out emulation
[GitHub/LineageOS/android_kernel_samsung_universal7580.git] / drivers / lguest / x86 / core.c
1 /*
2 * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
3 * Copyright (C) 2007, Jes Sorensen <jes@sgi.com> SGI.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 /*P:450
21 * This file contains the x86-specific lguest code. It used to be all
22 * mixed in with drivers/lguest/core.c but several foolhardy code slashers
23 * wrestled most of the dependencies out to here in preparation for porting
24 * lguest to other architectures (see what I mean by foolhardy?).
25 *
26 * This also contains a couple of non-obvious setup and teardown pieces which
27 * were implemented after days of debugging pain.
28 :*/
29 #include <linux/kernel.h>
30 #include <linux/start_kernel.h>
31 #include <linux/string.h>
32 #include <linux/console.h>
33 #include <linux/screen_info.h>
34 #include <linux/irq.h>
35 #include <linux/interrupt.h>
36 #include <linux/clocksource.h>
37 #include <linux/clockchips.h>
38 #include <linux/cpu.h>
39 #include <linux/lguest.h>
40 #include <linux/lguest_launcher.h>
41 #include <asm/paravirt.h>
42 #include <asm/param.h>
43 #include <asm/page.h>
44 #include <asm/pgtable.h>
45 #include <asm/desc.h>
46 #include <asm/setup.h>
47 #include <asm/lguest.h>
48 #include <asm/uaccess.h>
49 #include <asm/i387.h>
50 #include "../lg.h"
51
52 static int cpu_had_pge;
53
54 static struct {
55 unsigned long offset;
56 unsigned short segment;
57 } lguest_entry;
58
59 /* Offset from where switcher.S was compiled to where we've copied it */
60 static unsigned long switcher_offset(void)
61 {
62 return SWITCHER_ADDR - (unsigned long)start_switcher_text;
63 }
64
65 /* This cpu's struct lguest_pages. */
66 static struct lguest_pages *lguest_pages(unsigned int cpu)
67 {
68 return &(((struct lguest_pages *)
69 (SWITCHER_ADDR + SHARED_SWITCHER_PAGES*PAGE_SIZE))[cpu]);
70 }
71
72 static DEFINE_PER_CPU(struct lg_cpu *, lg_last_cpu);
73
74 /*S:010
75 * We approach the Switcher.
76 *
77 * Remember that each CPU has two pages which are visible to the Guest when it
78 * runs on that CPU. This has to contain the state for that Guest: we copy the
79 * state in just before we run the Guest.
80 *
81 * Each Guest has "changed" flags which indicate what has changed in the Guest
82 * since it last ran. We saw this set in interrupts_and_traps.c and
83 * segments.c.
84 */
85 static void copy_in_guest_info(struct lg_cpu *cpu, struct lguest_pages *pages)
86 {
87 /*
88 * Copying all this data can be quite expensive. We usually run the
89 * same Guest we ran last time (and that Guest hasn't run anywhere else
90 * meanwhile). If that's not the case, we pretend everything in the
91 * Guest has changed.
92 */
93 if (__this_cpu_read(lg_last_cpu) != cpu || cpu->last_pages != pages) {
94 __this_cpu_write(lg_last_cpu, cpu);
95 cpu->last_pages = pages;
96 cpu->changed = CHANGED_ALL;
97 }
98
99 /*
100 * These copies are pretty cheap, so we do them unconditionally: */
101 /* Save the current Host top-level page directory.
102 */
103 pages->state.host_cr3 = __pa(current->mm->pgd);
104 /*
105 * Set up the Guest's page tables to see this CPU's pages (and no
106 * other CPU's pages).
107 */
108 map_switcher_in_guest(cpu, pages);
109 /*
110 * Set up the two "TSS" members which tell the CPU what stack to use
111 * for traps which do directly into the Guest (ie. traps at privilege
112 * level 1).
113 */
114 pages->state.guest_tss.sp1 = cpu->esp1;
115 pages->state.guest_tss.ss1 = cpu->ss1;
116
117 /* Copy direct-to-Guest trap entries. */
118 if (cpu->changed & CHANGED_IDT)
119 copy_traps(cpu, pages->state.guest_idt, default_idt_entries);
120
121 /* Copy all GDT entries which the Guest can change. */
122 if (cpu->changed & CHANGED_GDT)
123 copy_gdt(cpu, pages->state.guest_gdt);
124 /* If only the TLS entries have changed, copy them. */
125 else if (cpu->changed & CHANGED_GDT_TLS)
126 copy_gdt_tls(cpu, pages->state.guest_gdt);
127
128 /* Mark the Guest as unchanged for next time. */
129 cpu->changed = 0;
130 }
131
132 /* Finally: the code to actually call into the Switcher to run the Guest. */
133 static void run_guest_once(struct lg_cpu *cpu, struct lguest_pages *pages)
134 {
135 /* This is a dummy value we need for GCC's sake. */
136 unsigned int clobber;
137
138 /*
139 * Copy the guest-specific information into this CPU's "struct
140 * lguest_pages".
141 */
142 copy_in_guest_info(cpu, pages);
143
144 /*
145 * Set the trap number to 256 (impossible value). If we fault while
146 * switching to the Guest (bad segment registers or bug), this will
147 * cause us to abort the Guest.
148 */
149 cpu->regs->trapnum = 256;
150
151 /*
152 * Now: we push the "eflags" register on the stack, then do an "lcall".
153 * This is how we change from using the kernel code segment to using
154 * the dedicated lguest code segment, as well as jumping into the
155 * Switcher.
156 *
157 * The lcall also pushes the old code segment (KERNEL_CS) onto the
158 * stack, then the address of this call. This stack layout happens to
159 * exactly match the stack layout created by an interrupt...
160 */
161 asm volatile("pushf; lcall *lguest_entry"
162 /*
163 * This is how we tell GCC that %eax ("a") and %ebx ("b")
164 * are changed by this routine. The "=" means output.
165 */
166 : "=a"(clobber), "=b"(clobber)
167 /*
168 * %eax contains the pages pointer. ("0" refers to the
169 * 0-th argument above, ie "a"). %ebx contains the
170 * physical address of the Guest's top-level page
171 * directory.
172 */
173 : "0"(pages), "1"(__pa(cpu->lg->pgdirs[cpu->cpu_pgd].pgdir))
174 /*
175 * We tell gcc that all these registers could change,
176 * which means we don't have to save and restore them in
177 * the Switcher.
178 */
179 : "memory", "%edx", "%ecx", "%edi", "%esi");
180 }
181 /*:*/
182
183 /*M:002
184 * There are hooks in the scheduler which we can register to tell when we
185 * get kicked off the CPU (preempt_notifier_register()). This would allow us
186 * to lazily disable SYSENTER which would regain some performance, and should
187 * also simplify copy_in_guest_info(). Note that we'd still need to restore
188 * things when we exit to Launcher userspace, but that's fairly easy.
189 *
190 * We could also try using these hooks for PGE, but that might be too expensive.
191 *
192 * The hooks were designed for KVM, but we can also put them to good use.
193 :*/
194
195 /*H:040
196 * This is the i386-specific code to setup and run the Guest. Interrupts
197 * are disabled: we own the CPU.
198 */
199 void lguest_arch_run_guest(struct lg_cpu *cpu)
200 {
201 /*
202 * Remember the awfully-named TS bit? If the Guest has asked to set it
203 * we set it now, so we can trap and pass that trap to the Guest if it
204 * uses the FPU.
205 */
206 if (cpu->ts)
207 unlazy_fpu(current);
208
209 /*
210 * SYSENTER is an optimized way of doing system calls. We can't allow
211 * it because it always jumps to privilege level 0. A normal Guest
212 * won't try it because we don't advertise it in CPUID, but a malicious
213 * Guest (or malicious Guest userspace program) could, so we tell the
214 * CPU to disable it before running the Guest.
215 */
216 if (boot_cpu_has(X86_FEATURE_SEP))
217 wrmsr(MSR_IA32_SYSENTER_CS, 0, 0);
218
219 /*
220 * Now we actually run the Guest. It will return when something
221 * interesting happens, and we can examine its registers to see what it
222 * was doing.
223 */
224 run_guest_once(cpu, lguest_pages(raw_smp_processor_id()));
225
226 /*
227 * Note that the "regs" structure contains two extra entries which are
228 * not really registers: a trap number which says what interrupt or
229 * trap made the switcher code come back, and an error code which some
230 * traps set.
231 */
232
233 /* Restore SYSENTER if it's supposed to be on. */
234 if (boot_cpu_has(X86_FEATURE_SEP))
235 wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
236
237 /*
238 * If the Guest page faulted, then the cr2 register will tell us the
239 * bad virtual address. We have to grab this now, because once we
240 * re-enable interrupts an interrupt could fault and thus overwrite
241 * cr2, or we could even move off to a different CPU.
242 */
243 if (cpu->regs->trapnum == 14)
244 cpu->arch.last_pagefault = read_cr2();
245 /*
246 * Similarly, if we took a trap because the Guest used the FPU,
247 * we have to restore the FPU it expects to see.
248 * math_state_restore() may sleep and we may even move off to
249 * a different CPU. So all the critical stuff should be done
250 * before this.
251 */
252 else if (cpu->regs->trapnum == 7)
253 math_state_restore();
254 }
255
256 /*H:130
257 * Now we've examined the hypercall code; our Guest can make requests.
258 * Our Guest is usually so well behaved; it never tries to do things it isn't
259 * allowed to, and uses hypercalls instead. Unfortunately, Linux's paravirtual
260 * infrastructure isn't quite complete, because it doesn't contain replacements
261 * for the Intel I/O instructions. As a result, the Guest sometimes fumbles
262 * across one during the boot process as it probes for various things which are
263 * usually attached to a PC.
264 *
265 * When the Guest uses one of these instructions, we get a trap (General
266 * Protection Fault) and come here. We see if it's one of those troublesome
267 * instructions and skip over it. We return true if we did.
268 */
269 static int emulate_insn(struct lg_cpu *cpu)
270 {
271 u8 insn;
272 unsigned int insnlen = 0, in = 0, small_operand = 0;
273 /*
274 * The eip contains the *virtual* address of the Guest's instruction:
275 * walk the Guest's page tables to find the "physical" address.
276 */
277 unsigned long physaddr = guest_pa(cpu, cpu->regs->eip);
278
279 /*
280 * This must be the Guest kernel trying to do something, not userspace!
281 * The bottom two bits of the CS segment register are the privilege
282 * level.
283 */
284 if ((cpu->regs->cs & 3) != GUEST_PL)
285 return 0;
286
287 /* Decoding x86 instructions is icky. */
288 insn = lgread(cpu, physaddr, u8);
289
290 /*
291 * Around 2.6.33, the kernel started using an emulation for the
292 * cmpxchg8b instruction in early boot on many configurations. This
293 * code isn't paravirtualized, and it tries to disable interrupts.
294 * Ignore it, which will Mostly Work.
295 */
296 if (insn == 0xfa) {
297 /* "cli", or Clear Interrupt Enable instruction. Skip it. */
298 cpu->regs->eip++;
299 return 1;
300 }
301
302 /*
303 * 0x66 is an "operand prefix". It means a 16, not 32 bit in/out.
304 */
305 if (insn == 0x66) {
306 small_operand = 1;
307 /* The instruction is 1 byte so far, read the next byte. */
308 insnlen = 1;
309 insn = lgread(cpu, physaddr + insnlen, u8);
310 }
311
312 /*
313 * We can ignore the lower bit for the moment and decode the 4 opcodes
314 * we need to emulate.
315 */
316 switch (insn & 0xFE) {
317 case 0xE4: /* in <next byte>,%al */
318 insnlen += 2;
319 in = 1;
320 break;
321 case 0xEC: /* in (%dx),%al */
322 insnlen += 1;
323 in = 1;
324 break;
325 case 0xE6: /* out %al,<next byte> */
326 insnlen += 2;
327 break;
328 case 0xEE: /* out %al,(%dx) */
329 insnlen += 1;
330 break;
331 default:
332 /* OK, we don't know what this is, can't emulate. */
333 return 0;
334 }
335
336 /*
337 * If it was an "IN" instruction, they expect the result to be read
338 * into %eax, so we change %eax. We always return all-ones, which
339 * traditionally means "there's nothing there".
340 */
341 if (in) {
342 /* Lower bit tells means it's a 32/16 bit access */
343 if (insn & 0x1) {
344 if (small_operand)
345 cpu->regs->eax |= 0xFFFF;
346 else
347 cpu->regs->eax = 0xFFFFFFFF;
348 } else
349 cpu->regs->eax |= 0xFF;
350 }
351 /* Finally, we've "done" the instruction, so move past it. */
352 cpu->regs->eip += insnlen;
353 /* Success! */
354 return 1;
355 }
356
357 /*H:050 Once we've re-enabled interrupts, we look at why the Guest exited. */
358 void lguest_arch_handle_trap(struct lg_cpu *cpu)
359 {
360 switch (cpu->regs->trapnum) {
361 case 13: /* We've intercepted a General Protection Fault. */
362 /*
363 * Check if this was one of those annoying IN or OUT
364 * instructions which we need to emulate. If so, we just go
365 * back into the Guest after we've done it.
366 */
367 if (cpu->regs->errcode == 0) {
368 if (emulate_insn(cpu))
369 return;
370 }
371 break;
372 case 14: /* We've intercepted a Page Fault. */
373 /*
374 * The Guest accessed a virtual address that wasn't mapped.
375 * This happens a lot: we don't actually set up most of the page
376 * tables for the Guest at all when we start: as it runs it asks
377 * for more and more, and we set them up as required. In this
378 * case, we don't even tell the Guest that the fault happened.
379 *
380 * The errcode tells whether this was a read or a write, and
381 * whether kernel or userspace code.
382 */
383 if (demand_page(cpu, cpu->arch.last_pagefault,
384 cpu->regs->errcode))
385 return;
386
387 /*
388 * OK, it's really not there (or not OK): the Guest needs to
389 * know. We write out the cr2 value so it knows where the
390 * fault occurred.
391 *
392 * Note that if the Guest were really messed up, this could
393 * happen before it's done the LHCALL_LGUEST_INIT hypercall, so
394 * lg->lguest_data could be NULL
395 */
396 if (cpu->lg->lguest_data &&
397 put_user(cpu->arch.last_pagefault,
398 &cpu->lg->lguest_data->cr2))
399 kill_guest(cpu, "Writing cr2");
400 break;
401 case 7: /* We've intercepted a Device Not Available fault. */
402 /*
403 * If the Guest doesn't want to know, we already restored the
404 * Floating Point Unit, so we just continue without telling it.
405 */
406 if (!cpu->ts)
407 return;
408 break;
409 case 32 ... 255:
410 /*
411 * These values mean a real interrupt occurred, in which case
412 * the Host handler has already been run. We just do a
413 * friendly check if another process should now be run, then
414 * return to run the Guest again.
415 */
416 cond_resched();
417 return;
418 case LGUEST_TRAP_ENTRY:
419 /*
420 * Our 'struct hcall_args' maps directly over our regs: we set
421 * up the pointer now to indicate a hypercall is pending.
422 */
423 cpu->hcall = (struct hcall_args *)cpu->regs;
424 return;
425 }
426
427 /* We didn't handle the trap, so it needs to go to the Guest. */
428 if (!deliver_trap(cpu, cpu->regs->trapnum))
429 /*
430 * If the Guest doesn't have a handler (either it hasn't
431 * registered any yet, or it's one of the faults we don't let
432 * it handle), it dies with this cryptic error message.
433 */
434 kill_guest(cpu, "unhandled trap %li at %#lx (%#lx)",
435 cpu->regs->trapnum, cpu->regs->eip,
436 cpu->regs->trapnum == 14 ? cpu->arch.last_pagefault
437 : cpu->regs->errcode);
438 }
439
440 /*
441 * Now we can look at each of the routines this calls, in increasing order of
442 * complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
443 * deliver_trap() and demand_page(). After all those, we'll be ready to
444 * examine the Switcher, and our philosophical understanding of the Host/Guest
445 * duality will be complete.
446 :*/
447 static void adjust_pge(void *on)
448 {
449 if (on)
450 write_cr4(read_cr4() | X86_CR4_PGE);
451 else
452 write_cr4(read_cr4() & ~X86_CR4_PGE);
453 }
454
455 /*H:020
456 * Now the Switcher is mapped and every thing else is ready, we need to do
457 * some more i386-specific initialization.
458 */
459 void __init lguest_arch_host_init(void)
460 {
461 int i;
462
463 /*
464 * Most of the x86/switcher_32.S doesn't care that it's been moved; on
465 * Intel, jumps are relative, and it doesn't access any references to
466 * external code or data.
467 *
468 * The only exception is the interrupt handlers in switcher.S: their
469 * addresses are placed in a table (default_idt_entries), so we need to
470 * update the table with the new addresses. switcher_offset() is a
471 * convenience function which returns the distance between the
472 * compiled-in switcher code and the high-mapped copy we just made.
473 */
474 for (i = 0; i < IDT_ENTRIES; i++)
475 default_idt_entries[i] += switcher_offset();
476
477 /*
478 * Set up the Switcher's per-cpu areas.
479 *
480 * Each CPU gets two pages of its own within the high-mapped region
481 * (aka. "struct lguest_pages"). Much of this can be initialized now,
482 * but some depends on what Guest we are running (which is set up in
483 * copy_in_guest_info()).
484 */
485 for_each_possible_cpu(i) {
486 /* lguest_pages() returns this CPU's two pages. */
487 struct lguest_pages *pages = lguest_pages(i);
488 /* This is a convenience pointer to make the code neater. */
489 struct lguest_ro_state *state = &pages->state;
490
491 /*
492 * The Global Descriptor Table: the Host has a different one
493 * for each CPU. We keep a descriptor for the GDT which says
494 * where it is and how big it is (the size is actually the last
495 * byte, not the size, hence the "-1").
496 */
497 state->host_gdt_desc.size = GDT_SIZE-1;
498 state->host_gdt_desc.address = (long)get_cpu_gdt_table(i);
499
500 /*
501 * All CPUs on the Host use the same Interrupt Descriptor
502 * Table, so we just use store_idt(), which gets this CPU's IDT
503 * descriptor.
504 */
505 store_idt(&state->host_idt_desc);
506
507 /*
508 * The descriptors for the Guest's GDT and IDT can be filled
509 * out now, too. We copy the GDT & IDT into ->guest_gdt and
510 * ->guest_idt before actually running the Guest.
511 */
512 state->guest_idt_desc.size = sizeof(state->guest_idt)-1;
513 state->guest_idt_desc.address = (long)&state->guest_idt;
514 state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1;
515 state->guest_gdt_desc.address = (long)&state->guest_gdt;
516
517 /*
518 * We know where we want the stack to be when the Guest enters
519 * the Switcher: in pages->regs. The stack grows upwards, so
520 * we start it at the end of that structure.
521 */
522 state->guest_tss.sp0 = (long)(&pages->regs + 1);
523 /*
524 * And this is the GDT entry to use for the stack: we keep a
525 * couple of special LGUEST entries.
526 */
527 state->guest_tss.ss0 = LGUEST_DS;
528
529 /*
530 * x86 can have a finegrained bitmap which indicates what I/O
531 * ports the process can use. We set it to the end of our
532 * structure, meaning "none".
533 */
534 state->guest_tss.io_bitmap_base = sizeof(state->guest_tss);
535
536 /*
537 * Some GDT entries are the same across all Guests, so we can
538 * set them up now.
539 */
540 setup_default_gdt_entries(state);
541 /* Most IDT entries are the same for all Guests, too.*/
542 setup_default_idt_entries(state, default_idt_entries);
543
544 /*
545 * The Host needs to be able to use the LGUEST segments on this
546 * CPU, too, so put them in the Host GDT.
547 */
548 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
549 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
550 }
551
552 /*
553 * In the Switcher, we want the %cs segment register to use the
554 * LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
555 * it will be undisturbed when we switch. To change %cs and jump we
556 * need this structure to feed to Intel's "lcall" instruction.
557 */
558 lguest_entry.offset = (long)switch_to_guest + switcher_offset();
559 lguest_entry.segment = LGUEST_CS;
560
561 /*
562 * Finally, we need to turn off "Page Global Enable". PGE is an
563 * optimization where page table entries are specially marked to show
564 * they never change. The Host kernel marks all the kernel pages this
565 * way because it's always present, even when userspace is running.
566 *
567 * Lguest breaks this: unbeknownst to the rest of the Host kernel, we
568 * switch to the Guest kernel. If you don't disable this on all CPUs,
569 * you'll get really weird bugs that you'll chase for two days.
570 *
571 * I used to turn PGE off every time we switched to the Guest and back
572 * on when we return, but that slowed the Switcher down noticibly.
573 */
574
575 /*
576 * We don't need the complexity of CPUs coming and going while we're
577 * doing this.
578 */
579 get_online_cpus();
580 if (cpu_has_pge) { /* We have a broader idea of "global". */
581 /* Remember that this was originally set (for cleanup). */
582 cpu_had_pge = 1;
583 /*
584 * adjust_pge is a helper function which sets or unsets the PGE
585 * bit on its CPU, depending on the argument (0 == unset).
586 */
587 on_each_cpu(adjust_pge, (void *)0, 1);
588 /* Turn off the feature in the global feature set. */
589 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE);
590 }
591 put_online_cpus();
592 }
593 /*:*/
594
595 void __exit lguest_arch_host_fini(void)
596 {
597 /* If we had PGE before we started, turn it back on now. */
598 get_online_cpus();
599 if (cpu_had_pge) {
600 set_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE);
601 /* adjust_pge's argument "1" means set PGE. */
602 on_each_cpu(adjust_pge, (void *)1, 1);
603 }
604 put_online_cpus();
605 }
606
607
608 /*H:122 The i386-specific hypercalls simply farm out to the right functions. */
609 int lguest_arch_do_hcall(struct lg_cpu *cpu, struct hcall_args *args)
610 {
611 switch (args->arg0) {
612 case LHCALL_LOAD_GDT_ENTRY:
613 load_guest_gdt_entry(cpu, args->arg1, args->arg2, args->arg3);
614 break;
615 case LHCALL_LOAD_IDT_ENTRY:
616 load_guest_idt_entry(cpu, args->arg1, args->arg2, args->arg3);
617 break;
618 case LHCALL_LOAD_TLS:
619 guest_load_tls(cpu, args->arg1);
620 break;
621 default:
622 /* Bad Guest. Bad! */
623 return -EIO;
624 }
625 return 0;
626 }
627
628 /*H:126 i386-specific hypercall initialization: */
629 int lguest_arch_init_hypercalls(struct lg_cpu *cpu)
630 {
631 u32 tsc_speed;
632
633 /*
634 * The pointer to the Guest's "struct lguest_data" is the only argument.
635 * We check that address now.
636 */
637 if (!lguest_address_ok(cpu->lg, cpu->hcall->arg1,
638 sizeof(*cpu->lg->lguest_data)))
639 return -EFAULT;
640
641 /*
642 * Having checked it, we simply set lg->lguest_data to point straight
643 * into the Launcher's memory at the right place and then use
644 * copy_to_user/from_user from now on, instead of lgread/write. I put
645 * this in to show that I'm not immune to writing stupid
646 * optimizations.
647 */
648 cpu->lg->lguest_data = cpu->lg->mem_base + cpu->hcall->arg1;
649
650 /*
651 * We insist that the Time Stamp Counter exist and doesn't change with
652 * cpu frequency. Some devious chip manufacturers decided that TSC
653 * changes could be handled in software. I decided that time going
654 * backwards might be good for benchmarks, but it's bad for users.
655 *
656 * We also insist that the TSC be stable: the kernel detects unreliable
657 * TSCs for its own purposes, and we use that here.
658 */
659 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && !check_tsc_unstable())
660 tsc_speed = tsc_khz;
661 else
662 tsc_speed = 0;
663 if (put_user(tsc_speed, &cpu->lg->lguest_data->tsc_khz))
664 return -EFAULT;
665
666 /* The interrupt code might not like the system call vector. */
667 if (!check_syscall_vector(cpu->lg))
668 kill_guest(cpu, "bad syscall vector");
669
670 return 0;
671 }
672 /*:*/
673
674 /*L:030
675 * Most of the Guest's registers are left alone: we used get_zeroed_page() to
676 * allocate the structure, so they will be 0.
677 */
678 void lguest_arch_setup_regs(struct lg_cpu *cpu, unsigned long start)
679 {
680 struct lguest_regs *regs = cpu->regs;
681
682 /*
683 * There are four "segment" registers which the Guest needs to boot:
684 * The "code segment" register (cs) refers to the kernel code segment
685 * __KERNEL_CS, and the "data", "extra" and "stack" segment registers
686 * refer to the kernel data segment __KERNEL_DS.
687 *
688 * The privilege level is packed into the lower bits. The Guest runs
689 * at privilege level 1 (GUEST_PL).
690 */
691 regs->ds = regs->es = regs->ss = __KERNEL_DS|GUEST_PL;
692 regs->cs = __KERNEL_CS|GUEST_PL;
693
694 /*
695 * The "eflags" register contains miscellaneous flags. Bit 1 (0x002)
696 * is supposed to always be "1". Bit 9 (0x200) controls whether
697 * interrupts are enabled. We always leave interrupts enabled while
698 * running the Guest.
699 */
700 regs->eflags = X86_EFLAGS_IF | 0x2;
701
702 /*
703 * The "Extended Instruction Pointer" register says where the Guest is
704 * running.
705 */
706 regs->eip = start;
707
708 /*
709 * %esi points to our boot information, at physical address 0, so don't
710 * touch it.
711 */
712
713 /* There are a couple of GDT entries the Guest expects at boot. */
714 setup_guest_gdt(cpu);
715 }