import PULS_20160108
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / input / touchscreen / mediatek / GT927 / gt9xx_update.c
1 /* drivers/input/touchscreen/gt813_827_828_update.c
2 *
3 * 2010 - 2012 Goodix Technology.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be a reference
11 * to you, when you are integrating the GOODiX's CTP IC into your system,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * Version:1.2
17 * V1.0:2012/08/31,first release.
18 * V1.2:2012/10/15,add force update,GT9110P pid map
19 */
20 #include "tpd.h"
21 #include <linux/interrupt.h>
22 #include <cust_eint.h>
23 #include <linux/i2c.h>
24 #include <linux/sched.h>
25 #include <linux/kthread.h>
26 #include <linux/rtpm_prio.h>
27 #include <linux/wait.h>
28 #include <linux/time.h>
29 #include <linux/delay.h>
30 #include <linux/namei.h>
31 #include <linux/mount.h>
32 #include "cust_gpio_usage.h"
33 #include <asm/uaccess.h>
34
35 #define GUP_FW_INFO
36 #include "tpd_custom_gt9xx.h"
37
38 #define GUP_REG_HW_INFO 0x4220
39 #define GUP_REG_FW_MSG 0x41E4
40 #define GUP_REG_PID_VID 0x8140
41
42 //#define GTP_BOOT_FW_CONFIG_SD_UPDATE
43 #define GUP_SEARCH_FILE_TIMES 50
44 #define UPDATE_FILE_PATH_2 "/data/goodix/_goodix_update_.bin"
45 #define UPDATE_FILE_PATH_1 "/sdcard/goodix/_goodix_update_.bin"
46
47 #define CONFIG_FILE_PATH_2 "/data/goodix/_goodix_config_.cfg"
48 #define CONFIG_FILE_PATH_1 "/sdcard/goodix/_goodix_config_.cfg"
49
50 #define FW_HEAD_LENGTH 14
51 #define FW_SECTION_LENGTH 0x2000
52 #define FW_DSP_ISP_LENGTH 0x1000
53 #define FW_DSP_LENGTH 0x1000
54 #define FW_BOOT_LENGTH 0x800
55 #define FW_DOWNLOAD_LENGTH 0x4000
56 #define FW_LENGTH (4*FW_SECTION_LENGTH+FW_DSP_ISP_LENGTH+FW_DSP_LENGTH+FW_BOOT_LENGTH)
57
58 #define PACK_SIZE 256
59 #define MAX_FRAME_CHECK_TIME 5
60
61 #define _bRW_MISCTL__SRAM_BANK 0x4048
62 #define _bRW_MISCTL__MEM_CD_EN 0x4049
63 #define _bRW_MISCTL__CACHE_EN 0x404B
64 #define _bRW_MISCTL__TMR0_EN 0x40B0
65 #define _rRW_MISCTL__SWRST_B0_ 0x4180
66 #define _bWO_MISCTL__CPU_SWRST_PULSE 0x4184
67 #define _rRW_MISCTL__BOOTCTL_B0_ 0x4190
68 #define _rRW_MISCTL__BOOT_OPT_B0_ 0x4218
69 #define _rRW_MISCTL__BOOT_CTL_ 0x5094
70
71 #define FAIL 0
72 #define SUCCESS 1
73
74 #pragma pack(1)
75 typedef struct
76 {
77 u8 hw_info[4]; //hardware info//
78 u8 pid[8]; //product id //
79 u16 vid; //version id //
80 } st_fw_head;
81 #pragma pack()
82
83 typedef struct
84 {
85 u8 force_update;
86 u8 fw_flag;
87 struct file *file;
88 struct file *cfg_file;
89 st_fw_head ic_fw_msg;
90 mm_segment_t old_fs;
91 } st_update_msg;
92
93 st_update_msg update_msg;
94 struct i2c_client *guitar_client = NULL;
95 extern struct i2c_client *i2c_client_point;
96 u16 show_len;
97 u16 total_len;
98 u8 *fw_buf;
99
100 extern s32 gtp_i2c_read(struct i2c_client *client, uint8_t *buf, s32 len);
101 extern s32 gtp_i2c_write(struct i2c_client *client, uint8_t *data, s32 len);
102 extern void gtp_reset_guitar(struct i2c_client *client, s32 ms);
103 extern s32 gtp_send_cfg(struct i2c_client *client);
104
105 static u8 gup_get_ic_msg(struct i2c_client *client, u16 addr, u8 *msg, s32 len)
106 {
107 s32 i = 0;
108
109 msg[0] = (addr >> 8) & 0xff;
110 msg[1] = addr & 0xff;
111
112 for (i = 0; i < 5; i++)
113 {
114 if (gtp_i2c_read(client, msg, GTP_ADDR_LENGTH + len) > 0)
115 {
116 break;
117 }
118 }
119
120 if (i >= 5)
121 {
122 GTP_ERROR("Read data from 0x%02x%02x failed!", msg[0], msg[1]);
123 return FAIL;
124 }
125
126 return SUCCESS;
127 }
128
129 static u8 gup_set_ic_msg(struct i2c_client *client, u16 addr, u8 val)
130 {
131 s32 i = 0;
132 u8 msg[3];
133
134 msg[0] = (addr >> 8) & 0xff;
135 msg[1] = addr & 0xff;
136 msg[2] = val;
137
138 for (i = 0; i < 5; i++)
139 {
140 if (gtp_i2c_write(client, msg, GTP_ADDR_LENGTH + 1) > 0)
141 {
142 break;
143 }
144 }
145
146 if (i >= 5)
147 {
148 GTP_ERROR("Set data to 0x%02x%02x failed!", msg[0], msg[1]);
149 return FAIL;
150 }
151
152 return SUCCESS;
153 }
154
155 static u8 gup_get_ic_fw_msg(struct i2c_client *client)
156 {
157 s32 ret = -1;
158 u8 retry = 0;
159 u8 buf[16];
160 u8 i;
161
162 //step1:get hardware info
163 ret = gup_get_ic_msg(client, GUP_REG_HW_INFO, buf, 4);
164
165 if (FAIL == ret)
166 {
167 GTP_ERROR("Read hardware info fail.");
168 return ret;
169 }
170
171 memcpy(update_msg.ic_fw_msg.hw_info, &buf[GTP_ADDR_LENGTH], 4);
172
173 for (i = 0; i < 4; i++)
174 {
175 update_msg.ic_fw_msg.hw_info[i] = buf[GTP_ADDR_LENGTH + 3 - i];
176 }
177
178 GTP_DEBUG("IC Hardware info:%02x%02x%02x%02x", update_msg.ic_fw_msg.hw_info[0], update_msg.ic_fw_msg.hw_info[1],
179 update_msg.ic_fw_msg.hw_info[2], update_msg.ic_fw_msg.hw_info[3]);
180
181 //step2:get firmware message
182 for (retry = 0; retry < 2; retry++)
183 {
184 ret = gup_get_ic_msg(client, GUP_REG_FW_MSG, buf, 1);
185
186 if (FAIL == ret)
187 {
188 GTP_ERROR("Read firmware message fail.");
189 return ret;
190 }
191
192 update_msg.force_update = buf[GTP_ADDR_LENGTH];
193
194 if ((0xBE != update_msg.force_update) && (!retry))
195 {
196 GTP_INFO("The check sum in ic is error.");
197 GTP_INFO("The IC will be updated by force.");
198 continue;
199 }
200
201 break;
202 }
203
204 GTP_DEBUG("IC force update flag:0x%x", update_msg.force_update);
205
206 //step3:get pid & vid
207 ret = gup_get_ic_msg(client, GUP_REG_PID_VID, buf, 6);
208
209 if (FAIL == ret)
210 {
211 GTP_ERROR("Read product id & version id fail.");
212 return ret;
213 }
214
215 memset(update_msg.ic_fw_msg.pid, 0, sizeof(update_msg.ic_fw_msg.pid));
216 memcpy(update_msg.ic_fw_msg.pid, &buf[GTP_ADDR_LENGTH], 4);
217 GTP_DEBUG("IC Product id:%s", update_msg.ic_fw_msg.pid);
218
219 //GT9XX PID MAPPING
220 /*|-----FLASH-----RAM-----|
221 |------918------918-----|
222 |------968------968-----|
223 |------913------913-----|
224 |------913P-----913P----|
225 |------927------927-----|
226 |------927P-----927P----|
227 |------9110-----9110----|
228 |------9110P----9111----|*/
229 if (update_msg.ic_fw_msg.pid[0] != 0)
230 {
231 if (!memcmp(update_msg.ic_fw_msg.pid, "9111", 4))
232 {
233 GTP_DEBUG("IC Mapping Product id:%s", update_msg.ic_fw_msg.pid);
234 memcpy(update_msg.ic_fw_msg.pid, "9110P", 5);
235 }
236 }
237
238 update_msg.ic_fw_msg.vid = buf[GTP_ADDR_LENGTH + 4] + (buf[GTP_ADDR_LENGTH + 5] << 8);
239 GTP_DEBUG("IC version id:%04x", update_msg.ic_fw_msg.vid);
240
241 return SUCCESS;
242 }
243
244 s32 gup_enter_update_mode(struct i2c_client *client)
245 {
246 s32 ret = -1;
247 s32 retry = 0;
248 u8 rd_buf[3];
249
250 //step1:RST output low last at least 2ms
251 GTP_GPIO_OUTPUT(GTP_RST_PORT, 0);
252 msleep(2);
253
254 //step2:select I2C slave addr,INT:0--0xBA;1--0x28.
255 GTP_GPIO_OUTPUT(GTP_INT_PORT, (client->addr == 0x14));
256 msleep(2);
257
258 //step3:RST output high reset guitar
259 GTP_GPIO_OUTPUT(GTP_RST_PORT, 1);
260
261 //20121211 modify start
262 msleep(5);
263
264 while (retry++ < 200)
265 {
266 //step4:Hold ss51 & dsp
267 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
268
269 if (ret <= 0)
270 {
271 GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry);
272 continue;
273 }
274
275 //step5:Confirm hold
276 ret = gup_get_ic_msg(client, _rRW_MISCTL__SWRST_B0_, rd_buf, 1);
277
278 if (ret <= 0)
279 {
280 GTP_DEBUG("Hold ss51 & dsp I2C error,retry:%d", retry);
281 continue;
282 }
283
284 if (0x0C == rd_buf[GTP_ADDR_LENGTH])
285 {
286 GTP_DEBUG("Hold ss51 & dsp confirm SUCCESS");
287 break;
288 }
289
290 GTP_DEBUG("Hold ss51 & dsp confirm 0x4180 failed,value:%d", rd_buf[GTP_ADDR_LENGTH]);
291 }
292
293 if (retry >= 200)
294 {
295 GTP_ERROR("Enter update Hold ss51 failed.");
296 return FAIL;
297 }
298
299 //step6:DSP_CK and DSP_ALU_CK PowerOn
300 ret = gup_set_ic_msg(client, 0x4010, 0x00);
301
302 //20121211 modify end
303
304 return ret;
305 }
306
307 void gup_leave_update_mode(void)
308 {
309 s32 ret = 0;
310 //GTP_GPIO_AS_INT(GTP_INT_PORT);
311
312 GTP_DEBUG("[leave_update_mode]reset chip.");
313 gtp_reset_guitar(guitar_client, 20);
314
315 msleep(100);
316 GTP_DEBUG("[update_proc]send config.");
317 ret = gtp_send_cfg(guitar_client);
318
319 if (ret < 0)
320 {
321 GTP_ERROR("[update_proc]send config fail.");
322 }
323 }
324
325 static u8 gup_enter_upadte_judge(st_fw_head *fw_head)
326 {
327 u16 u16_tmp;
328 //Get the correct nvram data
329 //The correct conditions:
330 //1. the hardware info is the same
331 //2. the product id is the same
332 //3. the firmware version in update file is greater than the firmware version in ic
333 //or the check sum in ic is wrong
334
335 u16_tmp = fw_head->vid;
336 fw_head->vid = (u16)(u16_tmp >> 8) + (u16)(u16_tmp << 8);
337
338 GTP_DEBUG("FILE HARDWARE INFO:%02x%02x%02x%02x", fw_head->hw_info[0], fw_head->hw_info[1], fw_head->hw_info[2], fw_head->hw_info[3]);
339 GTP_DEBUG("FILE PID:%s", fw_head->pid);
340 GTP_DEBUG("FILE VID:%04x", fw_head->vid);
341
342 GTP_DEBUG("IC HARDWARE INFO:%02x%02x%02x%02x", update_msg.ic_fw_msg.hw_info[0], update_msg.ic_fw_msg.hw_info[1],
343 update_msg.ic_fw_msg.hw_info[2], update_msg.ic_fw_msg.hw_info[3]);
344 GTP_DEBUG("IC PID:%s", update_msg.ic_fw_msg.pid);
345 GTP_DEBUG("IC VID:%04x", update_msg.ic_fw_msg.vid);
346
347 //First two conditions
348 if (!memcmp(fw_head->hw_info, update_msg.ic_fw_msg.hw_info, sizeof(update_msg.ic_fw_msg.hw_info)))
349 {
350 GTP_DEBUG("Get the same hardware info.");
351
352 if (update_msg.force_update != 0xBE)
353 {
354 GTP_INFO("FW chksum error,need enter update.");
355 return SUCCESS;
356 }
357
358 if ((!memcmp(fw_head->pid, update_msg.ic_fw_msg.pid, strlen(update_msg.ic_fw_msg.pid))) ||
359 (!memcmp(update_msg.ic_fw_msg.pid, "91XX", 4)) ||
360 (!memcmp(fw_head->pid, "91XX", 4)))
361 {
362 if (!memcmp(fw_head->pid, "91XX", 4))
363 {
364 GTP_DEBUG("Force none same pid update mode.");
365 }
366 else
367 {
368 GTP_DEBUG("Get the same pid.");
369 }
370
371 //The third condition
372 if (fw_head->vid > update_msg.ic_fw_msg.vid)
373 {
374
375 GTP_INFO("Need enter update.");
376 return SUCCESS;
377 }
378
379 GTP_ERROR("Don't meet the third condition.");
380 }
381 }
382
383 return FAIL;
384 }
385
386
387 #ifdef GTP_BOOT_FW_CONFIG_SD_UPDATE
388 static u8 ascii2hex(u8 a)
389 {
390 s8 value = 0;
391
392 if (a >= '0' && a <= '9')
393 {
394 value = a - '0';
395 }
396 else if (a >= 'A' && a <= 'F')
397 {
398 value = a - 'A' + 0x0A;
399 }
400 else if (a >= 'a' && a <= 'f')
401 {
402 value = a - 'a' + 0x0A;
403 }
404 else
405 {
406 value = 0xff;
407 }
408
409 return value;
410 }
411
412 static s8 gup_update_config(struct i2c_client *client)
413 {
414 s32 file_len = 0;
415 s32 ret = 0;
416 s32 i = 0;
417 s32 file_cfg_len = 0;
418 s32 chip_cfg_len = 0;
419 s32 count = 0;
420 u8 *buf;
421 u8 *pre_buf;
422 u8 *file_config;
423 //u8 checksum = 0;
424
425 if (IS_ERR(update_msg.cfg_file))
426 {
427 GTP_ERROR("[update_cfg]No need to upgrade config!");
428 return FAIL;
429 }
430
431 file_len = update_msg.cfg_file->f_op->llseek(update_msg.cfg_file, 0, SEEK_END);
432
433 chip_cfg_len = 186;
434
435 if (!memcmp(update_msg.ic_fw_msg.pid, "968", 3))
436 {
437 chip_cfg_len = 228;
438 }
439
440 GTP_DEBUG("[update_cfg]config file len:%d", file_len);
441 GTP_DEBUG("[update_cfg]need config len:%d", chip_cfg_len);
442
443 if ((file_len + 5) < chip_cfg_len * 5)
444 {
445 GTP_ERROR("Config length error");
446 return -1;
447 }
448
449 buf = (u8 *)kzalloc(file_len, GFP_KERNEL);
450 pre_buf = (u8 *)kzalloc(file_len, GFP_KERNEL);
451 file_config = (u8 *)kzalloc(chip_cfg_len + GTP_ADDR_LENGTH, GFP_KERNEL);
452 update_msg.cfg_file->f_op->llseek(update_msg.cfg_file, 0, SEEK_SET);
453
454 GTP_DEBUG("[update_cfg]Read config from file.");
455 ret = update_msg.cfg_file->f_op->read(update_msg.cfg_file, (char *)pre_buf, file_len, &update_msg.cfg_file->f_pos);
456
457 if (ret < 0)
458 {
459 GTP_ERROR("[update_cfg]Read config file failed.");
460 goto update_cfg_file_failed;
461 }
462
463 GTP_DEBUG("[update_cfg]Delete illgal charactor.");
464
465 for (i = 0, count = 0; i < file_len; i++)
466 {
467 if (pre_buf[i] == ' ' || pre_buf[i] == '\r' || pre_buf[i] == '\n')
468 {
469 continue;
470 }
471
472 buf[count++] = pre_buf[i];
473 }
474
475 GTP_DEBUG("[update_cfg]Ascii to hex.");
476 file_config[0] = GTP_REG_CONFIG_DATA >> 8;
477 file_config[1] = GTP_REG_CONFIG_DATA & 0xff;
478
479 for (i = 0, file_cfg_len = GTP_ADDR_LENGTH; i < count; i += 5)
480 {
481 if ((buf[i] == '0') && ((buf[i + 1] == 'x') || (buf[i + 1] == 'X')))
482 {
483 u8 high, low;
484 high = ascii2hex(buf[i + 2]);
485 low = ascii2hex(buf[i + 3]);
486
487 if ((high == 0xFF) || (low == 0xFF))
488 {
489 ret = 0;
490 GTP_ERROR("[update_cfg]Illegal config file.");
491 goto update_cfg_file_failed;
492 }
493
494 file_config[file_cfg_len++] = (high << 4) + low;
495 }
496 else
497 {
498 ret = 0;
499 GTP_ERROR("[update_cfg]Illegal config file.");
500 goto update_cfg_file_failed;
501 }
502 }
503
504 GTP_DEBUG("config:");
505 GTP_DEBUG_ARRAY(file_config, file_cfg_len);
506
507 //cal checksum
508 #if 0
509
510 for (i = GTP_ADDR_LENGTH; i < chip_cfg_len; i++)
511 {
512 checksum += file_config[i];
513 }
514
515 file_config[chip_cfg_len] = (~checksum) + 1;
516 #endif
517
518 i = 0;
519
520 while (i++ < 5)
521 {
522 ret = gtp_i2c_write(client, file_config, file_cfg_len);
523
524 if (ret > 0)
525 {
526 GTP_INFO("[update_cfg]Send config SUCCESS.");
527 break;
528 }
529
530 GTP_ERROR("[update_cfg]Send config i2c error.");
531 }
532
533 update_cfg_file_failed:
534 kfree(pre_buf);
535 kfree(buf);
536 kfree(file_config);
537 return ret;
538 }
539 #endif
540
541 static u8 gup_load_update_file(st_fw_head *fw_head)
542 {
543 s32 ret = 0;
544
545 mm_segment_t fs = get_fs();
546 set_fs(KERNEL_DS);
547
548 ret = update_msg.file->f_op->llseek(update_msg.file, 0, SEEK_SET);
549 //update_msg.file->f_pos = 0;
550 ret = update_msg.file->f_op->read(update_msg.file, (char *)fw_head, FW_HEAD_LENGTH, &update_msg.file->f_pos);
551
552 if (ret < 0)
553 {
554 GTP_ERROR("Read firmware head in update file error.");
555
556 return FAIL;
557 }
558
559 //memcpy(fw_head, buf, FW_HEAD_LENGTH);
560 update_msg.file->f_pos = FW_HEAD_LENGTH + 0;
561 ret = update_msg.file->f_op->read(update_msg.file, (char *)fw_buf, FW_LENGTH, &update_msg.file->f_pos);
562
563 if (ret < 0)
564 {
565 GTP_ERROR("Read firmware file fail.");
566
567 return FAIL;
568 }
569
570 set_fs(fs);
571
572 return SUCCESS;
573 }
574
575 static u8 gup_check_update_file(struct i2c_client *client, st_fw_head *fw_head, u8 *path)
576 {
577 s32 ret = 0;
578 s32 i = 0;
579 s32 fw_checksum = 0;
580 u8 empty_test = 0;
581
582 update_msg.file = NULL;
583
584 if (path)
585 {
586 GTP_DEBUG("Update File path:%s, %d", path, strlen(path));
587 update_msg.file = filp_open(path, O_RDONLY, 0644);
588
589 if (IS_ERR(update_msg.file))
590 {
591 GTP_ERROR("Open update file(%s) error!", path);
592 return FAIL;
593 }
594 }
595
596 #ifdef GTP_BOOT_FW_CONFIG_SD_UPDATE
597
598 else
599 {
600 //Begin to search update file,the config file & firmware file must be in the same path,single or double.
601 for (i = 0; i < GUP_SEARCH_FILE_TIMES; i++)
602 {
603 update_msg.file = filp_open(UPDATE_FILE_PATH_1, O_RDWR, 0444);
604
605 if (IS_ERR(update_msg.file))
606 {
607 update_msg.file = filp_open(UPDATE_FILE_PATH_2, O_RDWR, 0664);
608
609 if (IS_ERR(update_msg.file))
610 {
611 GTP_DEBUG("%3d:Searching file...", i);
612 msleep(1000);
613 continue;
614 }
615 else
616 {
617 GTP_DEBUG("Find UPDATE_FILE_PATH_2");
618 break;
619 }
620 }
621 else
622 {
623 GTP_DEBUG("Find UPDATE_FILE_PATH_1");
624
625 i = GUP_SEARCH_FILE_TIMES;
626 break;
627 }
628 }
629
630 // make sure check config file at least once
631 if (i == GUP_SEARCH_FILE_TIMES)
632 {
633 i--;
634 }
635
636 for (; i < GUP_SEARCH_FILE_TIMES; i++)
637 {
638 update_msg.cfg_file = filp_open(CONFIG_FILE_PATH_1, O_RDWR, 0444);
639
640 if (IS_ERR(update_msg.cfg_file))
641 {
642 update_msg.cfg_file = filp_open(CONFIG_FILE_PATH_2, O_RDWR, 0664);
643
644 if (IS_ERR(update_msg.cfg_file))
645 {
646 GTP_DEBUG("%3d:Searching file...", i);
647 msleep(1000);
648 continue;
649 }
650 else
651 {
652 GTP_DEBUG("Find CONFIG_FILE_PATH_2");
653 break;
654 }
655 }
656 else
657 {
658 GTP_DEBUG("Find CONFIG_FILE_PATH_1");
659 break;
660 }
661 }
662
663
664 if (!IS_ERR(update_msg.cfg_file))
665 {
666 GTP_DEBUG("Got the update config file.");
667 ret = gup_update_config(client);
668
669 if (ret <= 0)
670 {
671 GTP_ERROR("Update config failed.");
672 }
673
674 filp_close(update_msg.cfg_file, NULL);
675 }
676 }
677
678
679
680 #endif //end BOOT_FW_CONFIG_SD_UPDATE
681
682 if ((!IS_ERR(update_msg.file)) && (update_msg.file != NULL))
683 {
684 ret = gup_load_update_file(fw_head);
685 filp_close(update_msg.file, NULL);
686
687 if (ret == FAIL)
688 {
689 return FAIL;
690 }
691 }
692
693
694
695 else //default FW
696 {
697 GTP_DEBUG("Load Default FW.");
698 memcpy(fw_head, gtp_default_FW, FW_HEAD_LENGTH);
699 memcpy(fw_buf, gtp_default_FW + FW_HEAD_LENGTH, FW_LENGTH);
700 }
701
702 //check firmware legality
703 fw_checksum = 0;
704
705 for (i = 0; i < FW_SECTION_LENGTH * 4 + FW_DSP_ISP_LENGTH + FW_DSP_LENGTH + FW_BOOT_LENGTH; i += 2)
706 {
707 u16 temp;
708 //GTP_DEBUG("BUF[0]:%x", buf[0]);
709 empty_test |= fw_buf[i];
710 empty_test |= fw_buf[i + 1];
711 temp = (fw_buf[i] << 8) + fw_buf[i + 1];
712 fw_checksum += temp;
713 }
714
715 GTP_DEBUG("firmware checksum:%x empty_test:%x", (fw_checksum & 0xFFFF), empty_test);
716
717 if ((fw_checksum & 0xFFFF) || (empty_test == 0))
718 {
719 GTP_ERROR("Illegal or empty firmware file.");
720 GTP_ERROR("Load Default FW.");
721 memcpy(fw_head, gtp_default_FW, FW_HEAD_LENGTH);
722 memcpy(fw_buf, gtp_default_FW + FW_HEAD_LENGTH, FW_LENGTH);
723
724 }
725
726 return SUCCESS;
727
728 }
729
730
731 static u8 gup_burn_proc(struct i2c_client *client, u8 *burn_buf, u16 start_addr, u16 total_length)
732 {
733 s32 ret = 0;
734 u16 burn_addr = start_addr;
735 u16 frame_length = 0;
736 u16 burn_length = 0;
737 u8 wr_buf[PACK_SIZE + GTP_ADDR_LENGTH];
738 u8 rd_buf[PACK_SIZE + GTP_ADDR_LENGTH];
739 u8 retry = 0;
740
741 GTP_DEBUG("Begin burn %dk data to addr 0x%x", (total_length / 1024), start_addr);
742
743 while (burn_length < total_length)
744 {
745 GTP_DEBUG("B/T:%04d/%04d", burn_length, total_length);
746 frame_length = ((total_length - burn_length) > PACK_SIZE) ? PACK_SIZE : (total_length - burn_length);
747 wr_buf[0] = (u8)(burn_addr >> 8);
748 rd_buf[0] = wr_buf[0];
749 wr_buf[1] = (u8)burn_addr;
750 rd_buf[1] = wr_buf[1];
751 memcpy(&wr_buf[GTP_ADDR_LENGTH], &burn_buf[burn_length], frame_length);
752
753 for (retry = 0; retry < MAX_FRAME_CHECK_TIME; retry++)
754 {
755 ret = gtp_i2c_write(client, wr_buf, GTP_ADDR_LENGTH + frame_length);
756
757 if (ret <= 0)
758 {
759 GTP_ERROR("Write frame data i2c error.");
760 continue;
761 }
762
763 ret = gtp_i2c_read(client, rd_buf, GTP_ADDR_LENGTH + frame_length);
764
765 if (ret <= 0)
766 {
767 GTP_ERROR("Read back frame data i2c error.");
768 continue;
769 }
770
771 if (memcmp(&wr_buf[GTP_ADDR_LENGTH], &rd_buf[GTP_ADDR_LENGTH], frame_length))
772 {
773 GTP_ERROR("Check frame data fail,not equal.");
774 GTP_DEBUG("write array:");
775 GTP_DEBUG_ARRAY(&wr_buf[GTP_ADDR_LENGTH], frame_length);
776 GTP_DEBUG("read array:");
777 GTP_DEBUG_ARRAY(&rd_buf[GTP_ADDR_LENGTH], frame_length);
778 continue;
779 }
780 else
781 {
782 //GTP_DEBUG("Check frame data success.");
783 break;
784 }
785 }
786
787 if (retry >= MAX_FRAME_CHECK_TIME)
788 {
789 GTP_ERROR("Burn frame data time out,exit.");
790 return FAIL;
791 }
792
793 burn_length += frame_length;
794 burn_addr += frame_length;
795 }
796
797 return SUCCESS;
798 }
799
800 static u8 gup_load_section_file(u8 *buf, u16 offset, u16 length)
801 {
802
803 memcpy(buf, fw_buf + offset, length);
804 return SUCCESS;
805 }
806
807 static u8 gup_recall_check(struct i2c_client *client, u8 *chk_src, u16 start_rd_addr, u16 chk_length)
808 {
809 u8 rd_buf[PACK_SIZE + GTP_ADDR_LENGTH];
810 s32 ret = 0;
811 u16 recall_addr = start_rd_addr;
812 u16 recall_length = 0;
813 u16 frame_length = 0;
814
815 while (recall_length < chk_length)
816 {
817 frame_length = ((chk_length - recall_length) > PACK_SIZE) ? PACK_SIZE : (chk_length - recall_length);
818 ret = gup_get_ic_msg(client, recall_addr, rd_buf, frame_length);
819
820 if (ret <= 0)
821 {
822 GTP_ERROR("recall i2c error,exit");
823 return FAIL;
824 }
825
826 if (memcmp(&rd_buf[GTP_ADDR_LENGTH], &chk_src[recall_length], frame_length))
827 {
828 GTP_ERROR("Recall frame data fail,not equal.");
829 GTP_DEBUG("chk_src array:");
830 GTP_DEBUG_ARRAY(&chk_src[recall_length], frame_length);
831 GTP_DEBUG("recall array:");
832 GTP_DEBUG_ARRAY(&rd_buf[GTP_ADDR_LENGTH], frame_length);
833 return FAIL;
834 }
835
836 recall_length += frame_length;
837 recall_addr += frame_length;
838 }
839
840 GTP_DEBUG("Recall check %dk firmware success.", (chk_length / 1024));
841
842 return SUCCESS;
843 }
844
845 static u8 gup_burn_fw_section(struct i2c_client *client, u8 *fw_section, u16 start_addr, u8 bank_cmd)
846 {
847 s32 ret = 0;
848 u8 rd_buf[5];
849
850 //step1:hold ss51 & dsp
851 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
852
853 if (ret <= 0)
854 {
855 GTP_ERROR("[burn_fw_section]hold ss51 & dsp fail.");
856 return FAIL;
857 }
858
859 //step2:set scramble
860 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
861
862 if (ret <= 0)
863 {
864 GTP_ERROR("[burn_fw_section]set scramble fail.");
865 return FAIL;
866 }
867
868 //step3:select bank
869 ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, (bank_cmd >> 4) & 0x0F);
870
871 if (ret <= 0)
872 {
873 GTP_ERROR("[burn_fw_section]select bank %d fail.", (bank_cmd >> 4) & 0x0F);
874 return FAIL;
875 }
876
877 //step4:enable accessing code
878 ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01);
879
880 if (ret <= 0)
881 {
882 GTP_ERROR("[burn_fw_section]enable accessing code fail.");
883 return FAIL;
884 }
885
886 //step5:burn 8k fw section
887 ret = gup_burn_proc(client, fw_section, start_addr, FW_SECTION_LENGTH);
888
889 if (FAIL == ret)
890 {
891 GTP_ERROR("[burn_fw_section]burn fw_section fail.");
892 return FAIL;
893 }
894
895 //step6:hold ss51 & release dsp
896 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x04);
897
898 if (ret <= 0)
899 {
900 GTP_ERROR("[burn_fw_section]hold ss51 & release dsp fail.");
901 return FAIL;
902 }
903
904 //must delay
905 msleep(1);
906
907 //step7:send burn cmd to move data to flash from sram
908 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, bank_cmd & 0x0f);
909
910 if (ret <= 0)
911 {
912 GTP_ERROR("[burn_fw_section]send burn cmd fail.");
913 return FAIL;
914 }
915
916 GTP_DEBUG("[burn_fw_section]Wait for the burn is complete......");
917
918 do
919 {
920 ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1);
921
922 if (ret <= 0)
923 {
924 GTP_ERROR("[burn_fw_section]Get burn state fail");
925 return FAIL;
926 }
927
928 msleep(10);
929 //GTP_DEBUG("[burn_fw_section]Get burn state:%d.", rd_buf[GTP_ADDR_LENGTH]);
930 }
931 while (rd_buf[GTP_ADDR_LENGTH]);
932
933 //step8:select bank
934 ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, (bank_cmd >> 4) & 0x0F);
935
936 if (ret <= 0)
937 {
938 GTP_ERROR("[burn_fw_section]select bank %d fail.", (bank_cmd >> 4) & 0x0F);
939 return FAIL;
940 }
941
942 //step9:enable accessing code
943 ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01);
944
945 if (ret <= 0)
946 {
947 GTP_ERROR("[burn_fw_section]enable accessing code fail.");
948 return FAIL;
949 }
950
951 //step10:recall 8k fw section
952 ret = gup_recall_check(client, fw_section, start_addr, FW_SECTION_LENGTH);
953
954 if (FAIL == ret)
955 {
956 GTP_ERROR("[burn_fw_section]recall check 8k firmware fail.");
957 return FAIL;
958 }
959
960 //step11:disable accessing code
961 ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x00);
962
963 if (ret <= 0)
964 {
965 GTP_ERROR("[burn_fw_section]disable accessing code fail.");
966 return FAIL;
967 }
968
969 return SUCCESS;
970 }
971
972 static u8 gup_burn_dsp_isp(struct i2c_client *client)
973 {
974 s32 ret = 0;
975 u8 *fw_dsp_isp = NULL;
976 u8 retry = 0;
977
978 GTP_DEBUG("[burn_dsp_isp]Begin burn dsp isp---->>");
979
980 //step1:alloc memory
981 GTP_DEBUG("[burn_dsp_isp]step1:alloc memory");
982
983 while (retry++ < 5)
984 {
985 fw_dsp_isp = (u8 *)kzalloc(FW_DSP_ISP_LENGTH, GFP_KERNEL);
986
987 if (fw_dsp_isp == NULL)
988 {
989 continue;
990 }
991 else
992 {
993 GTP_INFO("[burn_dsp_isp]Alloc %dk byte memory success.", (FW_DSP_ISP_LENGTH / 1024));
994 break;
995 }
996 }
997
998 if (retry >= 5)
999 {
1000 GTP_ERROR("[burn_dsp_isp]Alloc memory fail,exit.");
1001 return FAIL;
1002 }
1003
1004 //step2:load dsp isp file data
1005 GTP_DEBUG("[burn_dsp_isp]step2:load dsp isp file data");
1006 ret = gup_load_section_file(fw_dsp_isp, (4 * FW_SECTION_LENGTH + FW_DSP_LENGTH + FW_BOOT_LENGTH), FW_DSP_ISP_LENGTH);
1007
1008 if (FAIL == ret)
1009 {
1010 GTP_ERROR("[burn_dsp_isp]load firmware dsp_isp fail.");
1011 goto exit_burn_dsp_isp;
1012 }
1013
1014 //step3:disable wdt,clear cache enable
1015 GTP_DEBUG("[burn_dsp_isp]step3:disable wdt,clear cache enable");
1016 ret = gup_set_ic_msg(client, _bRW_MISCTL__TMR0_EN, 0x00);
1017
1018 if (ret <= 0)
1019 {
1020 GTP_ERROR("[burn_dsp_isp]disable wdt fail.");
1021 ret = FAIL;
1022 goto exit_burn_dsp_isp;
1023 }
1024
1025 ret = gup_set_ic_msg(client, _bRW_MISCTL__CACHE_EN, 0x00);
1026
1027 if (ret <= 0)
1028 {
1029 GTP_ERROR("[burn_dsp_isp]clear cache enable fail.");
1030 ret = FAIL;
1031 goto exit_burn_dsp_isp;
1032 }
1033
1034 //step4:hold ss51 & dsp
1035 GTP_DEBUG("[burn_dsp_isp]step4:hold ss51 & dsp");
1036 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
1037
1038 if (ret <= 0)
1039 {
1040 GTP_ERROR("[burn_dsp_isp]hold ss51 & dsp fail.");
1041 ret = FAIL;
1042 goto exit_burn_dsp_isp;
1043 }
1044
1045 //step5:set boot from sram
1046 GTP_DEBUG("[burn_dsp_isp]step5:set boot from sram");
1047 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOTCTL_B0_, 0x02);
1048
1049 if (ret <= 0)
1050 {
1051 GTP_ERROR("[burn_dsp_isp]set boot from sram fail.");
1052 ret = FAIL;
1053 goto exit_burn_dsp_isp;
1054 }
1055
1056 //step6:software reboot
1057 GTP_DEBUG("[burn_dsp_isp]step6:software reboot");
1058 ret = gup_set_ic_msg(client, _bWO_MISCTL__CPU_SWRST_PULSE, 0x01);
1059
1060 if (ret <= 0)
1061 {
1062 GTP_ERROR("[burn_dsp_isp]software reboot fail.");
1063 ret = FAIL;
1064 goto exit_burn_dsp_isp;
1065 }
1066
1067 //step7:select bank2
1068 GTP_DEBUG("[burn_dsp_isp]step7:select bank2");
1069 ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x02);
1070
1071 if (ret <= 0)
1072 {
1073 GTP_ERROR("[burn_dsp_isp]select bank2 fail.");
1074 ret = FAIL;
1075 goto exit_burn_dsp_isp;
1076 }
1077
1078 //step8:enable accessing code
1079 GTP_DEBUG("[burn_dsp_isp]step8:enable accessing code");
1080 ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01);
1081
1082 if (ret <= 0)
1083 {
1084 GTP_ERROR("[burn_dsp_isp]enable accessing code fail.");
1085 ret = FAIL;
1086 goto exit_burn_dsp_isp;
1087 }
1088
1089 //step9:burn 4k dsp_isp
1090 GTP_DEBUG("[burn_dsp_isp]step9:burn 4k dsp_isp");
1091 ret = gup_burn_proc(client, fw_dsp_isp, 0xC000, FW_DSP_ISP_LENGTH);
1092
1093 if (FAIL == ret)
1094 {
1095 GTP_ERROR("[burn_dsp_isp]burn dsp_isp fail.");
1096 goto exit_burn_dsp_isp;
1097 }
1098
1099 //step10:set scramble
1100 GTP_DEBUG("[burn_dsp_isp]step10:set scramble");
1101 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
1102
1103 if (ret <= 0)
1104 {
1105 GTP_ERROR("[burn_dsp_isp]set scramble fail.");
1106 ret = FAIL;
1107 goto exit_burn_dsp_isp;
1108 }
1109
1110 ret = SUCCESS;
1111
1112 exit_burn_dsp_isp:
1113 kfree(fw_dsp_isp);
1114 return ret;
1115 }
1116
1117 static u8 gup_burn_fw_ss51(struct i2c_client *client)
1118 {
1119 u8 *fw_ss51 = NULL;
1120 u8 retry = 0;
1121 s32 ret = 0;
1122
1123 GTP_DEBUG("[burn_fw_ss51]Begin burn ss51 firmware---->>");
1124
1125 //step1:alloc memory
1126 GTP_DEBUG("[burn_fw_ss51]step1:alloc memory");
1127
1128 while (retry++ < 5)
1129 {
1130 fw_ss51 = (u8 *)kzalloc(FW_SECTION_LENGTH, GFP_KERNEL);
1131
1132 if (fw_ss51 == NULL)
1133 {
1134 continue;
1135 }
1136 else
1137 {
1138 GTP_INFO("[burn_fw_ss51]Alloc %dk byte memory success.", (FW_SECTION_LENGTH / 1024));
1139 break;
1140 }
1141 }
1142
1143 if (retry >= 5)
1144 {
1145 GTP_ERROR("[burn_fw_ss51]Alloc memory fail,exit.");
1146 return FAIL;
1147 }
1148
1149 //step2:load ss51 firmware section 1 file data
1150 GTP_DEBUG("[burn_fw_ss51]step2:load ss51 firmware section 1 file data");
1151 ret = gup_load_section_file(fw_ss51, 0, FW_SECTION_LENGTH);
1152
1153 if (FAIL == ret)
1154 {
1155 GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 1 fail.");
1156 goto exit_burn_fw_ss51;
1157 }
1158
1159 //step3:clear control flag
1160 GTP_DEBUG("[burn_fw_ss51]step3:clear control flag");
1161 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x00);
1162
1163 if (ret <= 0)
1164 {
1165 GTP_ERROR("[burn_fw_ss51]clear control flag fail.");
1166 ret = FAIL;
1167 goto exit_burn_fw_ss51;
1168 }
1169
1170 //step4:burn ss51 firmware section 1
1171 GTP_DEBUG("[burn_fw_ss51]step4:burn ss51 firmware section 1");
1172 ret = gup_burn_fw_section(client, fw_ss51, 0xC000, 0x01);
1173
1174 if (FAIL == ret)
1175 {
1176 GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 1 fail.");
1177 goto exit_burn_fw_ss51;
1178 }
1179
1180 //step5:load ss51 firmware section 2 file data
1181 GTP_DEBUG("[burn_fw_ss51]step5:load ss51 firmware section 2 file data");
1182 ret = gup_load_section_file(fw_ss51, FW_SECTION_LENGTH, FW_SECTION_LENGTH);
1183
1184 if (FAIL == ret)
1185 {
1186 GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 2 fail.");
1187 goto exit_burn_fw_ss51;
1188 }
1189
1190 //step6:burn ss51 firmware section 2
1191 GTP_DEBUG("[burn_fw_ss51]step6:burn ss51 firmware section 2");
1192 ret = gup_burn_fw_section(client, fw_ss51, 0xE000, 0x02);
1193
1194 if (FAIL == ret)
1195 {
1196 GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 2 fail.");
1197 goto exit_burn_fw_ss51;
1198 }
1199
1200 //step7:load ss51 firmware section 3 file data
1201 GTP_DEBUG("[burn_fw_ss51]step7:load ss51 firmware section 3 file data");
1202 ret = gup_load_section_file(fw_ss51, 2 * FW_SECTION_LENGTH, FW_SECTION_LENGTH);
1203
1204 if (FAIL == ret)
1205 {
1206 GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 3 fail.");
1207 goto exit_burn_fw_ss51;
1208 }
1209
1210 //step8:burn ss51 firmware section 3
1211 GTP_DEBUG("[burn_fw_ss51]step8:burn ss51 firmware section 3");
1212 ret = gup_burn_fw_section(client, fw_ss51, 0xC000, 0x13);
1213
1214 if (FAIL == ret)
1215 {
1216 GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 3 fail.");
1217 goto exit_burn_fw_ss51;
1218 }
1219
1220 //step9:load ss51 firmware section 4 file data
1221 GTP_DEBUG("[burn_fw_ss51]step9:load ss51 firmware section 4 file data");
1222 ret = gup_load_section_file(fw_ss51, 3 * FW_SECTION_LENGTH, FW_SECTION_LENGTH);
1223
1224 if (FAIL == ret)
1225 {
1226 GTP_ERROR("[burn_fw_ss51]load ss51 firmware section 4 fail.");
1227 goto exit_burn_fw_ss51;
1228 }
1229
1230 //step10:burn ss51 firmware section 4
1231 GTP_DEBUG("[burn_fw_ss51]step10:burn ss51 firmware section 4");
1232 ret = gup_burn_fw_section(client, fw_ss51, 0xE000, 0x14);
1233
1234 if (FAIL == ret)
1235 {
1236 GTP_ERROR("[burn_fw_ss51]burn ss51 firmware section 4 fail.");
1237 goto exit_burn_fw_ss51;
1238 }
1239
1240 ret = SUCCESS;
1241
1242 exit_burn_fw_ss51:
1243 kfree(fw_ss51);
1244 return ret;
1245 }
1246
1247 static u8 gup_burn_fw_dsp(struct i2c_client *client)
1248 {
1249 s32 ret = 0;
1250 u8 *fw_dsp = NULL;
1251 u8 retry = 0;
1252 u8 rd_buf[5];
1253
1254 GTP_DEBUG("[burn_fw_dsp]Begin burn dsp firmware---->>");
1255 //step1:alloc memory
1256 GTP_DEBUG("[burn_fw_dsp]step1:alloc memory");
1257
1258 while (retry++ < 5)
1259 {
1260 fw_dsp = (u8 *)kzalloc(FW_DSP_LENGTH, GFP_KERNEL);
1261
1262 if (fw_dsp == NULL)
1263 {
1264 continue;
1265 }
1266 else
1267 {
1268 GTP_INFO("[burn_fw_dsp]Alloc %dk byte memory success.", (FW_SECTION_LENGTH / 1024));
1269 break;
1270 }
1271 }
1272
1273 if (retry >= 5)
1274 {
1275 GTP_ERROR("[burn_fw_dsp]Alloc memory fail,exit.");
1276 return FAIL;
1277 }
1278
1279 //step2:load firmware dsp
1280 GTP_DEBUG("[burn_fw_dsp]step2:load firmware dsp");
1281 ret = gup_load_section_file(fw_dsp, 4 * FW_SECTION_LENGTH, FW_DSP_LENGTH);
1282
1283 if (FAIL == ret)
1284 {
1285 GTP_ERROR("[burn_fw_dsp]load firmware dsp fail.");
1286 goto exit_burn_fw_dsp;
1287 }
1288
1289 //step3:select bank3
1290 GTP_DEBUG("[burn_fw_dsp]step3:select bank3");
1291 ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x03);
1292
1293 if (ret <= 0)
1294 {
1295 GTP_ERROR("[burn_fw_dsp]select bank3 fail.");
1296 ret = FAIL;
1297 goto exit_burn_fw_dsp;
1298 }
1299
1300 //step4:hold ss51 & dsp
1301 GTP_DEBUG("[burn_fw_dsp]step4:hold ss51 & dsp");
1302 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
1303
1304 if (ret <= 0)
1305 {
1306 GTP_ERROR("[burn_fw_dsp]hold ss51 & dsp fail.");
1307 ret = FAIL;
1308 goto exit_burn_fw_dsp;
1309 }
1310
1311 //step5:set scramble
1312 GTP_DEBUG("[burn_fw_dsp]step5:set scramble");
1313 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
1314
1315 if (ret <= 0)
1316 {
1317 GTP_ERROR("[burn_fw_dsp]set scramble fail.");
1318 ret = FAIL;
1319 goto exit_burn_fw_dsp;
1320 }
1321
1322 //step6:release ss51 & dsp
1323 GTP_DEBUG("[burn_fw_dsp]step6:release ss51 & dsp");
1324 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x00);
1325
1326 if (ret <= 0)
1327 {
1328 GTP_ERROR("[burn_fw_dsp]release ss51 & dsp fail.");
1329 ret = FAIL;
1330 goto exit_burn_fw_dsp;
1331 }
1332
1333 //must delay
1334 msleep(1);
1335
1336 //step7:burn 4k dsp firmware
1337 GTP_DEBUG("[burn_fw_dsp]step7:burn 4k dsp firmware");
1338 ret = gup_burn_proc(client, fw_dsp, 0x9000, FW_DSP_LENGTH);
1339
1340 if (FAIL == ret)
1341 {
1342 GTP_ERROR("[burn_fw_dsp]burn fw_section fail.");
1343 goto exit_burn_fw_dsp;
1344 }
1345
1346 //step8:send burn cmd to move data to flash from sram
1347 GTP_DEBUG("[burn_fw_dsp]step8:send burn cmd to move data to flash from sram");
1348 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x05);
1349
1350 if (ret <= 0)
1351 {
1352 GTP_ERROR("[burn_fw_dsp]send burn cmd fail.");
1353 goto exit_burn_fw_dsp;
1354 }
1355
1356 GTP_DEBUG("[burn_fw_dsp]Wait for the burn is complete......");
1357
1358 do
1359 {
1360 ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1);
1361
1362 if (ret <= 0)
1363 {
1364 GTP_ERROR("[burn_fw_dsp]Get burn state fail");
1365 goto exit_burn_fw_dsp;
1366 }
1367
1368 msleep(10);
1369 //GTP_DEBUG("[burn_fw_dsp]Get burn state:%d.", rd_buf[GTP_ADDR_LENGTH]);
1370 }
1371 while (rd_buf[GTP_ADDR_LENGTH]);
1372
1373 //step9:recall check 4k dsp firmware
1374 GTP_DEBUG("[burn_fw_dsp]step9:recall check 4k dsp firmware");
1375 ret = gup_recall_check(client, fw_dsp, 0x9000, FW_DSP_LENGTH);
1376
1377 if (FAIL == ret)
1378 {
1379 GTP_ERROR("[burn_fw_dsp]recall check 4k dsp firmware fail.");
1380 goto exit_burn_fw_dsp;
1381 }
1382
1383 ret = SUCCESS;
1384
1385 exit_burn_fw_dsp:
1386 kfree(fw_dsp);
1387 return ret;
1388 }
1389
1390 static u8 gup_burn_fw_boot(struct i2c_client *client)
1391 {
1392 s32 ret = 0;
1393 u8 *fw_boot = NULL;
1394 u8 retry = 0;
1395 u8 rd_buf[5];
1396
1397 GTP_DEBUG("[burn_fw_boot]Begin burn bootloader firmware---->>");
1398
1399 //step1:Alloc memory
1400 GTP_DEBUG("[burn_fw_boot]step1:Alloc memory");
1401
1402 while (retry++ < 5)
1403 {
1404 fw_boot = (u8 *)kzalloc(FW_BOOT_LENGTH, GFP_KERNEL);
1405
1406 if (fw_boot == NULL)
1407 {
1408 continue;
1409 }
1410 else
1411 {
1412 GTP_INFO("[burn_fw_boot]Alloc %dk byte memory success.", (FW_BOOT_LENGTH / 1024));
1413 break;
1414 }
1415 }
1416
1417 if (retry >= 5)
1418 {
1419 GTP_ERROR("[burn_fw_boot]Alloc memory fail,exit.");
1420 return FAIL;
1421 }
1422
1423 //step2:load firmware bootloader
1424 GTP_DEBUG("[burn_fw_boot]step2:load firmware bootloader");
1425 ret = gup_load_section_file(fw_boot, (4 * FW_SECTION_LENGTH + FW_DSP_LENGTH), FW_BOOT_LENGTH);
1426
1427 if (FAIL == ret)
1428 {
1429 GTP_ERROR("[burn_fw_boot]load firmware dsp fail.");
1430 goto exit_burn_fw_boot;
1431 }
1432
1433 //step3:hold ss51 & dsp
1434 GTP_DEBUG("[burn_fw_boot]step3:hold ss51 & dsp");
1435 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
1436
1437 if (ret <= 0)
1438 {
1439 GTP_ERROR("[burn_fw_boot]hold ss51 & dsp fail.");
1440 ret = FAIL;
1441 goto exit_burn_fw_boot;
1442 }
1443
1444 //step4:set scramble
1445 GTP_DEBUG("[burn_fw_boot]step4:set scramble");
1446 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
1447
1448 if (ret <= 0)
1449 {
1450 GTP_ERROR("[burn_fw_boot]set scramble fail.");
1451 ret = FAIL;
1452 goto exit_burn_fw_boot;
1453 }
1454
1455 //step5:release ss51 & dsp
1456 GTP_DEBUG("[burn_fw_boot]step5:release ss51 & dsp");
1457 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x00);
1458
1459 if (ret <= 0)
1460 {
1461 GTP_ERROR("[burn_fw_boot]release ss51 & dsp fail.");
1462 ret = FAIL;
1463 goto exit_burn_fw_boot;
1464 }
1465
1466 //must delay
1467 msleep(1);
1468
1469 //step6:burn 2k bootloader firmware
1470 GTP_DEBUG("[burn_fw_boot]step6:burn 2k bootloader firmware");
1471 ret = gup_burn_proc(client, fw_boot, 0x9000, FW_BOOT_LENGTH);
1472
1473 if (FAIL == ret)
1474 {
1475 GTP_ERROR("[burn_fw_boot]burn fw_section fail.");
1476 goto exit_burn_fw_boot;
1477 }
1478
1479 //step7:send burn cmd to move data to flash from sram
1480 GTP_DEBUG("[burn_fw_boot]step7:send burn cmd to move data to flash from sram");
1481 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x06);
1482
1483 if (ret <= 0)
1484 {
1485 GTP_ERROR("[burn_fw_boot]send burn cmd fail.");
1486 goto exit_burn_fw_boot;
1487 }
1488
1489 GTP_DEBUG("[burn_fw_boot]Wait for the burn is complete......");
1490
1491 do
1492 {
1493 ret = gup_get_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, rd_buf, 1);
1494
1495 if (ret <= 0)
1496 {
1497 GTP_ERROR("[burn_fw_boot]Get burn state fail");
1498 goto exit_burn_fw_boot;
1499 }
1500
1501 msleep(10);
1502 //GTP_DEBUG("[burn_fw_boot]Get burn state:%d.", rd_buf[GTP_ADDR_LENGTH]);
1503 }
1504 while (rd_buf[GTP_ADDR_LENGTH]);
1505
1506 //step8:recall check 2k bootloader firmware
1507 GTP_DEBUG("[burn_fw_boot]step8:recall check 2k bootloader firmware");
1508 ret = gup_recall_check(client, fw_boot, 0x9000, FW_BOOT_LENGTH);
1509
1510 if (FAIL == ret)
1511 {
1512 GTP_ERROR("[burn_fw_boot]recall check 4k dsp firmware fail.");
1513 goto exit_burn_fw_boot;
1514 }
1515
1516 //step9:enable download DSP code
1517 GTP_DEBUG("[burn_fw_boot]step9:enable download DSP code ");
1518 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x99);
1519
1520 if (ret <= 0)
1521 {
1522 GTP_ERROR("[burn_fw_boot]enable download DSP code fail.");
1523 ret = FAIL;
1524 goto exit_burn_fw_boot;
1525 }
1526
1527 //step10:release ss51 & hold dsp
1528 GTP_DEBUG("[burn_fw_boot]step10:release ss51 & hold dsp");
1529 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x08);
1530
1531 if (ret <= 0)
1532 {
1533 GTP_ERROR("[burn_fw_boot]release ss51 & hold dsp fail.");
1534 ret = FAIL;
1535 goto exit_burn_fw_boot;
1536 }
1537
1538 ret = SUCCESS;
1539
1540 exit_burn_fw_boot:
1541 kfree(fw_boot);
1542 return ret;
1543 }
1544
1545 s32 gup_update_proc(void *dir)
1546 {
1547 s32 ret = 0;
1548 u8 retry = 0;
1549 st_fw_head fw_head;
1550
1551 GTP_DEBUG("[update_proc]Begin update ......");
1552
1553 fw_buf = (u8 *)kzalloc(FW_LENGTH, GFP_KERNEL);
1554
1555 show_len = 1;
1556 total_len = 100;
1557
1558 if (dir == NULL)
1559 {
1560 msleep(3000); //wait main thread to be completed
1561 }
1562
1563 if (guitar_client == NULL) //20121212
1564 {
1565 guitar_client = i2c_client_point;
1566 }
1567
1568 ret = gup_check_update_file(guitar_client, &fw_head, (u8 *)dir); //20121212
1569 if (FAIL == ret)
1570 {
1571 GTP_ERROR("[update_proc]check update file fail.");
1572 goto update_fail;
1573 }
1574
1575 //gtp_reset_guitar(guitar_client, 20); //no need 20130419
1576 ret = gup_get_ic_fw_msg(guitar_client);
1577
1578 if (FAIL == ret)
1579 {
1580 GTP_ERROR("[update_proc]get ic message fail.");
1581 goto update_fail;
1582 }
1583
1584 ret = gup_enter_upadte_judge(&fw_head); //20121212
1585 #ifdef GTP_FORCE_UPDATE_FW
1586 ret = SUCCESS; //for test
1587 #endif
1588
1589 if (FAIL == ret)
1590 {
1591 GTP_ERROR("[update_proc]check update file fail.");
1592 goto update_fail;
1593 }
1594
1595 ret = gup_enter_update_mode(guitar_client);
1596
1597 if (FAIL == ret)
1598 {
1599 GTP_ERROR("[update_proc]enter update mode fail.");
1600 goto update_fail;
1601 }
1602
1603 while (retry++ < 5)
1604 {
1605 show_len = 10;
1606 total_len = 100;
1607 ret = gup_burn_dsp_isp(guitar_client);
1608
1609 if (FAIL == ret)
1610 {
1611 GTP_ERROR("[update_proc]burn dsp isp fail.");
1612 continue;
1613 }
1614
1615 show_len += 10;
1616 ret = gup_burn_fw_ss51(guitar_client);
1617
1618 if (FAIL == ret)
1619 {
1620 GTP_ERROR("[update_proc]burn ss51 firmware fail.");
1621 continue;
1622 }
1623
1624 show_len += 40;
1625 ret = gup_burn_fw_dsp(guitar_client);
1626
1627 if (FAIL == ret)
1628 {
1629 GTP_ERROR("[update_proc]burn dsp firmware fail.");
1630 continue;
1631 }
1632
1633 show_len += 20;
1634 ret = gup_burn_fw_boot(guitar_client);
1635
1636 if (FAIL == ret)
1637 {
1638 GTP_ERROR("[update_proc]burn bootloader firmware fail.");
1639 continue;
1640 }
1641
1642 show_len += 10;
1643 GTP_INFO("[update_proc]UPDATE SUCCESS.");
1644 break;
1645 }
1646
1647 if (retry >= 5)
1648 {
1649 GTP_ERROR("[update_proc]retry timeout,UPDATE FAIL.");
1650 goto update_fail;
1651 }
1652
1653 //original source code
1654 /*
1655 GTP_DEBUG("[update_proc]leave update mode.");
1656 gup_leave_update_mode();
1657 */
1658 //Modified by Andrew --start
1659 //GTP_DEBUG("[update_proc]reset chip.");
1660 //gtp_reset_guitar(guitar_client, 20);
1661 //Modified by Andrew --end
1662
1663 #if 0
1664 msleep(100);
1665 GTP_DEBUG("[update_proc]send config.");
1666 ret = gtp_send_cfg(guitar_client);
1667
1668 if (ret < 0)
1669 {
1670 GTP_ERROR("[update_proc]send config fail.");
1671 }
1672 #endif
1673 show_len = 100;
1674 total_len = 100;
1675 kfree(fw_buf);
1676
1677 //Modified by Andrew --start
1678 GTP_DEBUG("[update_proc]leave update mode.");
1679 gup_leave_update_mode();
1680 //Modified by Andrew --end
1681
1682 return SUCCESS;
1683
1684 update_fail:
1685 show_len = 200;
1686 total_len = 100;
1687 kfree(fw_buf);
1688 return FAIL;
1689 }
1690
1691 u8 gup_init_update_proc(struct i2c_client *client)
1692 {
1693 struct task_struct *thread = NULL;
1694
1695 GTP_INFO("Ready to run update thread.");
1696
1697 guitar_client = client;
1698 GTP_INFO("Ready to run update thread");
1699
1700 thread = kthread_run(gup_update_proc, (void *)NULL, "guitar_update");
1701
1702 if (IS_ERR(thread))
1703 {
1704 GTP_ERROR("Failed to create update thread.\n");
1705 return -1;
1706 }
1707
1708 return 0;
1709 }
1710
1711
1712
1713 static u8 gup_download_fw_ss51(struct i2c_client *client)
1714 {
1715 u8 *fw_ss51 = NULL;
1716 u8 retry = 0;
1717 s32 ret = 0;
1718
1719 GTP_INFO("[download_fw_ss51]Begin burn ss51 firmware---->>");
1720
1721 //step1:alloc memory
1722 GTP_DEBUG("[download_fw_ss51]step1:alloc memory");
1723
1724 while (retry++ < 5)
1725 {
1726 fw_ss51 = (u8 *)kzalloc(2 * FW_DOWNLOAD_LENGTH, GFP_KERNEL);
1727
1728 if (fw_ss51 == NULL)
1729 {
1730 continue;
1731 }
1732 else
1733 {
1734 GTP_INFO("[download_fw_ss51]Alloc %dk byte memory success.", (FW_DOWNLOAD_LENGTH / 1024));
1735 break;
1736 }
1737 }
1738
1739 if (retry >= 5)
1740 {
1741 GTP_ERROR("[download_fw_ss51]Alloc memory fail,exit.");
1742 return FAIL;
1743 }
1744
1745 //step2:clear control flag
1746 GTP_DEBUG("[download_fw_ss51]step2:clear control flag");
1747 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOT_CTL_, 0x00);
1748
1749 if (ret <= 0)
1750 {
1751 GTP_ERROR("[download_fw_ss51]clear control flag fail.");
1752 ret = FAIL;
1753 goto exit_download_fw_ss51;
1754 }
1755
1756 //step3:disable wdt,clear cache enable
1757 GTP_DEBUG("[download_fw_ss51]step3:disable wdt,clear cache enable");
1758 ret = gup_set_ic_msg(client, _bRW_MISCTL__TMR0_EN, 0x00);
1759
1760 if (ret <= 0)
1761 {
1762 GTP_ERROR("[download_fw_ss51]disable wdt fail.");
1763 ret = FAIL;
1764 goto exit_download_fw_ss51;
1765 }
1766
1767 ret = gup_set_ic_msg(client, _bRW_MISCTL__CACHE_EN, 0x00);
1768
1769 if (ret <= 0)
1770 {
1771 GTP_ERROR("[download_fw_ss51]clear cache enable fail.");
1772 ret = FAIL;
1773 goto exit_download_fw_ss51;
1774 }
1775
1776 //step4:hold ss51 & dsp
1777 GTP_DEBUG("[download_fw_ss51]step4:hold ss51 & dsp");
1778 ret = gup_set_ic_msg(client, _rRW_MISCTL__SWRST_B0_, 0x0C);
1779
1780 if (ret <= 0)
1781 {
1782 GTP_ERROR("[download_fw_ss51]hold ss51 & dsp fail.");
1783 ret = FAIL;
1784 goto exit_download_fw_ss51;
1785 }
1786
1787 msleep(5);
1788
1789 //step5:set boot from sram
1790 GTP_DEBUG("[download_fw_ss51]step5:set boot from sram");
1791 ret = gup_set_ic_msg(client, _rRW_MISCTL__BOOTCTL_B0_, 0x02);
1792
1793 if (ret <= 0)
1794 {
1795 GTP_ERROR("[download_fw_ss51]set boot from sram fail.");
1796 ret = FAIL;
1797 goto exit_download_fw_ss51;
1798 }
1799
1800 //step6:software reboot
1801 GTP_DEBUG("[download_fw_ss51]step6:software reboot");
1802 ret = gup_set_ic_msg(client, _bWO_MISCTL__CPU_SWRST_PULSE, 0x01);
1803
1804 if (ret <= 0)
1805 {
1806 GTP_ERROR("[download_fw_ss51]software reboot fail.");
1807 ret = FAIL;
1808 goto exit_download_fw_ss51;
1809 }
1810
1811 msleep(5);
1812 //step7:load ss51 firmware section 1 file data
1813 GTP_DEBUG("[download_fw_ss51]step7:load ss51 firmware section 1 file data");
1814 ret = gup_load_section_file(fw_ss51, 0, 2 * FW_DOWNLOAD_LENGTH);
1815
1816 if (FAIL == ret)
1817 {
1818 GTP_ERROR("[download_fw_ss51]load ss51 firmware section 1 fail.");
1819 goto exit_download_fw_ss51;
1820 }
1821
1822
1823
1824 ret = gup_set_ic_msg(guitar_client, _bRW_MISCTL__SRAM_BANK, 0x00);
1825 ret = gup_set_ic_msg(guitar_client, _bRW_MISCTL__MEM_CD_EN, 0x01);
1826
1827 ret = i2c_write_bytes(client, 0xC000, fw_ss51, FW_DOWNLOAD_LENGTH); // write the first bank
1828
1829 if (ret == -1)
1830 {
1831 GTP_ERROR("[download_fw_dsp]download FW section 1 fail.");
1832 goto exit_download_fw_ss51;
1833 }
1834
1835 ret = gup_set_ic_msg(guitar_client, _bRW_MISCTL__SRAM_BANK, 0x01);
1836 ret = gup_set_ic_msg(guitar_client, _bRW_MISCTL__MEM_CD_EN, 0x01);
1837 ret = i2c_write_bytes(client,
1838 0xC000,
1839 &fw_ss51[FW_DOWNLOAD_LENGTH],
1840 FW_DOWNLOAD_LENGTH); // write the second bank
1841
1842 if (ret == -1)
1843 {
1844 GTP_ERROR("[download_fw_dsp]download FW section 2 fail.");
1845 goto exit_download_fw_ss51;
1846 }
1847
1848
1849
1850 ret = SUCCESS;
1851
1852 exit_download_fw_ss51:
1853 kfree(fw_ss51);
1854 return ret;
1855 }
1856
1857 static u8 gup_download_fw_dsp(struct i2c_client *client)
1858 {
1859 s32 ret = 0;
1860 u8 *fw_dsp = NULL;
1861 u8 retry = 0;
1862
1863
1864 GTP_INFO("[download_fw_dsp]Begin download dsp firmware---->>");
1865 //step1:alloc memory
1866 GTP_DEBUG("[download_fw_dsp]step1:alloc memory");
1867
1868 while (retry++ < 5)
1869 {
1870 fw_dsp = (u8 *)kzalloc(FW_DSP_LENGTH, GFP_KERNEL);
1871
1872 if (fw_dsp == NULL)
1873 {
1874 continue;
1875 }
1876 else
1877 {
1878 GTP_INFO("[download_fw_dsp]Alloc %dk byte memory success.", (FW_SECTION_LENGTH / 1024));
1879 break;
1880 }
1881 }
1882
1883 if (retry >= 5)
1884 {
1885 GTP_ERROR("[download_fw_dsp]Alloc memory fail,exit.");
1886 return FAIL;
1887 }
1888
1889 //step2:load firmware dsp
1890 GTP_DEBUG("[download_fw_dsp]step2:load firmware dsp");
1891 ret = gup_load_section_file(fw_dsp, 4 * FW_SECTION_LENGTH, FW_DSP_LENGTH);
1892
1893 if (FAIL == ret)
1894 {
1895 GTP_ERROR("[download_fw_dsp]load firmware dsp fail.");
1896 goto exit_download_fw_dsp;
1897 }
1898
1899
1900 //step3:select bank2
1901 GTP_DEBUG("[download_fw_dsp]step3:select bank2");
1902 ret = gup_set_ic_msg(client, _bRW_MISCTL__SRAM_BANK, 0x02);
1903
1904 if (ret <= 0)
1905 {
1906 GTP_ERROR("[download_fw_dsp]select bank2 fail.");
1907 ret = FAIL;
1908 goto exit_download_fw_dsp;
1909 }
1910
1911 //step4:enable accessing code
1912 ret = gup_set_ic_msg(client, _bRW_MISCTL__MEM_CD_EN, 0x01);
1913
1914 if (ret <= 0)
1915 {
1916 GTP_ERROR("[download_fw_dsp]enable accessing code fail.");
1917 ret = FAIL;
1918 goto exit_download_fw_dsp;
1919 }
1920
1921 ret = i2c_write_bytes(client,
1922 0xC000,
1923 fw_dsp,
1924 FW_DSP_LENGTH); // write the second bank
1925
1926 ret = SUCCESS;
1927
1928 exit_download_fw_dsp:
1929 kfree(fw_dsp);
1930 return ret;
1931 }
1932
1933
1934
1935 s32 gup_fw_download_proc(void *dir)
1936 {
1937 u8 buf[3];
1938 s32 ret = 0;
1939 u8 retry = 0;
1940 st_fw_head fw_head;
1941
1942 GTP_INFO("[fw_download_proc]Begin fw download ......");
1943 fw_buf = (u8 *)kzalloc(FW_LENGTH, GFP_KERNEL);
1944
1945 if (dir == NULL)
1946 {
1947 msleep(2000); //wait main thread to be completed
1948 }
1949
1950 if (guitar_client == NULL) //20121212
1951 {
1952 guitar_client = i2c_client_point;
1953 }
1954
1955 download:
1956 ret = gup_check_update_file(guitar_client, &fw_head, (u8 *)dir);
1957
1958 if (FAIL == ret)
1959 {
1960 GTP_ERROR("[fw_download_proc]check update file fail.");
1961 goto download_fail;
1962 }
1963
1964 //gtp_reset_guitar(guitar_client, 20); //no need 20130419
1965 ret = gup_get_ic_fw_msg(guitar_client);
1966
1967 if (FAIL == ret)
1968 {
1969 GTP_ERROR("[fw_download_proc]get ic message fail.");
1970 goto download_fail;
1971 }
1972
1973 ret = gup_enter_upadte_judge(&fw_head); //20121212
1974
1975 if (FAIL == ret)
1976 {
1977 GTP_ERROR("[update_proc]Check *.bin file fail.");
1978 goto download_fail;
1979 }
1980
1981 ret = gup_enter_update_mode(guitar_client); //20121212
1982
1983 if (FAIL == ret)
1984 {
1985 GTP_ERROR("[fw_download_proc]check update file fail.");
1986 goto download_fail;
1987 }
1988
1989 while (retry++ < 5)
1990 {
1991
1992 ret = gup_download_fw_ss51(guitar_client);
1993
1994 if (FAIL == ret)
1995 {
1996 GTP_ERROR("[fw_download_proc]burn ss51 firmware fail.");
1997 continue;
1998 }
1999
2000 ret = gup_download_fw_dsp(guitar_client);
2001
2002 if (FAIL == ret)
2003 {
2004 GTP_ERROR("[fw_download_proc]burn dsp firmware fail.");
2005 continue;
2006 }
2007
2008
2009 GTP_INFO("[fw_download_proc]UPDATE SUCCESS.");
2010 break;
2011 }
2012
2013 if (retry >= 5)
2014 {
2015 GTP_ERROR("[fw_download_proc]retry timeout,UPDATE FAIL.");
2016 goto download_fail;
2017 }
2018
2019 //-- set scramble
2020 GTP_DEBUG("[download_fw_dsp]step5:set scramble");
2021 ret = gup_set_ic_msg(guitar_client, _rRW_MISCTL__BOOT_OPT_B0_, 0x00);
2022
2023 if (ret <= 0)
2024 {
2025 GTP_ERROR("[download_fw_dsp]set scramble fail.");
2026 ret = FAIL;
2027 goto download_fail;
2028 }
2029
2030 //-- clear control flag
2031 GTP_DEBUG("[burn_fw_ss51]step3:clear control flag");
2032 ret = gup_set_ic_msg(guitar_client, _rRW_MISCTL__BOOT_CTL_, 0xAA);
2033
2034 if (ret <= 0)
2035 {
2036 GTP_ERROR("[burn_fw_ss51]clear control flag fail.");
2037 ret = FAIL;
2038 goto download_fail;
2039 }
2040
2041 //-- hold ss51 & dsp
2042 GTP_DEBUG("[download_fw_dsp]step4:hold ss51 & dsp");
2043 ret = gup_set_ic_msg(guitar_client, _rRW_MISCTL__SWRST_B0_, 0x00);
2044
2045 if (ret <= 0)
2046 {
2047 GTP_ERROR("[download_fw_dsp]hold ss51 & dsp fail.");
2048 ret = FAIL;
2049 goto download_fail;
2050 }
2051
2052 msleep(5);
2053
2054 gup_get_ic_msg(guitar_client, GUP_REG_FW_MSG, buf, 1);
2055 GTP_DEBUG("[fw_download_proc] BOOT Status %02X\n", buf[2]);
2056
2057 if (buf[2] != 0xBE)
2058 {
2059 goto download;
2060 }
2061
2062 #if 0
2063 GTP_DEBUG("[fw_download_proc]send config.");
2064 ret = gtp_send_cfg(guitar_client);
2065
2066 if (ret < 0)
2067 {
2068 GTP_ERROR("[fw_download_proc]send config fail.");
2069 }
2070
2071 #endif
2072
2073 gtp_int_sync();
2074
2075 kfree(fw_buf);
2076 return SUCCESS;
2077 download_fail:
2078 kfree(fw_buf);
2079 return FAIL;
2080 }
2081
2082
2083 u8 gup_init_fw_proc(struct i2c_client *client)
2084 {
2085 struct task_struct *thread = NULL;
2086
2087 GTP_INFO("Ready to run fw download thread.");
2088
2089 guitar_client = client;
2090 GTP_INFO("Ready to run fw download thread.");
2091
2092 thread = kthread_run(gup_fw_download_proc, (void *)NULL, "guitar_fw_download");
2093
2094 if (IS_ERR(thread))
2095 {
2096 GTP_ERROR("Failed to create fw download thread.\n");
2097 return -1;
2098 }
2099
2100 return 0;
2101 }
2102