2 * Copyright (c) 2006 QLogic, Inc. All rights reserved.
3 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/spinlock.h>
35 #include <linux/idr.h>
36 #include <linux/pci.h>
37 #include <linux/delay.h>
38 #include <linux/netdevice.h>
39 #include <linux/vmalloc.h>
41 #include "ipath_kernel.h"
42 #include "ipath_verbs.h"
43 #include "ipath_common.h"
45 static void ipath_update_pio_bufs(struct ipath_devdata
*);
47 const char *ipath_get_unit_name(int unit
)
49 static char iname
[16];
50 snprintf(iname
, sizeof iname
, "infinipath%u", unit
);
54 #define DRIVER_LOAD_MSG "QLogic " IPATH_DRV_NAME " loaded: "
55 #define PFX IPATH_DRV_NAME ": "
58 * The size has to be longer than this string, so we can append
59 * board/chip information to it in the init code.
61 const char ib_ipath_version
[] = IPATH_IDSTR
"\n";
63 static struct idr unit_table
;
64 DEFINE_SPINLOCK(ipath_devs_lock
);
65 LIST_HEAD(ipath_dev_list
);
67 wait_queue_head_t ipath_state_wait
;
69 unsigned ipath_debug
= __IPATH_INFO
;
71 module_param_named(debug
, ipath_debug
, uint
, S_IWUSR
| S_IRUGO
);
72 MODULE_PARM_DESC(debug
, "mask for debug prints");
73 EXPORT_SYMBOL_GPL(ipath_debug
);
75 MODULE_LICENSE("GPL");
76 MODULE_AUTHOR("QLogic <support@pathscale.com>");
77 MODULE_DESCRIPTION("QLogic InfiniPath driver");
79 const char *ipath_ibcstatus_str
[] = {
86 "LState6", /* unused */
87 "LState7", /* unused */
93 "LState0xD", /* unused */
98 static void __devexit
ipath_remove_one(struct pci_dev
*);
99 static int __devinit
ipath_init_one(struct pci_dev
*,
100 const struct pci_device_id
*);
102 /* Only needed for registration, nothing else needs this info */
103 #define PCI_VENDOR_ID_PATHSCALE 0x1fc1
104 #define PCI_DEVICE_ID_INFINIPATH_HT 0xd
105 #define PCI_DEVICE_ID_INFINIPATH_PE800 0x10
107 static const struct pci_device_id ipath_pci_tbl
[] = {
108 { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE
, PCI_DEVICE_ID_INFINIPATH_HT
) },
109 { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE
, PCI_DEVICE_ID_INFINIPATH_PE800
) },
113 MODULE_DEVICE_TABLE(pci
, ipath_pci_tbl
);
115 static struct pci_driver ipath_driver
= {
116 .name
= IPATH_DRV_NAME
,
117 .probe
= ipath_init_one
,
118 .remove
= __devexit_p(ipath_remove_one
),
119 .id_table
= ipath_pci_tbl
,
123 static inline void read_bars(struct ipath_devdata
*dd
, struct pci_dev
*dev
,
124 u32
*bar0
, u32
*bar1
)
128 ret
= pci_read_config_dword(dev
, PCI_BASE_ADDRESS_0
, bar0
);
130 ipath_dev_err(dd
, "failed to read bar0 before enable: "
133 ret
= pci_read_config_dword(dev
, PCI_BASE_ADDRESS_1
, bar1
);
135 ipath_dev_err(dd
, "failed to read bar1 before enable: "
138 ipath_dbg("Read bar0 %x bar1 %x\n", *bar0
, *bar1
);
141 static void ipath_free_devdata(struct pci_dev
*pdev
,
142 struct ipath_devdata
*dd
)
146 pci_set_drvdata(pdev
, NULL
);
148 if (dd
->ipath_unit
!= -1) {
149 spin_lock_irqsave(&ipath_devs_lock
, flags
);
150 idr_remove(&unit_table
, dd
->ipath_unit
);
151 list_del(&dd
->ipath_list
);
152 spin_unlock_irqrestore(&ipath_devs_lock
, flags
);
157 static struct ipath_devdata
*ipath_alloc_devdata(struct pci_dev
*pdev
)
160 struct ipath_devdata
*dd
;
163 if (!idr_pre_get(&unit_table
, GFP_KERNEL
)) {
164 dd
= ERR_PTR(-ENOMEM
);
168 dd
= vmalloc(sizeof(*dd
));
170 dd
= ERR_PTR(-ENOMEM
);
173 memset(dd
, 0, sizeof(*dd
));
176 spin_lock_irqsave(&ipath_devs_lock
, flags
);
178 ret
= idr_get_new(&unit_table
, dd
, &dd
->ipath_unit
);
180 printk(KERN_ERR IPATH_DRV_NAME
181 ": Could not allocate unit ID: error %d\n", -ret
);
182 ipath_free_devdata(pdev
, dd
);
188 pci_set_drvdata(pdev
, dd
);
190 list_add(&dd
->ipath_list
, &ipath_dev_list
);
193 spin_unlock_irqrestore(&ipath_devs_lock
, flags
);
199 static inline struct ipath_devdata
*__ipath_lookup(int unit
)
201 return idr_find(&unit_table
, unit
);
204 struct ipath_devdata
*ipath_lookup(int unit
)
206 struct ipath_devdata
*dd
;
209 spin_lock_irqsave(&ipath_devs_lock
, flags
);
210 dd
= __ipath_lookup(unit
);
211 spin_unlock_irqrestore(&ipath_devs_lock
, flags
);
216 int ipath_count_units(int *npresentp
, int *nupp
, u32
*maxportsp
)
218 int nunits
, npresent
, nup
;
219 struct ipath_devdata
*dd
;
223 nunits
= npresent
= nup
= maxports
= 0;
225 spin_lock_irqsave(&ipath_devs_lock
, flags
);
227 list_for_each_entry(dd
, &ipath_dev_list
, ipath_list
) {
229 if ((dd
->ipath_flags
& IPATH_PRESENT
) && dd
->ipath_kregbase
)
232 !(dd
->ipath_flags
& (IPATH_DISABLED
| IPATH_LINKDOWN
235 if (dd
->ipath_cfgports
> maxports
)
236 maxports
= dd
->ipath_cfgports
;
239 spin_unlock_irqrestore(&ipath_devs_lock
, flags
);
242 *npresentp
= npresent
;
246 *maxportsp
= maxports
;
252 * These next two routines are placeholders in case we don't have per-arch
253 * code for controlling write combining. If explicit control of write
254 * combining is not available, performance will probably be awful.
257 int __attribute__((weak
)) ipath_enable_wc(struct ipath_devdata
*dd
)
262 void __attribute__((weak
)) ipath_disable_wc(struct ipath_devdata
*dd
)
266 static int __devinit
ipath_init_one(struct pci_dev
*pdev
,
267 const struct pci_device_id
*ent
)
270 struct ipath_devdata
*dd
;
271 unsigned long long addr
;
272 u32 bar0
= 0, bar1
= 0;
274 dd
= ipath_alloc_devdata(pdev
);
277 printk(KERN_ERR IPATH_DRV_NAME
278 ": Could not allocate devdata: error %d\n", -ret
);
282 ipath_cdbg(VERBOSE
, "initializing unit #%u\n", dd
->ipath_unit
);
284 read_bars(dd
, pdev
, &bar0
, &bar1
);
286 ret
= pci_enable_device(pdev
);
288 /* This can happen iff:
290 * We did a chip reset, and then failed to reprogram the
291 * BAR, or the chip reset due to an internal error. We then
292 * unloaded the driver and reloaded it.
294 * Both reset cases set the BAR back to initial state. For
295 * the latter case, the AER sticky error bit at offset 0x718
296 * should be set, but the Linux kernel doesn't yet know
297 * about that, it appears. If the original BAR was retained
298 * in the kernel data structures, this may be OK.
300 ipath_dev_err(dd
, "enable unit %d failed: error %d\n",
301 dd
->ipath_unit
, -ret
);
304 addr
= pci_resource_start(pdev
, 0);
305 len
= pci_resource_len(pdev
, 0);
306 ipath_cdbg(VERBOSE
, "regbase (0) %llx len %d pdev->irq %d, vend %x/%x "
307 "driver_data %lx\n", addr
, len
, pdev
->irq
, ent
->vendor
,
308 ent
->device
, ent
->driver_data
);
310 read_bars(dd
, pdev
, &bar0
, &bar1
);
312 if (!bar1
&& !(bar0
& ~0xf)) {
314 dev_info(&pdev
->dev
, "BAR is 0 (probable RESET), "
315 "rewriting as %llx\n", addr
);
316 ret
= pci_write_config_dword(
317 pdev
, PCI_BASE_ADDRESS_0
, addr
);
319 ipath_dev_err(dd
, "rewrite of BAR0 "
320 "failed: err %d\n", -ret
);
323 ret
= pci_write_config_dword(
324 pdev
, PCI_BASE_ADDRESS_1
, addr
>> 32);
326 ipath_dev_err(dd
, "rewrite of BAR1 "
327 "failed: err %d\n", -ret
);
331 ipath_dev_err(dd
, "BAR is 0 (probable RESET), "
332 "not usable until reboot\n");
338 ret
= pci_request_regions(pdev
, IPATH_DRV_NAME
);
340 dev_info(&pdev
->dev
, "pci_request_regions unit %u fails: "
341 "err %d\n", dd
->ipath_unit
, -ret
);
345 ret
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
348 * if the 64 bit setup fails, try 32 bit. Some systems
349 * do not setup 64 bit maps on systems with 2GB or less
352 ret
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
355 "Unable to set DMA mask for unit %u: %d\n",
356 dd
->ipath_unit
, ret
);
360 ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
361 ret
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
364 "Unable to set DMA consistent mask "
366 dd
->ipath_unit
, ret
);
371 ret
= pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
);
374 "Unable to set DMA consistent mask "
376 dd
->ipath_unit
, ret
);
379 pci_set_master(pdev
);
382 * Save BARs to rewrite after device reset. Save all 64 bits of
385 dd
->ipath_pcibar0
= addr
;
386 dd
->ipath_pcibar1
= addr
>> 32;
387 dd
->ipath_deviceid
= ent
->device
; /* save for later use */
388 dd
->ipath_vendorid
= ent
->vendor
;
390 /* setup the chip-specific functions, as early as possible. */
391 switch (ent
->device
) {
392 case PCI_DEVICE_ID_INFINIPATH_HT
:
394 ipath_init_iba6110_funcs(dd
);
397 ipath_dev_err(dd
, "QLogic HT device 0x%x cannot work if "
398 "CONFIG_HT_IRQ is not enabled\n", ent
->device
);
401 case PCI_DEVICE_ID_INFINIPATH_PE800
:
402 #ifdef CONFIG_PCI_MSI
403 ipath_init_iba6120_funcs(dd
);
406 ipath_dev_err(dd
, "QLogic PCIE device 0x%x cannot work if "
407 "CONFIG_PCI_MSI is not enabled\n", ent
->device
);
411 ipath_dev_err(dd
, "Found unknown QLogic deviceid 0x%x, "
412 "failing\n", ent
->device
);
416 for (j
= 0; j
< 6; j
++) {
417 if (!pdev
->resource
[j
].start
)
419 ipath_cdbg(VERBOSE
, "BAR %d start %llx, end %llx, len %llx\n",
420 j
, (unsigned long long)pdev
->resource
[j
].start
,
421 (unsigned long long)pdev
->resource
[j
].end
,
422 (unsigned long long)pci_resource_len(pdev
, j
));
426 ipath_dev_err(dd
, "No valid address in BAR 0!\n");
431 dd
->ipath_deviceid
= ent
->device
; /* save for later use */
432 dd
->ipath_vendorid
= ent
->vendor
;
434 dd
->ipath_pcirev
= pdev
->revision
;
436 #if defined(__powerpc__)
437 /* There isn't a generic way to specify writethrough mappings */
438 dd
->ipath_kregbase
= __ioremap(addr
, len
,
439 (_PAGE_NO_CACHE
|_PAGE_WRITETHRU
));
441 dd
->ipath_kregbase
= ioremap_nocache(addr
, len
);
444 if (!dd
->ipath_kregbase
) {
445 ipath_dbg("Unable to map io addr %llx to kvirt, failing\n",
450 dd
->ipath_kregend
= (u64 __iomem
*)
451 ((void __iomem
*)dd
->ipath_kregbase
+ len
);
452 dd
->ipath_physaddr
= addr
; /* used for io_remap, etc. */
454 ipath_cdbg(VERBOSE
, "mapped io addr %llx to kregbase %p\n",
455 addr
, dd
->ipath_kregbase
);
458 * clear ipath_flags here instead of in ipath_init_chip as it is set
459 * by ipath_setup_htconfig.
462 dd
->ipath_lli_counter
= 0;
463 dd
->ipath_lli_errors
= 0;
465 if (dd
->ipath_f_bus(dd
, pdev
))
466 ipath_dev_err(dd
, "Failed to setup config space; "
467 "continuing anyway\n");
470 * set up our interrupt handler; IRQF_SHARED probably not needed,
471 * since MSI interrupts shouldn't be shared but won't hurt for now.
472 * check 0 irq after we return from chip-specific bus setup, since
473 * that can affect this due to setup
476 ipath_dev_err(dd
, "irq is 0, BIOS error? Interrupts won't "
479 ret
= request_irq(dd
->ipath_irq
, ipath_intr
, IRQF_SHARED
,
482 ipath_dev_err(dd
, "Couldn't setup irq handler, "
483 "irq=%d: %d\n", dd
->ipath_irq
, ret
);
488 ret
= ipath_init_chip(dd
, 0); /* do the chip-specific init */
492 ret
= ipath_enable_wc(dd
);
495 ipath_dev_err(dd
, "Write combining not enabled "
496 "(err %d): performance may be poor\n",
501 ipath_device_create_group(&pdev
->dev
, dd
);
502 ipathfs_add_device(dd
);
505 ipath_register_ib_device(dd
);
510 if (pdev
->irq
) free_irq(pdev
->irq
, dd
);
513 iounmap((volatile void __iomem
*) dd
->ipath_kregbase
);
516 pci_release_regions(pdev
);
519 pci_disable_device(pdev
);
522 ipath_free_devdata(pdev
, dd
);
528 static void __devexit
cleanup_device(struct ipath_devdata
*dd
)
532 if (*dd
->ipath_statusp
& IPATH_STATUS_CHIP_PRESENT
) {
533 /* can't do anything more with chip; needs re-init */
534 *dd
->ipath_statusp
&= ~IPATH_STATUS_CHIP_PRESENT
;
535 if (dd
->ipath_kregbase
) {
537 * if we haven't already cleaned up before these are
538 * to ensure any register reads/writes "fail" until
541 dd
->ipath_kregbase
= NULL
;
542 dd
->ipath_uregbase
= 0;
543 dd
->ipath_sregbase
= 0;
544 dd
->ipath_cregbase
= 0;
545 dd
->ipath_kregsize
= 0;
547 ipath_disable_wc(dd
);
550 if (dd
->ipath_pioavailregs_dma
) {
551 dma_free_coherent(&dd
->pcidev
->dev
, PAGE_SIZE
,
552 (void *) dd
->ipath_pioavailregs_dma
,
553 dd
->ipath_pioavailregs_phys
);
554 dd
->ipath_pioavailregs_dma
= NULL
;
556 if (dd
->ipath_dummy_hdrq
) {
557 dma_free_coherent(&dd
->pcidev
->dev
,
558 dd
->ipath_pd
[0]->port_rcvhdrq_size
,
559 dd
->ipath_dummy_hdrq
, dd
->ipath_dummy_hdrq_phys
);
560 dd
->ipath_dummy_hdrq
= NULL
;
563 if (dd
->ipath_pageshadow
) {
564 struct page
**tmpp
= dd
->ipath_pageshadow
;
565 dma_addr_t
*tmpd
= dd
->ipath_physshadow
;
568 ipath_cdbg(VERBOSE
, "Unlocking any expTID pages still "
570 for (port
= 0; port
< dd
->ipath_cfgports
; port
++) {
571 int port_tidbase
= port
* dd
->ipath_rcvtidcnt
;
572 int maxtid
= port_tidbase
+ dd
->ipath_rcvtidcnt
;
573 for (i
= port_tidbase
; i
< maxtid
; i
++) {
576 pci_unmap_page(dd
->pcidev
, tmpd
[i
],
577 PAGE_SIZE
, PCI_DMA_FROMDEVICE
);
578 ipath_release_user_pages(&tmpp
[i
], 1);
584 ipath_stats
.sps_pageunlocks
+= cnt
;
585 ipath_cdbg(VERBOSE
, "There were still %u expTID "
586 "entries locked\n", cnt
);
588 if (ipath_stats
.sps_pagelocks
||
589 ipath_stats
.sps_pageunlocks
)
590 ipath_cdbg(VERBOSE
, "%llu pages locked, %llu "
591 "unlocked via ipath_m{un}lock\n",
593 ipath_stats
.sps_pagelocks
,
595 ipath_stats
.sps_pageunlocks
);
597 ipath_cdbg(VERBOSE
, "Free shadow page tid array at %p\n",
598 dd
->ipath_pageshadow
);
599 tmpp
= dd
->ipath_pageshadow
;
600 dd
->ipath_pageshadow
= NULL
;
605 * free any resources still in use (usually just kernel ports)
606 * at unload; we do for portcnt, not cfgports, because cfgports
607 * could have changed while we were loaded.
609 for (port
= 0; port
< dd
->ipath_portcnt
; port
++) {
610 struct ipath_portdata
*pd
= dd
->ipath_pd
[port
];
611 dd
->ipath_pd
[port
] = NULL
;
612 ipath_free_pddata(dd
, pd
);
616 * debuggability, in case some cleanup path tries to use it
622 static void __devexit
ipath_remove_one(struct pci_dev
*pdev
)
624 struct ipath_devdata
*dd
= pci_get_drvdata(pdev
);
626 ipath_cdbg(VERBOSE
, "removing, pdev=%p, dd=%p\n", pdev
, dd
);
629 * disable the IB link early, to be sure no new packets arrive, which
630 * complicates the shutdown process
632 ipath_shutdown_device(dd
);
635 ipath_unregister_ib_device(dd
->verbs_dev
);
637 ipath_diag_remove(dd
);
638 ipath_user_remove(dd
);
639 ipathfs_remove_device(dd
);
640 ipath_device_remove_group(&pdev
->dev
, dd
);
642 ipath_cdbg(VERBOSE
, "Releasing pci memory regions, dd %p, "
643 "unit %u\n", dd
, (u32
) dd
->ipath_unit
);
648 * turn off rcv, send, and interrupts for all ports, all drivers
649 * should also hard reset the chip here?
650 * free up port 0 (kernel) rcvhdr, egr bufs, and eventually tid bufs
651 * for all versions of the driver, if they were allocated
654 ipath_cdbg(VERBOSE
, "unit %u free irq %d\n",
655 dd
->ipath_unit
, dd
->ipath_irq
);
656 dd
->ipath_f_free_irq(dd
);
658 ipath_dbg("irq is 0, not doing free_irq "
659 "for unit %u\n", dd
->ipath_unit
);
661 * we check for NULL here, because it's outside
662 * the kregbase check, and we need to call it
663 * after the free_irq. Thus it's possible that
664 * the function pointers were never initialized.
666 if (dd
->ipath_f_cleanup
)
667 /* clean up chip-specific stuff */
668 dd
->ipath_f_cleanup(dd
);
670 ipath_cdbg(VERBOSE
, "Unmapping kregbase %p\n", dd
->ipath_kregbase
);
671 iounmap((volatile void __iomem
*) dd
->ipath_kregbase
);
672 pci_release_regions(pdev
);
673 ipath_cdbg(VERBOSE
, "calling pci_disable_device\n");
674 pci_disable_device(pdev
);
676 ipath_free_devdata(pdev
, dd
);
679 /* general driver use */
680 DEFINE_MUTEX(ipath_mutex
);
682 static DEFINE_SPINLOCK(ipath_pioavail_lock
);
685 * ipath_disarm_piobufs - cancel a range of PIO buffers
686 * @dd: the infinipath device
687 * @first: the first PIO buffer to cancel
688 * @cnt: the number of PIO buffers to cancel
690 * cancel a range of PIO buffers, used when they might be armed, but
691 * not triggered. Used at init to ensure buffer state, and also user
692 * process close, in case it died while writing to a PIO buffer
695 void ipath_disarm_piobufs(struct ipath_devdata
*dd
, unsigned first
,
698 unsigned i
, last
= first
+ cnt
;
699 u64 sendctrl
, sendorig
;
701 ipath_cdbg(PKT
, "disarm %u PIObufs first=%u\n", cnt
, first
);
702 sendorig
= dd
->ipath_sendctrl
| INFINIPATH_S_DISARM
;
703 for (i
= first
; i
< last
; i
++) {
704 sendctrl
= sendorig
|
705 (i
<< INFINIPATH_S_DISARMPIOBUF_SHIFT
);
706 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
711 * Write it again with current value, in case ipath_sendctrl changed
712 * while we were looping; no critical bits that would require
715 * Write a 0, and then the original value, reading scratch in
716 * between. This seems to avoid a chip timing race that causes
717 * pioavail updates to memory to stop.
719 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
721 sendorig
= ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_scratch
);
722 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
727 * ipath_wait_linkstate - wait for an IB link state change to occur
728 * @dd: the infinipath device
729 * @state: the state to wait for
730 * @msecs: the number of milliseconds to wait
732 * wait up to msecs milliseconds for IB link state change to occur for
733 * now, take the easy polling route. Currently used only by
734 * ipath_set_linkstate. Returns 0 if state reached, otherwise
735 * -ETIMEDOUT state can have multiple states set, for any of several
738 static int ipath_wait_linkstate(struct ipath_devdata
*dd
, u32 state
,
741 dd
->ipath_state_wanted
= state
;
742 wait_event_interruptible_timeout(ipath_state_wait
,
743 (dd
->ipath_flags
& state
),
744 msecs_to_jiffies(msecs
));
745 dd
->ipath_state_wanted
= 0;
747 if (!(dd
->ipath_flags
& state
)) {
749 ipath_cdbg(VERBOSE
, "Didn't reach linkstate %s within %u"
751 /* test INIT ahead of DOWN, both can be set */
752 (state
& IPATH_LINKINIT
) ? "INIT" :
753 ((state
& IPATH_LINKDOWN
) ? "DOWN" :
754 ((state
& IPATH_LINKARMED
) ? "ARM" : "ACTIVE")),
756 val
= ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_ibcstatus
);
757 ipath_cdbg(VERBOSE
, "ibcc=%llx ibcstatus=%llx (%s)\n",
758 (unsigned long long) ipath_read_kreg64(
759 dd
, dd
->ipath_kregs
->kr_ibcctrl
),
760 (unsigned long long) val
,
761 ipath_ibcstatus_str
[val
& 0xf]);
763 return (dd
->ipath_flags
& state
) ? 0 : -ETIMEDOUT
;
767 * Decode the error status into strings, deciding whether to always
768 * print * it or not depending on "normal packet errors" vs everything
769 * else. Return 1 if "real" errors, otherwise 0 if only packet
770 * errors, so caller can decide what to print with the string.
772 int ipath_decode_err(char *buf
, size_t blen
, ipath_err_t err
)
776 if (err
& INFINIPATH_E_PKTERRS
) {
777 if (!(err
& ~INFINIPATH_E_PKTERRS
))
778 iserr
= 0; // if only packet errors.
779 if (ipath_debug
& __IPATH_ERRPKTDBG
) {
780 if (err
& INFINIPATH_E_REBP
)
781 strlcat(buf
, "EBP ", blen
);
782 if (err
& INFINIPATH_E_RVCRC
)
783 strlcat(buf
, "VCRC ", blen
);
784 if (err
& INFINIPATH_E_RICRC
) {
785 strlcat(buf
, "CRC ", blen
);
786 // clear for check below, so only once
787 err
&= INFINIPATH_E_RICRC
;
789 if (err
& INFINIPATH_E_RSHORTPKTLEN
)
790 strlcat(buf
, "rshortpktlen ", blen
);
791 if (err
& INFINIPATH_E_SDROPPEDDATAPKT
)
792 strlcat(buf
, "sdroppeddatapkt ", blen
);
793 if (err
& INFINIPATH_E_SPKTLEN
)
794 strlcat(buf
, "spktlen ", blen
);
796 if ((err
& INFINIPATH_E_RICRC
) &&
797 !(err
&(INFINIPATH_E_RVCRC
|INFINIPATH_E_REBP
)))
798 strlcat(buf
, "CRC ", blen
);
802 if (err
& INFINIPATH_E_RHDRLEN
)
803 strlcat(buf
, "rhdrlen ", blen
);
804 if (err
& INFINIPATH_E_RBADTID
)
805 strlcat(buf
, "rbadtid ", blen
);
806 if (err
& INFINIPATH_E_RBADVERSION
)
807 strlcat(buf
, "rbadversion ", blen
);
808 if (err
& INFINIPATH_E_RHDR
)
809 strlcat(buf
, "rhdr ", blen
);
810 if (err
& INFINIPATH_E_RLONGPKTLEN
)
811 strlcat(buf
, "rlongpktlen ", blen
);
812 if (err
& INFINIPATH_E_RMAXPKTLEN
)
813 strlcat(buf
, "rmaxpktlen ", blen
);
814 if (err
& INFINIPATH_E_RMINPKTLEN
)
815 strlcat(buf
, "rminpktlen ", blen
);
816 if (err
& INFINIPATH_E_SMINPKTLEN
)
817 strlcat(buf
, "sminpktlen ", blen
);
818 if (err
& INFINIPATH_E_RFORMATERR
)
819 strlcat(buf
, "rformaterr ", blen
);
820 if (err
& INFINIPATH_E_RUNSUPVL
)
821 strlcat(buf
, "runsupvl ", blen
);
822 if (err
& INFINIPATH_E_RUNEXPCHAR
)
823 strlcat(buf
, "runexpchar ", blen
);
824 if (err
& INFINIPATH_E_RIBFLOW
)
825 strlcat(buf
, "ribflow ", blen
);
826 if (err
& INFINIPATH_E_SUNDERRUN
)
827 strlcat(buf
, "sunderrun ", blen
);
828 if (err
& INFINIPATH_E_SPIOARMLAUNCH
)
829 strlcat(buf
, "spioarmlaunch ", blen
);
830 if (err
& INFINIPATH_E_SUNEXPERRPKTNUM
)
831 strlcat(buf
, "sunexperrpktnum ", blen
);
832 if (err
& INFINIPATH_E_SDROPPEDSMPPKT
)
833 strlcat(buf
, "sdroppedsmppkt ", blen
);
834 if (err
& INFINIPATH_E_SMAXPKTLEN
)
835 strlcat(buf
, "smaxpktlen ", blen
);
836 if (err
& INFINIPATH_E_SUNSUPVL
)
837 strlcat(buf
, "sunsupVL ", blen
);
838 if (err
& INFINIPATH_E_INVALIDADDR
)
839 strlcat(buf
, "invalidaddr ", blen
);
840 if (err
& INFINIPATH_E_RRCVEGRFULL
)
841 strlcat(buf
, "rcvegrfull ", blen
);
842 if (err
& INFINIPATH_E_RRCVHDRFULL
)
843 strlcat(buf
, "rcvhdrfull ", blen
);
844 if (err
& INFINIPATH_E_IBSTATUSCHANGED
)
845 strlcat(buf
, "ibcstatuschg ", blen
);
846 if (err
& INFINIPATH_E_RIBLOSTLINK
)
847 strlcat(buf
, "riblostlink ", blen
);
848 if (err
& INFINIPATH_E_HARDWARE
)
849 strlcat(buf
, "hardware ", blen
);
850 if (err
& INFINIPATH_E_RESET
)
851 strlcat(buf
, "reset ", blen
);
857 * get_rhf_errstring - decode RHF errors
858 * @err: the err number
859 * @msg: the output buffer
860 * @len: the length of the output buffer
862 * only used one place now, may want more later
864 static void get_rhf_errstring(u32 err
, char *msg
, size_t len
)
866 /* if no errors, and so don't need to check what's first */
869 if (err
& INFINIPATH_RHF_H_ICRCERR
)
870 strlcat(msg
, "icrcerr ", len
);
871 if (err
& INFINIPATH_RHF_H_VCRCERR
)
872 strlcat(msg
, "vcrcerr ", len
);
873 if (err
& INFINIPATH_RHF_H_PARITYERR
)
874 strlcat(msg
, "parityerr ", len
);
875 if (err
& INFINIPATH_RHF_H_LENERR
)
876 strlcat(msg
, "lenerr ", len
);
877 if (err
& INFINIPATH_RHF_H_MTUERR
)
878 strlcat(msg
, "mtuerr ", len
);
879 if (err
& INFINIPATH_RHF_H_IHDRERR
)
880 /* infinipath hdr checksum error */
881 strlcat(msg
, "ipathhdrerr ", len
);
882 if (err
& INFINIPATH_RHF_H_TIDERR
)
883 strlcat(msg
, "tiderr ", len
);
884 if (err
& INFINIPATH_RHF_H_MKERR
)
885 /* bad port, offset, etc. */
886 strlcat(msg
, "invalid ipathhdr ", len
);
887 if (err
& INFINIPATH_RHF_H_IBERR
)
888 strlcat(msg
, "iberr ", len
);
889 if (err
& INFINIPATH_RHF_L_SWA
)
890 strlcat(msg
, "swA ", len
);
891 if (err
& INFINIPATH_RHF_L_SWB
)
892 strlcat(msg
, "swB ", len
);
896 * ipath_get_egrbuf - get an eager buffer
897 * @dd: the infinipath device
898 * @bufnum: the eager buffer to get
901 * must only be called if ipath_pd[port] is known to be allocated
903 static inline void *ipath_get_egrbuf(struct ipath_devdata
*dd
, u32 bufnum
,
906 return dd
->ipath_port0_skbinfo
?
907 (void *) dd
->ipath_port0_skbinfo
[bufnum
].skb
->data
: NULL
;
911 * ipath_alloc_skb - allocate an skb and buffer with possible constraints
912 * @dd: the infinipath device
913 * @gfp_mask: the sk_buff SFP mask
915 struct sk_buff
*ipath_alloc_skb(struct ipath_devdata
*dd
,
922 * Only fully supported way to handle this is to allocate lots
923 * extra, align as needed, and then do skb_reserve(). That wastes
924 * a lot of memory... I'll have to hack this into infinipath_copy
929 * We need 2 extra bytes for ipath_ether data sent in the
930 * key header. In order to keep everything dword aligned,
931 * we'll reserve 4 bytes.
933 len
= dd
->ipath_ibmaxlen
+ 4;
935 if (dd
->ipath_flags
& IPATH_4BYTE_TID
) {
936 /* We need a 2KB multiple alignment, and there is no way
937 * to do it except to allocate extra and then skb_reserve
938 * enough to bring it up to the right alignment.
943 skb
= __dev_alloc_skb(len
, gfp_mask
);
945 ipath_dev_err(dd
, "Failed to allocate skbuff, length %u\n",
952 if (dd
->ipath_flags
& IPATH_4BYTE_TID
) {
953 u32 una
= (unsigned long)skb
->data
& 2047;
955 skb_reserve(skb
, 2048 - una
);
962 static void ipath_rcv_hdrerr(struct ipath_devdata
*dd
,
969 struct ipath_message_header
*hdr
;
971 get_rhf_errstring(eflags
, emsg
, sizeof emsg
);
972 hdr
= (struct ipath_message_header
*)&rc
[1];
973 ipath_cdbg(PKT
, "RHFerrs %x hdrqtail=%x typ=%u "
974 "tlen=%x opcode=%x egridx=%x: %s\n",
976 ipath_hdrget_rcv_type((__le32
*) rc
),
977 ipath_hdrget_length_in_bytes((__le32
*) rc
),
978 be32_to_cpu(hdr
->bth
[0]) >> 24,
981 /* Count local link integrity errors. */
982 if (eflags
& (INFINIPATH_RHF_H_ICRCERR
| INFINIPATH_RHF_H_VCRCERR
)) {
983 u8 n
= (dd
->ipath_ibcctrl
>>
984 INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT
) &
985 INFINIPATH_IBCC_PHYERRTHRESHOLD_MASK
;
987 if (++dd
->ipath_lli_counter
> n
) {
988 dd
->ipath_lli_counter
= 0;
989 dd
->ipath_lli_errors
++;
995 * ipath_kreceive - receive a packet
996 * @dd: the infinipath device
998 * called from interrupt handler for errors or receive interrupt
1000 void ipath_kreceive(struct ipath_devdata
*dd
)
1004 const u32 rsize
= dd
->ipath_rcvhdrentsize
; /* words */
1005 const u32 maxcnt
= dd
->ipath_rcvhdrcnt
* rsize
; /* words */
1006 u32 etail
= -1, l
, hdrqtail
;
1007 struct ipath_message_header
*hdr
;
1008 u32 eflags
, i
, etype
, tlen
, pkttot
= 0, updegr
=0, reloop
=0;
1009 static u64 totcalls
; /* stats, may eventually remove */
1011 if (!dd
->ipath_hdrqtailptr
) {
1013 "hdrqtailptr not set, can't do receives\n");
1017 /* There is already a thread processing this queue. */
1018 if (test_and_set_bit(0, &dd
->ipath_rcv_pending
))
1021 l
= dd
->ipath_port0head
;
1022 hdrqtail
= (u32
) le64_to_cpu(*dd
->ipath_hdrqtailptr
);
1027 for (i
= 0; l
!= hdrqtail
; i
++) {
1031 rc
= (u64
*) (dd
->ipath_pd
[0]->port_rcvhdrq
+ (l
<< 2));
1032 hdr
= (struct ipath_message_header
*)&rc
[1];
1034 * could make a network order version of IPATH_KD_QP, and
1035 * do the obvious shift before masking to speed this up.
1037 qp
= ntohl(hdr
->bth
[1]) & 0xffffff;
1038 bthbytes
= (u8
*) hdr
->bth
;
1040 eflags
= ipath_hdrget_err_flags((__le32
*) rc
);
1041 etype
= ipath_hdrget_rcv_type((__le32
*) rc
);
1043 tlen
= ipath_hdrget_length_in_bytes((__le32
*) rc
);
1045 if (etype
!= RCVHQ_RCV_TYPE_EXPECTED
) {
1047 * it turns out that the chips uses an eager buffer
1048 * for all non-expected packets, whether it "needs"
1049 * one or not. So always get the index, but don't
1050 * set ebuf (so we try to copy data) unless the
1051 * length requires it.
1053 etail
= ipath_hdrget_index((__le32
*) rc
);
1054 if (tlen
> sizeof(*hdr
) ||
1055 etype
== RCVHQ_RCV_TYPE_NON_KD
)
1056 ebuf
= ipath_get_egrbuf(dd
, etail
, 0);
1060 * both tiderr and ipathhdrerr are set for all plain IB
1061 * packets; only ipathhdrerr should be set.
1064 if (etype
!= RCVHQ_RCV_TYPE_NON_KD
&& etype
!=
1065 RCVHQ_RCV_TYPE_ERROR
&& ipath_hdrget_ipath_ver(
1066 hdr
->iph
.ver_port_tid_offset
) !=
1067 IPS_PROTO_VERSION
) {
1068 ipath_cdbg(PKT
, "Bad InfiniPath protocol version "
1072 if (unlikely(eflags
))
1073 ipath_rcv_hdrerr(dd
, eflags
, l
, etail
, rc
);
1074 else if (etype
== RCVHQ_RCV_TYPE_NON_KD
) {
1075 ipath_ib_rcv(dd
->verbs_dev
, rc
+ 1, ebuf
, tlen
);
1076 if (dd
->ipath_lli_counter
)
1077 dd
->ipath_lli_counter
--;
1078 ipath_cdbg(PKT
, "typ %x, opcode %x (eager, "
1079 "qp=%x), len %x; ignored\n",
1080 etype
, bthbytes
[0], qp
, tlen
);
1082 else if (etype
== RCVHQ_RCV_TYPE_EAGER
)
1083 ipath_cdbg(PKT
, "typ %x, opcode %x (eager, "
1084 "qp=%x), len %x; ignored\n",
1085 etype
, bthbytes
[0], qp
, tlen
);
1086 else if (etype
== RCVHQ_RCV_TYPE_EXPECTED
)
1087 ipath_dbg("Bug: Expected TID, opcode %x; ignored\n",
1088 be32_to_cpu(hdr
->bth
[0]) & 0xff);
1091 * error packet, type of error unknown.
1092 * Probably type 3, but we don't know, so don't
1093 * even try to print the opcode, etc.
1095 ipath_dbg("Error Pkt, but no eflags! egrbuf %x, "
1096 "len %x\nhdrq@%lx;hdrq+%x rhf: %llx; "
1097 "hdr %llx %llx %llx %llx %llx\n",
1098 etail
, tlen
, (unsigned long) rc
, l
,
1099 (unsigned long long) rc
[0],
1100 (unsigned long long) rc
[1],
1101 (unsigned long long) rc
[2],
1102 (unsigned long long) rc
[3],
1103 (unsigned long long) rc
[4],
1104 (unsigned long long) rc
[5]);
1109 if (etype
!= RCVHQ_RCV_TYPE_EXPECTED
)
1112 * update head regs on last packet, and every 16 packets.
1113 * Reduce bus traffic, while still trying to prevent
1114 * rcvhdrq overflows, for when the queue is nearly full
1116 if (l
== hdrqtail
|| (i
&& !(i
&0xf))) {
1119 /* request IBA6120 interrupt only on last */
1120 lval
= dd
->ipath_rhdrhead_intr_off
| l
;
1123 (void)ipath_write_ureg(dd
, ur_rcvhdrhead
, lval
, 0);
1125 (void)ipath_write_ureg(dd
, ur_rcvegrindexhead
,
1132 if (!dd
->ipath_rhdrhead_intr_off
&& !reloop
) {
1133 /* IBA6110 workaround; we can have a race clearing chip
1134 * interrupt with another interrupt about to be delivered,
1135 * and can clear it before it is delivered on the GPIO
1136 * workaround. By doing the extra check here for the
1137 * in-memory tail register updating while we were doing
1138 * earlier packets, we "almost" guarantee we have covered
1141 u32 hqtail
= (u32
)le64_to_cpu(*dd
->ipath_hdrqtailptr
);
1142 if (hqtail
!= hdrqtail
) {
1144 reloop
= 1; /* loop 1 extra time at most */
1151 dd
->ipath_port0head
= l
;
1153 if (pkttot
> ipath_stats
.sps_maxpkts_call
)
1154 ipath_stats
.sps_maxpkts_call
= pkttot
;
1155 ipath_stats
.sps_port0pkts
+= pkttot
;
1156 ipath_stats
.sps_avgpkts_call
=
1157 ipath_stats
.sps_port0pkts
/ ++totcalls
;
1160 clear_bit(0, &dd
->ipath_rcv_pending
);
1161 smp_mb__after_clear_bit();
1167 * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1168 * @dd: the infinipath device
1170 * called whenever our local copy indicates we have run out of send buffers
1171 * NOTE: This can be called from interrupt context by some code
1172 * and from non-interrupt context by ipath_getpiobuf().
1175 static void ipath_update_pio_bufs(struct ipath_devdata
*dd
)
1177 unsigned long flags
;
1179 const unsigned piobregs
= (unsigned)dd
->ipath_pioavregs
;
1181 /* If the generation (check) bits have changed, then we update the
1182 * busy bit for the corresponding PIO buffer. This algorithm will
1183 * modify positions to the value they already have in some cases
1184 * (i.e., no change), but it's faster than changing only the bits
1185 * that have changed.
1187 * We would like to do this atomicly, to avoid spinlocks in the
1188 * critical send path, but that's not really possible, given the
1189 * type of changes, and that this routine could be called on
1190 * multiple cpu's simultaneously, so we lock in this routine only,
1191 * to avoid conflicting updates; all we change is the shadow, and
1192 * it's a single 64 bit memory location, so by definition the update
1193 * is atomic in terms of what other cpu's can see in testing the
1194 * bits. The spin_lock overhead isn't too bad, since it only
1195 * happens when all buffers are in use, so only cpu overhead, not
1196 * latency or bandwidth is affected.
1198 #define _IPATH_ALL_CHECKBITS 0x5555555555555555ULL
1199 if (!dd
->ipath_pioavailregs_dma
) {
1200 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1203 if (ipath_debug
& __IPATH_VERBDBG
) {
1204 /* only if packet debug and verbose */
1205 volatile __le64
*dma
= dd
->ipath_pioavailregs_dma
;
1206 unsigned long *shadow
= dd
->ipath_pioavailshadow
;
1208 ipath_cdbg(PKT
, "Refill avail, dma0=%llx shad0=%lx, "
1209 "d1=%llx s1=%lx, d2=%llx s2=%lx, d3=%llx "
1211 (unsigned long long) le64_to_cpu(dma
[0]),
1213 (unsigned long long) le64_to_cpu(dma
[1]),
1215 (unsigned long long) le64_to_cpu(dma
[2]),
1217 (unsigned long long) le64_to_cpu(dma
[3]),
1221 PKT
, "2nd group, dma4=%llx shad4=%lx, "
1222 "d5=%llx s5=%lx, d6=%llx s6=%lx, "
1224 (unsigned long long) le64_to_cpu(dma
[4]),
1226 (unsigned long long) le64_to_cpu(dma
[5]),
1228 (unsigned long long) le64_to_cpu(dma
[6]),
1230 (unsigned long long) le64_to_cpu(dma
[7]),
1233 spin_lock_irqsave(&ipath_pioavail_lock
, flags
);
1234 for (i
= 0; i
< piobregs
; i
++) {
1235 u64 pchbusy
, pchg
, piov
, pnew
;
1237 * Chip Errata: bug 6641; even and odd qwords>3 are swapped
1242 dd
->ipath_pioavailregs_dma
[i
- 1]);
1245 dd
->ipath_pioavailregs_dma
[i
+ 1]);
1247 piov
= le64_to_cpu(dd
->ipath_pioavailregs_dma
[i
]);
1248 pchg
= _IPATH_ALL_CHECKBITS
&
1249 ~(dd
->ipath_pioavailshadow
[i
] ^ piov
);
1250 pchbusy
= pchg
<< INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT
;
1251 if (pchg
&& (pchbusy
& dd
->ipath_pioavailshadow
[i
])) {
1252 pnew
= dd
->ipath_pioavailshadow
[i
] & ~pchbusy
;
1253 pnew
|= piov
& pchbusy
;
1254 dd
->ipath_pioavailshadow
[i
] = pnew
;
1257 spin_unlock_irqrestore(&ipath_pioavail_lock
, flags
);
1261 * ipath_setrcvhdrsize - set the receive header size
1262 * @dd: the infinipath device
1263 * @rhdrsize: the receive header size
1265 * called from user init code, and also layered driver init
1267 int ipath_setrcvhdrsize(struct ipath_devdata
*dd
, unsigned rhdrsize
)
1271 if (dd
->ipath_flags
& IPATH_RCVHDRSZ_SET
) {
1272 if (dd
->ipath_rcvhdrsize
!= rhdrsize
) {
1273 dev_info(&dd
->pcidev
->dev
,
1274 "Error: can't set protocol header "
1275 "size %u, already %u\n",
1276 rhdrsize
, dd
->ipath_rcvhdrsize
);
1279 ipath_cdbg(VERBOSE
, "Reuse same protocol header "
1280 "size %u\n", dd
->ipath_rcvhdrsize
);
1281 } else if (rhdrsize
> (dd
->ipath_rcvhdrentsize
-
1282 (sizeof(u64
) / sizeof(u32
)))) {
1283 ipath_dbg("Error: can't set protocol header size %u "
1284 "(> max %u)\n", rhdrsize
,
1285 dd
->ipath_rcvhdrentsize
-
1286 (u32
) (sizeof(u64
) / sizeof(u32
)));
1289 dd
->ipath_flags
|= IPATH_RCVHDRSZ_SET
;
1290 dd
->ipath_rcvhdrsize
= rhdrsize
;
1291 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_rcvhdrsize
,
1292 dd
->ipath_rcvhdrsize
);
1293 ipath_cdbg(VERBOSE
, "Set protocol header size to %u\n",
1294 dd
->ipath_rcvhdrsize
);
1300 * ipath_getpiobuf - find an available pio buffer
1301 * @dd: the infinipath device
1302 * @pbufnum: the buffer number is placed here
1304 * do appropriate marking as busy, etc.
1305 * returns buffer number if one found (>=0), negative number is error.
1306 * Used by ipath_layer_send
1308 u32 __iomem
*ipath_getpiobuf(struct ipath_devdata
*dd
, u32
* pbufnum
)
1310 int i
, j
, starti
, updated
= 0;
1311 unsigned piobcnt
, iter
;
1312 unsigned long flags
;
1313 unsigned long *shadow
= dd
->ipath_pioavailshadow
;
1316 piobcnt
= (unsigned)(dd
->ipath_piobcnt2k
1317 + dd
->ipath_piobcnt4k
);
1318 starti
= dd
->ipath_lastport_piobuf
;
1319 iter
= piobcnt
- starti
;
1320 if (dd
->ipath_upd_pio_shadow
) {
1322 * Minor optimization. If we had no buffers on last call,
1323 * start out by doing the update; continue and do scan even
1324 * if no buffers were updated, to be paranoid
1326 ipath_update_pio_bufs(dd
);
1327 /* we scanned here, don't do it at end of scan */
1331 i
= dd
->ipath_lastpioindex
;
1335 * while test_and_set_bit() is atomic, we do that and then the
1336 * change_bit(), and the pair is not. See if this is the cause
1337 * of the remaining armlaunch errors.
1339 spin_lock_irqsave(&ipath_pioavail_lock
, flags
);
1340 for (j
= 0; j
< iter
; j
++, i
++) {
1344 * To avoid bus lock overhead, we first find a candidate
1345 * buffer, then do the test and set, and continue if that
1348 if (test_bit((2 * i
) + 1, shadow
) ||
1349 test_and_set_bit((2 * i
) + 1, shadow
))
1351 /* flip generation bit */
1352 change_bit(2 * i
, shadow
);
1355 spin_unlock_irqrestore(&ipath_pioavail_lock
, flags
);
1358 volatile __le64
*dma
= dd
->ipath_pioavailregs_dma
;
1361 * first time through; shadow exhausted, but may be real
1362 * buffers available, so go see; if any updated, rescan
1366 ipath_update_pio_bufs(dd
);
1371 dd
->ipath_upd_pio_shadow
= 1;
1373 * not atomic, but if we lose one once in a while, that's OK
1375 ipath_stats
.sps_nopiobufs
++;
1376 if (!(++dd
->ipath_consec_nopiobuf
% 100000)) {
1378 "%u pio sends with no bufavail; dmacopy: "
1379 "%llx %llx %llx %llx; shadow: "
1380 "%lx %lx %lx %lx\n",
1381 dd
->ipath_consec_nopiobuf
,
1382 (unsigned long long) le64_to_cpu(dma
[0]),
1383 (unsigned long long) le64_to_cpu(dma
[1]),
1384 (unsigned long long) le64_to_cpu(dma
[2]),
1385 (unsigned long long) le64_to_cpu(dma
[3]),
1386 shadow
[0], shadow
[1], shadow
[2],
1389 * 4 buffers per byte, 4 registers above, cover rest
1392 if ((dd
->ipath_piobcnt2k
+ dd
->ipath_piobcnt4k
) >
1393 (sizeof(shadow
[0]) * 4 * 4))
1394 ipath_dbg("2nd group: dmacopy: %llx %llx "
1395 "%llx %llx; shadow: %lx %lx "
1397 (unsigned long long)
1398 le64_to_cpu(dma
[4]),
1399 (unsigned long long)
1400 le64_to_cpu(dma
[5]),
1401 (unsigned long long)
1402 le64_to_cpu(dma
[6]),
1403 (unsigned long long)
1404 le64_to_cpu(dma
[7]),
1405 shadow
[4], shadow
[5],
1406 shadow
[6], shadow
[7]);
1413 * set next starting place. Since it's just an optimization,
1414 * it doesn't matter who wins on this, so no locking
1416 dd
->ipath_lastpioindex
= i
+ 1;
1417 if (dd
->ipath_upd_pio_shadow
)
1418 dd
->ipath_upd_pio_shadow
= 0;
1419 if (dd
->ipath_consec_nopiobuf
)
1420 dd
->ipath_consec_nopiobuf
= 0;
1421 if (i
< dd
->ipath_piobcnt2k
)
1422 buf
= (u32 __iomem
*) (dd
->ipath_pio2kbase
+
1423 i
* dd
->ipath_palign
);
1425 buf
= (u32 __iomem
*)
1426 (dd
->ipath_pio4kbase
+
1427 (i
- dd
->ipath_piobcnt2k
) * dd
->ipath_4kalign
);
1428 ipath_cdbg(VERBOSE
, "Return piobuf%u %uk @ %p\n",
1429 i
, (i
< dd
->ipath_piobcnt2k
) ? 2 : 4, buf
);
1438 * ipath_create_rcvhdrq - create a receive header queue
1439 * @dd: the infinipath device
1440 * @pd: the port data
1442 * this must be contiguous memory (from an i/o perspective), and must be
1443 * DMA'able (which means for some systems, it will go through an IOMMU,
1444 * or be forced into a low address range).
1446 int ipath_create_rcvhdrq(struct ipath_devdata
*dd
,
1447 struct ipath_portdata
*pd
)
1451 if (!pd
->port_rcvhdrq
) {
1452 dma_addr_t phys_hdrqtail
;
1453 gfp_t gfp_flags
= GFP_USER
| __GFP_COMP
;
1454 int amt
= ALIGN(dd
->ipath_rcvhdrcnt
* dd
->ipath_rcvhdrentsize
*
1455 sizeof(u32
), PAGE_SIZE
);
1457 pd
->port_rcvhdrq
= dma_alloc_coherent(
1458 &dd
->pcidev
->dev
, amt
, &pd
->port_rcvhdrq_phys
,
1461 if (!pd
->port_rcvhdrq
) {
1462 ipath_dev_err(dd
, "attempt to allocate %d bytes "
1463 "for port %u rcvhdrq failed\n",
1464 amt
, pd
->port_port
);
1468 pd
->port_rcvhdrtail_kvaddr
= dma_alloc_coherent(
1469 &dd
->pcidev
->dev
, PAGE_SIZE
, &phys_hdrqtail
, GFP_KERNEL
);
1470 if (!pd
->port_rcvhdrtail_kvaddr
) {
1471 ipath_dev_err(dd
, "attempt to allocate 1 page "
1472 "for port %u rcvhdrqtailaddr failed\n",
1475 dma_free_coherent(&dd
->pcidev
->dev
, amt
,
1476 pd
->port_rcvhdrq
, pd
->port_rcvhdrq_phys
);
1477 pd
->port_rcvhdrq
= NULL
;
1480 pd
->port_rcvhdrqtailaddr_phys
= phys_hdrqtail
;
1482 pd
->port_rcvhdrq_size
= amt
;
1484 ipath_cdbg(VERBOSE
, "%d pages at %p (phys %lx) size=%lu "
1485 "for port %u rcvhdr Q\n",
1486 amt
>> PAGE_SHIFT
, pd
->port_rcvhdrq
,
1487 (unsigned long) pd
->port_rcvhdrq_phys
,
1488 (unsigned long) pd
->port_rcvhdrq_size
,
1491 ipath_cdbg(VERBOSE
, "port %d hdrtailaddr, %llx physical\n",
1493 (unsigned long long) phys_hdrqtail
);
1496 ipath_cdbg(VERBOSE
, "reuse port %d rcvhdrq @%p %llx phys; "
1497 "hdrtailaddr@%p %llx physical\n",
1498 pd
->port_port
, pd
->port_rcvhdrq
,
1499 (unsigned long long) pd
->port_rcvhdrq_phys
,
1500 pd
->port_rcvhdrtail_kvaddr
, (unsigned long long)
1501 pd
->port_rcvhdrqtailaddr_phys
);
1503 /* clear for security and sanity on each use */
1504 memset(pd
->port_rcvhdrq
, 0, pd
->port_rcvhdrq_size
);
1505 memset(pd
->port_rcvhdrtail_kvaddr
, 0, PAGE_SIZE
);
1508 * tell chip each time we init it, even if we are re-using previous
1509 * memory (we zero the register at process close)
1511 ipath_write_kreg_port(dd
, dd
->ipath_kregs
->kr_rcvhdrtailaddr
,
1512 pd
->port_port
, pd
->port_rcvhdrqtailaddr_phys
);
1513 ipath_write_kreg_port(dd
, dd
->ipath_kregs
->kr_rcvhdraddr
,
1514 pd
->port_port
, pd
->port_rcvhdrq_phys
);
1521 int ipath_waitfor_complete(struct ipath_devdata
*dd
, ipath_kreg reg_id
,
1522 u64 bits_to_wait_for
, u64
* valp
)
1524 unsigned long timeout
;
1528 lastval
= ipath_read_kreg64(dd
, reg_id
);
1529 /* wait a ridiculously long time */
1530 timeout
= jiffies
+ msecs_to_jiffies(5);
1532 val
= ipath_read_kreg64(dd
, reg_id
);
1533 /* set so they have something, even on failures. */
1535 if ((val
& bits_to_wait_for
) == bits_to_wait_for
) {
1540 ipath_cdbg(VERBOSE
, "Changed from %llx to %llx, "
1541 "waiting for %llx bits\n",
1542 (unsigned long long) lastval
,
1543 (unsigned long long) val
,
1544 (unsigned long long) bits_to_wait_for
);
1546 if (time_after(jiffies
, timeout
)) {
1547 ipath_dbg("Didn't get bits %llx in register 0x%x, "
1549 (unsigned long long) bits_to_wait_for
,
1550 reg_id
, (unsigned long long) *valp
);
1560 * ipath_waitfor_mdio_cmdready - wait for last command to complete
1561 * @dd: the infinipath device
1563 * Like ipath_waitfor_complete(), but we wait for the CMDVALID bit to go
1564 * away indicating the last command has completed. It doesn't return data
1566 int ipath_waitfor_mdio_cmdready(struct ipath_devdata
*dd
)
1568 unsigned long timeout
;
1572 /* wait a ridiculously long time */
1573 timeout
= jiffies
+ msecs_to_jiffies(5);
1575 val
= ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_mdio
);
1576 if (!(val
& IPATH_MDIO_CMDVALID
)) {
1581 if (time_after(jiffies
, timeout
)) {
1582 ipath_dbg("CMDVALID stuck in mdio reg? (%llx)\n",
1583 (unsigned long long) val
);
1592 static void ipath_set_ib_lstate(struct ipath_devdata
*dd
, int which
)
1594 static const char *what
[4] = {
1596 [INFINIPATH_IBCC_LINKCMD_INIT
] = "INIT",
1597 [INFINIPATH_IBCC_LINKCMD_ARMED
] = "ARMED",
1598 [INFINIPATH_IBCC_LINKCMD_ACTIVE
] = "ACTIVE"
1600 int linkcmd
= (which
>> INFINIPATH_IBCC_LINKCMD_SHIFT
) &
1601 INFINIPATH_IBCC_LINKCMD_MASK
;
1603 ipath_cdbg(VERBOSE
, "Trying to move unit %u to %s, current ltstate "
1604 "is %s\n", dd
->ipath_unit
,
1606 ipath_ibcstatus_str
[
1608 (dd
, dd
->ipath_kregs
->kr_ibcstatus
) >>
1609 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT
) &
1610 INFINIPATH_IBCS_LINKTRAININGSTATE_MASK
]);
1611 /* flush all queued sends when going to DOWN or INIT, to be sure that
1612 * they don't block MAD packets */
1613 if (!linkcmd
|| linkcmd
== INFINIPATH_IBCC_LINKCMD_INIT
) {
1614 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
1615 INFINIPATH_S_ABORT
);
1616 ipath_disarm_piobufs(dd
, dd
->ipath_lastport_piobuf
,
1617 (unsigned)(dd
->ipath_piobcnt2k
+
1618 dd
->ipath_piobcnt4k
) -
1619 dd
->ipath_lastport_piobuf
);
1622 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_ibcctrl
,
1623 dd
->ipath_ibcctrl
| which
);
1626 int ipath_set_linkstate(struct ipath_devdata
*dd
, u8 newstate
)
1632 case IPATH_IB_LINKDOWN
:
1633 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKINITCMD_POLL
<<
1634 INFINIPATH_IBCC_LINKINITCMD_SHIFT
);
1639 case IPATH_IB_LINKDOWN_SLEEP
:
1640 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKINITCMD_SLEEP
<<
1641 INFINIPATH_IBCC_LINKINITCMD_SHIFT
);
1646 case IPATH_IB_LINKDOWN_DISABLE
:
1647 ipath_set_ib_lstate(dd
,
1648 INFINIPATH_IBCC_LINKINITCMD_DISABLE
<<
1649 INFINIPATH_IBCC_LINKINITCMD_SHIFT
);
1654 case IPATH_IB_LINKINIT
:
1655 if (dd
->ipath_flags
& IPATH_LINKINIT
) {
1659 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKCMD_INIT
<<
1660 INFINIPATH_IBCC_LINKCMD_SHIFT
);
1661 lstate
= IPATH_LINKINIT
;
1664 case IPATH_IB_LINKARM
:
1665 if (dd
->ipath_flags
& IPATH_LINKARMED
) {
1669 if (!(dd
->ipath_flags
&
1670 (IPATH_LINKINIT
| IPATH_LINKACTIVE
))) {
1674 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKCMD_ARMED
<<
1675 INFINIPATH_IBCC_LINKCMD_SHIFT
);
1677 * Since the port can transition to ACTIVE by receiving
1678 * a non VL 15 packet, wait for either state.
1680 lstate
= IPATH_LINKARMED
| IPATH_LINKACTIVE
;
1683 case IPATH_IB_LINKACTIVE
:
1684 if (dd
->ipath_flags
& IPATH_LINKACTIVE
) {
1688 if (!(dd
->ipath_flags
& IPATH_LINKARMED
)) {
1692 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKCMD_ACTIVE
<<
1693 INFINIPATH_IBCC_LINKCMD_SHIFT
);
1694 lstate
= IPATH_LINKACTIVE
;
1697 case IPATH_IB_LINK_LOOPBACK
:
1698 dev_info(&dd
->pcidev
->dev
, "Enabling IB local loopback\n");
1699 dd
->ipath_ibcctrl
|= INFINIPATH_IBCC_LOOPBACK
;
1700 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_ibcctrl
,
1703 goto bail
; // no state change to wait for
1705 case IPATH_IB_LINK_EXTERNAL
:
1706 dev_info(&dd
->pcidev
->dev
, "Disabling IB local loopback (normal)\n");
1707 dd
->ipath_ibcctrl
&= ~INFINIPATH_IBCC_LOOPBACK
;
1708 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_ibcctrl
,
1711 goto bail
; // no state change to wait for
1714 ipath_dbg("Invalid linkstate 0x%x requested\n", newstate
);
1718 ret
= ipath_wait_linkstate(dd
, lstate
, 2000);
1725 * ipath_set_mtu - set the MTU
1726 * @dd: the infinipath device
1729 * we can handle "any" incoming size, the issue here is whether we
1730 * need to restrict our outgoing size. For now, we don't do any
1731 * sanity checking on this, and we don't deal with what happens to
1732 * programs that are already running when the size changes.
1733 * NOTE: changing the MTU will usually cause the IBC to go back to
1734 * link initialize (IPATH_IBSTATE_INIT) state...
1736 int ipath_set_mtu(struct ipath_devdata
*dd
, u16 arg
)
1743 * mtu is IB data payload max. It's the largest power of 2 less
1744 * than piosize (or even larger, since it only really controls the
1745 * largest we can receive; we can send the max of the mtu and
1746 * piosize). We check that it's one of the valid IB sizes.
1748 if (arg
!= 256 && arg
!= 512 && arg
!= 1024 && arg
!= 2048 &&
1750 ipath_dbg("Trying to set invalid mtu %u, failing\n", arg
);
1754 if (dd
->ipath_ibmtu
== arg
) {
1755 ret
= 0; /* same as current */
1759 piosize
= dd
->ipath_ibmaxlen
;
1760 dd
->ipath_ibmtu
= arg
;
1762 if (arg
>= (piosize
- IPATH_PIO_MAXIBHDR
)) {
1763 /* Only if it's not the initial value (or reset to it) */
1764 if (piosize
!= dd
->ipath_init_ibmaxlen
) {
1765 dd
->ipath_ibmaxlen
= piosize
;
1768 } else if ((arg
+ IPATH_PIO_MAXIBHDR
) != dd
->ipath_ibmaxlen
) {
1769 piosize
= arg
+ IPATH_PIO_MAXIBHDR
;
1770 ipath_cdbg(VERBOSE
, "ibmaxlen was 0x%x, setting to 0x%x "
1771 "(mtu 0x%x)\n", dd
->ipath_ibmaxlen
, piosize
,
1773 dd
->ipath_ibmaxlen
= piosize
;
1779 * set the IBC maxpktlength to the size of our pio
1782 u64 ibc
= dd
->ipath_ibcctrl
;
1783 ibc
&= ~(INFINIPATH_IBCC_MAXPKTLEN_MASK
<<
1784 INFINIPATH_IBCC_MAXPKTLEN_SHIFT
);
1786 piosize
= piosize
- 2 * sizeof(u32
); /* ignore pbc */
1787 dd
->ipath_ibmaxlen
= piosize
;
1788 piosize
/= sizeof(u32
); /* in words */
1790 * for ICRC, which we only send in diag test pkt mode, and
1791 * we don't need to worry about that for mtu
1795 ibc
|= piosize
<< INFINIPATH_IBCC_MAXPKTLEN_SHIFT
;
1796 dd
->ipath_ibcctrl
= ibc
;
1797 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_ibcctrl
,
1799 dd
->ipath_f_tidtemplate(dd
);
1808 int ipath_set_lid(struct ipath_devdata
*dd
, u32 arg
, u8 lmc
)
1810 dd
->ipath_lid
= arg
;
1811 dd
->ipath_lmc
= lmc
;
1818 * ipath_write_kreg_port - write a device's per-port 64-bit kernel register
1819 * @dd: the infinipath device
1820 * @regno: the register number to write
1821 * @port: the port containing the register
1822 * @value: the value to write
1824 * Registers that vary with the chip implementation constants (port)
1827 void ipath_write_kreg_port(const struct ipath_devdata
*dd
, ipath_kreg regno
,
1828 unsigned port
, u64 value
)
1832 if (port
< dd
->ipath_portcnt
&&
1833 (regno
== dd
->ipath_kregs
->kr_rcvhdraddr
||
1834 regno
== dd
->ipath_kregs
->kr_rcvhdrtailaddr
))
1835 where
= regno
+ port
;
1839 ipath_write_kreg(dd
, where
, value
);
1843 * ipath_shutdown_device - shut down a device
1844 * @dd: the infinipath device
1846 * This is called to make the device quiet when we are about to
1847 * unload the driver, and also when the device is administratively
1848 * disabled. It does not free any data structures.
1849 * Everything it does has to be setup again by ipath_init_chip(dd,1)
1851 void ipath_shutdown_device(struct ipath_devdata
*dd
)
1853 ipath_dbg("Shutting down the device\n");
1855 dd
->ipath_flags
|= IPATH_LINKUNK
;
1856 dd
->ipath_flags
&= ~(IPATH_INITTED
| IPATH_LINKDOWN
|
1857 IPATH_LINKINIT
| IPATH_LINKARMED
|
1859 *dd
->ipath_statusp
&= ~(IPATH_STATUS_IB_CONF
|
1860 IPATH_STATUS_IB_READY
);
1862 /* mask interrupts, but not errors */
1863 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intmask
, 0ULL);
1865 dd
->ipath_rcvctrl
= 0;
1866 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_rcvctrl
,
1870 * gracefully stop all sends allowing any in progress to trickle out
1873 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
, 0ULL);
1875 ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_scratch
);
1877 * enough for anything that's going to trickle out to have actually
1883 * abort any armed or launched PIO buffers that didn't go. (self
1884 * clearing). Will cause any packet currently being transmitted to
1885 * go out with an EBP, and may also cause a short packet error on
1888 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
1889 INFINIPATH_S_ABORT
);
1891 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKINITCMD_DISABLE
<<
1892 INFINIPATH_IBCC_LINKINITCMD_SHIFT
);
1895 dd
->ipath_control
&= ~INFINIPATH_C_LINKENABLE
;
1896 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_control
,
1897 dd
->ipath_control
| INFINIPATH_C_FREEZEMODE
);
1900 * clear SerdesEnable and turn the leds off; do this here because
1901 * we are unloading, so don't count on interrupts to move along
1902 * Turn the LEDs off explictly for the same reason.
1904 dd
->ipath_f_quiet_serdes(dd
);
1905 dd
->ipath_f_setextled(dd
, 0, 0);
1907 if (dd
->ipath_stats_timer_active
) {
1908 del_timer_sync(&dd
->ipath_stats_timer
);
1909 dd
->ipath_stats_timer_active
= 0;
1913 * clear all interrupts and errors, so that the next time the driver
1914 * is loaded or device is enabled, we know that whatever is set
1915 * happened while we were unloaded
1917 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_hwerrclear
,
1918 ~0ULL & ~INFINIPATH_HWE_MEMBISTFAILED
);
1919 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_errorclear
, -1LL);
1920 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intclear
, -1LL);
1924 * ipath_free_pddata - free a port's allocated data
1925 * @dd: the infinipath device
1926 * @pd: the portdata structure
1928 * free up any allocated data for a port
1929 * This should not touch anything that would affect a simultaneous
1930 * re-allocation of port data, because it is called after ipath_mutex
1931 * is released (and can be called from reinit as well).
1932 * It should never change any chip state, or global driver state.
1933 * (The only exception to global state is freeing the port0 port0_skbs.)
1935 void ipath_free_pddata(struct ipath_devdata
*dd
, struct ipath_portdata
*pd
)
1940 if (pd
->port_rcvhdrq
) {
1941 ipath_cdbg(VERBOSE
, "free closed port %d rcvhdrq @ %p "
1942 "(size=%lu)\n", pd
->port_port
, pd
->port_rcvhdrq
,
1943 (unsigned long) pd
->port_rcvhdrq_size
);
1944 dma_free_coherent(&dd
->pcidev
->dev
, pd
->port_rcvhdrq_size
,
1945 pd
->port_rcvhdrq
, pd
->port_rcvhdrq_phys
);
1946 pd
->port_rcvhdrq
= NULL
;
1947 if (pd
->port_rcvhdrtail_kvaddr
) {
1948 dma_free_coherent(&dd
->pcidev
->dev
, PAGE_SIZE
,
1949 pd
->port_rcvhdrtail_kvaddr
,
1950 pd
->port_rcvhdrqtailaddr_phys
);
1951 pd
->port_rcvhdrtail_kvaddr
= NULL
;
1954 if (pd
->port_port
&& pd
->port_rcvegrbuf
) {
1957 for (e
= 0; e
< pd
->port_rcvegrbuf_chunks
; e
++) {
1958 void *base
= pd
->port_rcvegrbuf
[e
];
1959 size_t size
= pd
->port_rcvegrbuf_size
;
1961 ipath_cdbg(VERBOSE
, "egrbuf free(%p, %lu), "
1962 "chunk %u/%u\n", base
,
1963 (unsigned long) size
,
1964 e
, pd
->port_rcvegrbuf_chunks
);
1965 dma_free_coherent(&dd
->pcidev
->dev
, size
,
1966 base
, pd
->port_rcvegrbuf_phys
[e
]);
1968 kfree(pd
->port_rcvegrbuf
);
1969 pd
->port_rcvegrbuf
= NULL
;
1970 kfree(pd
->port_rcvegrbuf_phys
);
1971 pd
->port_rcvegrbuf_phys
= NULL
;
1972 pd
->port_rcvegrbuf_chunks
= 0;
1973 } else if (pd
->port_port
== 0 && dd
->ipath_port0_skbinfo
) {
1975 struct ipath_skbinfo
*skbinfo
= dd
->ipath_port0_skbinfo
;
1977 dd
->ipath_port0_skbinfo
= NULL
;
1978 ipath_cdbg(VERBOSE
, "free closed port %d "
1979 "ipath_port0_skbinfo @ %p\n", pd
->port_port
,
1981 for (e
= 0; e
< dd
->ipath_rcvegrcnt
; e
++)
1982 if (skbinfo
[e
].skb
) {
1983 pci_unmap_single(dd
->pcidev
, skbinfo
[e
].phys
,
1985 PCI_DMA_FROMDEVICE
);
1986 dev_kfree_skb(skbinfo
[e
].skb
);
1990 kfree(pd
->port_tid_pg_list
);
1991 vfree(pd
->subport_uregbase
);
1992 vfree(pd
->subport_rcvegrbuf
);
1993 vfree(pd
->subport_rcvhdr_base
);
1997 static int __init
infinipath_init(void)
2001 if (ipath_debug
& __IPATH_DBG
)
2002 printk(KERN_INFO DRIVER_LOAD_MSG
"%s", ib_ipath_version
);
2005 * These must be called before the driver is registered with
2006 * the PCI subsystem.
2008 idr_init(&unit_table
);
2009 if (!idr_pre_get(&unit_table
, GFP_KERNEL
)) {
2014 ret
= pci_register_driver(&ipath_driver
);
2016 printk(KERN_ERR IPATH_DRV_NAME
2017 ": Unable to register driver: error %d\n", -ret
);
2021 ret
= ipath_driver_create_group(&ipath_driver
.driver
);
2023 printk(KERN_ERR IPATH_DRV_NAME
": Unable to create driver "
2024 "sysfs entries: error %d\n", -ret
);
2028 ret
= ipath_init_ipathfs();
2030 printk(KERN_ERR IPATH_DRV_NAME
": Unable to create "
2031 "ipathfs: error %d\n", -ret
);
2038 ipath_driver_remove_group(&ipath_driver
.driver
);
2041 pci_unregister_driver(&ipath_driver
);
2044 idr_destroy(&unit_table
);
2050 static void __exit
infinipath_cleanup(void)
2052 ipath_exit_ipathfs();
2054 ipath_driver_remove_group(&ipath_driver
.driver
);
2056 ipath_cdbg(VERBOSE
, "Unregistering pci driver\n");
2057 pci_unregister_driver(&ipath_driver
);
2059 idr_destroy(&unit_table
);
2063 * ipath_reset_device - reset the chip if possible
2064 * @unit: the device to reset
2066 * Whether or not reset is successful, we attempt to re-initialize the chip
2067 * (that is, much like a driver unload/reload). We clear the INITTED flag
2068 * so that the various entry points will fail until we reinitialize. For
2069 * now, we only allow this if no user ports are open that use chip resources
2071 int ipath_reset_device(int unit
)
2074 struct ipath_devdata
*dd
= ipath_lookup(unit
);
2081 dev_info(&dd
->pcidev
->dev
, "Reset on unit %u requested\n", unit
);
2083 if (!dd
->ipath_kregbase
|| !(dd
->ipath_flags
& IPATH_PRESENT
)) {
2084 dev_info(&dd
->pcidev
->dev
, "Invalid unit number %u or "
2085 "not initialized or not present\n", unit
);
2091 for (i
= 1; i
< dd
->ipath_cfgports
; i
++) {
2092 if (dd
->ipath_pd
[i
] && dd
->ipath_pd
[i
]->port_cnt
) {
2093 ipath_dbg("unit %u port %d is in use "
2094 "(PID %u cmd %s), can't reset\n",
2096 dd
->ipath_pd
[i
]->port_pid
,
2097 dd
->ipath_pd
[i
]->port_comm
);
2103 dd
->ipath_flags
&= ~IPATH_INITTED
;
2104 ret
= dd
->ipath_f_reset(dd
);
2106 ipath_dbg("reset was not successful\n");
2107 ipath_dbg("Trying to reinitialize unit %u after reset attempt\n",
2109 ret
= ipath_init_chip(dd
, 1);
2111 ipath_dev_err(dd
, "Reinitialize unit %u after "
2112 "reset failed with %d\n", unit
, ret
);
2114 dev_info(&dd
->pcidev
->dev
, "Reinitialized unit %u after "
2115 "resetting\n", unit
);
2121 int ipath_set_rx_pol_inv(struct ipath_devdata
*dd
, u8 new_pol_inv
)
2124 if ( new_pol_inv
> INFINIPATH_XGXS_RX_POL_MASK
) {
2127 if ( dd
->ipath_rx_pol_inv
!= new_pol_inv
) {
2128 dd
->ipath_rx_pol_inv
= new_pol_inv
;
2129 val
= ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_xgxsconfig
);
2130 val
&= ~(INFINIPATH_XGXS_RX_POL_MASK
<<
2131 INFINIPATH_XGXS_RX_POL_SHIFT
);
2132 val
|= ((u64
)dd
->ipath_rx_pol_inv
) <<
2133 INFINIPATH_XGXS_RX_POL_SHIFT
;
2134 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_xgxsconfig
, val
);
2138 module_init(infinipath_init
);
2139 module_exit(infinipath_cleanup
);