2 * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
3 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/spinlock.h>
35 #include <linux/idr.h>
36 #include <linux/pci.h>
38 #include <linux/delay.h>
39 #include <linux/netdevice.h>
40 #include <linux/vmalloc.h>
42 #include "ipath_kernel.h"
43 #include "ipath_verbs.h"
44 #include "ipath_common.h"
46 static void ipath_update_pio_bufs(struct ipath_devdata
*);
48 const char *ipath_get_unit_name(int unit
)
50 static char iname
[16];
51 snprintf(iname
, sizeof iname
, "infinipath%u", unit
);
55 #define DRIVER_LOAD_MSG "QLogic " IPATH_DRV_NAME " loaded: "
56 #define PFX IPATH_DRV_NAME ": "
59 * The size has to be longer than this string, so we can append
60 * board/chip information to it in the init code.
62 const char ib_ipath_version
[] = IPATH_IDSTR
"\n";
64 static struct idr unit_table
;
65 DEFINE_SPINLOCK(ipath_devs_lock
);
66 LIST_HEAD(ipath_dev_list
);
68 wait_queue_head_t ipath_state_wait
;
70 unsigned ipath_debug
= __IPATH_INFO
;
72 module_param_named(debug
, ipath_debug
, uint
, S_IWUSR
| S_IRUGO
);
73 MODULE_PARM_DESC(debug
, "mask for debug prints");
74 EXPORT_SYMBOL_GPL(ipath_debug
);
76 unsigned ipath_mtu4096
= 1; /* max 4KB IB mtu by default, if supported */
77 module_param_named(mtu4096
, ipath_mtu4096
, uint
, S_IRUGO
);
78 MODULE_PARM_DESC(mtu4096
, "enable MTU of 4096 bytes, if supported");
80 static unsigned ipath_hol_timeout_ms
= 13000;
81 module_param_named(hol_timeout_ms
, ipath_hol_timeout_ms
, uint
, S_IRUGO
);
82 MODULE_PARM_DESC(hol_timeout_ms
,
83 "duration of user app suspension after link failure");
85 unsigned ipath_linkrecovery
= 1;
86 module_param_named(linkrecovery
, ipath_linkrecovery
, uint
, S_IWUSR
| S_IRUGO
);
87 MODULE_PARM_DESC(linkrecovery
, "enable workaround for link recovery issue");
89 MODULE_LICENSE("GPL");
90 MODULE_AUTHOR("QLogic <support@qlogic.com>");
91 MODULE_DESCRIPTION("QLogic InfiniPath driver");
93 const char *ipath_ibcstatus_str
[] = {
100 "LState6", /* unused */
101 "LState7", /* unused */
107 "LState0xD", /* unused */
112 static void __devexit
ipath_remove_one(struct pci_dev
*);
113 static int __devinit
ipath_init_one(struct pci_dev
*,
114 const struct pci_device_id
*);
116 /* Only needed for registration, nothing else needs this info */
117 #define PCI_VENDOR_ID_PATHSCALE 0x1fc1
118 #define PCI_DEVICE_ID_INFINIPATH_HT 0xd
119 #define PCI_DEVICE_ID_INFINIPATH_PE800 0x10
121 /* Number of seconds before our card status check... */
122 #define STATUS_TIMEOUT 60
124 static const struct pci_device_id ipath_pci_tbl
[] = {
125 { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE
, PCI_DEVICE_ID_INFINIPATH_HT
) },
126 { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE
, PCI_DEVICE_ID_INFINIPATH_PE800
) },
130 MODULE_DEVICE_TABLE(pci
, ipath_pci_tbl
);
132 static struct pci_driver ipath_driver
= {
133 .name
= IPATH_DRV_NAME
,
134 .probe
= ipath_init_one
,
135 .remove
= __devexit_p(ipath_remove_one
),
136 .id_table
= ipath_pci_tbl
,
138 .groups
= ipath_driver_attr_groups
,
142 static void ipath_check_status(struct work_struct
*work
)
144 struct ipath_devdata
*dd
= container_of(work
, struct ipath_devdata
,
148 * If we don't have any interrupts, let the user know and
149 * don't bother checking again.
151 if (dd
->ipath_int_counter
== 0)
152 dev_err(&dd
->pcidev
->dev
, "No interrupts detected.\n");
155 static inline void read_bars(struct ipath_devdata
*dd
, struct pci_dev
*dev
,
156 u32
*bar0
, u32
*bar1
)
160 ret
= pci_read_config_dword(dev
, PCI_BASE_ADDRESS_0
, bar0
);
162 ipath_dev_err(dd
, "failed to read bar0 before enable: "
165 ret
= pci_read_config_dword(dev
, PCI_BASE_ADDRESS_1
, bar1
);
167 ipath_dev_err(dd
, "failed to read bar1 before enable: "
170 ipath_dbg("Read bar0 %x bar1 %x\n", *bar0
, *bar1
);
173 static void ipath_free_devdata(struct pci_dev
*pdev
,
174 struct ipath_devdata
*dd
)
178 pci_set_drvdata(pdev
, NULL
);
180 if (dd
->ipath_unit
!= -1) {
181 spin_lock_irqsave(&ipath_devs_lock
, flags
);
182 idr_remove(&unit_table
, dd
->ipath_unit
);
183 list_del(&dd
->ipath_list
);
184 spin_unlock_irqrestore(&ipath_devs_lock
, flags
);
189 static struct ipath_devdata
*ipath_alloc_devdata(struct pci_dev
*pdev
)
192 struct ipath_devdata
*dd
;
195 if (!idr_pre_get(&unit_table
, GFP_KERNEL
)) {
196 dd
= ERR_PTR(-ENOMEM
);
200 dd
= vmalloc(sizeof(*dd
));
202 dd
= ERR_PTR(-ENOMEM
);
205 memset(dd
, 0, sizeof(*dd
));
208 spin_lock_irqsave(&ipath_devs_lock
, flags
);
210 ret
= idr_get_new(&unit_table
, dd
, &dd
->ipath_unit
);
212 printk(KERN_ERR IPATH_DRV_NAME
213 ": Could not allocate unit ID: error %d\n", -ret
);
214 ipath_free_devdata(pdev
, dd
);
220 pci_set_drvdata(pdev
, dd
);
222 INIT_DELAYED_WORK(&dd
->status_work
, ipath_check_status
);
224 list_add(&dd
->ipath_list
, &ipath_dev_list
);
227 spin_unlock_irqrestore(&ipath_devs_lock
, flags
);
233 static inline struct ipath_devdata
*__ipath_lookup(int unit
)
235 return idr_find(&unit_table
, unit
);
238 struct ipath_devdata
*ipath_lookup(int unit
)
240 struct ipath_devdata
*dd
;
243 spin_lock_irqsave(&ipath_devs_lock
, flags
);
244 dd
= __ipath_lookup(unit
);
245 spin_unlock_irqrestore(&ipath_devs_lock
, flags
);
250 int ipath_count_units(int *npresentp
, int *nupp
, int *maxportsp
)
252 int nunits
, npresent
, nup
;
253 struct ipath_devdata
*dd
;
257 nunits
= npresent
= nup
= maxports
= 0;
259 spin_lock_irqsave(&ipath_devs_lock
, flags
);
261 list_for_each_entry(dd
, &ipath_dev_list
, ipath_list
) {
263 if ((dd
->ipath_flags
& IPATH_PRESENT
) && dd
->ipath_kregbase
)
266 !(dd
->ipath_flags
& (IPATH_DISABLED
| IPATH_LINKDOWN
269 if (dd
->ipath_cfgports
> maxports
)
270 maxports
= dd
->ipath_cfgports
;
273 spin_unlock_irqrestore(&ipath_devs_lock
, flags
);
276 *npresentp
= npresent
;
280 *maxportsp
= maxports
;
286 * These next two routines are placeholders in case we don't have per-arch
287 * code for controlling write combining. If explicit control of write
288 * combining is not available, performance will probably be awful.
291 int __attribute__((weak
)) ipath_enable_wc(struct ipath_devdata
*dd
)
296 void __attribute__((weak
)) ipath_disable_wc(struct ipath_devdata
*dd
)
301 * Perform a PIO buffer bandwidth write test, to verify proper system
302 * configuration. Even when all the setup calls work, occasionally
303 * BIOS or other issues can prevent write combining from working, or
304 * can cause other bandwidth problems to the chip.
306 * This test simply writes the same buffer over and over again, and
307 * measures close to the peak bandwidth to the chip (not testing
308 * data bandwidth to the wire). On chips that use an address-based
309 * trigger to send packets to the wire, this is easy. On chips that
310 * use a count to trigger, we want to make sure that the packet doesn't
311 * go out on the wire, or trigger flow control checks.
313 static void ipath_verify_pioperf(struct ipath_devdata
*dd
)
315 u32 pbnum
, cnt
, lcnt
;
320 piobuf
= ipath_getpiobuf(dd
, &pbnum
);
322 dev_info(&dd
->pcidev
->dev
,
323 "No PIObufs for checking perf, skipping\n");
328 * Enough to give us a reasonable test, less than piobuf size, and
329 * likely multiple of store buffer length.
335 dev_info(&dd
->pcidev
->dev
,
336 "Couldn't get memory for checking PIO perf,"
341 preempt_disable(); /* we want reasonably accurate elapsed time */
342 msecs
= 1 + jiffies_to_msecs(jiffies
);
343 for (lcnt
= 0; lcnt
< 10000U; lcnt
++) {
344 /* wait until we cross msec boundary */
345 if (jiffies_to_msecs(jiffies
) >= msecs
)
350 ipath_disable_armlaunch(dd
);
352 writeq(0, piobuf
); /* length 0, no dwords actually sent */
356 * this is only roughly accurate, since even with preempt we
357 * still take interrupts that could take a while. Running for
358 * >= 5 msec seems to get us "close enough" to accurate values
360 msecs
= jiffies_to_msecs(jiffies
);
361 for (emsecs
= lcnt
= 0; emsecs
<= 5UL; lcnt
++) {
362 __iowrite32_copy(piobuf
+ 64, addr
, cnt
>> 2);
363 emsecs
= jiffies_to_msecs(jiffies
) - msecs
;
366 /* 1 GiB/sec, slightly over IB SDR line rate */
367 if (lcnt
< (emsecs
* 1024U))
369 "Performance problem: bandwidth to PIO buffers is "
371 lcnt
/ (u32
) emsecs
);
373 ipath_dbg("PIO buffer bandwidth %u MiB/sec is OK\n",
374 lcnt
/ (u32
) emsecs
);
381 /* disarm piobuf, so it's available again */
382 ipath_disarm_piobufs(dd
, pbnum
, 1);
383 ipath_enable_armlaunch(dd
);
386 static int __devinit
ipath_init_one(struct pci_dev
*pdev
,
387 const struct pci_device_id
*ent
)
390 struct ipath_devdata
*dd
;
391 unsigned long long addr
;
392 u32 bar0
= 0, bar1
= 0;
394 dd
= ipath_alloc_devdata(pdev
);
397 printk(KERN_ERR IPATH_DRV_NAME
398 ": Could not allocate devdata: error %d\n", -ret
);
402 ipath_cdbg(VERBOSE
, "initializing unit #%u\n", dd
->ipath_unit
);
404 ret
= pci_enable_device(pdev
);
406 /* This can happen iff:
408 * We did a chip reset, and then failed to reprogram the
409 * BAR, or the chip reset due to an internal error. We then
410 * unloaded the driver and reloaded it.
412 * Both reset cases set the BAR back to initial state. For
413 * the latter case, the AER sticky error bit at offset 0x718
414 * should be set, but the Linux kernel doesn't yet know
415 * about that, it appears. If the original BAR was retained
416 * in the kernel data structures, this may be OK.
418 ipath_dev_err(dd
, "enable unit %d failed: error %d\n",
419 dd
->ipath_unit
, -ret
);
422 addr
= pci_resource_start(pdev
, 0);
423 len
= pci_resource_len(pdev
, 0);
424 ipath_cdbg(VERBOSE
, "regbase (0) %llx len %d pdev->irq %d, vend %x/%x "
425 "driver_data %lx\n", addr
, len
, pdev
->irq
, ent
->vendor
,
426 ent
->device
, ent
->driver_data
);
428 read_bars(dd
, pdev
, &bar0
, &bar1
);
430 if (!bar1
&& !(bar0
& ~0xf)) {
432 dev_info(&pdev
->dev
, "BAR is 0 (probable RESET), "
433 "rewriting as %llx\n", addr
);
434 ret
= pci_write_config_dword(
435 pdev
, PCI_BASE_ADDRESS_0
, addr
);
437 ipath_dev_err(dd
, "rewrite of BAR0 "
438 "failed: err %d\n", -ret
);
441 ret
= pci_write_config_dword(
442 pdev
, PCI_BASE_ADDRESS_1
, addr
>> 32);
444 ipath_dev_err(dd
, "rewrite of BAR1 "
445 "failed: err %d\n", -ret
);
449 ipath_dev_err(dd
, "BAR is 0 (probable RESET), "
450 "not usable until reboot\n");
456 ret
= pci_request_regions(pdev
, IPATH_DRV_NAME
);
458 dev_info(&pdev
->dev
, "pci_request_regions unit %u fails: "
459 "err %d\n", dd
->ipath_unit
, -ret
);
463 ret
= pci_set_dma_mask(pdev
, DMA_64BIT_MASK
);
466 * if the 64 bit setup fails, try 32 bit. Some systems
467 * do not setup 64 bit maps on systems with 2GB or less
470 ret
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
473 "Unable to set DMA mask for unit %u: %d\n",
474 dd
->ipath_unit
, ret
);
478 ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
479 ret
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
482 "Unable to set DMA consistent mask "
484 dd
->ipath_unit
, ret
);
489 ret
= pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
);
492 "Unable to set DMA consistent mask "
494 dd
->ipath_unit
, ret
);
497 pci_set_master(pdev
);
500 * Save BARs to rewrite after device reset. Save all 64 bits of
503 dd
->ipath_pcibar0
= addr
;
504 dd
->ipath_pcibar1
= addr
>> 32;
505 dd
->ipath_deviceid
= ent
->device
; /* save for later use */
506 dd
->ipath_vendorid
= ent
->vendor
;
508 /* setup the chip-specific functions, as early as possible. */
509 switch (ent
->device
) {
510 case PCI_DEVICE_ID_INFINIPATH_HT
:
512 ipath_init_iba6110_funcs(dd
);
515 ipath_dev_err(dd
, "QLogic HT device 0x%x cannot work if "
516 "CONFIG_HT_IRQ is not enabled\n", ent
->device
);
519 case PCI_DEVICE_ID_INFINIPATH_PE800
:
520 #ifdef CONFIG_PCI_MSI
521 ipath_init_iba6120_funcs(dd
);
524 ipath_dev_err(dd
, "QLogic PCIE device 0x%x cannot work if "
525 "CONFIG_PCI_MSI is not enabled\n", ent
->device
);
529 ipath_dev_err(dd
, "Found unknown QLogic deviceid 0x%x, "
530 "failing\n", ent
->device
);
534 for (j
= 0; j
< 6; j
++) {
535 if (!pdev
->resource
[j
].start
)
537 ipath_cdbg(VERBOSE
, "BAR %d start %llx, end %llx, len %llx\n",
538 j
, (unsigned long long)pdev
->resource
[j
].start
,
539 (unsigned long long)pdev
->resource
[j
].end
,
540 (unsigned long long)pci_resource_len(pdev
, j
));
544 ipath_dev_err(dd
, "No valid address in BAR 0!\n");
549 dd
->ipath_pcirev
= pdev
->revision
;
551 #if defined(__powerpc__)
552 /* There isn't a generic way to specify writethrough mappings */
553 dd
->ipath_kregbase
= __ioremap(addr
, len
,
554 (_PAGE_NO_CACHE
|_PAGE_WRITETHRU
));
556 dd
->ipath_kregbase
= ioremap_nocache(addr
, len
);
559 if (!dd
->ipath_kregbase
) {
560 ipath_dbg("Unable to map io addr %llx to kvirt, failing\n",
565 dd
->ipath_kregend
= (u64 __iomem
*)
566 ((void __iomem
*)dd
->ipath_kregbase
+ len
);
567 dd
->ipath_physaddr
= addr
; /* used for io_remap, etc. */
569 ipath_cdbg(VERBOSE
, "mapped io addr %llx to kregbase %p\n",
570 addr
, dd
->ipath_kregbase
);
573 * clear ipath_flags here instead of in ipath_init_chip as it is set
574 * by ipath_setup_htconfig.
577 dd
->ipath_lli_counter
= 0;
578 dd
->ipath_lli_errors
= 0;
580 if (dd
->ipath_f_bus(dd
, pdev
))
581 ipath_dev_err(dd
, "Failed to setup config space; "
582 "continuing anyway\n");
585 * set up our interrupt handler; IRQF_SHARED probably not needed,
586 * since MSI interrupts shouldn't be shared but won't hurt for now.
587 * check 0 irq after we return from chip-specific bus setup, since
588 * that can affect this due to setup
591 ipath_dev_err(dd
, "irq is 0, BIOS error? Interrupts won't "
594 ret
= request_irq(dd
->ipath_irq
, ipath_intr
, IRQF_SHARED
,
597 ipath_dev_err(dd
, "Couldn't setup irq handler, "
598 "irq=%d: %d\n", dd
->ipath_irq
, ret
);
603 ret
= ipath_init_chip(dd
, 0); /* do the chip-specific init */
607 ret
= ipath_enable_wc(dd
);
610 ipath_dev_err(dd
, "Write combining not enabled "
611 "(err %d): performance may be poor\n",
616 ipath_verify_pioperf(dd
);
618 ipath_device_create_group(&pdev
->dev
, dd
);
619 ipathfs_add_device(dd
);
622 ipath_register_ib_device(dd
);
624 /* Check that card status in STATUS_TIMEOUT seconds. */
625 schedule_delayed_work(&dd
->status_work
, HZ
* STATUS_TIMEOUT
);
630 if (pdev
->irq
) free_irq(pdev
->irq
, dd
);
633 iounmap((volatile void __iomem
*) dd
->ipath_kregbase
);
636 pci_release_regions(pdev
);
639 pci_disable_device(pdev
);
642 ipath_free_devdata(pdev
, dd
);
648 static void __devexit
cleanup_device(struct ipath_devdata
*dd
)
652 if (*dd
->ipath_statusp
& IPATH_STATUS_CHIP_PRESENT
) {
653 /* can't do anything more with chip; needs re-init */
654 *dd
->ipath_statusp
&= ~IPATH_STATUS_CHIP_PRESENT
;
655 if (dd
->ipath_kregbase
) {
657 * if we haven't already cleaned up before these are
658 * to ensure any register reads/writes "fail" until
661 dd
->ipath_kregbase
= NULL
;
662 dd
->ipath_uregbase
= 0;
663 dd
->ipath_sregbase
= 0;
664 dd
->ipath_cregbase
= 0;
665 dd
->ipath_kregsize
= 0;
667 ipath_disable_wc(dd
);
670 if (dd
->ipath_pioavailregs_dma
) {
671 dma_free_coherent(&dd
->pcidev
->dev
, PAGE_SIZE
,
672 (void *) dd
->ipath_pioavailregs_dma
,
673 dd
->ipath_pioavailregs_phys
);
674 dd
->ipath_pioavailregs_dma
= NULL
;
676 if (dd
->ipath_dummy_hdrq
) {
677 dma_free_coherent(&dd
->pcidev
->dev
,
678 dd
->ipath_pd
[0]->port_rcvhdrq_size
,
679 dd
->ipath_dummy_hdrq
, dd
->ipath_dummy_hdrq_phys
);
680 dd
->ipath_dummy_hdrq
= NULL
;
683 if (dd
->ipath_pageshadow
) {
684 struct page
**tmpp
= dd
->ipath_pageshadow
;
685 dma_addr_t
*tmpd
= dd
->ipath_physshadow
;
688 ipath_cdbg(VERBOSE
, "Unlocking any expTID pages still "
690 for (port
= 0; port
< dd
->ipath_cfgports
; port
++) {
691 int port_tidbase
= port
* dd
->ipath_rcvtidcnt
;
692 int maxtid
= port_tidbase
+ dd
->ipath_rcvtidcnt
;
693 for (i
= port_tidbase
; i
< maxtid
; i
++) {
696 pci_unmap_page(dd
->pcidev
, tmpd
[i
],
697 PAGE_SIZE
, PCI_DMA_FROMDEVICE
);
698 ipath_release_user_pages(&tmpp
[i
], 1);
704 ipath_stats
.sps_pageunlocks
+= cnt
;
705 ipath_cdbg(VERBOSE
, "There were still %u expTID "
706 "entries locked\n", cnt
);
708 if (ipath_stats
.sps_pagelocks
||
709 ipath_stats
.sps_pageunlocks
)
710 ipath_cdbg(VERBOSE
, "%llu pages locked, %llu "
711 "unlocked via ipath_m{un}lock\n",
713 ipath_stats
.sps_pagelocks
,
715 ipath_stats
.sps_pageunlocks
);
717 ipath_cdbg(VERBOSE
, "Free shadow page tid array at %p\n",
718 dd
->ipath_pageshadow
);
719 tmpp
= dd
->ipath_pageshadow
;
720 dd
->ipath_pageshadow
= NULL
;
725 * free any resources still in use (usually just kernel ports)
726 * at unload; we do for portcnt, not cfgports, because cfgports
727 * could have changed while we were loaded.
729 for (port
= 0; port
< dd
->ipath_portcnt
; port
++) {
730 struct ipath_portdata
*pd
= dd
->ipath_pd
[port
];
731 dd
->ipath_pd
[port
] = NULL
;
732 ipath_free_pddata(dd
, pd
);
736 * debuggability, in case some cleanup path tries to use it
742 static void __devexit
ipath_remove_one(struct pci_dev
*pdev
)
744 struct ipath_devdata
*dd
= pci_get_drvdata(pdev
);
746 ipath_cdbg(VERBOSE
, "removing, pdev=%p, dd=%p\n", pdev
, dd
);
749 * disable the IB link early, to be sure no new packets arrive, which
750 * complicates the shutdown process
752 ipath_shutdown_device(dd
);
754 cancel_delayed_work(&dd
->status_work
);
755 flush_scheduled_work();
758 ipath_unregister_ib_device(dd
->verbs_dev
);
760 ipath_diag_remove(dd
);
761 ipath_user_remove(dd
);
762 ipathfs_remove_device(dd
);
763 ipath_device_remove_group(&pdev
->dev
, dd
);
765 ipath_cdbg(VERBOSE
, "Releasing pci memory regions, dd %p, "
766 "unit %u\n", dd
, (u32
) dd
->ipath_unit
);
771 * turn off rcv, send, and interrupts for all ports, all drivers
772 * should also hard reset the chip here?
773 * free up port 0 (kernel) rcvhdr, egr bufs, and eventually tid bufs
774 * for all versions of the driver, if they were allocated
777 ipath_cdbg(VERBOSE
, "unit %u free irq %d\n",
778 dd
->ipath_unit
, dd
->ipath_irq
);
779 dd
->ipath_f_free_irq(dd
);
781 ipath_dbg("irq is 0, not doing free_irq "
782 "for unit %u\n", dd
->ipath_unit
);
784 * we check for NULL here, because it's outside
785 * the kregbase check, and we need to call it
786 * after the free_irq. Thus it's possible that
787 * the function pointers were never initialized.
789 if (dd
->ipath_f_cleanup
)
790 /* clean up chip-specific stuff */
791 dd
->ipath_f_cleanup(dd
);
793 ipath_cdbg(VERBOSE
, "Unmapping kregbase %p\n", dd
->ipath_kregbase
);
794 iounmap((volatile void __iomem
*) dd
->ipath_kregbase
);
795 pci_release_regions(pdev
);
796 ipath_cdbg(VERBOSE
, "calling pci_disable_device\n");
797 pci_disable_device(pdev
);
799 ipath_free_devdata(pdev
, dd
);
802 /* general driver use */
803 DEFINE_MUTEX(ipath_mutex
);
805 static DEFINE_SPINLOCK(ipath_pioavail_lock
);
808 * ipath_disarm_piobufs - cancel a range of PIO buffers
809 * @dd: the infinipath device
810 * @first: the first PIO buffer to cancel
811 * @cnt: the number of PIO buffers to cancel
813 * cancel a range of PIO buffers, used when they might be armed, but
814 * not triggered. Used at init to ensure buffer state, and also user
815 * process close, in case it died while writing to a PIO buffer
818 void ipath_disarm_piobufs(struct ipath_devdata
*dd
, unsigned first
,
821 unsigned i
, last
= first
+ cnt
;
824 ipath_cdbg(PKT
, "disarm %u PIObufs first=%u\n", cnt
, first
);
825 for (i
= first
; i
< last
; i
++) {
826 spin_lock_irqsave(&dd
->ipath_sendctrl_lock
, flags
);
828 * The disarm-related bits are write-only, so it
829 * is ok to OR them in with our copy of sendctrl
830 * while we hold the lock.
832 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
833 dd
->ipath_sendctrl
| INFINIPATH_S_DISARM
|
834 (i
<< INFINIPATH_S_DISARMPIOBUF_SHIFT
));
835 /* can't disarm bufs back-to-back per iba7220 spec */
836 ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_scratch
);
837 spin_unlock_irqrestore(&dd
->ipath_sendctrl_lock
, flags
);
841 * Disable PIOAVAILUPD, then re-enable, reading scratch in
842 * between. This seems to avoid a chip timing race that causes
843 * pioavail updates to memory to stop. We xor as we don't
844 * know the state of the bit when we're called.
846 spin_lock_irqsave(&dd
->ipath_sendctrl_lock
, flags
);
847 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
848 dd
->ipath_sendctrl
^ INFINIPATH_S_PIOBUFAVAILUPD
);
849 ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_scratch
);
850 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
852 spin_unlock_irqrestore(&dd
->ipath_sendctrl_lock
, flags
);
856 * ipath_wait_linkstate - wait for an IB link state change to occur
857 * @dd: the infinipath device
858 * @state: the state to wait for
859 * @msecs: the number of milliseconds to wait
861 * wait up to msecs milliseconds for IB link state change to occur for
862 * now, take the easy polling route. Currently used only by
863 * ipath_set_linkstate. Returns 0 if state reached, otherwise
864 * -ETIMEDOUT state can have multiple states set, for any of several
867 int ipath_wait_linkstate(struct ipath_devdata
*dd
, u32 state
, int msecs
)
869 dd
->ipath_state_wanted
= state
;
870 wait_event_interruptible_timeout(ipath_state_wait
,
871 (dd
->ipath_flags
& state
),
872 msecs_to_jiffies(msecs
));
873 dd
->ipath_state_wanted
= 0;
875 if (!(dd
->ipath_flags
& state
)) {
877 ipath_cdbg(VERBOSE
, "Didn't reach linkstate %s within %u"
879 /* test INIT ahead of DOWN, both can be set */
880 (state
& IPATH_LINKINIT
) ? "INIT" :
881 ((state
& IPATH_LINKDOWN
) ? "DOWN" :
882 ((state
& IPATH_LINKARMED
) ? "ARM" : "ACTIVE")),
884 val
= ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_ibcstatus
);
885 ipath_cdbg(VERBOSE
, "ibcc=%llx ibcstatus=%llx (%s)\n",
886 (unsigned long long) ipath_read_kreg64(
887 dd
, dd
->ipath_kregs
->kr_ibcctrl
),
888 (unsigned long long) val
,
889 ipath_ibcstatus_str
[val
& 0xf]);
891 return (dd
->ipath_flags
& state
) ? 0 : -ETIMEDOUT
;
895 * Decode the error status into strings, deciding whether to always
896 * print * it or not depending on "normal packet errors" vs everything
897 * else. Return 1 if "real" errors, otherwise 0 if only packet
898 * errors, so caller can decide what to print with the string.
900 int ipath_decode_err(char *buf
, size_t blen
, ipath_err_t err
)
904 if (err
& INFINIPATH_E_PKTERRS
) {
905 if (!(err
& ~INFINIPATH_E_PKTERRS
))
906 iserr
= 0; // if only packet errors.
907 if (ipath_debug
& __IPATH_ERRPKTDBG
) {
908 if (err
& INFINIPATH_E_REBP
)
909 strlcat(buf
, "EBP ", blen
);
910 if (err
& INFINIPATH_E_RVCRC
)
911 strlcat(buf
, "VCRC ", blen
);
912 if (err
& INFINIPATH_E_RICRC
) {
913 strlcat(buf
, "CRC ", blen
);
914 // clear for check below, so only once
915 err
&= INFINIPATH_E_RICRC
;
917 if (err
& INFINIPATH_E_RSHORTPKTLEN
)
918 strlcat(buf
, "rshortpktlen ", blen
);
919 if (err
& INFINIPATH_E_SDROPPEDDATAPKT
)
920 strlcat(buf
, "sdroppeddatapkt ", blen
);
921 if (err
& INFINIPATH_E_SPKTLEN
)
922 strlcat(buf
, "spktlen ", blen
);
924 if ((err
& INFINIPATH_E_RICRC
) &&
925 !(err
&(INFINIPATH_E_RVCRC
|INFINIPATH_E_REBP
)))
926 strlcat(buf
, "CRC ", blen
);
930 if (err
& INFINIPATH_E_RHDRLEN
)
931 strlcat(buf
, "rhdrlen ", blen
);
932 if (err
& INFINIPATH_E_RBADTID
)
933 strlcat(buf
, "rbadtid ", blen
);
934 if (err
& INFINIPATH_E_RBADVERSION
)
935 strlcat(buf
, "rbadversion ", blen
);
936 if (err
& INFINIPATH_E_RHDR
)
937 strlcat(buf
, "rhdr ", blen
);
938 if (err
& INFINIPATH_E_RLONGPKTLEN
)
939 strlcat(buf
, "rlongpktlen ", blen
);
940 if (err
& INFINIPATH_E_RMAXPKTLEN
)
941 strlcat(buf
, "rmaxpktlen ", blen
);
942 if (err
& INFINIPATH_E_RMINPKTLEN
)
943 strlcat(buf
, "rminpktlen ", blen
);
944 if (err
& INFINIPATH_E_SMINPKTLEN
)
945 strlcat(buf
, "sminpktlen ", blen
);
946 if (err
& INFINIPATH_E_RFORMATERR
)
947 strlcat(buf
, "rformaterr ", blen
);
948 if (err
& INFINIPATH_E_RUNSUPVL
)
949 strlcat(buf
, "runsupvl ", blen
);
950 if (err
& INFINIPATH_E_RUNEXPCHAR
)
951 strlcat(buf
, "runexpchar ", blen
);
952 if (err
& INFINIPATH_E_RIBFLOW
)
953 strlcat(buf
, "ribflow ", blen
);
954 if (err
& INFINIPATH_E_SUNDERRUN
)
955 strlcat(buf
, "sunderrun ", blen
);
956 if (err
& INFINIPATH_E_SPIOARMLAUNCH
)
957 strlcat(buf
, "spioarmlaunch ", blen
);
958 if (err
& INFINIPATH_E_SUNEXPERRPKTNUM
)
959 strlcat(buf
, "sunexperrpktnum ", blen
);
960 if (err
& INFINIPATH_E_SDROPPEDSMPPKT
)
961 strlcat(buf
, "sdroppedsmppkt ", blen
);
962 if (err
& INFINIPATH_E_SMAXPKTLEN
)
963 strlcat(buf
, "smaxpktlen ", blen
);
964 if (err
& INFINIPATH_E_SUNSUPVL
)
965 strlcat(buf
, "sunsupVL ", blen
);
966 if (err
& INFINIPATH_E_INVALIDADDR
)
967 strlcat(buf
, "invalidaddr ", blen
);
968 if (err
& INFINIPATH_E_RRCVEGRFULL
)
969 strlcat(buf
, "rcvegrfull ", blen
);
970 if (err
& INFINIPATH_E_RRCVHDRFULL
)
971 strlcat(buf
, "rcvhdrfull ", blen
);
972 if (err
& INFINIPATH_E_IBSTATUSCHANGED
)
973 strlcat(buf
, "ibcstatuschg ", blen
);
974 if (err
& INFINIPATH_E_RIBLOSTLINK
)
975 strlcat(buf
, "riblostlink ", blen
);
976 if (err
& INFINIPATH_E_HARDWARE
)
977 strlcat(buf
, "hardware ", blen
);
978 if (err
& INFINIPATH_E_RESET
)
979 strlcat(buf
, "reset ", blen
);
985 * get_rhf_errstring - decode RHF errors
986 * @err: the err number
987 * @msg: the output buffer
988 * @len: the length of the output buffer
990 * only used one place now, may want more later
992 static void get_rhf_errstring(u32 err
, char *msg
, size_t len
)
994 /* if no errors, and so don't need to check what's first */
997 if (err
& INFINIPATH_RHF_H_ICRCERR
)
998 strlcat(msg
, "icrcerr ", len
);
999 if (err
& INFINIPATH_RHF_H_VCRCERR
)
1000 strlcat(msg
, "vcrcerr ", len
);
1001 if (err
& INFINIPATH_RHF_H_PARITYERR
)
1002 strlcat(msg
, "parityerr ", len
);
1003 if (err
& INFINIPATH_RHF_H_LENERR
)
1004 strlcat(msg
, "lenerr ", len
);
1005 if (err
& INFINIPATH_RHF_H_MTUERR
)
1006 strlcat(msg
, "mtuerr ", len
);
1007 if (err
& INFINIPATH_RHF_H_IHDRERR
)
1008 /* infinipath hdr checksum error */
1009 strlcat(msg
, "ipathhdrerr ", len
);
1010 if (err
& INFINIPATH_RHF_H_TIDERR
)
1011 strlcat(msg
, "tiderr ", len
);
1012 if (err
& INFINIPATH_RHF_H_MKERR
)
1013 /* bad port, offset, etc. */
1014 strlcat(msg
, "invalid ipathhdr ", len
);
1015 if (err
& INFINIPATH_RHF_H_IBERR
)
1016 strlcat(msg
, "iberr ", len
);
1017 if (err
& INFINIPATH_RHF_L_SWA
)
1018 strlcat(msg
, "swA ", len
);
1019 if (err
& INFINIPATH_RHF_L_SWB
)
1020 strlcat(msg
, "swB ", len
);
1024 * ipath_get_egrbuf - get an eager buffer
1025 * @dd: the infinipath device
1026 * @bufnum: the eager buffer to get
1028 * must only be called if ipath_pd[port] is known to be allocated
1030 static inline void *ipath_get_egrbuf(struct ipath_devdata
*dd
, u32 bufnum
)
1032 return dd
->ipath_port0_skbinfo
?
1033 (void *) dd
->ipath_port0_skbinfo
[bufnum
].skb
->data
: NULL
;
1037 * ipath_alloc_skb - allocate an skb and buffer with possible constraints
1038 * @dd: the infinipath device
1039 * @gfp_mask: the sk_buff SFP mask
1041 struct sk_buff
*ipath_alloc_skb(struct ipath_devdata
*dd
,
1044 struct sk_buff
*skb
;
1048 * Only fully supported way to handle this is to allocate lots
1049 * extra, align as needed, and then do skb_reserve(). That wastes
1050 * a lot of memory... I'll have to hack this into infinipath_copy
1055 * We need 2 extra bytes for ipath_ether data sent in the
1056 * key header. In order to keep everything dword aligned,
1057 * we'll reserve 4 bytes.
1059 len
= dd
->ipath_ibmaxlen
+ 4;
1061 if (dd
->ipath_flags
& IPATH_4BYTE_TID
) {
1062 /* We need a 2KB multiple alignment, and there is no way
1063 * to do it except to allocate extra and then skb_reserve
1064 * enough to bring it up to the right alignment.
1069 skb
= __dev_alloc_skb(len
, gfp_mask
);
1071 ipath_dev_err(dd
, "Failed to allocate skbuff, length %u\n",
1076 skb_reserve(skb
, 4);
1078 if (dd
->ipath_flags
& IPATH_4BYTE_TID
) {
1079 u32 una
= (unsigned long)skb
->data
& 2047;
1081 skb_reserve(skb
, 2048 - una
);
1088 static void ipath_rcv_hdrerr(struct ipath_devdata
*dd
,
1095 struct ipath_message_header
*hdr
;
1097 get_rhf_errstring(eflags
, emsg
, sizeof emsg
);
1098 hdr
= (struct ipath_message_header
*)&rc
[1];
1099 ipath_cdbg(PKT
, "RHFerrs %x hdrqtail=%x typ=%u "
1100 "tlen=%x opcode=%x egridx=%x: %s\n",
1102 ipath_hdrget_rcv_type((__le32
*) rc
),
1103 ipath_hdrget_length_in_bytes((__le32
*) rc
),
1104 be32_to_cpu(hdr
->bth
[0]) >> 24,
1107 /* Count local link integrity errors. */
1108 if (eflags
& (INFINIPATH_RHF_H_ICRCERR
| INFINIPATH_RHF_H_VCRCERR
)) {
1109 u8 n
= (dd
->ipath_ibcctrl
>>
1110 INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT
) &
1111 INFINIPATH_IBCC_PHYERRTHRESHOLD_MASK
;
1113 if (++dd
->ipath_lli_counter
> n
) {
1114 dd
->ipath_lli_counter
= 0;
1115 dd
->ipath_lli_errors
++;
1121 * ipath_kreceive - receive a packet
1122 * @pd: the infinipath port
1124 * called from interrupt handler for errors or receive interrupt
1126 void ipath_kreceive(struct ipath_portdata
*pd
)
1129 struct ipath_devdata
*dd
= pd
->port_dd
;
1131 const u32 rsize
= dd
->ipath_rcvhdrentsize
; /* words */
1132 const u32 maxcnt
= dd
->ipath_rcvhdrcnt
* rsize
; /* words */
1133 u32 etail
= -1, l
, hdrqtail
;
1134 struct ipath_message_header
*hdr
;
1135 u32 eflags
, i
, etype
, tlen
, pkttot
= 0, updegr
=0, reloop
=0;
1136 static u64 totcalls
; /* stats, may eventually remove */
1138 if (!dd
->ipath_hdrqtailptr
) {
1140 "hdrqtailptr not set, can't do receives\n");
1145 hdrqtail
= ipath_get_rcvhdrtail(pd
);
1150 for (i
= 0; l
!= hdrqtail
; i
++) {
1154 rc
= (u64
*) (pd
->port_rcvhdrq
+ (l
<< 2));
1155 hdr
= (struct ipath_message_header
*)&rc
[1];
1157 * could make a network order version of IPATH_KD_QP, and
1158 * do the obvious shift before masking to speed this up.
1160 qp
= ntohl(hdr
->bth
[1]) & 0xffffff;
1161 bthbytes
= (u8
*) hdr
->bth
;
1163 eflags
= ipath_hdrget_err_flags((__le32
*) rc
);
1164 etype
= ipath_hdrget_rcv_type((__le32
*) rc
);
1166 tlen
= ipath_hdrget_length_in_bytes((__le32
*) rc
);
1168 if (etype
!= RCVHQ_RCV_TYPE_EXPECTED
) {
1170 * it turns out that the chips uses an eager buffer
1171 * for all non-expected packets, whether it "needs"
1172 * one or not. So always get the index, but don't
1173 * set ebuf (so we try to copy data) unless the
1174 * length requires it.
1176 etail
= ipath_hdrget_index((__le32
*) rc
);
1177 if (tlen
> sizeof(*hdr
) ||
1178 etype
== RCVHQ_RCV_TYPE_NON_KD
)
1179 ebuf
= ipath_get_egrbuf(dd
, etail
);
1183 * both tiderr and ipathhdrerr are set for all plain IB
1184 * packets; only ipathhdrerr should be set.
1187 if (etype
!= RCVHQ_RCV_TYPE_NON_KD
&& etype
!=
1188 RCVHQ_RCV_TYPE_ERROR
&& ipath_hdrget_ipath_ver(
1189 hdr
->iph
.ver_port_tid_offset
) !=
1190 IPS_PROTO_VERSION
) {
1191 ipath_cdbg(PKT
, "Bad InfiniPath protocol version "
1195 if (unlikely(eflags
))
1196 ipath_rcv_hdrerr(dd
, eflags
, l
, etail
, rc
);
1197 else if (etype
== RCVHQ_RCV_TYPE_NON_KD
) {
1198 ipath_ib_rcv(dd
->verbs_dev
, rc
+ 1, ebuf
, tlen
);
1199 if (dd
->ipath_lli_counter
)
1200 dd
->ipath_lli_counter
--;
1201 ipath_cdbg(PKT
, "typ %x, opcode %x (eager, "
1202 "qp=%x), len %x; ignored\n",
1203 etype
, bthbytes
[0], qp
, tlen
);
1205 else if (etype
== RCVHQ_RCV_TYPE_EAGER
)
1206 ipath_cdbg(PKT
, "typ %x, opcode %x (eager, "
1207 "qp=%x), len %x; ignored\n",
1208 etype
, bthbytes
[0], qp
, tlen
);
1209 else if (etype
== RCVHQ_RCV_TYPE_EXPECTED
)
1210 ipath_dbg("Bug: Expected TID, opcode %x; ignored\n",
1211 be32_to_cpu(hdr
->bth
[0]) & 0xff);
1214 * error packet, type of error unknown.
1215 * Probably type 3, but we don't know, so don't
1216 * even try to print the opcode, etc.
1218 ipath_dbg("Error Pkt, but no eflags! egrbuf %x, "
1219 "len %x\nhdrq@%lx;hdrq+%x rhf: %llx; "
1220 "hdr %llx %llx %llx %llx %llx\n",
1221 etail
, tlen
, (unsigned long) rc
, l
,
1222 (unsigned long long) rc
[0],
1223 (unsigned long long) rc
[1],
1224 (unsigned long long) rc
[2],
1225 (unsigned long long) rc
[3],
1226 (unsigned long long) rc
[4],
1227 (unsigned long long) rc
[5]);
1232 if (etype
!= RCVHQ_RCV_TYPE_EXPECTED
)
1235 * update head regs on last packet, and every 16 packets.
1236 * Reduce bus traffic, while still trying to prevent
1237 * rcvhdrq overflows, for when the queue is nearly full
1239 if (l
== hdrqtail
|| (i
&& !(i
&0xf))) {
1242 /* request IBA6120 interrupt only on last */
1243 lval
= dd
->ipath_rhdrhead_intr_off
| l
;
1246 (void)ipath_write_ureg(dd
, ur_rcvhdrhead
, lval
, 0);
1248 (void)ipath_write_ureg(dd
, ur_rcvegrindexhead
,
1255 if (!dd
->ipath_rhdrhead_intr_off
&& !reloop
) {
1256 /* IBA6110 workaround; we can have a race clearing chip
1257 * interrupt with another interrupt about to be delivered,
1258 * and can clear it before it is delivered on the GPIO
1259 * workaround. By doing the extra check here for the
1260 * in-memory tail register updating while we were doing
1261 * earlier packets, we "almost" guarantee we have covered
1264 u32 hqtail
= ipath_get_rcvhdrtail(pd
);
1265 if (hqtail
!= hdrqtail
) {
1267 reloop
= 1; /* loop 1 extra time at most */
1276 if (pkttot
> ipath_stats
.sps_maxpkts_call
)
1277 ipath_stats
.sps_maxpkts_call
= pkttot
;
1278 ipath_stats
.sps_port0pkts
+= pkttot
;
1279 ipath_stats
.sps_avgpkts_call
=
1280 ipath_stats
.sps_port0pkts
/ ++totcalls
;
1286 * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1287 * @dd: the infinipath device
1289 * called whenever our local copy indicates we have run out of send buffers
1290 * NOTE: This can be called from interrupt context by some code
1291 * and from non-interrupt context by ipath_getpiobuf().
1294 static void ipath_update_pio_bufs(struct ipath_devdata
*dd
)
1296 unsigned long flags
;
1298 const unsigned piobregs
= (unsigned)dd
->ipath_pioavregs
;
1300 /* If the generation (check) bits have changed, then we update the
1301 * busy bit for the corresponding PIO buffer. This algorithm will
1302 * modify positions to the value they already have in some cases
1303 * (i.e., no change), but it's faster than changing only the bits
1304 * that have changed.
1306 * We would like to do this atomicly, to avoid spinlocks in the
1307 * critical send path, but that's not really possible, given the
1308 * type of changes, and that this routine could be called on
1309 * multiple cpu's simultaneously, so we lock in this routine only,
1310 * to avoid conflicting updates; all we change is the shadow, and
1311 * it's a single 64 bit memory location, so by definition the update
1312 * is atomic in terms of what other cpu's can see in testing the
1313 * bits. The spin_lock overhead isn't too bad, since it only
1314 * happens when all buffers are in use, so only cpu overhead, not
1315 * latency or bandwidth is affected.
1317 #define _IPATH_ALL_CHECKBITS 0x5555555555555555ULL
1318 if (!dd
->ipath_pioavailregs_dma
) {
1319 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1322 if (ipath_debug
& __IPATH_VERBDBG
) {
1323 /* only if packet debug and verbose */
1324 volatile __le64
*dma
= dd
->ipath_pioavailregs_dma
;
1325 unsigned long *shadow
= dd
->ipath_pioavailshadow
;
1327 ipath_cdbg(PKT
, "Refill avail, dma0=%llx shad0=%lx, "
1328 "d1=%llx s1=%lx, d2=%llx s2=%lx, d3=%llx "
1330 (unsigned long long) le64_to_cpu(dma
[0]),
1332 (unsigned long long) le64_to_cpu(dma
[1]),
1334 (unsigned long long) le64_to_cpu(dma
[2]),
1336 (unsigned long long) le64_to_cpu(dma
[3]),
1340 PKT
, "2nd group, dma4=%llx shad4=%lx, "
1341 "d5=%llx s5=%lx, d6=%llx s6=%lx, "
1343 (unsigned long long) le64_to_cpu(dma
[4]),
1345 (unsigned long long) le64_to_cpu(dma
[5]),
1347 (unsigned long long) le64_to_cpu(dma
[6]),
1349 (unsigned long long) le64_to_cpu(dma
[7]),
1352 spin_lock_irqsave(&ipath_pioavail_lock
, flags
);
1353 for (i
= 0; i
< piobregs
; i
++) {
1354 u64 pchbusy
, pchg
, piov
, pnew
;
1356 * Chip Errata: bug 6641; even and odd qwords>3 are swapped
1358 if (i
> 3 && (dd
->ipath_flags
& IPATH_SWAP_PIOBUFS
))
1359 piov
= le64_to_cpu(dd
->ipath_pioavailregs_dma
[i
^ 1]);
1361 piov
= le64_to_cpu(dd
->ipath_pioavailregs_dma
[i
]);
1362 pchg
= _IPATH_ALL_CHECKBITS
&
1363 ~(dd
->ipath_pioavailshadow
[i
] ^ piov
);
1364 pchbusy
= pchg
<< INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT
;
1365 if (pchg
&& (pchbusy
& dd
->ipath_pioavailshadow
[i
])) {
1366 pnew
= dd
->ipath_pioavailshadow
[i
] & ~pchbusy
;
1367 pnew
|= piov
& pchbusy
;
1368 dd
->ipath_pioavailshadow
[i
] = pnew
;
1371 spin_unlock_irqrestore(&ipath_pioavail_lock
, flags
);
1375 * ipath_setrcvhdrsize - set the receive header size
1376 * @dd: the infinipath device
1377 * @rhdrsize: the receive header size
1379 * called from user init code, and also layered driver init
1381 int ipath_setrcvhdrsize(struct ipath_devdata
*dd
, unsigned rhdrsize
)
1385 if (dd
->ipath_flags
& IPATH_RCVHDRSZ_SET
) {
1386 if (dd
->ipath_rcvhdrsize
!= rhdrsize
) {
1387 dev_info(&dd
->pcidev
->dev
,
1388 "Error: can't set protocol header "
1389 "size %u, already %u\n",
1390 rhdrsize
, dd
->ipath_rcvhdrsize
);
1393 ipath_cdbg(VERBOSE
, "Reuse same protocol header "
1394 "size %u\n", dd
->ipath_rcvhdrsize
);
1395 } else if (rhdrsize
> (dd
->ipath_rcvhdrentsize
-
1396 (sizeof(u64
) / sizeof(u32
)))) {
1397 ipath_dbg("Error: can't set protocol header size %u "
1398 "(> max %u)\n", rhdrsize
,
1399 dd
->ipath_rcvhdrentsize
-
1400 (u32
) (sizeof(u64
) / sizeof(u32
)));
1403 dd
->ipath_flags
|= IPATH_RCVHDRSZ_SET
;
1404 dd
->ipath_rcvhdrsize
= rhdrsize
;
1405 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_rcvhdrsize
,
1406 dd
->ipath_rcvhdrsize
);
1407 ipath_cdbg(VERBOSE
, "Set protocol header size to %u\n",
1408 dd
->ipath_rcvhdrsize
);
1414 * ipath_getpiobuf - find an available pio buffer
1415 * @dd: the infinipath device
1416 * @pbufnum: the buffer number is placed here
1418 * do appropriate marking as busy, etc.
1419 * returns buffer number if one found (>=0), negative number is error.
1420 * Used by ipath_layer_send
1422 u32 __iomem
*ipath_getpiobuf(struct ipath_devdata
*dd
, u32
* pbufnum
)
1424 int i
, j
, starti
, updated
= 0;
1425 unsigned piobcnt
, iter
;
1426 unsigned long flags
;
1427 unsigned long *shadow
= dd
->ipath_pioavailshadow
;
1430 piobcnt
= (unsigned)(dd
->ipath_piobcnt2k
1431 + dd
->ipath_piobcnt4k
);
1432 starti
= dd
->ipath_lastport_piobuf
;
1433 iter
= piobcnt
- starti
;
1434 if (dd
->ipath_upd_pio_shadow
) {
1436 * Minor optimization. If we had no buffers on last call,
1437 * start out by doing the update; continue and do scan even
1438 * if no buffers were updated, to be paranoid
1440 ipath_update_pio_bufs(dd
);
1441 /* we scanned here, don't do it at end of scan */
1445 i
= dd
->ipath_lastpioindex
;
1449 * while test_and_set_bit() is atomic, we do that and then the
1450 * change_bit(), and the pair is not. See if this is the cause
1451 * of the remaining armlaunch errors.
1453 spin_lock_irqsave(&ipath_pioavail_lock
, flags
);
1454 for (j
= 0; j
< iter
; j
++, i
++) {
1458 * To avoid bus lock overhead, we first find a candidate
1459 * buffer, then do the test and set, and continue if that
1462 if (test_bit((2 * i
) + 1, shadow
) ||
1463 test_and_set_bit((2 * i
) + 1, shadow
))
1465 /* flip generation bit */
1466 change_bit(2 * i
, shadow
);
1469 spin_unlock_irqrestore(&ipath_pioavail_lock
, flags
);
1472 volatile __le64
*dma
= dd
->ipath_pioavailregs_dma
;
1475 * first time through; shadow exhausted, but may be real
1476 * buffers available, so go see; if any updated, rescan
1480 ipath_update_pio_bufs(dd
);
1485 dd
->ipath_upd_pio_shadow
= 1;
1487 * not atomic, but if we lose one once in a while, that's OK
1489 ipath_stats
.sps_nopiobufs
++;
1490 if (!(++dd
->ipath_consec_nopiobuf
% 100000)) {
1492 "%u pio sends with no bufavail; dmacopy: "
1493 "%llx %llx %llx %llx; shadow: "
1494 "%lx %lx %lx %lx\n",
1495 dd
->ipath_consec_nopiobuf
,
1496 (unsigned long long) le64_to_cpu(dma
[0]),
1497 (unsigned long long) le64_to_cpu(dma
[1]),
1498 (unsigned long long) le64_to_cpu(dma
[2]),
1499 (unsigned long long) le64_to_cpu(dma
[3]),
1500 shadow
[0], shadow
[1], shadow
[2],
1503 * 4 buffers per byte, 4 registers above, cover rest
1506 if ((dd
->ipath_piobcnt2k
+ dd
->ipath_piobcnt4k
) >
1507 (sizeof(shadow
[0]) * 4 * 4))
1508 ipath_dbg("2nd group: dmacopy: %llx %llx "
1509 "%llx %llx; shadow: %lx %lx "
1511 (unsigned long long)
1512 le64_to_cpu(dma
[4]),
1513 (unsigned long long)
1514 le64_to_cpu(dma
[5]),
1515 (unsigned long long)
1516 le64_to_cpu(dma
[6]),
1517 (unsigned long long)
1518 le64_to_cpu(dma
[7]),
1519 shadow
[4], shadow
[5],
1520 shadow
[6], shadow
[7]);
1527 * set next starting place. Since it's just an optimization,
1528 * it doesn't matter who wins on this, so no locking
1530 dd
->ipath_lastpioindex
= i
+ 1;
1531 if (dd
->ipath_upd_pio_shadow
)
1532 dd
->ipath_upd_pio_shadow
= 0;
1533 if (dd
->ipath_consec_nopiobuf
)
1534 dd
->ipath_consec_nopiobuf
= 0;
1535 if (i
< dd
->ipath_piobcnt2k
)
1536 buf
= (u32 __iomem
*) (dd
->ipath_pio2kbase
+
1537 i
* dd
->ipath_palign
);
1539 buf
= (u32 __iomem
*)
1540 (dd
->ipath_pio4kbase
+
1541 (i
- dd
->ipath_piobcnt2k
) * dd
->ipath_4kalign
);
1542 ipath_cdbg(VERBOSE
, "Return piobuf%u %uk @ %p\n",
1543 i
, (i
< dd
->ipath_piobcnt2k
) ? 2 : 4, buf
);
1552 * ipath_create_rcvhdrq - create a receive header queue
1553 * @dd: the infinipath device
1554 * @pd: the port data
1556 * this must be contiguous memory (from an i/o perspective), and must be
1557 * DMA'able (which means for some systems, it will go through an IOMMU,
1558 * or be forced into a low address range).
1560 int ipath_create_rcvhdrq(struct ipath_devdata
*dd
,
1561 struct ipath_portdata
*pd
)
1565 if (!pd
->port_rcvhdrq
) {
1566 dma_addr_t phys_hdrqtail
;
1567 gfp_t gfp_flags
= GFP_USER
| __GFP_COMP
;
1568 int amt
= ALIGN(dd
->ipath_rcvhdrcnt
* dd
->ipath_rcvhdrentsize
*
1569 sizeof(u32
), PAGE_SIZE
);
1571 pd
->port_rcvhdrq
= dma_alloc_coherent(
1572 &dd
->pcidev
->dev
, amt
, &pd
->port_rcvhdrq_phys
,
1575 if (!pd
->port_rcvhdrq
) {
1576 ipath_dev_err(dd
, "attempt to allocate %d bytes "
1577 "for port %u rcvhdrq failed\n",
1578 amt
, pd
->port_port
);
1582 pd
->port_rcvhdrtail_kvaddr
= dma_alloc_coherent(
1583 &dd
->pcidev
->dev
, PAGE_SIZE
, &phys_hdrqtail
, GFP_KERNEL
);
1584 if (!pd
->port_rcvhdrtail_kvaddr
) {
1585 ipath_dev_err(dd
, "attempt to allocate 1 page "
1586 "for port %u rcvhdrqtailaddr failed\n",
1589 dma_free_coherent(&dd
->pcidev
->dev
, amt
,
1590 pd
->port_rcvhdrq
, pd
->port_rcvhdrq_phys
);
1591 pd
->port_rcvhdrq
= NULL
;
1594 pd
->port_rcvhdrqtailaddr_phys
= phys_hdrqtail
;
1596 pd
->port_rcvhdrq_size
= amt
;
1598 ipath_cdbg(VERBOSE
, "%d pages at %p (phys %lx) size=%lu "
1599 "for port %u rcvhdr Q\n",
1600 amt
>> PAGE_SHIFT
, pd
->port_rcvhdrq
,
1601 (unsigned long) pd
->port_rcvhdrq_phys
,
1602 (unsigned long) pd
->port_rcvhdrq_size
,
1605 ipath_cdbg(VERBOSE
, "port %d hdrtailaddr, %llx physical\n",
1607 (unsigned long long) phys_hdrqtail
);
1610 ipath_cdbg(VERBOSE
, "reuse port %d rcvhdrq @%p %llx phys; "
1611 "hdrtailaddr@%p %llx physical\n",
1612 pd
->port_port
, pd
->port_rcvhdrq
,
1613 (unsigned long long) pd
->port_rcvhdrq_phys
,
1614 pd
->port_rcvhdrtail_kvaddr
, (unsigned long long)
1615 pd
->port_rcvhdrqtailaddr_phys
);
1617 /* clear for security and sanity on each use */
1618 memset(pd
->port_rcvhdrq
, 0, pd
->port_rcvhdrq_size
);
1619 if (pd
->port_rcvhdrtail_kvaddr
)
1620 memset(pd
->port_rcvhdrtail_kvaddr
, 0, PAGE_SIZE
);
1623 * tell chip each time we init it, even if we are re-using previous
1624 * memory (we zero the register at process close)
1626 ipath_write_kreg_port(dd
, dd
->ipath_kregs
->kr_rcvhdrtailaddr
,
1627 pd
->port_port
, pd
->port_rcvhdrqtailaddr_phys
);
1628 ipath_write_kreg_port(dd
, dd
->ipath_kregs
->kr_rcvhdraddr
,
1629 pd
->port_port
, pd
->port_rcvhdrq_phys
);
1638 * Flush all sends that might be in the ready to send state, as well as any
1639 * that are in the process of being sent. Used whenever we need to be
1640 * sure the send side is idle. Cleans up all buffer state by canceling
1641 * all pio buffers, and issuing an abort, which cleans up anything in the
1642 * launch fifo. The cancel is superfluous on some chip versions, but
1643 * it's safer to always do it.
1644 * PIOAvail bits are updated by the chip as if normal send had happened.
1646 void ipath_cancel_sends(struct ipath_devdata
*dd
, int restore_sendctrl
)
1648 ipath_dbg("Cancelling all in-progress send buffers\n");
1649 dd
->ipath_lastcancel
= jiffies
+HZ
/2; /* skip armlaunch errs a bit */
1651 * the abort bit is auto-clearing. We read scratch to be sure
1652 * that cancels and the abort have taken effect in the chip.
1654 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
1655 INFINIPATH_S_ABORT
);
1656 ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_scratch
);
1657 ipath_disarm_piobufs(dd
, 0,
1658 (unsigned)(dd
->ipath_piobcnt2k
+ dd
->ipath_piobcnt4k
));
1659 if (restore_sendctrl
) /* else done by caller later */
1660 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
1661 dd
->ipath_sendctrl
);
1663 /* and again, be sure all have hit the chip */
1664 ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_scratch
);
1668 static void ipath_set_ib_lstate(struct ipath_devdata
*dd
, int which
)
1670 static const char *what
[4] = {
1672 [INFINIPATH_IBCC_LINKCMD_DOWN
] = "DOWN",
1673 [INFINIPATH_IBCC_LINKCMD_ARMED
] = "ARMED",
1674 [INFINIPATH_IBCC_LINKCMD_ACTIVE
] = "ACTIVE"
1676 int linkcmd
= (which
>> INFINIPATH_IBCC_LINKCMD_SHIFT
) &
1677 INFINIPATH_IBCC_LINKCMD_MASK
;
1679 ipath_cdbg(VERBOSE
, "Trying to move unit %u to %s, current ltstate "
1680 "is %s\n", dd
->ipath_unit
,
1682 ipath_ibcstatus_str
[ipath_ib_linktrstate(dd
,
1683 ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_ibcstatus
))]);
1684 /* flush all queued sends when going to DOWN to be sure that
1685 * they don't block MAD packets */
1686 if (linkcmd
== INFINIPATH_IBCC_LINKCMD_DOWN
)
1687 ipath_cancel_sends(dd
, 1);
1689 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_ibcctrl
,
1690 dd
->ipath_ibcctrl
| which
);
1693 int ipath_set_linkstate(struct ipath_devdata
*dd
, u8 newstate
)
1699 case IPATH_IB_LINKDOWN_ONLY
:
1700 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKCMD_DOWN
<<
1701 INFINIPATH_IBCC_LINKCMD_SHIFT
);
1706 case IPATH_IB_LINKDOWN
:
1707 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKINITCMD_POLL
<<
1708 INFINIPATH_IBCC_LINKINITCMD_SHIFT
);
1713 case IPATH_IB_LINKDOWN_SLEEP
:
1714 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKINITCMD_SLEEP
<<
1715 INFINIPATH_IBCC_LINKINITCMD_SHIFT
);
1720 case IPATH_IB_LINKDOWN_DISABLE
:
1721 ipath_set_ib_lstate(dd
,
1722 INFINIPATH_IBCC_LINKINITCMD_DISABLE
<<
1723 INFINIPATH_IBCC_LINKINITCMD_SHIFT
);
1728 case IPATH_IB_LINKARM
:
1729 if (dd
->ipath_flags
& IPATH_LINKARMED
) {
1733 if (!(dd
->ipath_flags
&
1734 (IPATH_LINKINIT
| IPATH_LINKACTIVE
))) {
1738 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKCMD_ARMED
<<
1739 INFINIPATH_IBCC_LINKCMD_SHIFT
);
1741 * Since the port can transition to ACTIVE by receiving
1742 * a non VL 15 packet, wait for either state.
1744 lstate
= IPATH_LINKARMED
| IPATH_LINKACTIVE
;
1747 case IPATH_IB_LINKACTIVE
:
1748 if (dd
->ipath_flags
& IPATH_LINKACTIVE
) {
1752 if (!(dd
->ipath_flags
& IPATH_LINKARMED
)) {
1756 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKCMD_ACTIVE
<<
1757 INFINIPATH_IBCC_LINKCMD_SHIFT
);
1758 lstate
= IPATH_LINKACTIVE
;
1761 case IPATH_IB_LINK_LOOPBACK
:
1762 dev_info(&dd
->pcidev
->dev
, "Enabling IB local loopback\n");
1763 dd
->ipath_ibcctrl
|= INFINIPATH_IBCC_LOOPBACK
;
1764 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_ibcctrl
,
1767 goto bail
; // no state change to wait for
1769 case IPATH_IB_LINK_EXTERNAL
:
1770 dev_info(&dd
->pcidev
->dev
, "Disabling IB local loopback (normal)\n");
1771 dd
->ipath_ibcctrl
&= ~INFINIPATH_IBCC_LOOPBACK
;
1772 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_ibcctrl
,
1775 goto bail
; // no state change to wait for
1778 ipath_dbg("Invalid linkstate 0x%x requested\n", newstate
);
1782 ret
= ipath_wait_linkstate(dd
, lstate
, 2000);
1789 * ipath_set_mtu - set the MTU
1790 * @dd: the infinipath device
1793 * we can handle "any" incoming size, the issue here is whether we
1794 * need to restrict our outgoing size. For now, we don't do any
1795 * sanity checking on this, and we don't deal with what happens to
1796 * programs that are already running when the size changes.
1797 * NOTE: changing the MTU will usually cause the IBC to go back to
1798 * link initialize (IPATH_IBSTATE_INIT) state...
1800 int ipath_set_mtu(struct ipath_devdata
*dd
, u16 arg
)
1807 * mtu is IB data payload max. It's the largest power of 2 less
1808 * than piosize (or even larger, since it only really controls the
1809 * largest we can receive; we can send the max of the mtu and
1810 * piosize). We check that it's one of the valid IB sizes.
1812 if (arg
!= 256 && arg
!= 512 && arg
!= 1024 && arg
!= 2048 &&
1813 (arg
!= 4096 || !ipath_mtu4096
)) {
1814 ipath_dbg("Trying to set invalid mtu %u, failing\n", arg
);
1818 if (dd
->ipath_ibmtu
== arg
) {
1819 ret
= 0; /* same as current */
1823 piosize
= dd
->ipath_ibmaxlen
;
1824 dd
->ipath_ibmtu
= arg
;
1826 if (arg
>= (piosize
- IPATH_PIO_MAXIBHDR
)) {
1827 /* Only if it's not the initial value (or reset to it) */
1828 if (piosize
!= dd
->ipath_init_ibmaxlen
) {
1829 if (arg
> piosize
&& arg
<= dd
->ipath_init_ibmaxlen
)
1830 piosize
= dd
->ipath_init_ibmaxlen
;
1831 dd
->ipath_ibmaxlen
= piosize
;
1834 } else if ((arg
+ IPATH_PIO_MAXIBHDR
) != dd
->ipath_ibmaxlen
) {
1835 piosize
= arg
+ IPATH_PIO_MAXIBHDR
;
1836 ipath_cdbg(VERBOSE
, "ibmaxlen was 0x%x, setting to 0x%x "
1837 "(mtu 0x%x)\n", dd
->ipath_ibmaxlen
, piosize
,
1839 dd
->ipath_ibmaxlen
= piosize
;
1844 u64 ibc
= dd
->ipath_ibcctrl
, ibdw
;
1846 * update our housekeeping variables, and set IBC max
1847 * size, same as init code; max IBC is max we allow in
1848 * buffer, less the qword pbc, plus 1 for ICRC, in dwords
1850 dd
->ipath_ibmaxlen
= piosize
- 2 * sizeof(u32
);
1851 ibdw
= (dd
->ipath_ibmaxlen
>> 2) + 1;
1852 ibc
&= ~(INFINIPATH_IBCC_MAXPKTLEN_MASK
<<
1853 dd
->ibcc_mpl_shift
);
1854 ibc
|= ibdw
<< dd
->ibcc_mpl_shift
;
1855 dd
->ipath_ibcctrl
= ibc
;
1856 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_ibcctrl
,
1858 dd
->ipath_f_tidtemplate(dd
);
1867 int ipath_set_lid(struct ipath_devdata
*dd
, u32 arg
, u8 lmc
)
1869 dd
->ipath_lid
= arg
;
1870 dd
->ipath_lmc
= lmc
;
1877 * ipath_write_kreg_port - write a device's per-port 64-bit kernel register
1878 * @dd: the infinipath device
1879 * @regno: the register number to write
1880 * @port: the port containing the register
1881 * @value: the value to write
1883 * Registers that vary with the chip implementation constants (port)
1886 void ipath_write_kreg_port(const struct ipath_devdata
*dd
, ipath_kreg regno
,
1887 unsigned port
, u64 value
)
1891 if (port
< dd
->ipath_portcnt
&&
1892 (regno
== dd
->ipath_kregs
->kr_rcvhdraddr
||
1893 regno
== dd
->ipath_kregs
->kr_rcvhdrtailaddr
))
1894 where
= regno
+ port
;
1898 ipath_write_kreg(dd
, where
, value
);
1902 * Following deal with the "obviously simple" task of overriding the state
1903 * of the LEDS, which normally indicate link physical and logical status.
1904 * The complications arise in dealing with different hardware mappings
1905 * and the board-dependent routine being called from interrupts.
1906 * and then there's the requirement to _flash_ them.
1908 #define LED_OVER_FREQ_SHIFT 8
1909 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
1910 /* Below is "non-zero" to force override, but both actual LEDs are off */
1911 #define LED_OVER_BOTH_OFF (8)
1913 static void ipath_run_led_override(unsigned long opaque
)
1915 struct ipath_devdata
*dd
= (struct ipath_devdata
*)opaque
;
1918 u64 lstate
, ltstate
, val
;
1920 if (!(dd
->ipath_flags
& IPATH_INITTED
))
1923 pidx
= dd
->ipath_led_override_phase
++ & 1;
1924 dd
->ipath_led_override
= dd
->ipath_led_override_vals
[pidx
];
1925 timeoff
= dd
->ipath_led_override_timeoff
;
1928 * below potentially restores the LED values per current status,
1929 * should also possibly setup the traffic-blink register,
1930 * but leave that to per-chip functions.
1932 val
= ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_ibcstatus
);
1933 ltstate
= (val
>> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT
) &
1935 lstate
= (val
>> dd
->ibcs_ls_shift
) & INFINIPATH_IBCS_LINKSTATE_MASK
;
1937 dd
->ipath_f_setextled(dd
, lstate
, ltstate
);
1938 mod_timer(&dd
->ipath_led_override_timer
, jiffies
+ timeoff
);
1941 void ipath_set_led_override(struct ipath_devdata
*dd
, unsigned int val
)
1945 if (!(dd
->ipath_flags
& IPATH_INITTED
))
1948 /* First check if we are blinking. If not, use 1HZ polling */
1950 freq
= (val
& LED_OVER_FREQ_MASK
) >> LED_OVER_FREQ_SHIFT
;
1953 /* For blink, set each phase from one nybble of val */
1954 dd
->ipath_led_override_vals
[0] = val
& 0xF;
1955 dd
->ipath_led_override_vals
[1] = (val
>> 4) & 0xF;
1956 timeoff
= (HZ
<< 4)/freq
;
1958 /* Non-blink set both phases the same. */
1959 dd
->ipath_led_override_vals
[0] = val
& 0xF;
1960 dd
->ipath_led_override_vals
[1] = val
& 0xF;
1962 dd
->ipath_led_override_timeoff
= timeoff
;
1965 * If the timer has not already been started, do so. Use a "quick"
1966 * timeout so the function will be called soon, to look at our request.
1968 if (atomic_inc_return(&dd
->ipath_led_override_timer_active
) == 1) {
1969 /* Need to start timer */
1970 init_timer(&dd
->ipath_led_override_timer
);
1971 dd
->ipath_led_override_timer
.function
=
1972 ipath_run_led_override
;
1973 dd
->ipath_led_override_timer
.data
= (unsigned long) dd
;
1974 dd
->ipath_led_override_timer
.expires
= jiffies
+ 1;
1975 add_timer(&dd
->ipath_led_override_timer
);
1977 atomic_dec(&dd
->ipath_led_override_timer_active
);
1982 * ipath_shutdown_device - shut down a device
1983 * @dd: the infinipath device
1985 * This is called to make the device quiet when we are about to
1986 * unload the driver, and also when the device is administratively
1987 * disabled. It does not free any data structures.
1988 * Everything it does has to be setup again by ipath_init_chip(dd,1)
1990 void ipath_shutdown_device(struct ipath_devdata
*dd
)
1992 unsigned long flags
;
1994 ipath_dbg("Shutting down the device\n");
1996 ipath_hol_up(dd
); /* make sure user processes aren't suspended */
1998 dd
->ipath_flags
|= IPATH_LINKUNK
;
1999 dd
->ipath_flags
&= ~(IPATH_INITTED
| IPATH_LINKDOWN
|
2000 IPATH_LINKINIT
| IPATH_LINKARMED
|
2002 *dd
->ipath_statusp
&= ~(IPATH_STATUS_IB_CONF
|
2003 IPATH_STATUS_IB_READY
);
2005 /* mask interrupts, but not errors */
2006 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intmask
, 0ULL);
2008 dd
->ipath_rcvctrl
= 0;
2009 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_rcvctrl
,
2013 * gracefully stop all sends allowing any in progress to trickle out
2016 spin_lock_irqsave(&dd
->ipath_sendctrl_lock
, flags
);
2017 dd
->ipath_sendctrl
= 0;
2018 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
, dd
->ipath_sendctrl
);
2020 ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_scratch
);
2021 spin_unlock_irqrestore(&dd
->ipath_sendctrl_lock
, flags
);
2024 * enough for anything that's going to trickle out to have actually
2029 ipath_set_ib_lstate(dd
, INFINIPATH_IBCC_LINKINITCMD_DISABLE
<<
2030 INFINIPATH_IBCC_LINKINITCMD_SHIFT
);
2031 ipath_cancel_sends(dd
, 0);
2033 signal_ib_event(dd
, IB_EVENT_PORT_ERR
);
2036 dd
->ipath_control
&= ~INFINIPATH_C_LINKENABLE
;
2037 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_control
,
2038 dd
->ipath_control
| INFINIPATH_C_FREEZEMODE
);
2041 * clear SerdesEnable and turn the leds off; do this here because
2042 * we are unloading, so don't count on interrupts to move along
2043 * Turn the LEDs off explictly for the same reason.
2045 dd
->ipath_f_quiet_serdes(dd
);
2047 /* stop all the timers that might still be running */
2048 del_timer_sync(&dd
->ipath_hol_timer
);
2049 if (dd
->ipath_stats_timer_active
) {
2050 del_timer_sync(&dd
->ipath_stats_timer
);
2051 dd
->ipath_stats_timer_active
= 0;
2055 * clear all interrupts and errors, so that the next time the driver
2056 * is loaded or device is enabled, we know that whatever is set
2057 * happened while we were unloaded
2059 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_hwerrclear
,
2060 ~0ULL & ~INFINIPATH_HWE_MEMBISTFAILED
);
2061 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_errorclear
, -1LL);
2062 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intclear
, -1LL);
2064 ipath_cdbg(VERBOSE
, "Flush time and errors to EEPROM\n");
2065 ipath_update_eeprom_log(dd
);
2069 * ipath_free_pddata - free a port's allocated data
2070 * @dd: the infinipath device
2071 * @pd: the portdata structure
2073 * free up any allocated data for a port
2074 * This should not touch anything that would affect a simultaneous
2075 * re-allocation of port data, because it is called after ipath_mutex
2076 * is released (and can be called from reinit as well).
2077 * It should never change any chip state, or global driver state.
2078 * (The only exception to global state is freeing the port0 port0_skbs.)
2080 void ipath_free_pddata(struct ipath_devdata
*dd
, struct ipath_portdata
*pd
)
2085 if (pd
->port_rcvhdrq
) {
2086 ipath_cdbg(VERBOSE
, "free closed port %d rcvhdrq @ %p "
2087 "(size=%lu)\n", pd
->port_port
, pd
->port_rcvhdrq
,
2088 (unsigned long) pd
->port_rcvhdrq_size
);
2089 dma_free_coherent(&dd
->pcidev
->dev
, pd
->port_rcvhdrq_size
,
2090 pd
->port_rcvhdrq
, pd
->port_rcvhdrq_phys
);
2091 pd
->port_rcvhdrq
= NULL
;
2092 if (pd
->port_rcvhdrtail_kvaddr
) {
2093 dma_free_coherent(&dd
->pcidev
->dev
, PAGE_SIZE
,
2094 pd
->port_rcvhdrtail_kvaddr
,
2095 pd
->port_rcvhdrqtailaddr_phys
);
2096 pd
->port_rcvhdrtail_kvaddr
= NULL
;
2099 if (pd
->port_port
&& pd
->port_rcvegrbuf
) {
2102 for (e
= 0; e
< pd
->port_rcvegrbuf_chunks
; e
++) {
2103 void *base
= pd
->port_rcvegrbuf
[e
];
2104 size_t size
= pd
->port_rcvegrbuf_size
;
2106 ipath_cdbg(VERBOSE
, "egrbuf free(%p, %lu), "
2107 "chunk %u/%u\n", base
,
2108 (unsigned long) size
,
2109 e
, pd
->port_rcvegrbuf_chunks
);
2110 dma_free_coherent(&dd
->pcidev
->dev
, size
,
2111 base
, pd
->port_rcvegrbuf_phys
[e
]);
2113 kfree(pd
->port_rcvegrbuf
);
2114 pd
->port_rcvegrbuf
= NULL
;
2115 kfree(pd
->port_rcvegrbuf_phys
);
2116 pd
->port_rcvegrbuf_phys
= NULL
;
2117 pd
->port_rcvegrbuf_chunks
= 0;
2118 } else if (pd
->port_port
== 0 && dd
->ipath_port0_skbinfo
) {
2120 struct ipath_skbinfo
*skbinfo
= dd
->ipath_port0_skbinfo
;
2122 dd
->ipath_port0_skbinfo
= NULL
;
2123 ipath_cdbg(VERBOSE
, "free closed port %d "
2124 "ipath_port0_skbinfo @ %p\n", pd
->port_port
,
2126 for (e
= 0; e
< dd
->ipath_rcvegrcnt
; e
++)
2127 if (skbinfo
[e
].skb
) {
2128 pci_unmap_single(dd
->pcidev
, skbinfo
[e
].phys
,
2130 PCI_DMA_FROMDEVICE
);
2131 dev_kfree_skb(skbinfo
[e
].skb
);
2135 kfree(pd
->port_tid_pg_list
);
2136 vfree(pd
->subport_uregbase
);
2137 vfree(pd
->subport_rcvegrbuf
);
2138 vfree(pd
->subport_rcvhdr_base
);
2142 static int __init
infinipath_init(void)
2146 if (ipath_debug
& __IPATH_DBG
)
2147 printk(KERN_INFO DRIVER_LOAD_MSG
"%s", ib_ipath_version
);
2150 * These must be called before the driver is registered with
2151 * the PCI subsystem.
2153 idr_init(&unit_table
);
2154 if (!idr_pre_get(&unit_table
, GFP_KERNEL
)) {
2159 ret
= pci_register_driver(&ipath_driver
);
2161 printk(KERN_ERR IPATH_DRV_NAME
2162 ": Unable to register driver: error %d\n", -ret
);
2166 ret
= ipath_init_ipathfs();
2168 printk(KERN_ERR IPATH_DRV_NAME
": Unable to create "
2169 "ipathfs: error %d\n", -ret
);
2176 pci_unregister_driver(&ipath_driver
);
2179 idr_destroy(&unit_table
);
2185 static void __exit
infinipath_cleanup(void)
2187 ipath_exit_ipathfs();
2189 ipath_cdbg(VERBOSE
, "Unregistering pci driver\n");
2190 pci_unregister_driver(&ipath_driver
);
2192 idr_destroy(&unit_table
);
2196 * ipath_reset_device - reset the chip if possible
2197 * @unit: the device to reset
2199 * Whether or not reset is successful, we attempt to re-initialize the chip
2200 * (that is, much like a driver unload/reload). We clear the INITTED flag
2201 * so that the various entry points will fail until we reinitialize. For
2202 * now, we only allow this if no user ports are open that use chip resources
2204 int ipath_reset_device(int unit
)
2207 struct ipath_devdata
*dd
= ipath_lookup(unit
);
2214 if (atomic_read(&dd
->ipath_led_override_timer_active
)) {
2215 /* Need to stop LED timer, _then_ shut off LEDs */
2216 del_timer_sync(&dd
->ipath_led_override_timer
);
2217 atomic_set(&dd
->ipath_led_override_timer_active
, 0);
2220 /* Shut off LEDs after we are sure timer is not running */
2221 dd
->ipath_led_override
= LED_OVER_BOTH_OFF
;
2222 dd
->ipath_f_setextled(dd
, 0, 0);
2224 dev_info(&dd
->pcidev
->dev
, "Reset on unit %u requested\n", unit
);
2226 if (!dd
->ipath_kregbase
|| !(dd
->ipath_flags
& IPATH_PRESENT
)) {
2227 dev_info(&dd
->pcidev
->dev
, "Invalid unit number %u or "
2228 "not initialized or not present\n", unit
);
2234 for (i
= 1; i
< dd
->ipath_cfgports
; i
++) {
2235 if (dd
->ipath_pd
[i
] && dd
->ipath_pd
[i
]->port_cnt
) {
2236 ipath_dbg("unit %u port %d is in use "
2237 "(PID %u cmd %s), can't reset\n",
2239 dd
->ipath_pd
[i
]->port_pid
,
2240 dd
->ipath_pd
[i
]->port_comm
);
2246 dd
->ipath_flags
&= ~IPATH_INITTED
;
2247 ret
= dd
->ipath_f_reset(dd
);
2249 ipath_dbg("reset was not successful\n");
2250 ipath_dbg("Trying to reinitialize unit %u after reset attempt\n",
2252 ret
= ipath_init_chip(dd
, 1);
2254 ipath_dev_err(dd
, "Reinitialize unit %u after "
2255 "reset failed with %d\n", unit
, ret
);
2257 dev_info(&dd
->pcidev
->dev
, "Reinitialized unit %u after "
2258 "resetting\n", unit
);
2265 * send a signal to all the processes that have the driver open
2266 * through the normal interfaces (i.e., everything other than diags
2267 * interface). Returns number of signalled processes.
2269 static int ipath_signal_procs(struct ipath_devdata
*dd
, int sig
)
2271 int i
, sub
, any
= 0;
2276 for (i
= 1; i
< dd
->ipath_cfgports
; i
++) {
2277 if (!dd
->ipath_pd
[i
] || !dd
->ipath_pd
[i
]->port_cnt
||
2278 !dd
->ipath_pd
[i
]->port_pid
)
2280 pid
= dd
->ipath_pd
[i
]->port_pid
;
2281 dev_info(&dd
->pcidev
->dev
, "context %d in use "
2282 "(PID %u), sending signal %d\n",
2284 kill_proc(pid
, sig
, 1);
2286 for (sub
= 0; sub
< INFINIPATH_MAX_SUBPORT
; sub
++) {
2287 pid
= dd
->ipath_pd
[i
]->port_subpid
[sub
];
2290 dev_info(&dd
->pcidev
->dev
, "sub-context "
2291 "%d:%d in use (PID %u), sending "
2292 "signal %d\n", i
, sub
, pid
, sig
);
2293 kill_proc(pid
, sig
, 1);
2300 static void ipath_hol_signal_down(struct ipath_devdata
*dd
)
2302 if (ipath_signal_procs(dd
, SIGSTOP
))
2303 ipath_dbg("Stopped some processes\n");
2304 ipath_cancel_sends(dd
, 1);
2308 static void ipath_hol_signal_up(struct ipath_devdata
*dd
)
2310 if (ipath_signal_procs(dd
, SIGCONT
))
2311 ipath_dbg("Continued some processes\n");
2315 * link is down, stop any users processes, and flush pending sends
2316 * to prevent HoL blocking, then start the HoL timer that
2317 * periodically continues, then stop procs, so they can detect
2318 * link down if they want, and do something about it.
2319 * Timer may already be running, so use __mod_timer, not add_timer.
2321 void ipath_hol_down(struct ipath_devdata
*dd
)
2323 dd
->ipath_hol_state
= IPATH_HOL_DOWN
;
2324 ipath_hol_signal_down(dd
);
2325 dd
->ipath_hol_next
= IPATH_HOL_DOWNCONT
;
2326 dd
->ipath_hol_timer
.expires
= jiffies
+
2327 msecs_to_jiffies(ipath_hol_timeout_ms
);
2328 __mod_timer(&dd
->ipath_hol_timer
, dd
->ipath_hol_timer
.expires
);
2332 * link is up, continue any user processes, and ensure timer
2333 * is a nop, if running. Let timer keep running, if set; it
2334 * will nop when it sees the link is up
2336 void ipath_hol_up(struct ipath_devdata
*dd
)
2338 ipath_hol_signal_up(dd
);
2339 dd
->ipath_hol_state
= IPATH_HOL_UP
;
2343 * toggle the running/not running state of user proceses
2344 * to prevent HoL blocking on chip resources, but still allow
2345 * user processes to do link down special case handling.
2346 * Should only be called via the timer
2348 void ipath_hol_event(unsigned long opaque
)
2350 struct ipath_devdata
*dd
= (struct ipath_devdata
*)opaque
;
2352 if (dd
->ipath_hol_next
== IPATH_HOL_DOWNSTOP
2353 && dd
->ipath_hol_state
!= IPATH_HOL_UP
) {
2354 dd
->ipath_hol_next
= IPATH_HOL_DOWNCONT
;
2355 ipath_dbg("Stopping processes\n");
2356 ipath_hol_signal_down(dd
);
2357 } else { /* may do "extra" if also in ipath_hol_up() */
2358 dd
->ipath_hol_next
= IPATH_HOL_DOWNSTOP
;
2359 ipath_dbg("Continuing processes\n");
2360 ipath_hol_signal_up(dd
);
2362 if (dd
->ipath_hol_state
== IPATH_HOL_UP
)
2363 ipath_dbg("link's up, don't resched timer\n");
2365 dd
->ipath_hol_timer
.expires
= jiffies
+
2366 msecs_to_jiffies(ipath_hol_timeout_ms
);
2367 __mod_timer(&dd
->ipath_hol_timer
,
2368 dd
->ipath_hol_timer
.expires
);
2372 int ipath_set_rx_pol_inv(struct ipath_devdata
*dd
, u8 new_pol_inv
)
2375 if ( new_pol_inv
> INFINIPATH_XGXS_RX_POL_MASK
) {
2378 if ( dd
->ipath_rx_pol_inv
!= new_pol_inv
) {
2379 dd
->ipath_rx_pol_inv
= new_pol_inv
;
2380 val
= ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_xgxsconfig
);
2381 val
&= ~(INFINIPATH_XGXS_RX_POL_MASK
<<
2382 INFINIPATH_XGXS_RX_POL_SHIFT
);
2383 val
|= ((u64
)dd
->ipath_rx_pol_inv
) <<
2384 INFINIPATH_XGXS_RX_POL_SHIFT
;
2385 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_xgxsconfig
, val
);
2391 * Disable and enable the armlaunch error. Used for PIO bandwidth testing on
2392 * the 7220, which is count-based, rather than trigger-based. Safe for the
2393 * driver check, since it's at init. Not completely safe when used for
2394 * user-mode checking, since some error checking can be lost, but not
2395 * particularly risky, and only has problematic side-effects in the face of
2396 * very buggy user code. There is no reference counting, but that's also
2397 * fine, given the intended use.
2399 void ipath_enable_armlaunch(struct ipath_devdata
*dd
)
2401 dd
->ipath_lasterror
&= ~INFINIPATH_E_SPIOARMLAUNCH
;
2402 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_errorclear
,
2403 INFINIPATH_E_SPIOARMLAUNCH
);
2404 dd
->ipath_errormask
|= INFINIPATH_E_SPIOARMLAUNCH
;
2405 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_errormask
,
2406 dd
->ipath_errormask
);
2409 void ipath_disable_armlaunch(struct ipath_devdata
*dd
)
2411 /* so don't re-enable if already set */
2412 dd
->ipath_maskederrs
&= ~INFINIPATH_E_SPIOARMLAUNCH
;
2413 dd
->ipath_errormask
&= ~INFINIPATH_E_SPIOARMLAUNCH
;
2414 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_errormask
,
2415 dd
->ipath_errormask
);
2418 module_init(infinipath_init
);
2419 module_exit(infinipath_cleanup
);