Merge git://git.infradead.org/battery-2.6
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / infiniband / hw / ehca / ehca_classes.h
1 /*
2 * IBM eServer eHCA Infiniband device driver for Linux on POWER
3 *
4 * Struct definition for eHCA internal structures
5 *
6 * Authors: Heiko J Schick <schickhj@de.ibm.com>
7 * Christoph Raisch <raisch@de.ibm.com>
8 * Joachim Fenkes <fenkes@de.ibm.com>
9 *
10 * Copyright (c) 2005 IBM Corporation
11 *
12 * All rights reserved.
13 *
14 * This source code is distributed under a dual license of GPL v2.0 and OpenIB
15 * BSD.
16 *
17 * OpenIB BSD License
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions are met:
21 *
22 * Redistributions of source code must retain the above copyright notice, this
23 * list of conditions and the following disclaimer.
24 *
25 * Redistributions in binary form must reproduce the above copyright notice,
26 * this list of conditions and the following disclaimer in the documentation
27 * and/or other materials
28 * provided with the distribution.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
31 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
34 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
37 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
38 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 * POSSIBILITY OF SUCH DAMAGE.
41 */
42
43 #ifndef __EHCA_CLASSES_H__
44 #define __EHCA_CLASSES_H__
45
46 struct ehca_module;
47 struct ehca_qp;
48 struct ehca_cq;
49 struct ehca_eq;
50 struct ehca_mr;
51 struct ehca_mw;
52 struct ehca_pd;
53 struct ehca_av;
54
55 #include <linux/wait.h>
56
57 #include <rdma/ib_verbs.h>
58 #include <rdma/ib_user_verbs.h>
59
60 #ifdef CONFIG_PPC64
61 #include "ehca_classes_pSeries.h"
62 #endif
63 #include "ipz_pt_fn.h"
64 #include "ehca_qes.h"
65 #include "ehca_irq.h"
66
67 #define EHCA_EQE_CACHE_SIZE 20
68
69 struct ehca_eqe_cache_entry {
70 struct ehca_eqe *eqe;
71 struct ehca_cq *cq;
72 };
73
74 struct ehca_eq {
75 u32 length;
76 struct ipz_queue ipz_queue;
77 struct ipz_eq_handle ipz_eq_handle;
78 struct work_struct work;
79 struct h_galpas galpas;
80 int is_initialized;
81 struct ehca_pfeq pf;
82 spinlock_t spinlock;
83 struct tasklet_struct interrupt_task;
84 u32 ist;
85 spinlock_t irq_spinlock;
86 struct ehca_eqe_cache_entry eqe_cache[EHCA_EQE_CACHE_SIZE];
87 };
88
89 struct ehca_sma_attr {
90 u16 lid, lmc, sm_sl, sm_lid;
91 u16 pkey_tbl_len, pkeys[16];
92 };
93
94 struct ehca_sport {
95 struct ib_cq *ibcq_aqp1;
96 struct ib_qp *ibqp_aqp1;
97 enum ib_rate rate;
98 enum ib_port_state port_state;
99 struct ehca_sma_attr saved_attr;
100 };
101
102 #define HCA_CAP_MR_PGSIZE_4K 1
103 #define HCA_CAP_MR_PGSIZE_64K 2
104 #define HCA_CAP_MR_PGSIZE_1M 4
105 #define HCA_CAP_MR_PGSIZE_16M 8
106
107 struct ehca_shca {
108 struct ib_device ib_device;
109 struct ibmebus_dev *ibmebus_dev;
110 u8 num_ports;
111 int hw_level;
112 struct list_head shca_list;
113 struct ipz_adapter_handle ipz_hca_handle;
114 struct ehca_sport sport[2];
115 struct ehca_eq eq;
116 struct ehca_eq neq;
117 struct ehca_mr *maxmr;
118 struct ehca_pd *pd;
119 struct h_galpas galpas;
120 struct mutex modify_mutex;
121 u64 hca_cap;
122 /* MR pgsize: bit 0-3 means 4K, 64K, 1M, 16M respectively */
123 u32 hca_cap_mr_pgsize;
124 int max_mtu;
125 };
126
127 struct ehca_pd {
128 struct ib_pd ib_pd;
129 struct ipz_pd fw_pd;
130 u32 ownpid;
131 /* small queue mgmt */
132 struct mutex lock;
133 struct list_head free[2];
134 struct list_head full[2];
135 };
136
137 enum ehca_ext_qp_type {
138 EQPT_NORMAL = 0,
139 EQPT_LLQP = 1,
140 EQPT_SRQBASE = 2,
141 EQPT_SRQ = 3,
142 };
143
144 struct ehca_qp {
145 union {
146 struct ib_qp ib_qp;
147 struct ib_srq ib_srq;
148 };
149 u32 qp_type;
150 enum ehca_ext_qp_type ext_type;
151 struct ipz_queue ipz_squeue;
152 struct ipz_queue ipz_rqueue;
153 struct h_galpas galpas;
154 u32 qkey;
155 u32 real_qp_num;
156 u32 token;
157 spinlock_t spinlock_s;
158 spinlock_t spinlock_r;
159 u32 sq_max_inline_data_size;
160 struct ipz_qp_handle ipz_qp_handle;
161 struct ehca_pfqp pf;
162 struct ib_qp_init_attr init_attr;
163 struct ehca_cq *send_cq;
164 struct ehca_cq *recv_cq;
165 unsigned int sqerr_purgeflag;
166 struct hlist_node list_entries;
167 /* mmap counter for resources mapped into user space */
168 u32 mm_count_squeue;
169 u32 mm_count_rqueue;
170 u32 mm_count_galpa;
171 };
172
173 #define IS_SRQ(qp) (qp->ext_type == EQPT_SRQ)
174 #define HAS_SQ(qp) (qp->ext_type != EQPT_SRQ)
175 #define HAS_RQ(qp) (qp->ext_type != EQPT_SRQBASE)
176
177 /* must be power of 2 */
178 #define QP_HASHTAB_LEN 8
179
180 struct ehca_cq {
181 struct ib_cq ib_cq;
182 struct ipz_queue ipz_queue;
183 struct h_galpas galpas;
184 spinlock_t spinlock;
185 u32 cq_number;
186 u32 token;
187 u32 nr_of_entries;
188 struct ipz_cq_handle ipz_cq_handle;
189 struct ehca_pfcq pf;
190 spinlock_t cb_lock;
191 struct hlist_head qp_hashtab[QP_HASHTAB_LEN];
192 struct list_head entry;
193 u32 nr_callbacks; /* #events assigned to cpu by scaling code */
194 atomic_t nr_events; /* #events seen */
195 wait_queue_head_t wait_completion;
196 spinlock_t task_lock;
197 u32 ownpid;
198 /* mmap counter for resources mapped into user space */
199 u32 mm_count_queue;
200 u32 mm_count_galpa;
201 };
202
203 enum ehca_mr_flag {
204 EHCA_MR_FLAG_FMR = 0x80000000, /* FMR, created with ehca_alloc_fmr */
205 EHCA_MR_FLAG_MAXMR = 0x40000000, /* max-MR */
206 };
207
208 struct ehca_mr {
209 union {
210 struct ib_mr ib_mr; /* must always be first in ehca_mr */
211 struct ib_fmr ib_fmr; /* must always be first in ehca_mr */
212 } ib;
213 struct ib_umem *umem;
214 spinlock_t mrlock;
215
216 enum ehca_mr_flag flags;
217 u32 num_kpages; /* number of kernel pages */
218 u32 num_hwpages; /* number of hw pages to form MR */
219 u64 hwpage_size; /* hw page size used for this MR */
220 int acl; /* ACL (stored here for usage in reregister) */
221 u64 *start; /* virtual start address (stored here for */
222 /* usage in reregister) */
223 u64 size; /* size (stored here for usage in reregister) */
224 u32 fmr_page_size; /* page size for FMR */
225 u32 fmr_max_pages; /* max pages for FMR */
226 u32 fmr_max_maps; /* max outstanding maps for FMR */
227 u32 fmr_map_cnt; /* map counter for FMR */
228 /* fw specific data */
229 struct ipz_mrmw_handle ipz_mr_handle; /* MR handle for h-calls */
230 struct h_galpas galpas;
231 };
232
233 struct ehca_mw {
234 struct ib_mw ib_mw; /* gen2 mw, must always be first in ehca_mw */
235 spinlock_t mwlock;
236
237 u8 never_bound; /* indication MW was never bound */
238 struct ipz_mrmw_handle ipz_mw_handle; /* MW handle for h-calls */
239 struct h_galpas galpas;
240 };
241
242 enum ehca_mr_pgi_type {
243 EHCA_MR_PGI_PHYS = 1, /* type of ehca_reg_phys_mr,
244 * ehca_rereg_phys_mr,
245 * ehca_reg_internal_maxmr */
246 EHCA_MR_PGI_USER = 2, /* type of ehca_reg_user_mr */
247 EHCA_MR_PGI_FMR = 3 /* type of ehca_map_phys_fmr */
248 };
249
250 struct ehca_mr_pginfo {
251 enum ehca_mr_pgi_type type;
252 u64 num_kpages;
253 u64 kpage_cnt;
254 u64 hwpage_size; /* hw page size used for this MR */
255 u64 num_hwpages; /* number of hw pages */
256 u64 hwpage_cnt; /* counter for hw pages */
257 u64 next_hwpage; /* next hw page in buffer/chunk/listelem */
258
259 union {
260 struct { /* type EHCA_MR_PGI_PHYS section */
261 int num_phys_buf;
262 struct ib_phys_buf *phys_buf_array;
263 u64 next_buf;
264 } phy;
265 struct { /* type EHCA_MR_PGI_USER section */
266 struct ib_umem *region;
267 struct ib_umem_chunk *next_chunk;
268 u64 next_nmap;
269 } usr;
270 struct { /* type EHCA_MR_PGI_FMR section */
271 u64 fmr_pgsize;
272 u64 *page_list;
273 u64 next_listelem;
274 } fmr;
275 } u;
276 };
277
278 /* output parameters for MR/FMR hipz calls */
279 struct ehca_mr_hipzout_parms {
280 struct ipz_mrmw_handle handle;
281 u32 lkey;
282 u32 rkey;
283 u64 len;
284 u64 vaddr;
285 u32 acl;
286 };
287
288 /* output parameters for MW hipz calls */
289 struct ehca_mw_hipzout_parms {
290 struct ipz_mrmw_handle handle;
291 u32 rkey;
292 };
293
294 struct ehca_av {
295 struct ib_ah ib_ah;
296 struct ehca_ud_av av;
297 };
298
299 struct ehca_ucontext {
300 struct ib_ucontext ib_ucontext;
301 };
302
303 int ehca_init_pd_cache(void);
304 void ehca_cleanup_pd_cache(void);
305 int ehca_init_cq_cache(void);
306 void ehca_cleanup_cq_cache(void);
307 int ehca_init_qp_cache(void);
308 void ehca_cleanup_qp_cache(void);
309 int ehca_init_av_cache(void);
310 void ehca_cleanup_av_cache(void);
311 int ehca_init_mrmw_cache(void);
312 void ehca_cleanup_mrmw_cache(void);
313 int ehca_init_small_qp_cache(void);
314 void ehca_cleanup_small_qp_cache(void);
315
316 extern rwlock_t ehca_qp_idr_lock;
317 extern rwlock_t ehca_cq_idr_lock;
318 extern struct idr ehca_qp_idr;
319 extern struct idr ehca_cq_idr;
320
321 extern int ehca_static_rate;
322 extern int ehca_port_act_time;
323 extern int ehca_use_hp_mr;
324 extern int ehca_scaling_code;
325 extern int ehca_mr_largepage;
326
327 struct ipzu_queue_resp {
328 u32 qe_size; /* queue entry size */
329 u32 act_nr_of_sg;
330 u32 queue_length; /* queue length allocated in bytes */
331 u32 pagesize;
332 u32 toggle_state;
333 u32 offset; /* save offset within a page for small_qp */
334 };
335
336 struct ehca_create_cq_resp {
337 u32 cq_number;
338 u32 token;
339 struct ipzu_queue_resp ipz_queue;
340 };
341
342 struct ehca_create_qp_resp {
343 u32 qp_num;
344 u32 token;
345 u32 qp_type;
346 u32 ext_type;
347 u32 qkey;
348 /* qp_num assigned by ehca: sqp0/1 may have got different numbers */
349 u32 real_qp_num;
350 u32 dummy; /* padding for 8 byte alignment */
351 struct ipzu_queue_resp ipz_squeue;
352 struct ipzu_queue_resp ipz_rqueue;
353 };
354
355 struct ehca_alloc_cq_parms {
356 u32 nr_cqe;
357 u32 act_nr_of_entries;
358 u32 act_pages;
359 struct ipz_eq_handle eq_handle;
360 };
361
362 enum ehca_service_type {
363 ST_RC = 0,
364 ST_UC = 1,
365 ST_RD = 2,
366 ST_UD = 3,
367 };
368
369 enum ehca_ll_comp_flags {
370 LLQP_SEND_COMP = 0x20,
371 LLQP_RECV_COMP = 0x40,
372 LLQP_COMP_MASK = 0x60,
373 };
374
375 struct ehca_alloc_queue_parms {
376 /* input parameters */
377 int max_wr;
378 int max_sge;
379 int page_size;
380 int is_small;
381
382 /* output parameters */
383 u16 act_nr_wqes;
384 u8 act_nr_sges;
385 u32 queue_size; /* bytes for small queues, pages otherwise */
386 };
387
388 struct ehca_alloc_qp_parms {
389 struct ehca_alloc_queue_parms squeue;
390 struct ehca_alloc_queue_parms rqueue;
391
392 /* input parameters */
393 enum ehca_service_type servicetype;
394 int qp_storage;
395 int sigtype;
396 enum ehca_ext_qp_type ext_type;
397 enum ehca_ll_comp_flags ll_comp_flags;
398 int ud_av_l_key_ctl;
399
400 u32 token;
401 struct ipz_eq_handle eq_handle;
402 struct ipz_pd pd;
403 struct ipz_cq_handle send_cq_handle, recv_cq_handle;
404
405 u32 srq_qpn, srq_token, srq_limit;
406
407 /* output parameters */
408 u32 real_qp_num;
409 struct ipz_qp_handle qp_handle;
410 struct h_galpas galpas;
411 };
412
413 int ehca_cq_assign_qp(struct ehca_cq *cq, struct ehca_qp *qp);
414 int ehca_cq_unassign_qp(struct ehca_cq *cq, unsigned int qp_num);
415 struct ehca_qp *ehca_cq_get_qp(struct ehca_cq *cq, int qp_num);
416
417 #endif