drivers/ide/pci/opti621.c

   1 /*
   2  *  Copyright (C) 1996-1998  Linus Torvalds & authors (see below)
   3  */
   4
   5 /*
   6  * Authors:
   7  * Jaromir Koutek <miri@punknet.cz>,
   8  * Jan Harkes <jaharkes@cwi.nl>,
   9  * Mark Lord <mlord@pobox.com>
  10  * Some parts of code are from ali14xx.c and from rz1000.c.
  11  *
  12  * OPTi is trademark of OPTi, Octek is trademark of Octek.
  13  *
  14  * I used docs from OPTi databook, from ftp.opti.com, file 9123-0002.ps
  15  * and disassembled/traced setupvic.exe (DOS program).
  16  * It increases kernel code about 2 kB.
  17  * I don't have this card no more, but I hope I can get some in case
  18  * of needed development.
  19  * My card is Octek PIDE 1.01 (on card) or OPTiViC (program).
  20  * It has a place for a secondary connector in circuit, but nothing
  21  * is there. Also BIOS says no address for
  22  * secondary controller (see bellow in ide_init_opti621).
  23  * I've only tested this on my system, which only has one disk.
  24  * It's Western Digital WDAC2850, with PIO mode 3. The PCI bus
  25  * is at 20 MHz (I have DX2/80, I tried PCI at 40, but I got random
  26  * lockups). I tried the OCTEK double speed CD-ROM and
  27  * it does not work! But I can't boot DOS also, so it's probably
  28  * hardware fault. I have connected Conner 80MB, the Seagate 850MB (no
  29  * problems) and Seagate 1GB (as slave, WD as master). My experiences
  30  * with the third, 1GB drive: I got 3MB/s (hdparm), but sometimes
  31  * it slows to about 100kB/s! I don't know why and I have
  32  * not this drive now, so I can't try it again.
  33  * I write this driver because I lost the paper ("manual") with
  34  * settings of jumpers on the card and I have to boot Linux with
  35  * Loadlin except LILO, cause I have to run the setupvic.exe program
  36  * already or I get disk errors (my test: rpm -Vf
  37  * /usr/X11R6/bin/XF86_SVGA - or any big file).
  38  * Some numbers from hdparm -t /dev/hda:
  39  * Timing buffer-cache reads:   32 MB in  3.02 seconds =10.60 MB/sec
  40  * Timing buffered disk reads:  16 MB in  5.52 seconds = 2.90 MB/sec
  41  * I have 4 Megs/s before, but I don't know why (maybe changes
  42  * in hdparm test).
  43  * After release of 0.1, I got some successful reports, so it might work.
  44  *
  45  * The main problem with OPTi is that some timings for master
  46  * and slave must be the same. For example, if you have master
  47  * PIO 3 and slave PIO 0, driver have to set some timings of
  48  * master for PIO 0. Second problem is that opti621_set_pio_mode
  49  * got only one drive to set, but have to set both drives.
  50  * This is solved in compute_pios. If you don't set
  51  * the second drive, compute_pios use ide_get_best_pio_mode
  52  * for autoselect mode (you can change it to PIO 0, if you want).
  53  * If you then set the second drive to another PIO, the old value
  54  * (automatically selected) will be overrided by yours.
  55  * There is a 25/33MHz switch in configuration
  56  * register, but driver is written for use at any frequency.
  57  *
  58  * Version 0.1, Nov 8, 1996
  59  * by Jaromir Koutek, for 2.1.8.
  60  * Initial version of driver.
  61  *
  62  * Version 0.2
  63  * Number 0.2 skipped.
  64  *
  65  * Version 0.3, Nov 29, 1997
  66  * by Mark Lord (probably), for 2.1.68
  67  * Updates for use with new IDE block driver.
  68  *
  69  * Version 0.4, Dec 14, 1997
  70  * by Jan Harkes
  71  * Fixed some errors and cleaned the code.
  72  *
  73  * Version 0.5, Jan 2, 1998
  74  * by Jaromir Koutek
  75  * Updates for use with (again) new IDE block driver.
  76  * Update of documentation.
  77  *
  78  * Version 0.6, Jan 2, 1999
  79  * by Jaromir Koutek
  80  * Reversed to version 0.3 of the driver, because
  81  * 0.5 doesn't work.
  82  */
  83
  84 #define OPTI621_DEBUG           /* define for debug messages */
  85
  86 #include <linux/types.h>
  87 #include <linux/module.h>
  88 #include <linux/kernel.h>
  89 #include <linux/pci.h>
  90 #include <linux/hdreg.h>
  91 #include <linux/ide.h>
  92
  93 #include <asm/io.h>
  94
  95 //#define OPTI621_MAX_PIO 3
  96 /* In fact, I do not have any PIO 4 drive
  97  * (address: 25 ns, data: 70 ns, recovery: 35 ns),
  98  * but OPTi 82C621 is programmable and it can do (minimal values):
  99  * on 40MHz PCI bus (pulse 25 ns):
 100  *  address: 25 ns, data: 25 ns, recovery: 50 ns;
 101  * on 20MHz PCI bus (pulse 50 ns):
 102  *  address: 50 ns, data: 50 ns, recovery: 100 ns.
 103  */
 104
 105 /* #define READ_PREFETCH 0 */
 106 /* Uncomment for disable read prefetch.
 107  * There is some readprefetch capatibility in hdparm,
 108  * but when I type hdparm -P 1 /dev/hda, I got errors
 109  * and till reset drive is inaccessible.
 110  * This (hw) read prefetch is safe on my drive.
 111  */
 112
 113 #ifndef READ_PREFETCH
 114 #define READ_PREFETCH 0x40 /* read prefetch is enabled */
 115 #endif /* else read prefetch is disabled */
 116
 117 #define READ_REG 0      /* index of Read cycle timing register */
 118 #define WRITE_REG 1     /* index of Write cycle timing register */
 119 #define CNTRL_REG 3     /* index of Control register */
 120 #define STRAP_REG 5     /* index of Strap register */
 121 #define MISC_REG 6      /* index of Miscellaneous register */
 122
 123 static int reg_base;
 124
 125 #define PIO_NOT_EXIST 254
 126 #define PIO_DONT_KNOW 255
 127
 128 static DEFINE_SPINLOCK(opti621_lock);
 129
 130 /* there are stored pio numbers from other calls of opti621_set_pio_mode */
 131 static void compute_pios(ide_drive_t *drive, const u8 pio)
 132 /* Store values into drive->drive_data
 133  *      second_contr - 0 for primary controller, 1 for secondary
 134  *      slave_drive - 0 -> pio is for master, 1 -> pio is for slave
 135  *      pio - PIO mode for selected drive (for other we don't know)
 136  */
 137 {
 138         int d;
 139         ide_hwif_t *hwif = HWIF(drive);
 140
 141         drive->drive_data = pio;
 142
 143         for (d = 0; d < 2; ++d) {
 144                 drive = &hwif->drives[d];
 145                 if (drive->present) {
 146                         if (drive->drive_data == PIO_DONT_KNOW)
 147                                 drive->drive_data = ide_get_best_pio_mode(drive, 255, 3);
 148 #ifdef OPTI621_DEBUG
 149                         printk("%s: Selected PIO mode %d\n",
 150                                 drive->name, drive->drive_data);
 151 #endif
 152                 } else {
 153                         drive->drive_data = PIO_NOT_EXIST;
 154                 }
 155         }
 156 }
 157
 158 static int cmpt_clk(int time, int bus_speed)
 159 /* Returns (rounded up) time in clocks for time in ns,
 160  * with bus_speed in MHz.
 161  * Example: bus_speed = 40 MHz, time = 80 ns
 162  * 1000/40 = 25 ns (clk value),
 163  * 80/25 = 3.2, rounded up to 4 (I hope ;-)).
 164  * Use idebus=xx to select right frequency.
 165  */
 166 {
 167         return ((time*bus_speed+999)/1000);
 168 }
 169
 170 /* Write value to register reg, base of register
 171  * is at reg_base (0x1f0 primary, 0x170 secondary,
 172  * if not changed by PCI configuration).
 173  * This is from setupvic.exe program.
 174  */
 175 static void write_reg(u8 value, int reg)
 176 {
 177         inw(reg_base + 1);
 178         inw(reg_base + 1);
 179         outb(3, reg_base + 2);
 180         outb(value, reg_base + reg);
 181         outb(0x83, reg_base + 2);
 182 }
 183
 184 /* Read value from register reg, base of register
 185  * is at reg_base (0x1f0 primary, 0x170 secondary,
 186  * if not changed by PCI configuration).
 187  * This is from setupvic.exe program.
 188  */
 189 static u8 read_reg(int reg)
 190 {
 191         u8 ret = 0;
 192
 193         inw(reg_base + 1);
 194         inw(reg_base + 1);
 195         outb(3, reg_base + 2);
 196         ret = inb(reg_base + reg);
 197         outb(0x83, reg_base + 2);
 198
 199         return ret;
 200 }
 201
 202 typedef struct pio_clocks_s {
 203         int     address_time;   /* Address setup (clocks) */
 204         int     data_time;      /* Active/data pulse (clocks) */
 205         int     recovery_time;  /* Recovery time (clocks) */
 206 } pio_clocks_t;
 207
 208 static void compute_clocks(int pio, pio_clocks_t *clks)
 209 {
 210         if (pio != PIO_NOT_EXIST) {
 211                 int adr_setup, data_pls;
 212                 int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
 213
 214                 adr_setup = ide_pio_timings[pio].setup_time;
 215                 data_pls = ide_pio_timings[pio].active_time;
 216                 clks->address_time = cmpt_clk(adr_setup, bus_speed);
 217                 clks->data_time = cmpt_clk(data_pls, bus_speed);
 218                 clks->recovery_time = cmpt_clk(ide_pio_timings[pio].cycle_time
 219                         - adr_setup-data_pls, bus_speed);
 220                 if (clks->address_time < 1)
 221                         clks->address_time = 1;
 222                 if (clks->address_time > 4)
 223                         clks->address_time = 4;
 224                 if (clks->data_time < 1)
 225                         clks->data_time = 1;
 226                 if (clks->data_time > 16)
 227                         clks->data_time = 16;
 228                 if (clks->recovery_time < 2)
 229                         clks->recovery_time = 2;
 230                 if (clks->recovery_time > 17)
 231                         clks->recovery_time = 17;
 232         } else {
 233                 clks->address_time = 1;
 234                 clks->data_time = 1;
 235                 clks->recovery_time = 2;
 236                 /* minimal values */
 237         }
 238 }
 239
 240 static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
 241 {
 242         /* primary and secondary drives share some registers,
 243          * so we have to program both drives
 244          */
 245         unsigned long flags;
 246         u8 pio1 = 0, pio2 = 0;
 247         pio_clocks_t first, second;
 248         int ax, drdy;
 249         u8 cycle1, cycle2, misc;
 250         ide_hwif_t *hwif = HWIF(drive);
 251
 252         /* sets drive->drive_data for both drives */
 253         compute_pios(drive, pio);
 254         pio1 = hwif->drives[0].drive_data;
 255         pio2 = hwif->drives[1].drive_data;
 256
 257         compute_clocks(pio1, &first);
 258         compute_clocks(pio2, &second);
 259
 260         /* ax = max(a1,a2) */
 261         ax = (first.address_time < second.address_time) ? second.address_time : first.address_time;
 262
 263         drdy = 2; /* DRDY is default 2 (by OPTi Databook) */
 264
 265         cycle1 = ((first.data_time-1)<<4)  | (first.recovery_time-2);
 266         cycle2 = ((second.data_time-1)<<4) | (second.recovery_time-2);
 267         misc = READ_PREFETCH | ((ax-1)<<4) | ((drdy-2)<<1);
 268
 269 #ifdef OPTI621_DEBUG
 270         printk("%s: master: address: %d, data: %d, "
 271                 "recovery: %d, drdy: %d [clk]\n",
 272                 hwif->name, ax, first.data_time,
 273                 first.recovery_time, drdy);
 274         printk("%s: slave:  address: %d, data: %d, "
 275                 "recovery: %d, drdy: %d [clk]\n",
 276                 hwif->name, ax, second.data_time,
 277                 second.recovery_time, drdy);
 278 #endif
 279
 280         spin_lock_irqsave(&opti621_lock, flags);
 281
 282         reg_base = hwif->io_ports.data_addr;
 283
 284         /* allow Register-B */
 285         outb(0xc0, reg_base + CNTRL_REG);
 286         /* hmm, setupvic.exe does this ;-) */
 287         outb(0xff, reg_base + 5);
 288         /* if reads 0xff, adapter not exist? */
 289         (void)inb(reg_base + CNTRL_REG);
 290         /* if reads 0xc0, no interface exist? */
 291         read_reg(CNTRL_REG);
 292         /* read version, probably 0 */
 293         read_reg(STRAP_REG);
 294
 295         /* program primary drive */
 296         /* select Index-0 for Register-A */
 297         write_reg(0, MISC_REG);
 298         /* set read cycle timings */
 299         write_reg(cycle1, READ_REG);
 300         /* set write cycle timings */
 301         write_reg(cycle1, WRITE_REG);
 302
 303         /* program secondary drive */
 304         /* select Index-1 for Register-B */
 305         write_reg(1, MISC_REG);
 306         /* set read cycle timings */
 307         write_reg(cycle2, READ_REG);
 308         /* set write cycle timings */
 309         write_reg(cycle2, WRITE_REG);
 310
 311         /* use Register-A for drive 0 */
 312         /* use Register-B for drive 1 */
 313         write_reg(0x85, CNTRL_REG);
 314
 315         /* set address setup, DRDY timings,   */
 316         /*  and read prefetch for both drives */
 317         write_reg(misc, MISC_REG);
 318
 319         spin_unlock_irqrestore(&opti621_lock, flags);
 320 }
 321
 322 static void __devinit opti621_port_init_devs(ide_hwif_t *hwif)
 323 {
 324         hwif->drives[0].drive_data = PIO_DONT_KNOW;
 325         hwif->drives[1].drive_data = PIO_DONT_KNOW;
 326 }
 327
 328 static const struct ide_port_ops opti621_port_ops = {
 329         .port_init_devs         = opti621_port_init_devs,
 330         .set_pio_mode           = opti621_set_pio_mode,
 331 };
 332
 333 static const struct ide_port_info opti621_chipsets[] __devinitdata = {
 334         {       /* 0 */
 335                 .name           = "OPTI621",
 336                 .enablebits     = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
 337                 .port_ops       = &opti621_port_ops,
 338                 .host_flags     = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
 339                 .pio_mask       = ATA_PIO3,
 340                 .swdma_mask     = ATA_SWDMA2,
 341                 .mwdma_mask     = ATA_MWDMA2,
 342         }, {    /* 1 */
 343                 .name           = "OPTI621X",
 344                 .enablebits     = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
 345                 .port_ops       = &opti621_port_ops,
 346                 .host_flags     = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
 347                 .pio_mask       = ATA_PIO3,
 348                 .swdma_mask     = ATA_SWDMA2,
 349                 .mwdma_mask     = ATA_MWDMA2,
 350         }
 351 };
 352
 353 static int __devinit opti621_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 354 {
 355         return ide_setup_pci_device(dev, &opti621_chipsets[id->driver_data]);
 356 }
 357
 358 static const struct pci_device_id opti621_pci_tbl[] = {
 359         { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
 360         { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 },
 361         { 0, },
 362 };
 363 MODULE_DEVICE_TABLE(pci, opti621_pci_tbl);
 364
 365 static struct pci_driver driver = {
 366         .name           = "Opti621_IDE",
 367         .id_table       = opti621_pci_tbl,
 368         .probe          = opti621_init_one,
 369 };
 370
 371 static int __init opti621_ide_init(void)
 372 {
 373         return ide_pci_register_driver(&driver);
 374 }
 375
 376 module_init(opti621_ide_init);
 377
 378 MODULE_AUTHOR("Jaromir Koutek, Jan Harkes, Mark Lord");
 379 MODULE_DESCRIPTION("PCI driver module for Opti621 IDE");
 380 MODULE_LICENSE("GPL");