drivers/ide/pci/atiixp.c

   1 /*
   2  *  linux/drivers/ide/pci/atiixp.c      Version 0.05    Nov 9 2007
   3  *
   4  *  Copyright (C) 2003 ATI Inc. <hyu@ati.com>
   5  *  Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz
   6  */
   7
   8 #include <linux/types.h>
   9 #include <linux/module.h>
  10 #include <linux/kernel.h>
  11 #include <linux/ioport.h>
  12 #include <linux/pci.h>
  13 #include <linux/hdreg.h>
  14 #include <linux/ide.h>
  15 #include <linux/delay.h>
  16 #include <linux/init.h>
  17
  18 #include <asm/io.h>
  19
  20 #define ATIIXP_IDE_PIO_TIMING           0x40
  21 #define ATIIXP_IDE_MDMA_TIMING          0x44
  22 #define ATIIXP_IDE_PIO_CONTROL          0x48
  23 #define ATIIXP_IDE_PIO_MODE             0x4a
  24 #define ATIIXP_IDE_UDMA_CONTROL         0x54
  25 #define ATIIXP_IDE_UDMA_MODE            0x56
  26
  27 typedef struct {
  28         u8 command_width;
  29         u8 recover_width;
  30 } atiixp_ide_timing;
  31
  32 static atiixp_ide_timing pio_timing[] = {
  33         { 0x05, 0x0d },
  34         { 0x04, 0x07 },
  35         { 0x03, 0x04 },
  36         { 0x02, 0x02 },
  37         { 0x02, 0x00 },
  38 };
  39
  40 static atiixp_ide_timing mdma_timing[] = {
  41         { 0x07, 0x07 },
  42         { 0x02, 0x01 },
  43         { 0x02, 0x00 },
  44 };
  45
  46 static DEFINE_SPINLOCK(atiixp_lock);
  47
  48 /**
  49  *      atiixp_set_pio_mode     -       set host controller for PIO mode
  50  *      @drive: drive
  51  *      @pio: PIO mode number
  52  *
  53  *      Set the interface PIO mode.
  54  */
  55
  56 static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio)
  57 {
  58         struct pci_dev *dev = drive->hwif->pci_dev;
  59         unsigned long flags;
  60         int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
  61         u32 pio_timing_data;
  62         u16 pio_mode_data;
  63
  64         spin_lock_irqsave(&atiixp_lock, flags);
  65
  66         pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
  67         pio_mode_data &= ~(0x07 << (drive->dn * 4));
  68         pio_mode_data |= (pio << (drive->dn * 4));
  69         pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
  70
  71         pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
  72         pio_timing_data &= ~(0xff << timing_shift);
  73         pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) |
  74                  (pio_timing[pio].command_width << (timing_shift + 4));
  75         pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
  76
  77         spin_unlock_irqrestore(&atiixp_lock, flags);
  78 }
  79
  80 /**
  81  *      atiixp_set_dma_mode     -       set host controller for DMA mode
  82  *      @drive: drive
  83  *      @speed: DMA mode
  84  *
  85  *      Set a ATIIXP host controller to the desired DMA mode.  This involves
  86  *      programming the right timing data into the PCI configuration space.
  87  */
  88
  89 static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed)
  90 {
  91         struct pci_dev *dev = drive->hwif->pci_dev;
  92         unsigned long flags;
  93         int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
  94         u32 tmp32;
  95         u16 tmp16;
  96         u16 udma_ctl = 0;
  97
  98         spin_lock_irqsave(&atiixp_lock, flags);
  99
 100         pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &udma_ctl);
 101
 102         if (speed >= XFER_UDMA_0) {
 103                 pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
 104                 tmp16 &= ~(0x07 << (drive->dn * 4));
 105                 tmp16 |= ((speed & 0x07) << (drive->dn * 4));
 106                 pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
 107
 108                 udma_ctl |= (1 << drive->dn);
 109         } else if (speed >= XFER_MW_DMA_0) {
 110                 u8 i = speed & 0x03;
 111
 112                 pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
 113                 tmp32 &= ~(0xff << timing_shift);
 114                 tmp32 |= (mdma_timing[i].recover_width << timing_shift) |
 115                          (mdma_timing[i].command_width << (timing_shift + 4));
 116                 pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
 117
 118                 udma_ctl &= ~(1 << drive->dn);
 119         }
 120
 121         pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, udma_ctl);
 122
 123         spin_unlock_irqrestore(&atiixp_lock, flags);
 124 }
 125
 126 /**
 127  *      init_hwif_atiixp                -       fill in the hwif for the ATIIXP
 128  *      @hwif: IDE interface
 129  *
 130  *      Set up the ide_hwif_t for the ATIIXP interface according to the
 131  *      capabilities of the hardware.
 132  */
 133
 134 static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
 135 {
 136         u8 udma_mode = 0;
 137         u8 ch = hwif->channel;
 138         struct pci_dev *pdev = hwif->pci_dev;
 139
 140         hwif->set_pio_mode = &atiixp_set_pio_mode;
 141         hwif->set_dma_mode = &atiixp_set_dma_mode;
 142
 143         if (!hwif->dma_base)
 144                 return;
 145
 146         pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode);
 147
 148         if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40)
 149                 hwif->cbl = ATA_CBL_PATA80;
 150         else
 151                 hwif->cbl = ATA_CBL_PATA40;
 152 }
 153
 154 static const struct ide_port_info atiixp_pci_info[] __devinitdata = {
 155         {       /* 0 */
 156                 .name           = "ATIIXP",
 157                 .init_hwif      = init_hwif_atiixp,
 158                 .enablebits     = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
 159                 .host_flags     = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE,
 160                 .pio_mask       = ATA_PIO4,
 161                 .mwdma_mask     = ATA_MWDMA2,
 162                 .udma_mask      = ATA_UDMA5,
 163         },{     /* 1 */
 164                 .name           = "SB600_PATA",
 165                 .init_hwif      = init_hwif_atiixp,
 166                 .enablebits     = {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
 167                 .host_flags     = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS |
 168                                   IDE_HFLAG_BOOTABLE,
 169                 .pio_mask       = ATA_PIO4,
 170                 .mwdma_mask     = ATA_MWDMA2,
 171                 .udma_mask      = ATA_UDMA5,
 172         },
 173 };
 174
 175 /**
 176  *      atiixp_init_one -       called when a ATIIXP is found
 177  *      @dev: the atiixp device
 178  *      @id: the matching pci id
 179  *
 180  *      Called when the PCI registration layer (or the IDE initialization)
 181  *      finds a device matching our IDE device tables.
 182  */
 183
 184 static int __devinit atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 185 {
 186         return ide_setup_pci_device(dev, &atiixp_pci_info[id->driver_data]);
 187 }
 188
 189 static const struct pci_device_id atiixp_pci_tbl[] = {
 190         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), 0 },
 191         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), 0 },
 192         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), 0 },
 193         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), 1 },
 194         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), 0 },
 195         { 0, },
 196 };
 197 MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
 198
 199 static struct pci_driver driver = {
 200         .name           = "ATIIXP_IDE",
 201         .id_table       = atiixp_pci_tbl,
 202         .probe          = atiixp_init_one,
 203 };
 204
 205 static int __init atiixp_ide_init(void)
 206 {
 207         return ide_pci_register_driver(&driver);
 208 }
 209
 210 module_init(atiixp_ide_init);
 211
 212 MODULE_AUTHOR("HUI YU");
 213 MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
 214 MODULE_LICENSE("GPL");