2 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
3 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
7 #include <linux/module.h>
8 #include <linux/types.h>
10 #include <linux/delay.h>
11 #include <linux/hdreg.h>
12 #include <linux/ide.h>
13 #include <linux/init.h>
17 struct chipset_bus_clock_list_entry
{
23 static const struct chipset_bus_clock_list_entry aec6xxx_33_base
[] = {
24 { XFER_UDMA_6
, 0x31, 0x07 },
25 { XFER_UDMA_5
, 0x31, 0x06 },
26 { XFER_UDMA_4
, 0x31, 0x05 },
27 { XFER_UDMA_3
, 0x31, 0x04 },
28 { XFER_UDMA_2
, 0x31, 0x03 },
29 { XFER_UDMA_1
, 0x31, 0x02 },
30 { XFER_UDMA_0
, 0x31, 0x01 },
32 { XFER_MW_DMA_2
, 0x31, 0x00 },
33 { XFER_MW_DMA_1
, 0x31, 0x00 },
34 { XFER_MW_DMA_0
, 0x0a, 0x00 },
35 { XFER_PIO_4
, 0x31, 0x00 },
36 { XFER_PIO_3
, 0x33, 0x00 },
37 { XFER_PIO_2
, 0x08, 0x00 },
38 { XFER_PIO_1
, 0x0a, 0x00 },
39 { XFER_PIO_0
, 0x00, 0x00 },
43 static const struct chipset_bus_clock_list_entry aec6xxx_34_base
[] = {
44 { XFER_UDMA_6
, 0x41, 0x06 },
45 { XFER_UDMA_5
, 0x41, 0x05 },
46 { XFER_UDMA_4
, 0x41, 0x04 },
47 { XFER_UDMA_3
, 0x41, 0x03 },
48 { XFER_UDMA_2
, 0x41, 0x02 },
49 { XFER_UDMA_1
, 0x41, 0x01 },
50 { XFER_UDMA_0
, 0x41, 0x01 },
52 { XFER_MW_DMA_2
, 0x41, 0x00 },
53 { XFER_MW_DMA_1
, 0x42, 0x00 },
54 { XFER_MW_DMA_0
, 0x7a, 0x00 },
55 { XFER_PIO_4
, 0x41, 0x00 },
56 { XFER_PIO_3
, 0x43, 0x00 },
57 { XFER_PIO_2
, 0x78, 0x00 },
58 { XFER_PIO_1
, 0x7a, 0x00 },
59 { XFER_PIO_0
, 0x70, 0x00 },
64 ((struct chipset_bus_clock_list_entry *) pci_get_drvdata((D)))
68 * TO DO: active tuning and correction of cards without a bios.
70 static u8
pci_bus_clock_list (u8 speed
, struct chipset_bus_clock_list_entry
* chipset_table
)
72 for ( ; chipset_table
->xfer_speed
; chipset_table
++)
73 if (chipset_table
->xfer_speed
== speed
) {
74 return chipset_table
->chipset_settings
;
76 return chipset_table
->chipset_settings
;
79 static u8
pci_bus_clock_list_ultra (u8 speed
, struct chipset_bus_clock_list_entry
* chipset_table
)
81 for ( ; chipset_table
->xfer_speed
; chipset_table
++)
82 if (chipset_table
->xfer_speed
== speed
) {
83 return chipset_table
->ultra_settings
;
85 return chipset_table
->ultra_settings
;
88 static void aec6210_set_mode(ide_drive_t
*drive
, const u8 speed
)
90 ide_hwif_t
*hwif
= HWIF(drive
);
91 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
93 u8 ultra
= 0, ultra_conf
= 0;
94 u8 tmp0
= 0, tmp1
= 0, tmp2
= 0;
97 local_irq_save(flags
);
98 /* 0x40|(2*drive->dn): Active, 0x41|(2*drive->dn): Recovery */
99 pci_read_config_word(dev
, 0x40|(2*drive
->dn
), &d_conf
);
100 tmp0
= pci_bus_clock_list(speed
, BUSCLOCK(dev
));
101 d_conf
= ((tmp0
& 0xf0) << 4) | (tmp0
& 0xf);
102 pci_write_config_word(dev
, 0x40|(2*drive
->dn
), d_conf
);
106 pci_read_config_byte(dev
, 0x54, &ultra
);
107 tmp1
= ((0x00 << (2*drive
->dn
)) | (ultra
& ~(3 << (2*drive
->dn
))));
108 ultra_conf
= pci_bus_clock_list_ultra(speed
, BUSCLOCK(dev
));
109 tmp2
= ((ultra_conf
<< (2*drive
->dn
)) | (tmp1
& ~(3 << (2*drive
->dn
))));
110 pci_write_config_byte(dev
, 0x54, tmp2
);
111 local_irq_restore(flags
);
114 static void aec6260_set_mode(ide_drive_t
*drive
, const u8 speed
)
116 ide_hwif_t
*hwif
= HWIF(drive
);
117 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
118 u8 unit
= (drive
->select
.b
.unit
& 0x01);
119 u8 tmp1
= 0, tmp2
= 0;
120 u8 ultra
= 0, drive_conf
= 0, ultra_conf
= 0;
123 local_irq_save(flags
);
124 /* high 4-bits: Active, low 4-bits: Recovery */
125 pci_read_config_byte(dev
, 0x40|drive
->dn
, &drive_conf
);
126 drive_conf
= pci_bus_clock_list(speed
, BUSCLOCK(dev
));
127 pci_write_config_byte(dev
, 0x40|drive
->dn
, drive_conf
);
129 pci_read_config_byte(dev
, (0x44|hwif
->channel
), &ultra
);
130 tmp1
= ((0x00 << (4*unit
)) | (ultra
& ~(7 << (4*unit
))));
131 ultra_conf
= pci_bus_clock_list_ultra(speed
, BUSCLOCK(dev
));
132 tmp2
= ((ultra_conf
<< (4*unit
)) | (tmp1
& ~(7 << (4*unit
))));
133 pci_write_config_byte(dev
, (0x44|hwif
->channel
), tmp2
);
134 local_irq_restore(flags
);
137 static void aec_set_pio_mode(ide_drive_t
*drive
, const u8 pio
)
139 drive
->hwif
->set_dma_mode(drive
, pio
+ XFER_PIO_0
);
142 static unsigned int __devinit
init_chipset_aec62xx(struct pci_dev
*dev
, const char *name
)
144 int bus_speed
= system_bus_clock();
147 pci_set_drvdata(dev
, (void *) aec6xxx_33_base
);
149 pci_set_drvdata(dev
, (void *) aec6xxx_34_base
);
151 /* These are necessary to get AEC6280 Macintosh cards to work */
152 if ((dev
->device
== PCI_DEVICE_ID_ARTOP_ATP865
) ||
153 (dev
->device
== PCI_DEVICE_ID_ARTOP_ATP865R
)) {
154 u8 reg49h
= 0, reg4ah
= 0;
155 /* Clear reset and test bits. */
156 pci_read_config_byte(dev
, 0x49, ®49h
);
157 pci_write_config_byte(dev
, 0x49, reg49h
& ~0x30);
158 /* Enable chip interrupt output. */
159 pci_read_config_byte(dev
, 0x4a, ®4ah
);
160 pci_write_config_byte(dev
, 0x4a, reg4ah
& ~0x01);
161 /* Enable burst mode. */
162 pci_read_config_byte(dev
, 0x4a, ®4ah
);
163 pci_write_config_byte(dev
, 0x4a, reg4ah
| 0x80);
169 static void __devinit
init_hwif_aec62xx(ide_hwif_t
*hwif
)
171 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
173 hwif
->set_pio_mode
= &aec_set_pio_mode
;
175 if (dev
->device
== PCI_DEVICE_ID_ARTOP_ATP850UF
)
176 hwif
->set_dma_mode
= &aec6210_set_mode
;
178 hwif
->set_dma_mode
= &aec6260_set_mode
;
180 if (hwif
->dma_base
== 0)
183 if (dev
->device
== PCI_DEVICE_ID_ARTOP_ATP850UF
)
186 if (hwif
->cbl
!= ATA_CBL_PATA40_SHORT
) {
187 u8 ata66
= 0, mask
= hwif
->channel
? 0x02 : 0x01;
189 pci_read_config_byte(dev
, 0x49, &ata66
);
191 hwif
->cbl
= (ata66
& mask
) ? ATA_CBL_PATA40
: ATA_CBL_PATA80
;
195 static const struct ide_port_info aec62xx_chipsets
[] __devinitdata
= {
198 .init_chipset
= init_chipset_aec62xx
,
199 .init_hwif
= init_hwif_aec62xx
,
200 .enablebits
= {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
201 .host_flags
= IDE_HFLAG_SERIALIZE
|
202 IDE_HFLAG_NO_ATAPI_DMA
|
204 IDE_HFLAG_ABUSE_SET_DMA_MODE
|
206 .pio_mask
= ATA_PIO4
,
207 .mwdma_mask
= ATA_MWDMA2
,
208 .udma_mask
= ATA_UDMA2
,
211 .init_chipset
= init_chipset_aec62xx
,
212 .init_hwif
= init_hwif_aec62xx
,
213 .host_flags
= IDE_HFLAG_NO_ATAPI_DMA
| IDE_HFLAG_NO_AUTODMA
|
214 IDE_HFLAG_ABUSE_SET_DMA_MODE
|
216 .pio_mask
= ATA_PIO4
,
217 .mwdma_mask
= ATA_MWDMA2
,
218 .udma_mask
= ATA_UDMA4
,
221 .init_chipset
= init_chipset_aec62xx
,
222 .init_hwif
= init_hwif_aec62xx
,
223 .enablebits
= {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
224 .host_flags
= IDE_HFLAG_NO_ATAPI_DMA
|
225 IDE_HFLAG_ABUSE_SET_DMA_MODE
,
226 .pio_mask
= ATA_PIO4
,
227 .mwdma_mask
= ATA_MWDMA2
,
228 .udma_mask
= ATA_UDMA4
,
231 .init_chipset
= init_chipset_aec62xx
,
232 .init_hwif
= init_hwif_aec62xx
,
233 .host_flags
= IDE_HFLAG_NO_ATAPI_DMA
|
234 IDE_HFLAG_ABUSE_SET_DMA_MODE
|
236 .pio_mask
= ATA_PIO4
,
237 .mwdma_mask
= ATA_MWDMA2
,
238 .udma_mask
= ATA_UDMA5
,
241 .init_chipset
= init_chipset_aec62xx
,
242 .init_hwif
= init_hwif_aec62xx
,
243 .enablebits
= {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
244 .host_flags
= IDE_HFLAG_NO_ATAPI_DMA
|
245 IDE_HFLAG_ABUSE_SET_DMA_MODE
|
247 .pio_mask
= ATA_PIO4
,
248 .mwdma_mask
= ATA_MWDMA2
,
249 .udma_mask
= ATA_UDMA5
,
254 * aec62xx_init_one - called when a AEC is found
255 * @dev: the aec62xx device
256 * @id: the matching pci id
258 * Called when the PCI registration layer (or the IDE initialization)
259 * finds a device matching our IDE device tables.
261 * NOTE: since we're going to modify the 'name' field for AEC-6[26]80[R]
262 * chips, pass a local copy of 'struct ide_port_info' down the call chain.
265 static int __devinit
aec62xx_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
267 struct ide_port_info d
;
268 u8 idx
= id
->driver_data
;
271 err
= pci_enable_device(dev
);
275 d
= aec62xx_chipsets
[idx
];
277 if (idx
== 3 || idx
== 4) {
278 unsigned long dma_base
= pci_resource_start(dev
, 4);
280 if (inb(dma_base
+ 2) & 0x10) {
281 d
.name
= (idx
== 4) ? "AEC6880R" : "AEC6880";
282 d
.udma_mask
= ATA_UDMA6
;
286 err
= ide_setup_pci_device(dev
, &d
);
288 pci_disable_device(dev
);
293 static const struct pci_device_id aec62xx_pci_tbl
[] = {
294 { PCI_VDEVICE(ARTOP
, PCI_DEVICE_ID_ARTOP_ATP850UF
), 0 },
295 { PCI_VDEVICE(ARTOP
, PCI_DEVICE_ID_ARTOP_ATP860
), 1 },
296 { PCI_VDEVICE(ARTOP
, PCI_DEVICE_ID_ARTOP_ATP860R
), 2 },
297 { PCI_VDEVICE(ARTOP
, PCI_DEVICE_ID_ARTOP_ATP865
), 3 },
298 { PCI_VDEVICE(ARTOP
, PCI_DEVICE_ID_ARTOP_ATP865R
), 4 },
301 MODULE_DEVICE_TABLE(pci
, aec62xx_pci_tbl
);
303 static struct pci_driver driver
= {
304 .name
= "AEC62xx_IDE",
305 .id_table
= aec62xx_pci_tbl
,
306 .probe
= aec62xx_init_one
,
309 static int __init
aec62xx_ide_init(void)
311 return ide_pci_register_driver(&driver
);
314 module_init(aec62xx_ide_init
);
316 MODULE_AUTHOR("Andre Hedrick");
317 MODULE_DESCRIPTION("PCI driver module for ARTOP AEC62xx IDE");
318 MODULE_LICENSE("GPL");