6cdef18b1b274d57d3b5f04af0c4c570561c462f
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / hwmon / w83792d.c
1 /*
2 w83792d.c - Part of lm_sensors, Linux kernel modules for hardware
3 monitoring
4 Copyright (C) 2004, 2005 Winbond Electronics Corp.
5 Chunhao Huang <DZShen@Winbond.com.tw>,
6 Rudolf Marek <r.marek@sh.cvut.cz>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21
22 Note:
23 1. This driver is only for 2.6 kernel, 2.4 kernel need a different driver.
24 2. This driver is only for Winbond W83792D C version device, there
25 are also some motherboards with B version W83792D device. The
26 calculation method to in6-in7(measured value, limits) is a little
27 different between C and B version. C or B version can be identified
28 by CR[0x49h].
29 */
30
31 /*
32 Supports following chips:
33
34 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
35 w83792d 9 7 7 3 0x7a 0x5ca3 yes no
36 */
37
38 #include <linux/config.h>
39 #include <linux/module.h>
40 #include <linux/init.h>
41 #include <linux/slab.h>
42 #include <linux/i2c.h>
43 #include <linux/hwmon.h>
44 #include <linux/hwmon-sysfs.h>
45 #include <linux/err.h>
46 #include <linux/mutex.h>
47
48 /* Addresses to scan */
49 static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
50
51 /* Insmod parameters */
52 I2C_CLIENT_INSMOD_1(w83792d);
53 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
54 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
55
56 static int init;
57 module_param(init, bool, 0);
58 MODULE_PARM_DESC(init, "Set to one to force chip initialization");
59
60 /* The W83792D registers */
61 static const u8 W83792D_REG_IN[9] = {
62 0x20, /* Vcore A in DataSheet */
63 0x21, /* Vcore B in DataSheet */
64 0x22, /* VIN0 in DataSheet */
65 0x23, /* VIN1 in DataSheet */
66 0x24, /* VIN2 in DataSheet */
67 0x25, /* VIN3 in DataSheet */
68 0x26, /* 5VCC in DataSheet */
69 0xB0, /* 5VSB in DataSheet */
70 0xB1 /* VBAT in DataSheet */
71 };
72 #define W83792D_REG_LOW_BITS1 0x3E /* Low Bits I in DataSheet */
73 #define W83792D_REG_LOW_BITS2 0x3F /* Low Bits II in DataSheet */
74 static const u8 W83792D_REG_IN_MAX[9] = {
75 0x2B, /* Vcore A High Limit in DataSheet */
76 0x2D, /* Vcore B High Limit in DataSheet */
77 0x2F, /* VIN0 High Limit in DataSheet */
78 0x31, /* VIN1 High Limit in DataSheet */
79 0x33, /* VIN2 High Limit in DataSheet */
80 0x35, /* VIN3 High Limit in DataSheet */
81 0x37, /* 5VCC High Limit in DataSheet */
82 0xB4, /* 5VSB High Limit in DataSheet */
83 0xB6 /* VBAT High Limit in DataSheet */
84 };
85 static const u8 W83792D_REG_IN_MIN[9] = {
86 0x2C, /* Vcore A Low Limit in DataSheet */
87 0x2E, /* Vcore B Low Limit in DataSheet */
88 0x30, /* VIN0 Low Limit in DataSheet */
89 0x32, /* VIN1 Low Limit in DataSheet */
90 0x34, /* VIN2 Low Limit in DataSheet */
91 0x36, /* VIN3 Low Limit in DataSheet */
92 0x38, /* 5VCC Low Limit in DataSheet */
93 0xB5, /* 5VSB Low Limit in DataSheet */
94 0xB7 /* VBAT Low Limit in DataSheet */
95 };
96 static const u8 W83792D_REG_FAN[7] = {
97 0x28, /* FAN 1 Count in DataSheet */
98 0x29, /* FAN 2 Count in DataSheet */
99 0x2A, /* FAN 3 Count in DataSheet */
100 0xB8, /* FAN 4 Count in DataSheet */
101 0xB9, /* FAN 5 Count in DataSheet */
102 0xBA, /* FAN 6 Count in DataSheet */
103 0xBE /* FAN 7 Count in DataSheet */
104 };
105 static const u8 W83792D_REG_FAN_MIN[7] = {
106 0x3B, /* FAN 1 Count Low Limit in DataSheet */
107 0x3C, /* FAN 2 Count Low Limit in DataSheet */
108 0x3D, /* FAN 3 Count Low Limit in DataSheet */
109 0xBB, /* FAN 4 Count Low Limit in DataSheet */
110 0xBC, /* FAN 5 Count Low Limit in DataSheet */
111 0xBD, /* FAN 6 Count Low Limit in DataSheet */
112 0xBF /* FAN 7 Count Low Limit in DataSheet */
113 };
114 #define W83792D_REG_FAN_CFG 0x84 /* FAN Configuration in DataSheet */
115 static const u8 W83792D_REG_FAN_DIV[4] = {
116 0x47, /* contains FAN2 and FAN1 Divisor */
117 0x5B, /* contains FAN4 and FAN3 Divisor */
118 0x5C, /* contains FAN6 and FAN5 Divisor */
119 0x9E /* contains FAN7 Divisor. */
120 };
121 static const u8 W83792D_REG_PWM[7] = {
122 0x81, /* FAN 1 Duty Cycle, be used to control */
123 0x83, /* FAN 2 Duty Cycle, be used to control */
124 0x94, /* FAN 3 Duty Cycle, be used to control */
125 0xA3, /* FAN 4 Duty Cycle, be used to control */
126 0xA4, /* FAN 5 Duty Cycle, be used to control */
127 0xA5, /* FAN 6 Duty Cycle, be used to control */
128 0xA6 /* FAN 7 Duty Cycle, be used to control */
129 };
130 #define W83792D_REG_BANK 0x4E
131 #define W83792D_REG_TEMP2_CONFIG 0xC2
132 #define W83792D_REG_TEMP3_CONFIG 0xCA
133
134 static const u8 W83792D_REG_TEMP1[3] = {
135 0x27, /* TEMP 1 in DataSheet */
136 0x39, /* TEMP 1 Over in DataSheet */
137 0x3A, /* TEMP 1 Hyst in DataSheet */
138 };
139
140 static const u8 W83792D_REG_TEMP_ADD[2][6] = {
141 { 0xC0, /* TEMP 2 in DataSheet */
142 0xC1, /* TEMP 2(0.5 deg) in DataSheet */
143 0xC5, /* TEMP 2 Over High part in DataSheet */
144 0xC6, /* TEMP 2 Over Low part in DataSheet */
145 0xC3, /* TEMP 2 Thyst High part in DataSheet */
146 0xC4 }, /* TEMP 2 Thyst Low part in DataSheet */
147 { 0xC8, /* TEMP 3 in DataSheet */
148 0xC9, /* TEMP 3(0.5 deg) in DataSheet */
149 0xCD, /* TEMP 3 Over High part in DataSheet */
150 0xCE, /* TEMP 3 Over Low part in DataSheet */
151 0xCB, /* TEMP 3 Thyst High part in DataSheet */
152 0xCC } /* TEMP 3 Thyst Low part in DataSheet */
153 };
154
155 static const u8 W83792D_REG_THERMAL[3] = {
156 0x85, /* SmartFanI: Fan1 target value */
157 0x86, /* SmartFanI: Fan2 target value */
158 0x96 /* SmartFanI: Fan3 target value */
159 };
160
161 static const u8 W83792D_REG_TOLERANCE[3] = {
162 0x87, /* (bit3-0)SmartFan Fan1 tolerance */
163 0x87, /* (bit7-4)SmartFan Fan2 tolerance */
164 0x97 /* (bit3-0)SmartFan Fan3 tolerance */
165 };
166
167 static const u8 W83792D_REG_POINTS[3][4] = {
168 { 0x85, /* SmartFanII: Fan1 temp point 1 */
169 0xE3, /* SmartFanII: Fan1 temp point 2 */
170 0xE4, /* SmartFanII: Fan1 temp point 3 */
171 0xE5 }, /* SmartFanII: Fan1 temp point 4 */
172 { 0x86, /* SmartFanII: Fan2 temp point 1 */
173 0xE6, /* SmartFanII: Fan2 temp point 2 */
174 0xE7, /* SmartFanII: Fan2 temp point 3 */
175 0xE8 }, /* SmartFanII: Fan2 temp point 4 */
176 { 0x96, /* SmartFanII: Fan3 temp point 1 */
177 0xE9, /* SmartFanII: Fan3 temp point 2 */
178 0xEA, /* SmartFanII: Fan3 temp point 3 */
179 0xEB } /* SmartFanII: Fan3 temp point 4 */
180 };
181
182 static const u8 W83792D_REG_LEVELS[3][4] = {
183 { 0x88, /* (bit3-0) SmartFanII: Fan1 Non-Stop */
184 0x88, /* (bit7-4) SmartFanII: Fan1 Level 1 */
185 0xE0, /* (bit7-4) SmartFanII: Fan1 Level 2 */
186 0xE0 }, /* (bit3-0) SmartFanII: Fan1 Level 3 */
187 { 0x89, /* (bit3-0) SmartFanII: Fan2 Non-Stop */
188 0x89, /* (bit7-4) SmartFanII: Fan2 Level 1 */
189 0xE1, /* (bit7-4) SmartFanII: Fan2 Level 2 */
190 0xE1 }, /* (bit3-0) SmartFanII: Fan2 Level 3 */
191 { 0x98, /* (bit3-0) SmartFanII: Fan3 Non-Stop */
192 0x98, /* (bit7-4) SmartFanII: Fan3 Level 1 */
193 0xE2, /* (bit7-4) SmartFanII: Fan3 Level 2 */
194 0xE2 } /* (bit3-0) SmartFanII: Fan3 Level 3 */
195 };
196
197 #define W83792D_REG_GPIO_EN 0x1A
198 #define W83792D_REG_CONFIG 0x40
199 #define W83792D_REG_VID_FANDIV 0x47
200 #define W83792D_REG_CHIPID 0x49
201 #define W83792D_REG_WCHIPID 0x58
202 #define W83792D_REG_CHIPMAN 0x4F
203 #define W83792D_REG_PIN 0x4B
204 #define W83792D_REG_I2C_SUBADDR 0x4A
205
206 #define W83792D_REG_ALARM1 0xA9 /* realtime status register1 */
207 #define W83792D_REG_ALARM2 0xAA /* realtime status register2 */
208 #define W83792D_REG_ALARM3 0xAB /* realtime status register3 */
209 #define W83792D_REG_CHASSIS 0x42 /* Bit 5: Case Open status bit */
210 #define W83792D_REG_CHASSIS_CLR 0x44 /* Bit 7: Case Open CLR_CHS/Reset bit */
211
212 /* control in0/in1 's limit modifiability */
213 #define W83792D_REG_VID_IN_B 0x17
214
215 #define W83792D_REG_VBAT 0x5D
216 #define W83792D_REG_I2C_ADDR 0x48
217
218 /* Conversions. Rounding and limit checking is only done on the TO_REG
219 variants. Note that you should be a bit careful with which arguments
220 these macros are called: arguments may be evaluated more than once.
221 Fixing this is just not worth it. */
222 #define IN_FROM_REG(nr,val) (((nr)<=1)?(val*2): \
223 ((((nr)==6)||((nr)==7))?(val*6):(val*4)))
224 #define IN_TO_REG(nr,val) (((nr)<=1)?(val/2): \
225 ((((nr)==6)||((nr)==7))?(val/6):(val/4)))
226
227 static inline u8
228 FAN_TO_REG(long rpm, int div)
229 {
230 if (rpm == 0)
231 return 255;
232 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
233 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
234 }
235
236 #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
237 ((val) == 255 ? 0 : \
238 1350000 / ((val) * (div))))
239
240 /* for temp1 */
241 #define TEMP1_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
242 : (val)) / 1000, 0, 0xff))
243 #define TEMP1_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
244 /* for temp2 and temp3, because they need addtional resolution */
245 #define TEMP_ADD_FROM_REG(val1, val2) \
246 ((((val1) & 0x80 ? (val1)-0x100 \
247 : (val1)) * 1000) + ((val2 & 0x80) ? 500 : 0))
248 #define TEMP_ADD_TO_REG_HIGH(val) \
249 (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
250 : (val)) / 1000, 0, 0xff))
251 #define TEMP_ADD_TO_REG_LOW(val) ((val%1000) ? 0x80 : 0x00)
252
253 #define DIV_FROM_REG(val) (1 << (val))
254
255 static inline u8
256 DIV_TO_REG(long val)
257 {
258 int i;
259 val = SENSORS_LIMIT(val, 1, 128) >> 1;
260 for (i = 0; i < 7; i++) {
261 if (val == 0)
262 break;
263 val >>= 1;
264 }
265 return ((u8) i);
266 }
267
268 struct w83792d_data {
269 struct i2c_client client;
270 struct class_device *class_dev;
271 enum chips type;
272
273 struct mutex update_lock;
274 char valid; /* !=0 if following fields are valid */
275 unsigned long last_updated; /* In jiffies */
276
277 /* array of 2 pointers to subclients */
278 struct i2c_client *lm75[2];
279
280 u8 in[9]; /* Register value */
281 u8 in_max[9]; /* Register value */
282 u8 in_min[9]; /* Register value */
283 u16 low_bits; /* Additional resolution to voltage in6-0 */
284 u8 fan[7]; /* Register value */
285 u8 fan_min[7]; /* Register value */
286 u8 temp1[3]; /* current, over, thyst */
287 u8 temp_add[2][6]; /* Register value */
288 u8 fan_div[7]; /* Register encoding, shifted right */
289 u8 pwm[7]; /* We only consider the first 3 set of pwm,
290 although 792 chip has 7 set of pwm. */
291 u8 pwmenable[3];
292 u32 alarms; /* realtime status register encoding,combined */
293 u8 chassis; /* Chassis status */
294 u8 chassis_clear; /* CLR_CHS, clear chassis intrusion detection */
295 u8 thermal_cruise[3]; /* Smart FanI: Fan1,2,3 target value */
296 u8 tolerance[3]; /* Fan1,2,3 tolerance(Smart Fan I/II) */
297 u8 sf2_points[3][4]; /* Smart FanII: Fan1,2,3 temperature points */
298 u8 sf2_levels[3][4]; /* Smart FanII: Fan1,2,3 duty cycle levels */
299 };
300
301 static int w83792d_attach_adapter(struct i2c_adapter *adapter);
302 static int w83792d_detect(struct i2c_adapter *adapter, int address, int kind);
303 static int w83792d_detach_client(struct i2c_client *client);
304 static struct w83792d_data *w83792d_update_device(struct device *dev);
305
306 #ifdef DEBUG
307 static void w83792d_print_debug(struct w83792d_data *data, struct device *dev);
308 #endif
309
310 static void w83792d_init_client(struct i2c_client *client);
311
312 static struct i2c_driver w83792d_driver = {
313 .driver = {
314 .name = "w83792d",
315 },
316 .attach_adapter = w83792d_attach_adapter,
317 .detach_client = w83792d_detach_client,
318 };
319
320 static inline long in_count_from_reg(int nr, struct w83792d_data *data)
321 {
322 /* in7 and in8 do not have low bits, but the formula still works */
323 return ((data->in[nr] << 2) | ((data->low_bits >> (2 * nr)) & 0x03));
324 }
325
326 /* The SMBus locks itself. The Winbond W83792D chip has a bank register,
327 but the driver only accesses registers in bank 0, so we don't have
328 to switch banks and lock access between switches. */
329 static inline int w83792d_read_value(struct i2c_client *client, u8 reg)
330 {
331 return i2c_smbus_read_byte_data(client, reg);
332 }
333
334 static inline int
335 w83792d_write_value(struct i2c_client *client, u8 reg, u8 value)
336 {
337 return i2c_smbus_write_byte_data(client, reg, value);
338 }
339
340 /* following are the sysfs callback functions */
341 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
342 char *buf)
343 {
344 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
345 int nr = sensor_attr->index;
346 struct w83792d_data *data = w83792d_update_device(dev);
347 return sprintf(buf,"%ld\n", IN_FROM_REG(nr,(in_count_from_reg(nr, data))));
348 }
349
350 #define show_in_reg(reg) \
351 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
352 char *buf) \
353 { \
354 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
355 int nr = sensor_attr->index; \
356 struct w83792d_data *data = w83792d_update_device(dev); \
357 return sprintf(buf,"%ld\n", (long)(IN_FROM_REG(nr, (data->reg[nr])*4))); \
358 }
359
360 show_in_reg(in_min);
361 show_in_reg(in_max);
362
363 #define store_in_reg(REG, reg) \
364 static ssize_t store_in_##reg (struct device *dev, \
365 struct device_attribute *attr, \
366 const char *buf, size_t count) \
367 { \
368 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
369 int nr = sensor_attr->index; \
370 struct i2c_client *client = to_i2c_client(dev); \
371 struct w83792d_data *data = i2c_get_clientdata(client); \
372 u32 val; \
373 \
374 val = simple_strtoul(buf, NULL, 10); \
375 data->in_##reg[nr] = SENSORS_LIMIT(IN_TO_REG(nr, val)/4, 0, 255); \
376 w83792d_write_value(client, W83792D_REG_IN_##REG[nr], data->in_##reg[nr]); \
377 \
378 return count; \
379 }
380 store_in_reg(MIN, min);
381 store_in_reg(MAX, max);
382
383 static struct sensor_device_attribute sda_in_input[] = {
384 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
385 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
386 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
387 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
388 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
389 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
390 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
391 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
392 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
393 };
394 static struct sensor_device_attribute sda_in_min[] = {
395 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
396 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
397 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
398 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
399 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
400 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
401 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
402 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
403 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
404 };
405 static struct sensor_device_attribute sda_in_max[] = {
406 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
407 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
408 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
409 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
410 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
411 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
412 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
413 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
414 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
415 };
416
417
418 #define show_fan_reg(reg) \
419 static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
420 char *buf) \
421 { \
422 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
423 int nr = sensor_attr->index - 1; \
424 struct w83792d_data *data = w83792d_update_device(dev); \
425 return sprintf(buf,"%d\n", \
426 FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
427 }
428
429 show_fan_reg(fan);
430 show_fan_reg(fan_min);
431
432 static ssize_t
433 store_fan_min(struct device *dev, struct device_attribute *attr,
434 const char *buf, size_t count)
435 {
436 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
437 int nr = sensor_attr->index - 1;
438 struct i2c_client *client = to_i2c_client(dev);
439 struct w83792d_data *data = i2c_get_clientdata(client);
440 u32 val;
441
442 val = simple_strtoul(buf, NULL, 10);
443 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
444 w83792d_write_value(client, W83792D_REG_FAN_MIN[nr],
445 data->fan_min[nr]);
446
447 return count;
448 }
449
450 static ssize_t
451 show_fan_div(struct device *dev, struct device_attribute *attr,
452 char *buf)
453 {
454 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
455 int nr = sensor_attr->index;
456 struct w83792d_data *data = w83792d_update_device(dev);
457 return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr - 1]));
458 }
459
460 /* Note: we save and restore the fan minimum here, because its value is
461 determined in part by the fan divisor. This follows the principle of
462 least suprise; the user doesn't expect the fan minimum to change just
463 because the divisor changed. */
464 static ssize_t
465 store_fan_div(struct device *dev, struct device_attribute *attr,
466 const char *buf, size_t count)
467 {
468 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
469 int nr = sensor_attr->index - 1;
470 struct i2c_client *client = to_i2c_client(dev);
471 struct w83792d_data *data = i2c_get_clientdata(client);
472 unsigned long min;
473 /*u8 reg;*/
474 u8 fan_div_reg = 0;
475 u8 tmp_fan_div;
476
477 /* Save fan_min */
478 min = FAN_FROM_REG(data->fan_min[nr],
479 DIV_FROM_REG(data->fan_div[nr]));
480
481 data->fan_div[nr] = DIV_TO_REG(simple_strtoul(buf, NULL, 10));
482
483 fan_div_reg = w83792d_read_value(client, W83792D_REG_FAN_DIV[nr >> 1]);
484 fan_div_reg &= (nr & 0x01) ? 0x8f : 0xf8;
485 tmp_fan_div = (nr & 0x01) ? (((data->fan_div[nr]) << 4) & 0x70)
486 : ((data->fan_div[nr]) & 0x07);
487 w83792d_write_value(client, W83792D_REG_FAN_DIV[nr >> 1],
488 fan_div_reg | tmp_fan_div);
489
490 /* Restore fan_min */
491 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
492 w83792d_write_value(client, W83792D_REG_FAN_MIN[nr], data->fan_min[nr]);
493
494 return count;
495 }
496
497 static struct sensor_device_attribute sda_fan_input[] = {
498 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 1),
499 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 2),
500 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 3),
501 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 4),
502 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 5),
503 SENSOR_ATTR(fan6_input, S_IRUGO, show_fan, NULL, 6),
504 SENSOR_ATTR(fan7_input, S_IRUGO, show_fan, NULL, 7),
505 };
506 static struct sensor_device_attribute sda_fan_min[] = {
507 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 1),
508 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 2),
509 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 3),
510 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 4),
511 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 5),
512 SENSOR_ATTR(fan6_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 6),
513 SENSOR_ATTR(fan7_min, S_IWUSR | S_IRUGO, show_fan_min, store_fan_min, 7),
514 };
515 static struct sensor_device_attribute sda_fan_div[] = {
516 SENSOR_ATTR(fan1_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 1),
517 SENSOR_ATTR(fan2_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 2),
518 SENSOR_ATTR(fan3_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 3),
519 SENSOR_ATTR(fan4_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 4),
520 SENSOR_ATTR(fan5_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 5),
521 SENSOR_ATTR(fan6_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 6),
522 SENSOR_ATTR(fan7_div, S_IWUSR | S_IRUGO, show_fan_div, store_fan_div, 7),
523 };
524
525
526 /* read/write the temperature1, includes measured value and limits */
527
528 static ssize_t show_temp1(struct device *dev, struct device_attribute *attr,
529 char *buf)
530 {
531 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
532 int nr = sensor_attr->index;
533 struct w83792d_data *data = w83792d_update_device(dev);
534 return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[nr]));
535 }
536
537 static ssize_t store_temp1(struct device *dev, struct device_attribute *attr,
538 const char *buf, size_t count)
539 {
540 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
541 int nr = sensor_attr->index;
542 struct i2c_client *client = to_i2c_client(dev);
543 struct w83792d_data *data = i2c_get_clientdata(client);
544 s32 val;
545
546 val = simple_strtol(buf, NULL, 10);
547
548 data->temp1[nr] = TEMP1_TO_REG(val);
549 w83792d_write_value(client, W83792D_REG_TEMP1[nr],
550 data->temp1[nr]);
551
552 return count;
553 }
554
555 /* read/write the temperature2-3, includes measured value and limits */
556
557 static ssize_t show_temp23(struct device *dev, struct device_attribute *attr,
558 char *buf)
559 {
560 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
561 int nr = sensor_attr->nr;
562 int index = sensor_attr->index;
563 struct w83792d_data *data = w83792d_update_device(dev);
564 return sprintf(buf,"%ld\n",
565 (long)TEMP_ADD_FROM_REG(data->temp_add[nr][index],
566 data->temp_add[nr][index+1]));
567 }
568
569 static ssize_t store_temp23(struct device *dev, struct device_attribute *attr,
570 const char *buf, size_t count)
571 {
572 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
573 int nr = sensor_attr->nr;
574 int index = sensor_attr->index;
575 struct i2c_client *client = to_i2c_client(dev);
576 struct w83792d_data *data = i2c_get_clientdata(client);
577 s32 val;
578
579 val = simple_strtol(buf, NULL, 10);
580
581 data->temp_add[nr][index] = TEMP_ADD_TO_REG_HIGH(val);
582 data->temp_add[nr][index+1] = TEMP_ADD_TO_REG_LOW(val);
583 w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index],
584 data->temp_add[nr][index]);
585 w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index+1],
586 data->temp_add[nr][index+1]);
587
588 return count;
589 }
590
591 static struct sensor_device_attribute_2 sda_temp_input[] = {
592 SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp1, NULL, 0, 0),
593 SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp23, NULL, 0, 0),
594 SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp23, NULL, 1, 0),
595 };
596
597 static struct sensor_device_attribute_2 sda_temp_max[] = {
598 SENSOR_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp1, store_temp1, 0, 1),
599 SENSOR_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp23, store_temp23, 0, 2),
600 SENSOR_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp23, store_temp23, 1, 2),
601 };
602
603 static struct sensor_device_attribute_2 sda_temp_max_hyst[] = {
604 SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1, store_temp1, 0, 2),
605 SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp23, store_temp23, 0, 4),
606 SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp23, store_temp23, 1, 4),
607 };
608
609 /* get reatime status of all sensors items: voltage, temp, fan */
610 static ssize_t
611 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
612 {
613 struct w83792d_data *data = w83792d_update_device(dev);
614 return sprintf(buf, "%d\n", data->alarms);
615 }
616
617 static
618 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
619
620 static ssize_t
621 show_pwm(struct device *dev, struct device_attribute *attr,
622 char *buf)
623 {
624 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
625 int nr = sensor_attr->index;
626 struct w83792d_data *data = w83792d_update_device(dev);
627 return sprintf(buf, "%d\n", (data->pwm[nr] & 0x0f) << 4);
628 }
629
630 static ssize_t
631 show_pwmenable(struct device *dev, struct device_attribute *attr,
632 char *buf)
633 {
634 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
635 int nr = sensor_attr->index - 1;
636 struct w83792d_data *data = w83792d_update_device(dev);
637 long pwm_enable_tmp = 1;
638
639 switch (data->pwmenable[nr]) {
640 case 0:
641 pwm_enable_tmp = 1; /* manual mode */
642 break;
643 case 1:
644 pwm_enable_tmp = 3; /*thermal cruise/Smart Fan I */
645 break;
646 case 2:
647 pwm_enable_tmp = 2; /* Smart Fan II */
648 break;
649 }
650
651 return sprintf(buf, "%ld\n", pwm_enable_tmp);
652 }
653
654 static ssize_t
655 store_pwm(struct device *dev, struct device_attribute *attr,
656 const char *buf, size_t count)
657 {
658 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
659 int nr = sensor_attr->index;
660 struct i2c_client *client = to_i2c_client(dev);
661 struct w83792d_data *data = i2c_get_clientdata(client);
662 u8 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255) >> 4;
663
664 mutex_lock(&data->update_lock);
665 val |= w83792d_read_value(client, W83792D_REG_PWM[nr]) & 0xf0;
666 data->pwm[nr] = val;
667 w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]);
668 mutex_unlock(&data->update_lock);
669
670 return count;
671 }
672
673 static ssize_t
674 store_pwmenable(struct device *dev, struct device_attribute *attr,
675 const char *buf, size_t count)
676 {
677 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
678 int nr = sensor_attr->index - 1;
679 struct i2c_client *client = to_i2c_client(dev);
680 struct w83792d_data *data = i2c_get_clientdata(client);
681 u32 val;
682 u8 fan_cfg_tmp, cfg1_tmp, cfg2_tmp, cfg3_tmp, cfg4_tmp;
683
684 val = simple_strtoul(buf, NULL, 10);
685 switch (val) {
686 case 1:
687 data->pwmenable[nr] = 0; /* manual mode */
688 break;
689 case 2:
690 data->pwmenable[nr] = 2; /* Smart Fan II */
691 break;
692 case 3:
693 data->pwmenable[nr] = 1; /* thermal cruise/Smart Fan I */
694 break;
695 default:
696 return -EINVAL;
697 }
698 cfg1_tmp = data->pwmenable[0];
699 cfg2_tmp = (data->pwmenable[1]) << 2;
700 cfg3_tmp = (data->pwmenable[2]) << 4;
701 cfg4_tmp = w83792d_read_value(client,W83792D_REG_FAN_CFG) & 0xc0;
702 fan_cfg_tmp = ((cfg4_tmp | cfg3_tmp) | cfg2_tmp) | cfg1_tmp;
703 w83792d_write_value(client, W83792D_REG_FAN_CFG, fan_cfg_tmp);
704
705 return count;
706 }
707
708 static struct sensor_device_attribute sda_pwm[] = {
709 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
710 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
711 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
712 };
713 static struct sensor_device_attribute sda_pwm_enable[] = {
714 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
715 show_pwmenable, store_pwmenable, 1),
716 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO,
717 show_pwmenable, store_pwmenable, 2),
718 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO,
719 show_pwmenable, store_pwmenable, 3),
720 };
721
722
723 static ssize_t
724 show_pwm_mode(struct device *dev, struct device_attribute *attr,
725 char *buf)
726 {
727 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
728 int nr = sensor_attr->index;
729 struct w83792d_data *data = w83792d_update_device(dev);
730 return sprintf(buf, "%d\n", data->pwm[nr] >> 7);
731 }
732
733 static ssize_t
734 store_pwm_mode(struct device *dev, struct device_attribute *attr,
735 const char *buf, size_t count)
736 {
737 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
738 int nr = sensor_attr->index;
739 struct i2c_client *client = to_i2c_client(dev);
740 struct w83792d_data *data = i2c_get_clientdata(client);
741 u32 val;
742
743 val = simple_strtoul(buf, NULL, 10);
744 if (val != 0 && val != 1)
745 return -EINVAL;
746
747 mutex_lock(&data->update_lock);
748 data->pwm[nr] = w83792d_read_value(client, W83792D_REG_PWM[nr]);
749 if (val) { /* PWM mode */
750 data->pwm[nr] |= 0x80;
751 } else { /* DC mode */
752 data->pwm[nr] &= 0x7f;
753 }
754 w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]);
755 mutex_unlock(&data->update_lock);
756
757 return count;
758 }
759
760 static struct sensor_device_attribute sda_pwm_mode[] = {
761 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO,
762 show_pwm_mode, store_pwm_mode, 0),
763 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO,
764 show_pwm_mode, store_pwm_mode, 1),
765 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO,
766 show_pwm_mode, store_pwm_mode, 2),
767 };
768
769
770 static ssize_t
771 show_regs_chassis(struct device *dev, struct device_attribute *attr,
772 char *buf)
773 {
774 struct w83792d_data *data = w83792d_update_device(dev);
775 return sprintf(buf, "%d\n", data->chassis);
776 }
777
778 static DEVICE_ATTR(chassis, S_IRUGO, show_regs_chassis, NULL);
779
780 static ssize_t
781 show_chassis_clear(struct device *dev, struct device_attribute *attr, char *buf)
782 {
783 struct w83792d_data *data = w83792d_update_device(dev);
784 return sprintf(buf, "%d\n", data->chassis_clear);
785 }
786
787 static ssize_t
788 store_chassis_clear(struct device *dev, struct device_attribute *attr,
789 const char *buf, size_t count)
790 {
791 struct i2c_client *client = to_i2c_client(dev);
792 struct w83792d_data *data = i2c_get_clientdata(client);
793 u32 val;
794 u8 temp1 = 0, temp2 = 0;
795
796 val = simple_strtoul(buf, NULL, 10);
797
798 data->chassis_clear = SENSORS_LIMIT(val, 0 ,1);
799 temp1 = ((data->chassis_clear) << 7) & 0x80;
800 temp2 = w83792d_read_value(client,
801 W83792D_REG_CHASSIS_CLR) & 0x7f;
802 w83792d_write_value(client, W83792D_REG_CHASSIS_CLR, temp1 | temp2);
803
804 return count;
805 }
806
807 static DEVICE_ATTR(chassis_clear, S_IRUGO | S_IWUSR,
808 show_chassis_clear, store_chassis_clear);
809
810 /* For Smart Fan I / Thermal Cruise */
811 static ssize_t
812 show_thermal_cruise(struct device *dev, struct device_attribute *attr,
813 char *buf)
814 {
815 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
816 int nr = sensor_attr->index;
817 struct w83792d_data *data = w83792d_update_device(dev);
818 return sprintf(buf, "%ld\n", (long)data->thermal_cruise[nr-1]);
819 }
820
821 static ssize_t
822 store_thermal_cruise(struct device *dev, struct device_attribute *attr,
823 const char *buf, size_t count)
824 {
825 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
826 int nr = sensor_attr->index - 1;
827 struct i2c_client *client = to_i2c_client(dev);
828 struct w83792d_data *data = i2c_get_clientdata(client);
829 u32 val;
830 u8 target_tmp=0, target_mask=0;
831
832 val = simple_strtoul(buf, NULL, 10);
833 target_tmp = val;
834 target_tmp = target_tmp & 0x7f;
835 target_mask = w83792d_read_value(client, W83792D_REG_THERMAL[nr]) & 0x80;
836 data->thermal_cruise[nr] = SENSORS_LIMIT(target_tmp, 0, 255);
837 w83792d_write_value(client, W83792D_REG_THERMAL[nr],
838 (data->thermal_cruise[nr]) | target_mask);
839
840 return count;
841 }
842
843 static struct sensor_device_attribute sda_thermal_cruise[] = {
844 SENSOR_ATTR(thermal_cruise1, S_IWUSR | S_IRUGO,
845 show_thermal_cruise, store_thermal_cruise, 1),
846 SENSOR_ATTR(thermal_cruise2, S_IWUSR | S_IRUGO,
847 show_thermal_cruise, store_thermal_cruise, 2),
848 SENSOR_ATTR(thermal_cruise3, S_IWUSR | S_IRUGO,
849 show_thermal_cruise, store_thermal_cruise, 3),
850 };
851
852 /* For Smart Fan I/Thermal Cruise and Smart Fan II */
853 static ssize_t
854 show_tolerance(struct device *dev, struct device_attribute *attr,
855 char *buf)
856 {
857 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
858 int nr = sensor_attr->index;
859 struct w83792d_data *data = w83792d_update_device(dev);
860 return sprintf(buf, "%ld\n", (long)data->tolerance[nr-1]);
861 }
862
863 static ssize_t
864 store_tolerance(struct device *dev, struct device_attribute *attr,
865 const char *buf, size_t count)
866 {
867 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
868 int nr = sensor_attr->index - 1;
869 struct i2c_client *client = to_i2c_client(dev);
870 struct w83792d_data *data = i2c_get_clientdata(client);
871 u32 val;
872 u8 tol_tmp, tol_mask;
873
874 val = simple_strtoul(buf, NULL, 10);
875 tol_mask = w83792d_read_value(client,
876 W83792D_REG_TOLERANCE[nr]) & ((nr == 1) ? 0x0f : 0xf0);
877 tol_tmp = SENSORS_LIMIT(val, 0, 15);
878 tol_tmp &= 0x0f;
879 data->tolerance[nr] = tol_tmp;
880 if (nr == 1) {
881 tol_tmp <<= 4;
882 }
883 w83792d_write_value(client, W83792D_REG_TOLERANCE[nr],
884 tol_mask | tol_tmp);
885
886 return count;
887 }
888
889 static struct sensor_device_attribute sda_tolerance[] = {
890 SENSOR_ATTR(tolerance1, S_IWUSR | S_IRUGO,
891 show_tolerance, store_tolerance, 1),
892 SENSOR_ATTR(tolerance2, S_IWUSR | S_IRUGO,
893 show_tolerance, store_tolerance, 2),
894 SENSOR_ATTR(tolerance3, S_IWUSR | S_IRUGO,
895 show_tolerance, store_tolerance, 3),
896 };
897
898 /* For Smart Fan II */
899 static ssize_t
900 show_sf2_point(struct device *dev, struct device_attribute *attr,
901 char *buf)
902 {
903 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
904 int nr = sensor_attr->nr;
905 int index = sensor_attr->index;
906 struct w83792d_data *data = w83792d_update_device(dev);
907 return sprintf(buf, "%ld\n", (long)data->sf2_points[index-1][nr-1]);
908 }
909
910 static ssize_t
911 store_sf2_point(struct device *dev, struct device_attribute *attr,
912 const char *buf, size_t count)
913 {
914 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
915 int nr = sensor_attr->nr - 1;
916 int index = sensor_attr->index - 1;
917 struct i2c_client *client = to_i2c_client(dev);
918 struct w83792d_data *data = i2c_get_clientdata(client);
919 u32 val;
920 u8 mask_tmp = 0;
921
922 val = simple_strtoul(buf, NULL, 10);
923 data->sf2_points[index][nr] = SENSORS_LIMIT(val, 0, 127);
924 mask_tmp = w83792d_read_value(client,
925 W83792D_REG_POINTS[index][nr]) & 0x80;
926 w83792d_write_value(client, W83792D_REG_POINTS[index][nr],
927 mask_tmp|data->sf2_points[index][nr]);
928
929 return count;
930 }
931
932 static struct sensor_device_attribute_2 sda_sf2_point[] = {
933 SENSOR_ATTR_2(sf2_point1_fan1, S_IRUGO | S_IWUSR,
934 show_sf2_point, store_sf2_point, 1, 1),
935 SENSOR_ATTR_2(sf2_point2_fan1, S_IRUGO | S_IWUSR,
936 show_sf2_point, store_sf2_point, 2, 1),
937 SENSOR_ATTR_2(sf2_point3_fan1, S_IRUGO | S_IWUSR,
938 show_sf2_point, store_sf2_point, 3, 1),
939 SENSOR_ATTR_2(sf2_point4_fan1, S_IRUGO | S_IWUSR,
940 show_sf2_point, store_sf2_point, 4, 1),
941
942 SENSOR_ATTR_2(sf2_point1_fan2, S_IRUGO | S_IWUSR,
943 show_sf2_point, store_sf2_point, 1, 2),
944 SENSOR_ATTR_2(sf2_point2_fan2, S_IRUGO | S_IWUSR,
945 show_sf2_point, store_sf2_point, 2, 2),
946 SENSOR_ATTR_2(sf2_point3_fan2, S_IRUGO | S_IWUSR,
947 show_sf2_point, store_sf2_point, 3, 2),
948 SENSOR_ATTR_2(sf2_point4_fan2, S_IRUGO | S_IWUSR,
949 show_sf2_point, store_sf2_point, 4, 2),
950
951 SENSOR_ATTR_2(sf2_point1_fan3, S_IRUGO | S_IWUSR,
952 show_sf2_point, store_sf2_point, 1, 3),
953 SENSOR_ATTR_2(sf2_point2_fan3, S_IRUGO | S_IWUSR,
954 show_sf2_point, store_sf2_point, 2, 3),
955 SENSOR_ATTR_2(sf2_point3_fan3, S_IRUGO | S_IWUSR,
956 show_sf2_point, store_sf2_point, 3, 3),
957 SENSOR_ATTR_2(sf2_point4_fan3, S_IRUGO | S_IWUSR,
958 show_sf2_point, store_sf2_point, 4, 3),
959 };
960
961
962 static ssize_t
963 show_sf2_level(struct device *dev, struct device_attribute *attr,
964 char *buf)
965 {
966 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
967 int nr = sensor_attr->nr;
968 int index = sensor_attr->index;
969 struct w83792d_data *data = w83792d_update_device(dev);
970 return sprintf(buf, "%d\n",
971 (((data->sf2_levels[index-1][nr]) * 100) / 15));
972 }
973
974 static ssize_t
975 store_sf2_level(struct device *dev, struct device_attribute *attr,
976 const char *buf, size_t count)
977 {
978 struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
979 int nr = sensor_attr->nr;
980 int index = sensor_attr->index - 1;
981 struct i2c_client *client = to_i2c_client(dev);
982 struct w83792d_data *data = i2c_get_clientdata(client);
983 u32 val;
984 u8 mask_tmp=0, level_tmp=0;
985
986 val = simple_strtoul(buf, NULL, 10);
987 data->sf2_levels[index][nr] = SENSORS_LIMIT((val * 15) / 100, 0, 15);
988 mask_tmp = w83792d_read_value(client, W83792D_REG_LEVELS[index][nr])
989 & ((nr==3) ? 0xf0 : 0x0f);
990 if (nr==3) {
991 level_tmp = data->sf2_levels[index][nr];
992 } else {
993 level_tmp = data->sf2_levels[index][nr] << 4;
994 }
995 w83792d_write_value(client, W83792D_REG_LEVELS[index][nr], level_tmp | mask_tmp);
996
997 return count;
998 }
999
1000 static struct sensor_device_attribute_2 sda_sf2_level[] = {
1001 SENSOR_ATTR_2(sf2_level1_fan1, S_IRUGO | S_IWUSR,
1002 show_sf2_level, store_sf2_level, 1, 1),
1003 SENSOR_ATTR_2(sf2_level2_fan1, S_IRUGO | S_IWUSR,
1004 show_sf2_level, store_sf2_level, 2, 1),
1005 SENSOR_ATTR_2(sf2_level3_fan1, S_IRUGO | S_IWUSR,
1006 show_sf2_level, store_sf2_level, 3, 1),
1007
1008 SENSOR_ATTR_2(sf2_level1_fan2, S_IRUGO | S_IWUSR,
1009 show_sf2_level, store_sf2_level, 1, 2),
1010 SENSOR_ATTR_2(sf2_level2_fan2, S_IRUGO | S_IWUSR,
1011 show_sf2_level, store_sf2_level, 2, 2),
1012 SENSOR_ATTR_2(sf2_level3_fan2, S_IRUGO | S_IWUSR,
1013 show_sf2_level, store_sf2_level, 3, 2),
1014
1015 SENSOR_ATTR_2(sf2_level1_fan3, S_IRUGO | S_IWUSR,
1016 show_sf2_level, store_sf2_level, 1, 3),
1017 SENSOR_ATTR_2(sf2_level2_fan3, S_IRUGO | S_IWUSR,
1018 show_sf2_level, store_sf2_level, 2, 3),
1019 SENSOR_ATTR_2(sf2_level3_fan3, S_IRUGO | S_IWUSR,
1020 show_sf2_level, store_sf2_level, 3, 3),
1021 };
1022
1023 /* This function is called when:
1024 * w83792d_driver is inserted (when this module is loaded), for each
1025 available adapter
1026 * when a new adapter is inserted (and w83792d_driver is still present) */
1027 static int
1028 w83792d_attach_adapter(struct i2c_adapter *adapter)
1029 {
1030 if (!(adapter->class & I2C_CLASS_HWMON))
1031 return 0;
1032 return i2c_probe(adapter, &addr_data, w83792d_detect);
1033 }
1034
1035
1036 static int
1037 w83792d_create_subclient(struct i2c_adapter *adapter,
1038 struct i2c_client *new_client, int addr,
1039 struct i2c_client **sub_cli)
1040 {
1041 int err;
1042 struct i2c_client *sub_client;
1043
1044 (*sub_cli) = sub_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
1045 if (!(sub_client)) {
1046 return -ENOMEM;
1047 }
1048 sub_client->addr = 0x48 + addr;
1049 i2c_set_clientdata(sub_client, NULL);
1050 sub_client->adapter = adapter;
1051 sub_client->driver = &w83792d_driver;
1052 sub_client->flags = 0;
1053 strlcpy(sub_client->name, "w83792d subclient", I2C_NAME_SIZE);
1054 if ((err = i2c_attach_client(sub_client))) {
1055 dev_err(&new_client->dev, "subclient registration "
1056 "at address 0x%x failed\n", sub_client->addr);
1057 kfree(sub_client);
1058 return err;
1059 }
1060 return 0;
1061 }
1062
1063
1064 static int
1065 w83792d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
1066 struct i2c_client *new_client)
1067 {
1068 int i, id, err;
1069 u8 val;
1070 struct w83792d_data *data = i2c_get_clientdata(new_client);
1071
1072 id = i2c_adapter_id(adapter);
1073 if (force_subclients[0] == id && force_subclients[1] == address) {
1074 for (i = 2; i <= 3; i++) {
1075 if (force_subclients[i] < 0x48 ||
1076 force_subclients[i] > 0x4f) {
1077 dev_err(&new_client->dev, "invalid subclient "
1078 "address %d; must be 0x48-0x4f\n",
1079 force_subclients[i]);
1080 err = -ENODEV;
1081 goto ERROR_SC_0;
1082 }
1083 }
1084 w83792d_write_value(new_client, W83792D_REG_I2C_SUBADDR,
1085 (force_subclients[2] & 0x07) |
1086 ((force_subclients[3] & 0x07) << 4));
1087 }
1088
1089 val = w83792d_read_value(new_client, W83792D_REG_I2C_SUBADDR);
1090 if (!(val & 0x08)) {
1091 err = w83792d_create_subclient(adapter, new_client, val & 0x7,
1092 &data->lm75[0]);
1093 if (err < 0)
1094 goto ERROR_SC_0;
1095 }
1096 if (!(val & 0x80)) {
1097 if ((data->lm75[0] != NULL) &&
1098 ((val & 0x7) == ((val >> 4) & 0x7))) {
1099 dev_err(&new_client->dev, "duplicate addresses 0x%x, "
1100 "use force_subclient\n", data->lm75[0]->addr);
1101 err = -ENODEV;
1102 goto ERROR_SC_1;
1103 }
1104 err = w83792d_create_subclient(adapter, new_client,
1105 (val >> 4) & 0x7, &data->lm75[1]);
1106 if (err < 0)
1107 goto ERROR_SC_1;
1108 }
1109
1110 return 0;
1111
1112 /* Undo inits in case of errors */
1113
1114 ERROR_SC_1:
1115 if (data->lm75[0] != NULL) {
1116 i2c_detach_client(data->lm75[0]);
1117 kfree(data->lm75[0]);
1118 }
1119 ERROR_SC_0:
1120 return err;
1121 }
1122
1123 static void device_create_file_fan(struct device *dev, int i)
1124 {
1125 device_create_file(dev, &sda_fan_input[i].dev_attr);
1126 device_create_file(dev, &sda_fan_div[i].dev_attr);
1127 device_create_file(dev, &sda_fan_min[i].dev_attr);
1128 }
1129
1130 static int
1131 w83792d_detect(struct i2c_adapter *adapter, int address, int kind)
1132 {
1133 int i = 0, val1 = 0, val2;
1134 struct i2c_client *client;
1135 struct device *dev;
1136 struct w83792d_data *data;
1137 int err = 0;
1138 const char *client_name = "";
1139
1140 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1141 goto ERROR0;
1142 }
1143
1144 /* OK. For now, we presume we have a valid client. We now create the
1145 client structure, even though we cannot fill it completely yet.
1146 But it allows us to access w83792d_{read,write}_value. */
1147
1148 if (!(data = kzalloc(sizeof(struct w83792d_data), GFP_KERNEL))) {
1149 err = -ENOMEM;
1150 goto ERROR0;
1151 }
1152
1153 client = &data->client;
1154 dev = &client->dev;
1155 i2c_set_clientdata(client, data);
1156 client->addr = address;
1157 client->adapter = adapter;
1158 client->driver = &w83792d_driver;
1159 client->flags = 0;
1160
1161 /* Now, we do the remaining detection. */
1162
1163 /* The w83792d may be stuck in some other bank than bank 0. This may
1164 make reading other information impossible. Specify a force=... or
1165 force_*=... parameter, and the Winbond will be reset to the right
1166 bank. */
1167 if (kind < 0) {
1168 if (w83792d_read_value(client, W83792D_REG_CONFIG) & 0x80) {
1169 dev_dbg(dev, "Detection failed at step 1\n");
1170 goto ERROR1;
1171 }
1172 val1 = w83792d_read_value(client, W83792D_REG_BANK);
1173 val2 = w83792d_read_value(client, W83792D_REG_CHIPMAN);
1174 /* Check for Winbond ID if in bank 0 */
1175 if (!(val1 & 0x07)) { /* is Bank0 */
1176 if (((!(val1 & 0x80)) && (val2 != 0xa3)) ||
1177 ((val1 & 0x80) && (val2 != 0x5c))) {
1178 dev_dbg(dev, "Detection failed at step 2\n");
1179 goto ERROR1;
1180 }
1181 }
1182 /* If Winbond chip, address of chip and W83792D_REG_I2C_ADDR
1183 should match */
1184 if (w83792d_read_value(client,
1185 W83792D_REG_I2C_ADDR) != address) {
1186 dev_dbg(dev, "Detection failed at step 3\n");
1187 goto ERROR1;
1188 }
1189 }
1190
1191 /* We have either had a force parameter, or we have already detected the
1192 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1193 w83792d_write_value(client,
1194 W83792D_REG_BANK,
1195 (w83792d_read_value(client,
1196 W83792D_REG_BANK) & 0x78) | 0x80);
1197
1198 /* Determine the chip type. */
1199 if (kind <= 0) {
1200 /* get vendor ID */
1201 val2 = w83792d_read_value(client, W83792D_REG_CHIPMAN);
1202 if (val2 != 0x5c) { /* the vendor is NOT Winbond */
1203 goto ERROR1;
1204 }
1205 val1 = w83792d_read_value(client, W83792D_REG_WCHIPID);
1206 if (val1 == 0x7a) {
1207 kind = w83792d;
1208 } else {
1209 if (kind == 0)
1210 dev_warn(dev,
1211 "w83792d: Ignoring 'force' parameter for"
1212 " unknown chip at adapter %d, address"
1213 " 0x%02x\n", i2c_adapter_id(adapter),
1214 address);
1215 goto ERROR1;
1216 }
1217 }
1218
1219 if (kind == w83792d) {
1220 client_name = "w83792d";
1221 } else {
1222 dev_err(dev, "w83792d: Internal error: unknown"
1223 " kind (%d)?!?", kind);
1224 goto ERROR1;
1225 }
1226
1227 /* Fill in the remaining client fields and put into the global list */
1228 strlcpy(client->name, client_name, I2C_NAME_SIZE);
1229 data->type = kind;
1230
1231 data->valid = 0;
1232 mutex_init(&data->update_lock);
1233
1234 /* Tell the I2C layer a new client has arrived */
1235 if ((err = i2c_attach_client(client)))
1236 goto ERROR1;
1237
1238 if ((err = w83792d_detect_subclients(adapter, address,
1239 kind, client)))
1240 goto ERROR2;
1241
1242 /* Initialize the chip */
1243 w83792d_init_client(client);
1244
1245 /* A few vars need to be filled upon startup */
1246 for (i = 0; i < 7; i++) {
1247 data->fan_min[i] = w83792d_read_value(client,
1248 W83792D_REG_FAN_MIN[i]);
1249 }
1250
1251 /* Register sysfs hooks */
1252 data->class_dev = hwmon_device_register(dev);
1253 if (IS_ERR(data->class_dev)) {
1254 err = PTR_ERR(data->class_dev);
1255 goto ERROR3;
1256 }
1257 for (i = 0; i < 9; i++) {
1258 device_create_file(dev, &sda_in_input[i].dev_attr);
1259 device_create_file(dev, &sda_in_max[i].dev_attr);
1260 device_create_file(dev, &sda_in_min[i].dev_attr);
1261 }
1262 for (i = 0; i < 3; i++)
1263 device_create_file_fan(dev, i);
1264
1265 /* Read GPIO enable register to check if pins for fan 4,5 are used as
1266 GPIO */
1267 val1 = w83792d_read_value(client, W83792D_REG_GPIO_EN);
1268 if (!(val1 & 0x40))
1269 device_create_file_fan(dev, 3);
1270 if (!(val1 & 0x20))
1271 device_create_file_fan(dev, 4);
1272
1273 val1 = w83792d_read_value(client, W83792D_REG_PIN);
1274 if (val1 & 0x40)
1275 device_create_file_fan(dev, 5);
1276 if (val1 & 0x04)
1277 device_create_file_fan(dev, 6);
1278
1279 for (i = 0; i < 3; i++) {
1280 device_create_file(dev, &sda_temp_input[i].dev_attr);
1281 device_create_file(dev, &sda_temp_max[i].dev_attr);
1282 device_create_file(dev, &sda_temp_max_hyst[i].dev_attr);
1283 device_create_file(dev, &sda_thermal_cruise[i].dev_attr);
1284 device_create_file(dev, &sda_tolerance[i].dev_attr);
1285 }
1286
1287 for (i = 0; i < ARRAY_SIZE(sda_pwm); i++) {
1288 device_create_file(dev, &sda_pwm[i].dev_attr);
1289 device_create_file(dev, &sda_pwm_enable[i].dev_attr);
1290 device_create_file(dev, &sda_pwm_mode[i].dev_attr);
1291 }
1292
1293 device_create_file(dev, &dev_attr_alarms);
1294 device_create_file(dev, &dev_attr_chassis);
1295 device_create_file(dev, &dev_attr_chassis_clear);
1296
1297 for (i = 0; i < ARRAY_SIZE(sda_sf2_point); i++)
1298 device_create_file(dev, &sda_sf2_point[i].dev_attr);
1299
1300 for (i = 0; i < ARRAY_SIZE(sda_sf2_level); i++)
1301 device_create_file(dev, &sda_sf2_level[i].dev_attr);
1302
1303 return 0;
1304
1305 ERROR3:
1306 if (data->lm75[0] != NULL) {
1307 i2c_detach_client(data->lm75[0]);
1308 kfree(data->lm75[0]);
1309 }
1310 if (data->lm75[1] != NULL) {
1311 i2c_detach_client(data->lm75[1]);
1312 kfree(data->lm75[1]);
1313 }
1314 ERROR2:
1315 i2c_detach_client(client);
1316 ERROR1:
1317 kfree(data);
1318 ERROR0:
1319 return err;
1320 }
1321
1322 static int
1323 w83792d_detach_client(struct i2c_client *client)
1324 {
1325 struct w83792d_data *data = i2c_get_clientdata(client);
1326 int err;
1327
1328 /* main client */
1329 if (data)
1330 hwmon_device_unregister(data->class_dev);
1331
1332 if ((err = i2c_detach_client(client)))
1333 return err;
1334
1335 /* main client */
1336 if (data)
1337 kfree(data);
1338 /* subclient */
1339 else
1340 kfree(client);
1341
1342 return 0;
1343 }
1344
1345 static void
1346 w83792d_init_client(struct i2c_client *client)
1347 {
1348 u8 temp2_cfg, temp3_cfg, vid_in_b;
1349
1350 if (init) {
1351 w83792d_write_value(client, W83792D_REG_CONFIG, 0x80);
1352 }
1353 /* Clear the bit6 of W83792D_REG_VID_IN_B(set it into 0):
1354 W83792D_REG_VID_IN_B bit6 = 0: the high/low limit of
1355 vin0/vin1 can be modified by user;
1356 W83792D_REG_VID_IN_B bit6 = 1: the high/low limit of
1357 vin0/vin1 auto-updated, can NOT be modified by user. */
1358 vid_in_b = w83792d_read_value(client, W83792D_REG_VID_IN_B);
1359 w83792d_write_value(client, W83792D_REG_VID_IN_B,
1360 vid_in_b & 0xbf);
1361
1362 temp2_cfg = w83792d_read_value(client, W83792D_REG_TEMP2_CONFIG);
1363 temp3_cfg = w83792d_read_value(client, W83792D_REG_TEMP3_CONFIG);
1364 w83792d_write_value(client, W83792D_REG_TEMP2_CONFIG,
1365 temp2_cfg & 0xe6);
1366 w83792d_write_value(client, W83792D_REG_TEMP3_CONFIG,
1367 temp3_cfg & 0xe6);
1368
1369 /* Start monitoring */
1370 w83792d_write_value(client, W83792D_REG_CONFIG,
1371 (w83792d_read_value(client,
1372 W83792D_REG_CONFIG) & 0xf7)
1373 | 0x01);
1374 }
1375
1376 static struct w83792d_data *w83792d_update_device(struct device *dev)
1377 {
1378 struct i2c_client *client = to_i2c_client(dev);
1379 struct w83792d_data *data = i2c_get_clientdata(client);
1380 int i, j;
1381 u8 reg_array_tmp[4], reg_tmp;
1382
1383 mutex_lock(&data->update_lock);
1384
1385 if (time_after
1386 (jiffies - data->last_updated, (unsigned long) (HZ * 3))
1387 || time_before(jiffies, data->last_updated) || !data->valid) {
1388 dev_dbg(dev, "Starting device update\n");
1389
1390 /* Update the voltages measured value and limits */
1391 for (i = 0; i < 9; i++) {
1392 data->in[i] = w83792d_read_value(client,
1393 W83792D_REG_IN[i]);
1394 data->in_max[i] = w83792d_read_value(client,
1395 W83792D_REG_IN_MAX[i]);
1396 data->in_min[i] = w83792d_read_value(client,
1397 W83792D_REG_IN_MIN[i]);
1398 }
1399 data->low_bits = w83792d_read_value(client,
1400 W83792D_REG_LOW_BITS1) +
1401 (w83792d_read_value(client,
1402 W83792D_REG_LOW_BITS2) << 8);
1403 for (i = 0; i < 7; i++) {
1404 /* Update the Fan measured value and limits */
1405 data->fan[i] = w83792d_read_value(client,
1406 W83792D_REG_FAN[i]);
1407 data->fan_min[i] = w83792d_read_value(client,
1408 W83792D_REG_FAN_MIN[i]);
1409 /* Update the PWM/DC Value and PWM/DC flag */
1410 data->pwm[i] = w83792d_read_value(client,
1411 W83792D_REG_PWM[i]);
1412 }
1413
1414 reg_tmp = w83792d_read_value(client, W83792D_REG_FAN_CFG);
1415 data->pwmenable[0] = reg_tmp & 0x03;
1416 data->pwmenable[1] = (reg_tmp>>2) & 0x03;
1417 data->pwmenable[2] = (reg_tmp>>4) & 0x03;
1418
1419 for (i = 0; i < 3; i++) {
1420 data->temp1[i] = w83792d_read_value(client,
1421 W83792D_REG_TEMP1[i]);
1422 }
1423 for (i = 0; i < 2; i++) {
1424 for (j = 0; j < 6; j++) {
1425 data->temp_add[i][j] = w83792d_read_value(
1426 client,W83792D_REG_TEMP_ADD[i][j]);
1427 }
1428 }
1429
1430 /* Update the Fan Divisor */
1431 for (i = 0; i < 4; i++) {
1432 reg_array_tmp[i] = w83792d_read_value(client,
1433 W83792D_REG_FAN_DIV[i]);
1434 }
1435 data->fan_div[0] = reg_array_tmp[0] & 0x07;
1436 data->fan_div[1] = (reg_array_tmp[0] >> 4) & 0x07;
1437 data->fan_div[2] = reg_array_tmp[1] & 0x07;
1438 data->fan_div[3] = (reg_array_tmp[1] >> 4) & 0x07;
1439 data->fan_div[4] = reg_array_tmp[2] & 0x07;
1440 data->fan_div[5] = (reg_array_tmp[2] >> 4) & 0x07;
1441 data->fan_div[6] = reg_array_tmp[3] & 0x07;
1442
1443 /* Update the realtime status */
1444 data->alarms = w83792d_read_value(client, W83792D_REG_ALARM1) +
1445 (w83792d_read_value(client, W83792D_REG_ALARM2) << 8) +
1446 (w83792d_read_value(client, W83792D_REG_ALARM3) << 16);
1447
1448 /* Update CaseOpen status and it's CLR_CHS. */
1449 data->chassis = (w83792d_read_value(client,
1450 W83792D_REG_CHASSIS) >> 5) & 0x01;
1451 data->chassis_clear = (w83792d_read_value(client,
1452 W83792D_REG_CHASSIS_CLR) >> 7) & 0x01;
1453
1454 /* Update Thermal Cruise/Smart Fan I target value */
1455 for (i = 0; i < 3; i++) {
1456 data->thermal_cruise[i] =
1457 w83792d_read_value(client,
1458 W83792D_REG_THERMAL[i]) & 0x7f;
1459 }
1460
1461 /* Update Smart Fan I/II tolerance */
1462 reg_tmp = w83792d_read_value(client, W83792D_REG_TOLERANCE[0]);
1463 data->tolerance[0] = reg_tmp & 0x0f;
1464 data->tolerance[1] = (reg_tmp >> 4) & 0x0f;
1465 data->tolerance[2] = w83792d_read_value(client,
1466 W83792D_REG_TOLERANCE[2]) & 0x0f;
1467
1468 /* Update Smart Fan II temperature points */
1469 for (i = 0; i < 3; i++) {
1470 for (j = 0; j < 4; j++) {
1471 data->sf2_points[i][j] = w83792d_read_value(
1472 client,W83792D_REG_POINTS[i][j]) & 0x7f;
1473 }
1474 }
1475
1476 /* Update Smart Fan II duty cycle levels */
1477 for (i = 0; i < 3; i++) {
1478 reg_tmp = w83792d_read_value(client,
1479 W83792D_REG_LEVELS[i][0]);
1480 data->sf2_levels[i][0] = reg_tmp & 0x0f;
1481 data->sf2_levels[i][1] = (reg_tmp >> 4) & 0x0f;
1482 reg_tmp = w83792d_read_value(client,
1483 W83792D_REG_LEVELS[i][2]);
1484 data->sf2_levels[i][2] = (reg_tmp >> 4) & 0x0f;
1485 data->sf2_levels[i][3] = reg_tmp & 0x0f;
1486 }
1487
1488 data->last_updated = jiffies;
1489 data->valid = 1;
1490 }
1491
1492 mutex_unlock(&data->update_lock);
1493
1494 #ifdef DEBUG
1495 w83792d_print_debug(data, dev);
1496 #endif
1497
1498 return data;
1499 }
1500
1501 #ifdef DEBUG
1502 static void w83792d_print_debug(struct w83792d_data *data, struct device *dev)
1503 {
1504 int i=0, j=0;
1505 dev_dbg(dev, "==========The following is the debug message...========\n");
1506 dev_dbg(dev, "9 set of Voltages: =====>\n");
1507 for (i=0; i<9; i++) {
1508 dev_dbg(dev, "vin[%d] is: 0x%x\n", i, data->in[i]);
1509 dev_dbg(dev, "vin[%d] max is: 0x%x\n", i, data->in_max[i]);
1510 dev_dbg(dev, "vin[%d] min is: 0x%x\n", i, data->in_min[i]);
1511 }
1512 dev_dbg(dev, "Low Bit1 is: 0x%x\n", data->low_bits & 0xff);
1513 dev_dbg(dev, "Low Bit2 is: 0x%x\n", data->low_bits >> 8);
1514 dev_dbg(dev, "7 set of Fan Counts and Duty Cycles: =====>\n");
1515 for (i=0; i<7; i++) {
1516 dev_dbg(dev, "fan[%d] is: 0x%x\n", i, data->fan[i]);
1517 dev_dbg(dev, "fan[%d] min is: 0x%x\n", i, data->fan_min[i]);
1518 dev_dbg(dev, "pwm[%d] is: 0x%x\n", i, data->pwm[i]);
1519 }
1520 dev_dbg(dev, "3 set of Temperatures: =====>\n");
1521 for (i=0; i<3; i++) {
1522 dev_dbg(dev, "temp1[%d] is: 0x%x\n", i, data->temp1[i]);
1523 }
1524
1525 for (i=0; i<2; i++) {
1526 for (j=0; j<6; j++) {
1527 dev_dbg(dev, "temp_add[%d][%d] is: 0x%x\n", i, j,
1528 data->temp_add[i][j]);
1529 }
1530 }
1531
1532 for (i=0; i<7; i++) {
1533 dev_dbg(dev, "fan_div[%d] is: 0x%x\n", i, data->fan_div[i]);
1534 }
1535 dev_dbg(dev, "==========End of the debug message...==================\n");
1536 dev_dbg(dev, "\n");
1537 }
1538 #endif
1539
1540 static int __init
1541 sensors_w83792d_init(void)
1542 {
1543 return i2c_add_driver(&w83792d_driver);
1544 }
1545
1546 static void __exit
1547 sensors_w83792d_exit(void)
1548 {
1549 i2c_del_driver(&w83792d_driver);
1550 }
1551
1552 MODULE_AUTHOR("Chunhao Huang @ Winbond <DZShen@Winbond.com.tw>");
1553 MODULE_DESCRIPTION("W83792AD/D driver for linux-2.6");
1554 MODULE_LICENSE("GPL");
1555
1556 module_init(sensors_w83792d_init);
1557 module_exit(sensors_w83792d_exit);
1558