drivers/gpu/drm/radeon/radeon_ring.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include <linux/seq_file.h>
  29 #include "drmP.h"
  30 #include "radeon_drm.h"
  31 #include "radeon_reg.h"
  32 #include "radeon.h"
  33 #include "atom.h"
  34
  35 int radeon_debugfs_ib_init(struct radeon_device *rdev);
  36
  37 /*
  38  * IB.
  39  */
  40 int radeon_ib_get(struct radeon_device *rdev, struct radeon_ib **ib)
  41 {
  42         struct radeon_fence *fence;
  43         struct radeon_ib *nib;
  44         int r = 0, i, c;
  45
  46         *ib = NULL;
  47         r = radeon_fence_create(rdev, &fence);
  48         if (r) {
  49                 dev_err(rdev->dev, "failed to create fence for new IB\n");
  50                 return r;
  51         }
  52         mutex_lock(&rdev->ib_pool.mutex);
  53         for (i = rdev->ib_pool.head_id, c = 0, nib = NULL; c < RADEON_IB_POOL_SIZE; c++, i++) {
  54                 i &= (RADEON_IB_POOL_SIZE - 1);
  55                 if (rdev->ib_pool.ibs[i].free) {
  56                         nib = &rdev->ib_pool.ibs[i];
  57                         break;
  58                 }
  59         }
  60         if (nib == NULL) {
  61                 /* This should never happen, it means we allocated all
  62                  * IB and haven't scheduled one yet, return EBUSY to
  63                  * userspace hoping that on ioctl recall we get better
  64                  * luck
  65                  */
  66                 dev_err(rdev->dev, "no free indirect buffer !\n");
  67                 mutex_unlock(&rdev->ib_pool.mutex);
  68                 radeon_fence_unref(&fence);
  69                 return -EBUSY;
  70         }
  71         rdev->ib_pool.head_id = (nib->idx + 1) & (RADEON_IB_POOL_SIZE - 1);
  72         nib->free = false;
  73         if (nib->fence) {
  74                 mutex_unlock(&rdev->ib_pool.mutex);
  75                 r = radeon_fence_wait(nib->fence, false);
  76                 if (r) {
  77                         dev_err(rdev->dev, "error waiting fence of IB(%u:0x%016lX:%u)\n",
  78                                 nib->idx, (unsigned long)nib->gpu_addr, nib->length_dw);
  79                         mutex_lock(&rdev->ib_pool.mutex);
  80                         nib->free = true;
  81                         mutex_unlock(&rdev->ib_pool.mutex);
  82                         radeon_fence_unref(&fence);
  83                         return r;
  84                 }
  85                 mutex_lock(&rdev->ib_pool.mutex);
  86         }
  87         radeon_fence_unref(&nib->fence);
  88         nib->fence = fence;
  89         nib->length_dw = 0;
  90         mutex_unlock(&rdev->ib_pool.mutex);
  91         *ib = nib;
  92         return 0;
  93 }
  94
  95 void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib)
  96 {
  97         struct radeon_ib *tmp = *ib;
  98
  99         *ib = NULL;
 100         if (tmp == NULL) {
 101                 return;
 102         }
 103         if (!tmp->fence->emited)
 104                 radeon_fence_unref(&tmp->fence);
 105         mutex_lock(&rdev->ib_pool.mutex);
 106         tmp->free = true;
 107         mutex_unlock(&rdev->ib_pool.mutex);
 108 }
 109
 110 int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)
 111 {
 112         int r = 0;
 113
 114         if (!ib->length_dw || !rdev->cp.ready) {
 115                 /* TODO: Nothings in the ib we should report. */
 116                 DRM_ERROR("radeon: couldn't schedule IB(%u).\n", ib->idx);
 117                 return -EINVAL;
 118         }
 119
 120         /* 64 dwords should be enough for fence too */
 121         r = radeon_ring_lock(rdev, 64);
 122         if (r) {
 123                 DRM_ERROR("radeon: scheduling IB failled (%d).\n", r);
 124                 return r;
 125         }
 126         radeon_ring_ib_execute(rdev, ib);
 127         radeon_fence_emit(rdev, ib->fence);
 128         mutex_lock(&rdev->ib_pool.mutex);
 129         /* once scheduled IB is considered free and protected by the fence */
 130         ib->free = true;
 131         mutex_unlock(&rdev->ib_pool.mutex);
 132         radeon_ring_unlock_commit(rdev);
 133         return 0;
 134 }
 135
 136 int radeon_ib_pool_init(struct radeon_device *rdev)
 137 {
 138         void *ptr;
 139         uint64_t gpu_addr;
 140         int i;
 141         int r = 0;
 142
 143         if (rdev->ib_pool.robj)
 144                 return 0;
 145         /* Allocate 1M object buffer */
 146         r = radeon_bo_create(rdev, NULL,  RADEON_IB_POOL_SIZE*64*1024,
 147                                 true, RADEON_GEM_DOMAIN_GTT,
 148                                 &rdev->ib_pool.robj);
 149         if (r) {
 150                 DRM_ERROR("radeon: failed to ib pool (%d).\n", r);
 151                 return r;
 152         }
 153         r = radeon_bo_reserve(rdev->ib_pool.robj, false);
 154         if (unlikely(r != 0))
 155                 return r;
 156         r = radeon_bo_pin(rdev->ib_pool.robj, RADEON_GEM_DOMAIN_GTT, &gpu_addr);
 157         if (r) {
 158                 radeon_bo_unreserve(rdev->ib_pool.robj);
 159                 DRM_ERROR("radeon: failed to pin ib pool (%d).\n", r);
 160                 return r;
 161         }
 162         r = radeon_bo_kmap(rdev->ib_pool.robj, &ptr);
 163         radeon_bo_unreserve(rdev->ib_pool.robj);
 164         if (r) {
 165                 DRM_ERROR("radeon: failed to map ib poll (%d).\n", r);
 166                 return r;
 167         }
 168         for (i = 0; i < RADEON_IB_POOL_SIZE; i++) {
 169                 unsigned offset;
 170
 171                 offset = i * 64 * 1024;
 172                 rdev->ib_pool.ibs[i].gpu_addr = gpu_addr + offset;
 173                 rdev->ib_pool.ibs[i].ptr = ptr + offset;
 174                 rdev->ib_pool.ibs[i].idx = i;
 175                 rdev->ib_pool.ibs[i].length_dw = 0;
 176                 rdev->ib_pool.ibs[i].free = true;
 177         }
 178         rdev->ib_pool.head_id = 0;
 179         rdev->ib_pool.ready = true;
 180         DRM_INFO("radeon: ib pool ready.\n");
 181         if (radeon_debugfs_ib_init(rdev)) {
 182                 DRM_ERROR("Failed to register debugfs file for IB !\n");
 183         }
 184         return r;
 185 }
 186
 187 void radeon_ib_pool_fini(struct radeon_device *rdev)
 188 {
 189         int r;
 190
 191         if (!rdev->ib_pool.ready) {
 192                 return;
 193         }
 194         mutex_lock(&rdev->ib_pool.mutex);
 195         if (rdev->ib_pool.robj) {
 196                 r = radeon_bo_reserve(rdev->ib_pool.robj, false);
 197                 if (likely(r == 0)) {
 198                         radeon_bo_kunmap(rdev->ib_pool.robj);
 199                         radeon_bo_unpin(rdev->ib_pool.robj);
 200                         radeon_bo_unreserve(rdev->ib_pool.robj);
 201                 }
 202                 radeon_bo_unref(&rdev->ib_pool.robj);
 203                 rdev->ib_pool.robj = NULL;
 204         }
 205         mutex_unlock(&rdev->ib_pool.mutex);
 206 }
 207
 208
 209 /*
 210  * Ring.
 211  */
 212 void radeon_ring_free_size(struct radeon_device *rdev)
 213 {
 214         if (rdev->family >= CHIP_R600)
 215                 rdev->cp.rptr = RREG32(R600_CP_RB_RPTR);
 216         else
 217                 rdev->cp.rptr = RREG32(RADEON_CP_RB_RPTR);
 218         /* This works because ring_size is a power of 2 */
 219         rdev->cp.ring_free_dw = (rdev->cp.rptr + (rdev->cp.ring_size / 4));
 220         rdev->cp.ring_free_dw -= rdev->cp.wptr;
 221         rdev->cp.ring_free_dw &= rdev->cp.ptr_mask;
 222         if (!rdev->cp.ring_free_dw) {
 223                 rdev->cp.ring_free_dw = rdev->cp.ring_size / 4;
 224         }
 225 }
 226
 227 int radeon_ring_lock(struct radeon_device *rdev, unsigned ndw)
 228 {
 229         int r;
 230
 231         /* Align requested size with padding so unlock_commit can
 232          * pad safely */
 233         ndw = (ndw + rdev->cp.align_mask) & ~rdev->cp.align_mask;
 234         mutex_lock(&rdev->cp.mutex);
 235         while (ndw > (rdev->cp.ring_free_dw - 1)) {
 236                 radeon_ring_free_size(rdev);
 237                 if (ndw < rdev->cp.ring_free_dw) {
 238                         break;
 239                 }
 240                 r = radeon_fence_wait_next(rdev);
 241                 if (r) {
 242                         mutex_unlock(&rdev->cp.mutex);
 243                         return r;
 244                 }
 245         }
 246         rdev->cp.count_dw = ndw;
 247         rdev->cp.wptr_old = rdev->cp.wptr;
 248         return 0;
 249 }
 250
 251 void radeon_ring_unlock_commit(struct radeon_device *rdev)
 252 {
 253         unsigned count_dw_pad;
 254         unsigned i;
 255
 256         /* We pad to match fetch size */
 257         count_dw_pad = (rdev->cp.align_mask + 1) -
 258                        (rdev->cp.wptr & rdev->cp.align_mask);
 259         for (i = 0; i < count_dw_pad; i++) {
 260                 radeon_ring_write(rdev, 2 << 30);
 261         }
 262         DRM_MEMORYBARRIER();
 263         radeon_cp_commit(rdev);
 264         mutex_unlock(&rdev->cp.mutex);
 265 }
 266
 267 void radeon_ring_unlock_undo(struct radeon_device *rdev)
 268 {
 269         rdev->cp.wptr = rdev->cp.wptr_old;
 270         mutex_unlock(&rdev->cp.mutex);
 271 }
 272
 273 int radeon_ring_init(struct radeon_device *rdev, unsigned ring_size)
 274 {
 275         int r;
 276
 277         rdev->cp.ring_size = ring_size;
 278         /* Allocate ring buffer */
 279         if (rdev->cp.ring_obj == NULL) {
 280                 r = radeon_bo_create(rdev, NULL, rdev->cp.ring_size, true,
 281                                         RADEON_GEM_DOMAIN_GTT,
 282                                         &rdev->cp.ring_obj);
 283                 if (r) {
 284                         dev_err(rdev->dev, "(%d) ring create failed\n", r);
 285                         return r;
 286                 }
 287                 r = radeon_bo_reserve(rdev->cp.ring_obj, false);
 288                 if (unlikely(r != 0))
 289                         return r;
 290                 r = radeon_bo_pin(rdev->cp.ring_obj, RADEON_GEM_DOMAIN_GTT,
 291                                         &rdev->cp.gpu_addr);
 292                 if (r) {
 293                         radeon_bo_unreserve(rdev->cp.ring_obj);
 294                         dev_err(rdev->dev, "(%d) ring pin failed\n", r);
 295                         return r;
 296                 }
 297                 r = radeon_bo_kmap(rdev->cp.ring_obj,
 298                                        (void **)&rdev->cp.ring);
 299                 radeon_bo_unreserve(rdev->cp.ring_obj);
 300                 if (r) {
 301                         dev_err(rdev->dev, "(%d) ring map failed\n", r);
 302                         return r;
 303                 }
 304         }
 305         rdev->cp.ptr_mask = (rdev->cp.ring_size / 4) - 1;
 306         rdev->cp.ring_free_dw = rdev->cp.ring_size / 4;
 307         return 0;
 308 }
 309
 310 void radeon_ring_fini(struct radeon_device *rdev)
 311 {
 312         int r;
 313
 314         mutex_lock(&rdev->cp.mutex);
 315         if (rdev->cp.ring_obj) {
 316                 r = radeon_bo_reserve(rdev->cp.ring_obj, false);
 317                 if (likely(r == 0)) {
 318                         radeon_bo_kunmap(rdev->cp.ring_obj);
 319                         radeon_bo_unpin(rdev->cp.ring_obj);
 320                         radeon_bo_unreserve(rdev->cp.ring_obj);
 321                 }
 322                 radeon_bo_unref(&rdev->cp.ring_obj);
 323                 rdev->cp.ring = NULL;
 324                 rdev->cp.ring_obj = NULL;
 325         }
 326         mutex_unlock(&rdev->cp.mutex);
 327 }
 328
 329
 330 /*
 331  * Debugfs info
 332  */
 333 #if defined(CONFIG_DEBUG_FS)
 334 static int radeon_debugfs_ib_info(struct seq_file *m, void *data)
 335 {
 336         struct drm_info_node *node = (struct drm_info_node *) m->private;
 337         struct radeon_ib *ib = node->info_ent->data;
 338         unsigned i;
 339
 340         if (ib == NULL) {
 341                 return 0;
 342         }
 343         seq_printf(m, "IB %04u\n", ib->idx);
 344         seq_printf(m, "IB fence %p\n", ib->fence);
 345         seq_printf(m, "IB size %05u dwords\n", ib->length_dw);
 346         for (i = 0; i < ib->length_dw; i++) {
 347                 seq_printf(m, "[%05u]=0x%08X\n", i, ib->ptr[i]);
 348         }
 349         return 0;
 350 }
 351
 352 static struct drm_info_list radeon_debugfs_ib_list[RADEON_IB_POOL_SIZE];
 353 static char radeon_debugfs_ib_names[RADEON_IB_POOL_SIZE][32];
 354 #endif
 355
 356 int radeon_debugfs_ib_init(struct radeon_device *rdev)
 357 {
 358 #if defined(CONFIG_DEBUG_FS)
 359         unsigned i;
 360
 361         for (i = 0; i < RADEON_IB_POOL_SIZE; i++) {
 362                 sprintf(radeon_debugfs_ib_names[i], "radeon_ib_%04u", i);
 363                 radeon_debugfs_ib_list[i].name = radeon_debugfs_ib_names[i];
 364                 radeon_debugfs_ib_list[i].show = &radeon_debugfs_ib_info;
 365                 radeon_debugfs_ib_list[i].driver_features = 0;
 366                 radeon_debugfs_ib_list[i].data = &rdev->ib_pool.ibs[i];
 367         }
 368         return radeon_debugfs_add_files(rdev, radeon_debugfs_ib_list,
 369                                         RADEON_IB_POOL_SIZE);
 370 #else
 371         return 0;
 372 #endif
 373 }