drivers/gpu/drm/radeon/radeon_irq_kms.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include "drmP.h"
  29 #include "drm_crtc_helper.h"
  30 #include "radeon_drm.h"
  31 #include "radeon_reg.h"
  32 #include "radeon.h"
  33 #include "atom.h"
  34
  35 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
  36 {
  37         struct drm_device *dev = (struct drm_device *) arg;
  38         struct radeon_device *rdev = dev->dev_private;
  39
  40         return radeon_irq_process(rdev);
  41 }
  42
  43 /*
  44  * Handle hotplug events outside the interrupt handler proper.
  45  */
  46 static void radeon_hotplug_work_func(struct work_struct *work)
  47 {
  48         struct radeon_device *rdev = container_of(work, struct radeon_device,
  49                                                   hotplug_work);
  50         struct drm_device *dev = rdev->ddev;
  51         struct drm_mode_config *mode_config = &dev->mode_config;
  52         struct drm_connector *connector;
  53
  54         if (mode_config->num_connector) {
  55                 list_for_each_entry(connector, &mode_config->connector_list, head)
  56                         radeon_connector_hotplug(connector);
  57         }
  58         /* Just fire off a uevent and let userspace tell us what to do */
  59         drm_helper_hpd_irq_event(dev);
  60 }
  61
  62 void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
  63 {
  64         struct radeon_device *rdev = dev->dev_private;
  65         unsigned i;
  66
  67         /* Disable *all* interrupts */
  68         for (i = 0; i < RADEON_NUM_RINGS; i++)
  69                 rdev->irq.sw_int[i] = false;
  70         rdev->irq.gui_idle = false;
  71         for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
  72                 rdev->irq.hpd[i] = false;
  73         for (i = 0; i < RADEON_MAX_CRTCS; i++) {
  74                 rdev->irq.crtc_vblank_int[i] = false;
  75                 rdev->irq.pflip[i] = false;
  76         }
  77         radeon_irq_set(rdev);
  78         /* Clear bits */
  79         radeon_irq_process(rdev);
  80 }
  81
  82 int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
  83 {
  84         struct radeon_device *rdev = dev->dev_private;
  85         unsigned i;
  86
  87         dev->max_vblank_count = 0x001fffff;
  88         for (i = 0; i < RADEON_NUM_RINGS; i++)
  89                 rdev->irq.sw_int[i] = true;
  90         radeon_irq_set(rdev);
  91         return 0;
  92 }
  93
  94 void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
  95 {
  96         struct radeon_device *rdev = dev->dev_private;
  97         unsigned i;
  98
  99         if (rdev == NULL) {
 100                 return;
 101         }
 102         /* Disable *all* interrupts */
 103         for (i = 0; i < RADEON_NUM_RINGS; i++)
 104                 rdev->irq.sw_int[i] = false;
 105         rdev->irq.gui_idle = false;
 106         for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
 107                 rdev->irq.hpd[i] = false;
 108         for (i = 0; i < RADEON_MAX_CRTCS; i++) {
 109                 rdev->irq.crtc_vblank_int[i] = false;
 110                 rdev->irq.pflip[i] = false;
 111         }
 112         radeon_irq_set(rdev);
 113 }
 114
 115 static bool radeon_msi_ok(struct radeon_device *rdev)
 116 {
 117         /* RV370/RV380 was first asic with MSI support */
 118         if (rdev->family < CHIP_RV380)
 119                 return false;
 120
 121         /* MSIs don't work on AGP */
 122         if (rdev->flags & RADEON_IS_AGP)
 123                 return false;
 124
 125         /* force MSI on */
 126         if (radeon_msi == 1)
 127                 return true;
 128         else if (radeon_msi == 0)
 129                 return false;
 130
 131         /* Quirks */
 132         /* HP RS690 only seems to work with MSIs. */
 133         if ((rdev->pdev->device == 0x791f) &&
 134             (rdev->pdev->subsystem_vendor == 0x103c) &&
 135             (rdev->pdev->subsystem_device == 0x30c2))
 136                 return true;
 137
 138         /* Dell RS690 only seems to work with MSIs. */
 139         if ((rdev->pdev->device == 0x791f) &&
 140             (rdev->pdev->subsystem_vendor == 0x1028) &&
 141             (rdev->pdev->subsystem_device == 0x01fc))
 142                 return true;
 143
 144         /* Dell RS690 only seems to work with MSIs. */
 145         if ((rdev->pdev->device == 0x791f) &&
 146             (rdev->pdev->subsystem_vendor == 0x1028) &&
 147             (rdev->pdev->subsystem_device == 0x01fd))
 148                 return true;
 149
 150         if (rdev->flags & RADEON_IS_IGP) {
 151                 /* APUs work fine with MSIs */
 152                 if (rdev->family >= CHIP_PALM)
 153                         return true;
 154                 /* lots of IGPs have problems with MSIs */
 155                 return false;
 156         }
 157
 158         return true;
 159 }
 160
 161 int radeon_irq_kms_init(struct radeon_device *rdev)
 162 {
 163         int i;
 164         int r = 0;
 165
 166         INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
 167
 168         spin_lock_init(&rdev->irq.sw_lock);
 169         for (i = 0; i < rdev->num_crtc; i++)
 170                 spin_lock_init(&rdev->irq.pflip_lock[i]);
 171         r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
 172         if (r) {
 173                 return r;
 174         }
 175         /* enable msi */
 176         rdev->msi_enabled = 0;
 177
 178         if (radeon_msi_ok(rdev)) {
 179                 int ret = pci_enable_msi(rdev->pdev);
 180                 if (!ret) {
 181                         rdev->msi_enabled = 1;
 182                         dev_info(rdev->dev, "radeon: using MSI.\n");
 183                 }
 184         }
 185         rdev->irq.installed = true;
 186         r = drm_irq_install(rdev->ddev);
 187         if (r) {
 188                 rdev->irq.installed = false;
 189                 return r;
 190         }
 191         DRM_INFO("radeon: irq initialized.\n");
 192         return 0;
 193 }
 194
 195 void radeon_irq_kms_fini(struct radeon_device *rdev)
 196 {
 197         drm_vblank_cleanup(rdev->ddev);
 198         if (rdev->irq.installed) {
 199                 drm_irq_uninstall(rdev->ddev);
 200                 rdev->irq.installed = false;
 201                 if (rdev->msi_enabled)
 202                         pci_disable_msi(rdev->pdev);
 203         }
 204         flush_work_sync(&rdev->hotplug_work);
 205 }
 206
 207 void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
 208 {
 209         unsigned long irqflags;
 210
 211         spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
 212         if (rdev->ddev->irq_enabled && (++rdev->irq.sw_refcount[ring] == 1)) {
 213                 rdev->irq.sw_int[ring] = true;
 214                 radeon_irq_set(rdev);
 215         }
 216         spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
 217 }
 218
 219 void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
 220 {
 221         unsigned long irqflags;
 222
 223         spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
 224         BUG_ON(rdev->ddev->irq_enabled && rdev->irq.sw_refcount[ring] <= 0);
 225         if (rdev->ddev->irq_enabled && (--rdev->irq.sw_refcount[ring] == 0)) {
 226                 rdev->irq.sw_int[ring] = false;
 227                 radeon_irq_set(rdev);
 228         }
 229         spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
 230 }
 231
 232 void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
 233 {
 234         unsigned long irqflags;
 235
 236         if (crtc < 0 || crtc >= rdev->num_crtc)
 237                 return;
 238
 239         spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
 240         if (rdev->ddev->irq_enabled && (++rdev->irq.pflip_refcount[crtc] == 1)) {
 241                 rdev->irq.pflip[crtc] = true;
 242                 radeon_irq_set(rdev);
 243         }
 244         spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
 245 }
 246
 247 void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
 248 {
 249         unsigned long irqflags;
 250
 251         if (crtc < 0 || crtc >= rdev->num_crtc)
 252                 return;
 253
 254         spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
 255         BUG_ON(rdev->ddev->irq_enabled && rdev->irq.pflip_refcount[crtc] <= 0);
 256         if (rdev->ddev->irq_enabled && (--rdev->irq.pflip_refcount[crtc] == 0)) {
 257                 rdev->irq.pflip[crtc] = false;
 258                 radeon_irq_set(rdev);
 259         }
 260         spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
 261 }
 262