drivers/gpu/drm/radeon/radeon_irq_kms.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include "drmP.h"
  29 #include "drm_crtc_helper.h"
  30 #include "radeon_drm.h"
  31 #include "radeon_reg.h"
  32 #include "radeon.h"
  33 #include "atom.h"
  34
  35 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
  36 {
  37         struct drm_device *dev = (struct drm_device *) arg;
  38         struct radeon_device *rdev = dev->dev_private;
  39
  40         return radeon_irq_process(rdev);
  41 }
  42
  43 /*
  44  * Handle hotplug events outside the interrupt handler proper.
  45  */
  46 static void radeon_hotplug_work_func(struct work_struct *work)
  47 {
  48         struct radeon_device *rdev = container_of(work, struct radeon_device,
  49                                                   hotplug_work);
  50         struct drm_device *dev = rdev->ddev;
  51         struct drm_mode_config *mode_config = &dev->mode_config;
  52         struct drm_connector *connector;
  53
  54         if (mode_config->num_connector) {
  55                 list_for_each_entry(connector, &mode_config->connector_list, head)
  56                         radeon_connector_hotplug(connector);
  57         }
  58         /* Just fire off a uevent and let userspace tell us what to do */
  59         drm_helper_hpd_irq_event(dev);
  60 }
  61
  62 void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
  63 {
  64         struct radeon_device *rdev = dev->dev_private;
  65         unsigned i;
  66
  67         /* Disable *all* interrupts */
  68         rdev->irq.sw_int = false;
  69         rdev->irq.gui_idle = false;
  70         for (i = 0; i < rdev->num_crtc; i++)
  71                 rdev->irq.crtc_vblank_int[i] = false;
  72         for (i = 0; i < 6; i++) {
  73                 rdev->irq.hpd[i] = false;
  74                 rdev->irq.pflip[i] = false;
  75         }
  76         radeon_irq_set(rdev);
  77         /* Clear bits */
  78         radeon_irq_process(rdev);
  79 }
  80
  81 int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
  82 {
  83         struct radeon_device *rdev = dev->dev_private;
  84
  85         dev->max_vblank_count = 0x001fffff;
  86         rdev->irq.sw_int = true;
  87         radeon_irq_set(rdev);
  88         return 0;
  89 }
  90
  91 void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
  92 {
  93         struct radeon_device *rdev = dev->dev_private;
  94         unsigned i;
  95
  96         if (rdev == NULL) {
  97                 return;
  98         }
  99         /* Disable *all* interrupts */
 100         rdev->irq.sw_int = false;
 101         rdev->irq.gui_idle = false;
 102         for (i = 0; i < rdev->num_crtc; i++)
 103                 rdev->irq.crtc_vblank_int[i] = false;
 104         for (i = 0; i < 6; i++) {
 105                 rdev->irq.hpd[i] = false;
 106                 rdev->irq.pflip[i] = false;
 107         }
 108         radeon_irq_set(rdev);
 109 }
 110
 111 int radeon_irq_kms_init(struct radeon_device *rdev)
 112 {
 113         int i;
 114         int r = 0;
 115
 116         INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
 117
 118         spin_lock_init(&rdev->irq.sw_lock);
 119         for (i = 0; i < rdev->num_crtc; i++)
 120                 spin_lock_init(&rdev->irq.pflip_lock[i]);
 121         r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
 122         if (r) {
 123                 return r;
 124         }
 125         /* enable msi */
 126         rdev->msi_enabled = 0;
 127         /* MSIs don't seem to work reliably on all IGP
 128          * chips.  Disable MSI on them for now.
 129          */
 130         if ((rdev->family >= CHIP_RV380) &&
 131             ((!(rdev->flags & RADEON_IS_IGP)) || (rdev->family >= CHIP_PALM)) &&
 132             (!(rdev->flags & RADEON_IS_AGP))) {
 133                 int ret = pci_enable_msi(rdev->pdev);
 134                 if (!ret) {
 135                         rdev->msi_enabled = 1;
 136                         dev_info(rdev->dev, "radeon: using MSI.\n");
 137                 }
 138         }
 139         rdev->irq.installed = true;
 140         r = drm_irq_install(rdev->ddev);
 141         if (r) {
 142                 rdev->irq.installed = false;
 143                 return r;
 144         }
 145         DRM_INFO("radeon: irq initialized.\n");
 146         return 0;
 147 }
 148
 149 void radeon_irq_kms_fini(struct radeon_device *rdev)
 150 {
 151         drm_vblank_cleanup(rdev->ddev);
 152         if (rdev->irq.installed) {
 153                 drm_irq_uninstall(rdev->ddev);
 154                 rdev->irq.installed = false;
 155                 if (rdev->msi_enabled)
 156                         pci_disable_msi(rdev->pdev);
 157         }
 158         flush_work_sync(&rdev->hotplug_work);
 159 }
 160
 161 void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev)
 162 {
 163         unsigned long irqflags;
 164
 165         spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
 166         if (rdev->ddev->irq_enabled && (++rdev->irq.sw_refcount == 1)) {
 167                 rdev->irq.sw_int = true;
 168                 radeon_irq_set(rdev);
 169         }
 170         spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
 171 }
 172
 173 void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev)
 174 {
 175         unsigned long irqflags;
 176
 177         spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
 178         BUG_ON(rdev->ddev->irq_enabled && rdev->irq.sw_refcount <= 0);
 179         if (rdev->ddev->irq_enabled && (--rdev->irq.sw_refcount == 0)) {
 180                 rdev->irq.sw_int = false;
 181                 radeon_irq_set(rdev);
 182         }
 183         spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
 184 }
 185
 186 void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
 187 {
 188         unsigned long irqflags;
 189
 190         if (crtc < 0 || crtc >= rdev->num_crtc)
 191                 return;
 192
 193         spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
 194         if (rdev->ddev->irq_enabled && (++rdev->irq.pflip_refcount[crtc] == 1)) {
 195                 rdev->irq.pflip[crtc] = true;
 196                 radeon_irq_set(rdev);
 197         }
 198         spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
 199 }
 200
 201 void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
 202 {
 203         unsigned long irqflags;
 204
 205         if (crtc < 0 || crtc >= rdev->num_crtc)
 206                 return;
 207
 208         spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
 209         BUG_ON(rdev->ddev->irq_enabled && rdev->irq.pflip_refcount[crtc] <= 0);
 210         if (rdev->ddev->irq_enabled && (--rdev->irq.pflip_refcount[crtc] == 0)) {
 211                 rdev->irq.pflip[crtc] = false;
 212                 radeon_irq_set(rdev);
 213         }
 214         spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
 215 }
 216