UAPI: (Scripted) Convert #include "..." to #include <path/...> in drivers/gpu/
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / radeon / radeon_fb.c
1 /*
2 * Copyright © 2007 David Airlie
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * David Airlie
25 */
26 #include <linux/module.h>
27 #include <linux/slab.h>
28 #include <linux/fb.h>
29
30 #include <drm/drmP.h>
31 #include <drm/drm_crtc.h>
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/radeon_drm.h>
34 #include "radeon.h"
35
36 #include <drm/drm_fb_helper.h>
37
38 #include <linux/vga_switcheroo.h>
39
40 /* object hierarchy -
41 this contains a helper + a radeon fb
42 the helper contains a pointer to radeon framebuffer baseclass.
43 */
44 struct radeon_fbdev {
45 struct drm_fb_helper helper;
46 struct radeon_framebuffer rfb;
47 struct list_head fbdev_list;
48 struct radeon_device *rdev;
49 };
50
51 static struct fb_ops radeonfb_ops = {
52 .owner = THIS_MODULE,
53 .fb_check_var = drm_fb_helper_check_var,
54 .fb_set_par = drm_fb_helper_set_par,
55 .fb_fillrect = cfb_fillrect,
56 .fb_copyarea = cfb_copyarea,
57 .fb_imageblit = cfb_imageblit,
58 .fb_pan_display = drm_fb_helper_pan_display,
59 .fb_blank = drm_fb_helper_blank,
60 .fb_setcmap = drm_fb_helper_setcmap,
61 .fb_debug_enter = drm_fb_helper_debug_enter,
62 .fb_debug_leave = drm_fb_helper_debug_leave,
63 };
64
65
66 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
67 {
68 int aligned = width;
69 int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
70 int pitch_mask = 0;
71
72 switch (bpp / 8) {
73 case 1:
74 pitch_mask = align_large ? 255 : 127;
75 break;
76 case 2:
77 pitch_mask = align_large ? 127 : 31;
78 break;
79 case 3:
80 case 4:
81 pitch_mask = align_large ? 63 : 15;
82 break;
83 }
84
85 aligned += pitch_mask;
86 aligned &= ~pitch_mask;
87 return aligned;
88 }
89
90 static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
91 {
92 struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
93 int ret;
94
95 ret = radeon_bo_reserve(rbo, false);
96 if (likely(ret == 0)) {
97 radeon_bo_kunmap(rbo);
98 radeon_bo_unpin(rbo);
99 radeon_bo_unreserve(rbo);
100 }
101 drm_gem_object_unreference_unlocked(gobj);
102 }
103
104 static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
105 struct drm_mode_fb_cmd2 *mode_cmd,
106 struct drm_gem_object **gobj_p)
107 {
108 struct radeon_device *rdev = rfbdev->rdev;
109 struct drm_gem_object *gobj = NULL;
110 struct radeon_bo *rbo = NULL;
111 bool fb_tiled = false; /* useful for testing */
112 u32 tiling_flags = 0;
113 int ret;
114 int aligned_size, size;
115 int height = mode_cmd->height;
116 u32 bpp, depth;
117
118 drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp);
119
120 /* need to align pitch with crtc limits */
121 mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, bpp,
122 fb_tiled) * ((bpp + 1) / 8);
123
124 if (rdev->family >= CHIP_R600)
125 height = ALIGN(mode_cmd->height, 8);
126 size = mode_cmd->pitches[0] * height;
127 aligned_size = ALIGN(size, PAGE_SIZE);
128 ret = radeon_gem_object_create(rdev, aligned_size, 0,
129 RADEON_GEM_DOMAIN_VRAM,
130 false, true,
131 &gobj);
132 if (ret) {
133 printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
134 aligned_size);
135 return -ENOMEM;
136 }
137 rbo = gem_to_radeon_bo(gobj);
138
139 if (fb_tiled)
140 tiling_flags = RADEON_TILING_MACRO;
141
142 #ifdef __BIG_ENDIAN
143 switch (bpp) {
144 case 32:
145 tiling_flags |= RADEON_TILING_SWAP_32BIT;
146 break;
147 case 16:
148 tiling_flags |= RADEON_TILING_SWAP_16BIT;
149 default:
150 break;
151 }
152 #endif
153
154 if (tiling_flags) {
155 ret = radeon_bo_set_tiling_flags(rbo,
156 tiling_flags | RADEON_TILING_SURFACE,
157 mode_cmd->pitches[0]);
158 if (ret)
159 dev_err(rdev->dev, "FB failed to set tiling flags\n");
160 }
161
162
163 ret = radeon_bo_reserve(rbo, false);
164 if (unlikely(ret != 0))
165 goto out_unref;
166 /* Only 27 bit offset for legacy CRTC */
167 ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
168 ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
169 NULL);
170 if (ret) {
171 radeon_bo_unreserve(rbo);
172 goto out_unref;
173 }
174 if (fb_tiled)
175 radeon_bo_check_tiling(rbo, 0, 0);
176 ret = radeon_bo_kmap(rbo, NULL);
177 radeon_bo_unreserve(rbo);
178 if (ret) {
179 goto out_unref;
180 }
181
182 *gobj_p = gobj;
183 return 0;
184 out_unref:
185 radeonfb_destroy_pinned_object(gobj);
186 *gobj_p = NULL;
187 return ret;
188 }
189
190 static int radeonfb_create(struct radeon_fbdev *rfbdev,
191 struct drm_fb_helper_surface_size *sizes)
192 {
193 struct radeon_device *rdev = rfbdev->rdev;
194 struct fb_info *info;
195 struct drm_framebuffer *fb = NULL;
196 struct drm_mode_fb_cmd2 mode_cmd;
197 struct drm_gem_object *gobj = NULL;
198 struct radeon_bo *rbo = NULL;
199 struct device *device = &rdev->pdev->dev;
200 int ret;
201 unsigned long tmp;
202
203 mode_cmd.width = sizes->surface_width;
204 mode_cmd.height = sizes->surface_height;
205
206 /* avivo can't scanout real 24bpp */
207 if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
208 sizes->surface_bpp = 32;
209
210 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
211 sizes->surface_depth);
212
213 ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
214 if (ret) {
215 DRM_ERROR("failed to create fbcon object %d\n", ret);
216 return ret;
217 }
218
219 rbo = gem_to_radeon_bo(gobj);
220
221 /* okay we have an object now allocate the framebuffer */
222 info = framebuffer_alloc(0, device);
223 if (info == NULL) {
224 ret = -ENOMEM;
225 goto out_unref;
226 }
227
228 info->par = rfbdev;
229
230 ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
231 if (ret) {
232 DRM_ERROR("failed to initalise framebuffer %d\n", ret);
233 goto out_unref;
234 }
235
236 fb = &rfbdev->rfb.base;
237
238 /* setup helper */
239 rfbdev->helper.fb = fb;
240 rfbdev->helper.fbdev = info;
241
242 memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
243
244 strcpy(info->fix.id, "radeondrmfb");
245
246 drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
247
248 info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
249 info->fbops = &radeonfb_ops;
250
251 tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
252 info->fix.smem_start = rdev->mc.aper_base + tmp;
253 info->fix.smem_len = radeon_bo_size(rbo);
254 info->screen_base = rbo->kptr;
255 info->screen_size = radeon_bo_size(rbo);
256
257 drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
258
259 /* setup aperture base/size for vesafb takeover */
260 info->apertures = alloc_apertures(1);
261 if (!info->apertures) {
262 ret = -ENOMEM;
263 goto out_unref;
264 }
265 info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
266 info->apertures->ranges[0].size = rdev->mc.aper_size;
267
268 /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
269
270 if (info->screen_base == NULL) {
271 ret = -ENOSPC;
272 goto out_unref;
273 }
274
275 ret = fb_alloc_cmap(&info->cmap, 256, 0);
276 if (ret) {
277 ret = -ENOMEM;
278 goto out_unref;
279 }
280
281 DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
282 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
283 DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
284 DRM_INFO("fb depth is %d\n", fb->depth);
285 DRM_INFO(" pitch is %d\n", fb->pitches[0]);
286
287 vga_switcheroo_client_fb_set(rdev->ddev->pdev, info);
288 return 0;
289
290 out_unref:
291 if (rbo) {
292
293 }
294 if (fb && ret) {
295 drm_gem_object_unreference(gobj);
296 drm_framebuffer_cleanup(fb);
297 kfree(fb);
298 }
299 return ret;
300 }
301
302 static int radeon_fb_find_or_create_single(struct drm_fb_helper *helper,
303 struct drm_fb_helper_surface_size *sizes)
304 {
305 struct radeon_fbdev *rfbdev = (struct radeon_fbdev *)helper;
306 int new_fb = 0;
307 int ret;
308
309 if (!helper->fb) {
310 ret = radeonfb_create(rfbdev, sizes);
311 if (ret)
312 return ret;
313 new_fb = 1;
314 }
315 return new_fb;
316 }
317
318 static char *mode_option;
319 int radeon_parse_options(char *options)
320 {
321 char *this_opt;
322
323 if (!options || !*options)
324 return 0;
325
326 while ((this_opt = strsep(&options, ",")) != NULL) {
327 if (!*this_opt)
328 continue;
329 mode_option = this_opt;
330 }
331 return 0;
332 }
333
334 void radeon_fb_output_poll_changed(struct radeon_device *rdev)
335 {
336 drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper);
337 }
338
339 static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
340 {
341 struct fb_info *info;
342 struct radeon_framebuffer *rfb = &rfbdev->rfb;
343
344 if (rfbdev->helper.fbdev) {
345 info = rfbdev->helper.fbdev;
346
347 unregister_framebuffer(info);
348 if (info->cmap.len)
349 fb_dealloc_cmap(&info->cmap);
350 framebuffer_release(info);
351 }
352
353 if (rfb->obj) {
354 radeonfb_destroy_pinned_object(rfb->obj);
355 rfb->obj = NULL;
356 }
357 drm_fb_helper_fini(&rfbdev->helper);
358 drm_framebuffer_cleanup(&rfb->base);
359
360 return 0;
361 }
362
363 static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
364 .gamma_set = radeon_crtc_fb_gamma_set,
365 .gamma_get = radeon_crtc_fb_gamma_get,
366 .fb_probe = radeon_fb_find_or_create_single,
367 };
368
369 int radeon_fbdev_init(struct radeon_device *rdev)
370 {
371 struct radeon_fbdev *rfbdev;
372 int bpp_sel = 32;
373 int ret;
374
375 /* select 8 bpp console on RN50 or 16MB cards */
376 if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
377 bpp_sel = 8;
378
379 rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
380 if (!rfbdev)
381 return -ENOMEM;
382
383 rfbdev->rdev = rdev;
384 rdev->mode_info.rfbdev = rfbdev;
385 rfbdev->helper.funcs = &radeon_fb_helper_funcs;
386
387 ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper,
388 rdev->num_crtc,
389 RADEONFB_CONN_LIMIT);
390 if (ret) {
391 kfree(rfbdev);
392 return ret;
393 }
394
395 drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
396 drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
397 return 0;
398 }
399
400 void radeon_fbdev_fini(struct radeon_device *rdev)
401 {
402 if (!rdev->mode_info.rfbdev)
403 return;
404
405 radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
406 kfree(rdev->mode_info.rfbdev);
407 rdev->mode_info.rfbdev = NULL;
408 }
409
410 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
411 {
412 fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state);
413 }
414
415 int radeon_fbdev_total_size(struct radeon_device *rdev)
416 {
417 struct radeon_bo *robj;
418 int size = 0;
419
420 robj = gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj);
421 size += radeon_bo_size(robj);
422 return size;
423 }
424
425 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
426 {
427 if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj))
428 return true;
429 return false;
430 }