Merge branch 'fixes_for-3.6' into fixes
[GitHub/exynos8895/android_kernel_samsung_universal8895.git] / drivers / gpu / drm / nouveau / nouveau_irq.c
1 /*
2 * Copyright (C) 2006 Ben Skeggs.
3 *
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 */
27
28 /*
29 * Authors:
30 * Ben Skeggs <darktama@iinet.net.au>
31 */
32
33 #include "drmP.h"
34 #include "drm.h"
35 #include "nouveau_drm.h"
36 #include "nouveau_drv.h"
37 #include "nouveau_reg.h"
38 #include "nouveau_ramht.h"
39 #include "nouveau_util.h"
40
41 void
42 nouveau_irq_preinstall(struct drm_device *dev)
43 {
44 /* Master disable */
45 nv_wr32(dev, NV03_PMC_INTR_EN_0, 0);
46 }
47
48 int
49 nouveau_irq_postinstall(struct drm_device *dev)
50 {
51 struct drm_nouveau_private *dev_priv = dev->dev_private;
52
53 /* Master enable */
54 nv_wr32(dev, NV03_PMC_INTR_EN_0, NV_PMC_INTR_EN_0_MASTER_ENABLE);
55 if (dev_priv->msi_enabled)
56 nv_wr08(dev, 0x00088068, 0xff);
57
58 return 0;
59 }
60
61 void
62 nouveau_irq_uninstall(struct drm_device *dev)
63 {
64 /* Master disable */
65 nv_wr32(dev, NV03_PMC_INTR_EN_0, 0);
66 }
67
68 irqreturn_t
69 nouveau_irq_handler(DRM_IRQ_ARGS)
70 {
71 struct drm_device *dev = (struct drm_device *)arg;
72 struct drm_nouveau_private *dev_priv = dev->dev_private;
73 unsigned long flags;
74 u32 stat;
75 int i;
76
77 stat = nv_rd32(dev, NV03_PMC_INTR_0);
78 if (stat == 0 || stat == ~0)
79 return IRQ_NONE;
80
81 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
82 for (i = 0; i < 32 && stat; i++) {
83 if (!(stat & (1 << i)) || !dev_priv->irq_handler[i])
84 continue;
85
86 dev_priv->irq_handler[i](dev);
87 stat &= ~(1 << i);
88 }
89
90 if (dev_priv->msi_enabled)
91 nv_wr08(dev, 0x00088068, 0xff);
92 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
93
94 if (stat && nouveau_ratelimit())
95 NV_ERROR(dev, "PMC - unhandled INTR 0x%08x\n", stat);
96 return IRQ_HANDLED;
97 }
98
99 int
100 nouveau_irq_init(struct drm_device *dev)
101 {
102 struct drm_nouveau_private *dev_priv = dev->dev_private;
103 int ret;
104
105 if (nouveau_msi != 0 && dev_priv->card_type >= NV_50) {
106 ret = pci_enable_msi(dev->pdev);
107 if (ret == 0) {
108 NV_INFO(dev, "enabled MSI\n");
109 dev_priv->msi_enabled = true;
110 }
111 }
112
113 return drm_irq_install(dev);
114 }
115
116 void
117 nouveau_irq_fini(struct drm_device *dev)
118 {
119 struct drm_nouveau_private *dev_priv = dev->dev_private;
120
121 drm_irq_uninstall(dev);
122 if (dev_priv->msi_enabled)
123 pci_disable_msi(dev->pdev);
124 }
125
126 void
127 nouveau_irq_register(struct drm_device *dev, int status_bit,
128 void (*handler)(struct drm_device *))
129 {
130 struct drm_nouveau_private *dev_priv = dev->dev_private;
131 unsigned long flags;
132
133 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
134 dev_priv->irq_handler[status_bit] = handler;
135 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
136 }
137
138 void
139 nouveau_irq_unregister(struct drm_device *dev, int status_bit)
140 {
141 struct drm_nouveau_private *dev_priv = dev->dev_private;
142 unsigned long flags;
143
144 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
145 dev_priv->irq_handler[status_bit] = NULL;
146 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
147 }