drivers/gpu/drm/nouveau/nouveau_fence.h

   1 #ifndef __NOUVEAU_FENCE_H__
   2 #define __NOUVEAU_FENCE_H__
   3
   4 struct nouveau_fence {
   5         struct list_head head;
   6         struct kref kref;
   7
   8         struct nouveau_channel *channel;
   9         unsigned long timeout;
  10         u32 sequence;
  11
  12         void (*work)(void *priv, bool signalled);
  13         void *priv;
  14 };
  15
  16 int  nouveau_fence_new(struct nouveau_channel *, struct nouveau_fence **);
  17 struct nouveau_fence *
  18 nouveau_fence_ref(struct nouveau_fence *);
  19 void nouveau_fence_unref(struct nouveau_fence **);
  20
  21 int  nouveau_fence_emit(struct nouveau_fence *, struct nouveau_channel *);
  22 bool nouveau_fence_done(struct nouveau_fence *);
  23 int  nouveau_fence_wait(struct nouveau_fence *, bool lazy, bool intr);
  24 int  nouveau_fence_sync(struct nouveau_fence *, struct nouveau_channel *);
  25 void nouveau_fence_idle(struct nouveau_channel *);
  26 void nouveau_fence_update(struct nouveau_channel *);
  27
  28 struct nouveau_fence_chan {
  29         struct list_head pending;
  30         spinlock_t lock;
  31         u32 sequence;
  32 };
  33
  34 struct nouveau_fence_priv {
  35         struct nouveau_exec_engine engine;
  36         int (*emit)(struct nouveau_fence *);
  37         int (*sync)(struct nouveau_fence *, struct nouveau_channel *,
  38                     struct nouveau_channel *);
  39         u32 (*read)(struct nouveau_channel *);
  40 };
  41
  42 void nouveau_fence_context_new(struct nouveau_fence_chan *);
  43 void nouveau_fence_context_del(struct nouveau_fence_chan *);
  44
  45 int nv04_fence_create(struct drm_device *dev);
  46 int nv04_fence_mthd(struct nouveau_channel *, u32, u32, u32);
  47
  48 int nv10_fence_create(struct drm_device *dev);
  49 int nv84_fence_create(struct drm_device *dev);
  50 int nvc0_fence_create(struct drm_device *dev);
  51
  52 #endif