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UAPI: (Scripted) Convert #include "..." to #include <path/...> in drivers/gpu/
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / i915 / intel_sdvo.c
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include <drm/drmP.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
37 #include "i915_drv.h"
38 #include "intel_sdvo_regs.h"
39
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
44
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
53
54
55 static const char *tv_format_names[] = {
56 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63 };
64
65 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
67 struct intel_sdvo {
68 struct intel_encoder base;
69
70 struct i2c_adapter *i2c;
71 u8 slave_addr;
72
73 struct i2c_adapter ddc;
74
75 /* Register for the SDVO device: SDVOB or SDVOC */
76 uint32_t sdvo_reg;
77
78 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
80
81 /*
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
84 */
85 struct intel_sdvo_caps caps;
86
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
88 int pixel_clock_min, pixel_clock_max;
89
90 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
96 /*
97 * Hotplug activation bits for this device
98 */
99 uint8_t hotplug_active[2];
100
101 /**
102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
104 */
105 uint32_t color_range;
106
107 /**
108 * This is set if we're going to treat the device as TV-out.
109 *
110 * While we have these nice friendly flags for output types that ought
111 * to decide this for us, the S-Video output on our HDMI+S-Video card
112 * shows up as RGB1 (VGA).
113 */
114 bool is_tv;
115
116 /* On different gens SDVOB is at different places. */
117 bool is_sdvob;
118
119 /* This is for current tv format name */
120 int tv_format_index;
121
122 /**
123 * This is set if we treat the device as HDMI, instead of DVI.
124 */
125 bool is_hdmi;
126 bool has_hdmi_monitor;
127 bool has_hdmi_audio;
128
129 /**
130 * This is set if we detect output of sdvo device as LVDS and
131 * have a valid fixed mode to use with the panel.
132 */
133 bool is_lvds;
134
135 /**
136 * This is sdvo fixed pannel mode pointer
137 */
138 struct drm_display_mode *sdvo_lvds_fixed_mode;
139
140 /* DDC bus used by this SDVO encoder */
141 uint8_t ddc_bus;
142 };
143
144 struct intel_sdvo_connector {
145 struct intel_connector base;
146
147 /* Mark the type of connector */
148 uint16_t output_flag;
149
150 enum hdmi_force_audio force_audio;
151
152 /* This contains all current supported TV format */
153 u8 tv_format_supported[TV_FORMAT_NUM];
154 int format_supported_num;
155 struct drm_property *tv_format;
156
157 /* add the property for the SDVO-TV */
158 struct drm_property *left;
159 struct drm_property *right;
160 struct drm_property *top;
161 struct drm_property *bottom;
162 struct drm_property *hpos;
163 struct drm_property *vpos;
164 struct drm_property *contrast;
165 struct drm_property *saturation;
166 struct drm_property *hue;
167 struct drm_property *sharpness;
168 struct drm_property *flicker_filter;
169 struct drm_property *flicker_filter_adaptive;
170 struct drm_property *flicker_filter_2d;
171 struct drm_property *tv_chroma_filter;
172 struct drm_property *tv_luma_filter;
173 struct drm_property *dot_crawl;
174
175 /* add the property for the SDVO-TV/LVDS */
176 struct drm_property *brightness;
177
178 /* Add variable to record current setting for the above property */
179 u32 left_margin, right_margin, top_margin, bottom_margin;
180
181 /* this is to get the range of margin.*/
182 u32 max_hscan, max_vscan;
183 u32 max_hpos, cur_hpos;
184 u32 max_vpos, cur_vpos;
185 u32 cur_brightness, max_brightness;
186 u32 cur_contrast, max_contrast;
187 u32 cur_saturation, max_saturation;
188 u32 cur_hue, max_hue;
189 u32 cur_sharpness, max_sharpness;
190 u32 cur_flicker_filter, max_flicker_filter;
191 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
192 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
193 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
194 u32 cur_tv_luma_filter, max_tv_luma_filter;
195 u32 cur_dot_crawl, max_dot_crawl;
196 };
197
198 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
199 {
200 return container_of(encoder, struct intel_sdvo, base.base);
201 }
202
203 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
204 {
205 return container_of(intel_attached_encoder(connector),
206 struct intel_sdvo, base);
207 }
208
209 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
210 {
211 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
212 }
213
214 static bool
215 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
216 static bool
217 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
218 struct intel_sdvo_connector *intel_sdvo_connector,
219 int type);
220 static bool
221 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
222 struct intel_sdvo_connector *intel_sdvo_connector);
223
224 /**
225 * Writes the SDVOB or SDVOC with the given value, but always writes both
226 * SDVOB and SDVOC to work around apparent hardware issues (according to
227 * comments in the BIOS).
228 */
229 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
230 {
231 struct drm_device *dev = intel_sdvo->base.base.dev;
232 struct drm_i915_private *dev_priv = dev->dev_private;
233 u32 bval = val, cval = val;
234 int i;
235
236 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
237 I915_WRITE(intel_sdvo->sdvo_reg, val);
238 I915_READ(intel_sdvo->sdvo_reg);
239 return;
240 }
241
242 if (intel_sdvo->sdvo_reg == SDVOB) {
243 cval = I915_READ(SDVOC);
244 } else {
245 bval = I915_READ(SDVOB);
246 }
247 /*
248 * Write the registers twice for luck. Sometimes,
249 * writing them only once doesn't appear to 'stick'.
250 * The BIOS does this too. Yay, magic
251 */
252 for (i = 0; i < 2; i++)
253 {
254 I915_WRITE(SDVOB, bval);
255 I915_READ(SDVOB);
256 I915_WRITE(SDVOC, cval);
257 I915_READ(SDVOC);
258 }
259 }
260
261 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
262 {
263 struct i2c_msg msgs[] = {
264 {
265 .addr = intel_sdvo->slave_addr,
266 .flags = 0,
267 .len = 1,
268 .buf = &addr,
269 },
270 {
271 .addr = intel_sdvo->slave_addr,
272 .flags = I2C_M_RD,
273 .len = 1,
274 .buf = ch,
275 }
276 };
277 int ret;
278
279 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
280 return true;
281
282 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
283 return false;
284 }
285
286 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
287 /** Mapping of command numbers to names, for debug output */
288 static const struct _sdvo_cmd_name {
289 u8 cmd;
290 const char *name;
291 } sdvo_cmd_names[] = {
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
335
336 /* Add the op code for SDVO enhancements */
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
381
382 /* HDMI op code */
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
403 };
404
405 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
406
407 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
408 const void *args, int args_len)
409 {
410 int i;
411
412 DRM_DEBUG_KMS("%s: W: %02X ",
413 SDVO_NAME(intel_sdvo), cmd);
414 for (i = 0; i < args_len; i++)
415 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
416 for (; i < 8; i++)
417 DRM_LOG_KMS(" ");
418 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
419 if (cmd == sdvo_cmd_names[i].cmd) {
420 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
421 break;
422 }
423 }
424 if (i == ARRAY_SIZE(sdvo_cmd_names))
425 DRM_LOG_KMS("(%02X)", cmd);
426 DRM_LOG_KMS("\n");
427 }
428
429 static const char *cmd_status_names[] = {
430 "Power on",
431 "Success",
432 "Not supported",
433 "Invalid arg",
434 "Pending",
435 "Target not specified",
436 "Scaling not supported"
437 };
438
439 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
440 const void *args, int args_len)
441 {
442 u8 *buf, status;
443 struct i2c_msg *msgs;
444 int i, ret = true;
445
446 /* Would be simpler to allocate both in one go ? */
447 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
448 if (!buf)
449 return false;
450
451 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
452 if (!msgs) {
453 kfree(buf);
454 return false;
455 }
456
457 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
458
459 for (i = 0; i < args_len; i++) {
460 msgs[i].addr = intel_sdvo->slave_addr;
461 msgs[i].flags = 0;
462 msgs[i].len = 2;
463 msgs[i].buf = buf + 2 *i;
464 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
465 buf[2*i + 1] = ((u8*)args)[i];
466 }
467 msgs[i].addr = intel_sdvo->slave_addr;
468 msgs[i].flags = 0;
469 msgs[i].len = 2;
470 msgs[i].buf = buf + 2*i;
471 buf[2*i + 0] = SDVO_I2C_OPCODE;
472 buf[2*i + 1] = cmd;
473
474 /* the following two are to read the response */
475 status = SDVO_I2C_CMD_STATUS;
476 msgs[i+1].addr = intel_sdvo->slave_addr;
477 msgs[i+1].flags = 0;
478 msgs[i+1].len = 1;
479 msgs[i+1].buf = &status;
480
481 msgs[i+2].addr = intel_sdvo->slave_addr;
482 msgs[i+2].flags = I2C_M_RD;
483 msgs[i+2].len = 1;
484 msgs[i+2].buf = &status;
485
486 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
487 if (ret < 0) {
488 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
489 ret = false;
490 goto out;
491 }
492 if (ret != i+3) {
493 /* failure in I2C transfer */
494 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
495 ret = false;
496 }
497
498 out:
499 kfree(msgs);
500 kfree(buf);
501 return ret;
502 }
503
504 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
505 void *response, int response_len)
506 {
507 u8 retry = 5;
508 u8 status;
509 int i;
510
511 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
512
513 /*
514 * The documentation states that all commands will be
515 * processed within 15µs, and that we need only poll
516 * the status byte a maximum of 3 times in order for the
517 * command to be complete.
518 *
519 * Check 5 times in case the hardware failed to read the docs.
520 */
521 if (!intel_sdvo_read_byte(intel_sdvo,
522 SDVO_I2C_CMD_STATUS,
523 &status))
524 goto log_fail;
525
526 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
527 udelay(15);
528 if (!intel_sdvo_read_byte(intel_sdvo,
529 SDVO_I2C_CMD_STATUS,
530 &status))
531 goto log_fail;
532 }
533
534 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
535 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
536 else
537 DRM_LOG_KMS("(??? %d)", status);
538
539 if (status != SDVO_CMD_STATUS_SUCCESS)
540 goto log_fail;
541
542 /* Read the command response */
543 for (i = 0; i < response_len; i++) {
544 if (!intel_sdvo_read_byte(intel_sdvo,
545 SDVO_I2C_RETURN_0 + i,
546 &((u8 *)response)[i]))
547 goto log_fail;
548 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
549 }
550 DRM_LOG_KMS("\n");
551 return true;
552
553 log_fail:
554 DRM_LOG_KMS("... failed\n");
555 return false;
556 }
557
558 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
559 {
560 if (mode->clock >= 100000)
561 return 1;
562 else if (mode->clock >= 50000)
563 return 2;
564 else
565 return 4;
566 }
567
568 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
569 u8 ddc_bus)
570 {
571 /* This must be the immediately preceding write before the i2c xfer */
572 return intel_sdvo_write_cmd(intel_sdvo,
573 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
574 &ddc_bus, 1);
575 }
576
577 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
578 {
579 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
580 return false;
581
582 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
583 }
584
585 static bool
586 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
587 {
588 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
589 return false;
590
591 return intel_sdvo_read_response(intel_sdvo, value, len);
592 }
593
594 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
595 {
596 struct intel_sdvo_set_target_input_args targets = {0};
597 return intel_sdvo_set_value(intel_sdvo,
598 SDVO_CMD_SET_TARGET_INPUT,
599 &targets, sizeof(targets));
600 }
601
602 /**
603 * Return whether each input is trained.
604 *
605 * This function is making an assumption about the layout of the response,
606 * which should be checked against the docs.
607 */
608 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
609 {
610 struct intel_sdvo_get_trained_inputs_response response;
611
612 BUILD_BUG_ON(sizeof(response) != 1);
613 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
614 &response, sizeof(response)))
615 return false;
616
617 *input_1 = response.input0_trained;
618 *input_2 = response.input1_trained;
619 return true;
620 }
621
622 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
623 u16 outputs)
624 {
625 return intel_sdvo_set_value(intel_sdvo,
626 SDVO_CMD_SET_ACTIVE_OUTPUTS,
627 &outputs, sizeof(outputs));
628 }
629
630 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
631 int mode)
632 {
633 u8 state = SDVO_ENCODER_STATE_ON;
634
635 switch (mode) {
636 case DRM_MODE_DPMS_ON:
637 state = SDVO_ENCODER_STATE_ON;
638 break;
639 case DRM_MODE_DPMS_STANDBY:
640 state = SDVO_ENCODER_STATE_STANDBY;
641 break;
642 case DRM_MODE_DPMS_SUSPEND:
643 state = SDVO_ENCODER_STATE_SUSPEND;
644 break;
645 case DRM_MODE_DPMS_OFF:
646 state = SDVO_ENCODER_STATE_OFF;
647 break;
648 }
649
650 return intel_sdvo_set_value(intel_sdvo,
651 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
652 }
653
654 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
655 int *clock_min,
656 int *clock_max)
657 {
658 struct intel_sdvo_pixel_clock_range clocks;
659
660 BUILD_BUG_ON(sizeof(clocks) != 4);
661 if (!intel_sdvo_get_value(intel_sdvo,
662 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
663 &clocks, sizeof(clocks)))
664 return false;
665
666 /* Convert the values from units of 10 kHz to kHz. */
667 *clock_min = clocks.min * 10;
668 *clock_max = clocks.max * 10;
669 return true;
670 }
671
672 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
673 u16 outputs)
674 {
675 return intel_sdvo_set_value(intel_sdvo,
676 SDVO_CMD_SET_TARGET_OUTPUT,
677 &outputs, sizeof(outputs));
678 }
679
680 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
681 struct intel_sdvo_dtd *dtd)
682 {
683 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
684 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
685 }
686
687 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
688 struct intel_sdvo_dtd *dtd)
689 {
690 return intel_sdvo_set_timing(intel_sdvo,
691 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
692 }
693
694 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
695 struct intel_sdvo_dtd *dtd)
696 {
697 return intel_sdvo_set_timing(intel_sdvo,
698 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
699 }
700
701 static bool
702 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
703 uint16_t clock,
704 uint16_t width,
705 uint16_t height)
706 {
707 struct intel_sdvo_preferred_input_timing_args args;
708
709 memset(&args, 0, sizeof(args));
710 args.clock = clock;
711 args.width = width;
712 args.height = height;
713 args.interlace = 0;
714
715 if (intel_sdvo->is_lvds &&
716 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
717 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
718 args.scaled = 1;
719
720 return intel_sdvo_set_value(intel_sdvo,
721 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
722 &args, sizeof(args));
723 }
724
725 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
726 struct intel_sdvo_dtd *dtd)
727 {
728 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
729 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
730 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
731 &dtd->part1, sizeof(dtd->part1)) &&
732 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
733 &dtd->part2, sizeof(dtd->part2));
734 }
735
736 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
737 {
738 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
739 }
740
741 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
742 const struct drm_display_mode *mode)
743 {
744 uint16_t width, height;
745 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
746 uint16_t h_sync_offset, v_sync_offset;
747 int mode_clock;
748
749 width = mode->hdisplay;
750 height = mode->vdisplay;
751
752 /* do some mode translations */
753 h_blank_len = mode->htotal - mode->hdisplay;
754 h_sync_len = mode->hsync_end - mode->hsync_start;
755
756 v_blank_len = mode->vtotal - mode->vdisplay;
757 v_sync_len = mode->vsync_end - mode->vsync_start;
758
759 h_sync_offset = mode->hsync_start - mode->hdisplay;
760 v_sync_offset = mode->vsync_start - mode->vdisplay;
761
762 mode_clock = mode->clock;
763 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
764 mode_clock /= 10;
765 dtd->part1.clock = mode_clock;
766
767 dtd->part1.h_active = width & 0xff;
768 dtd->part1.h_blank = h_blank_len & 0xff;
769 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
770 ((h_blank_len >> 8) & 0xf);
771 dtd->part1.v_active = height & 0xff;
772 dtd->part1.v_blank = v_blank_len & 0xff;
773 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
774 ((v_blank_len >> 8) & 0xf);
775
776 dtd->part2.h_sync_off = h_sync_offset & 0xff;
777 dtd->part2.h_sync_width = h_sync_len & 0xff;
778 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
779 (v_sync_len & 0xf);
780 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
781 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
782 ((v_sync_len & 0x30) >> 4);
783
784 dtd->part2.dtd_flags = 0x18;
785 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
786 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
787 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
788 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
789 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
790 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
791
792 dtd->part2.sdvo_flags = 0;
793 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
794 dtd->part2.reserved = 0;
795 }
796
797 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
798 const struct intel_sdvo_dtd *dtd)
799 {
800 mode->hdisplay = dtd->part1.h_active;
801 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
802 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
803 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
804 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
805 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
806 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
807 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
808
809 mode->vdisplay = dtd->part1.v_active;
810 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
811 mode->vsync_start = mode->vdisplay;
812 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
813 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
814 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
815 mode->vsync_end = mode->vsync_start +
816 (dtd->part2.v_sync_off_width & 0xf);
817 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
818 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
819 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
820
821 mode->clock = dtd->part1.clock * 10;
822
823 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
824 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
825 mode->flags |= DRM_MODE_FLAG_INTERLACE;
826 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
827 mode->flags |= DRM_MODE_FLAG_PHSYNC;
828 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
829 mode->flags |= DRM_MODE_FLAG_PVSYNC;
830 }
831
832 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
833 {
834 struct intel_sdvo_encode encode;
835
836 BUILD_BUG_ON(sizeof(encode) != 2);
837 return intel_sdvo_get_value(intel_sdvo,
838 SDVO_CMD_GET_SUPP_ENCODE,
839 &encode, sizeof(encode));
840 }
841
842 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
843 uint8_t mode)
844 {
845 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
846 }
847
848 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
849 uint8_t mode)
850 {
851 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
852 }
853
854 #if 0
855 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
856 {
857 int i, j;
858 uint8_t set_buf_index[2];
859 uint8_t av_split;
860 uint8_t buf_size;
861 uint8_t buf[48];
862 uint8_t *pos;
863
864 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
865
866 for (i = 0; i <= av_split; i++) {
867 set_buf_index[0] = i; set_buf_index[1] = 0;
868 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
869 set_buf_index, 2);
870 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
871 intel_sdvo_read_response(encoder, &buf_size, 1);
872
873 pos = buf;
874 for (j = 0; j <= buf_size; j += 8) {
875 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
876 NULL, 0);
877 intel_sdvo_read_response(encoder, pos, 8);
878 pos += 8;
879 }
880 }
881 }
882 #endif
883
884 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
885 {
886 struct dip_infoframe avi_if = {
887 .type = DIP_TYPE_AVI,
888 .ver = DIP_VERSION_AVI,
889 .len = DIP_LEN_AVI,
890 };
891 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
892 uint8_t set_buf_index[2] = { 1, 0 };
893 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
894 uint64_t *data = (uint64_t *)sdvo_data;
895 unsigned i;
896
897 intel_dip_infoframe_csum(&avi_if);
898
899 /* sdvo spec says that the ecc is handled by the hw, and it looks like
900 * we must not send the ecc field, either. */
901 memcpy(sdvo_data, &avi_if, 3);
902 sdvo_data[3] = avi_if.checksum;
903 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
904
905 if (!intel_sdvo_set_value(intel_sdvo,
906 SDVO_CMD_SET_HBUF_INDEX,
907 set_buf_index, 2))
908 return false;
909
910 for (i = 0; i < sizeof(sdvo_data); i += 8) {
911 if (!intel_sdvo_set_value(intel_sdvo,
912 SDVO_CMD_SET_HBUF_DATA,
913 data, 8))
914 return false;
915 data++;
916 }
917
918 return intel_sdvo_set_value(intel_sdvo,
919 SDVO_CMD_SET_HBUF_TXRATE,
920 &tx_rate, 1);
921 }
922
923 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
924 {
925 struct intel_sdvo_tv_format format;
926 uint32_t format_map;
927
928 format_map = 1 << intel_sdvo->tv_format_index;
929 memset(&format, 0, sizeof(format));
930 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
931
932 BUILD_BUG_ON(sizeof(format) != 6);
933 return intel_sdvo_set_value(intel_sdvo,
934 SDVO_CMD_SET_TV_FORMAT,
935 &format, sizeof(format));
936 }
937
938 static bool
939 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
940 const struct drm_display_mode *mode)
941 {
942 struct intel_sdvo_dtd output_dtd;
943
944 if (!intel_sdvo_set_target_output(intel_sdvo,
945 intel_sdvo->attached_output))
946 return false;
947
948 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
949 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
950 return false;
951
952 return true;
953 }
954
955 /* Asks the sdvo controller for the preferred input mode given the output mode.
956 * Unfortunately we have to set up the full output mode to do that. */
957 static bool
958 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
959 const struct drm_display_mode *mode,
960 struct drm_display_mode *adjusted_mode)
961 {
962 struct intel_sdvo_dtd input_dtd;
963
964 /* Reset the input timing to the screen. Assume always input 0. */
965 if (!intel_sdvo_set_target_input(intel_sdvo))
966 return false;
967
968 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
969 mode->clock / 10,
970 mode->hdisplay,
971 mode->vdisplay))
972 return false;
973
974 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
975 &input_dtd))
976 return false;
977
978 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
979
980 return true;
981 }
982
983 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
984 const struct drm_display_mode *mode,
985 struct drm_display_mode *adjusted_mode)
986 {
987 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
988 int multiplier;
989
990 /* We need to construct preferred input timings based on our
991 * output timings. To do that, we have to set the output
992 * timings, even though this isn't really the right place in
993 * the sequence to do it. Oh well.
994 */
995 if (intel_sdvo->is_tv) {
996 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
997 return false;
998
999 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1000 mode,
1001 adjusted_mode);
1002 } else if (intel_sdvo->is_lvds) {
1003 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1004 intel_sdvo->sdvo_lvds_fixed_mode))
1005 return false;
1006
1007 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1008 mode,
1009 adjusted_mode);
1010 }
1011
1012 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1013 * SDVO device will factor out the multiplier during mode_set.
1014 */
1015 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1016 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1017
1018 return true;
1019 }
1020
1021 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1022 struct drm_display_mode *mode,
1023 struct drm_display_mode *adjusted_mode)
1024 {
1025 struct drm_device *dev = encoder->dev;
1026 struct drm_i915_private *dev_priv = dev->dev_private;
1027 struct drm_crtc *crtc = encoder->crtc;
1028 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1029 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1030 u32 sdvox;
1031 struct intel_sdvo_in_out_map in_out;
1032 struct intel_sdvo_dtd input_dtd, output_dtd;
1033 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1034 int rate;
1035
1036 if (!mode)
1037 return;
1038
1039 /* First, set the input mapping for the first input to our controlled
1040 * output. This is only correct if we're a single-input device, in
1041 * which case the first input is the output from the appropriate SDVO
1042 * channel on the motherboard. In a two-input device, the first input
1043 * will be SDVOB and the second SDVOC.
1044 */
1045 in_out.in0 = intel_sdvo->attached_output;
1046 in_out.in1 = 0;
1047
1048 intel_sdvo_set_value(intel_sdvo,
1049 SDVO_CMD_SET_IN_OUT_MAP,
1050 &in_out, sizeof(in_out));
1051
1052 /* Set the output timings to the screen */
1053 if (!intel_sdvo_set_target_output(intel_sdvo,
1054 intel_sdvo->attached_output))
1055 return;
1056
1057 /* lvds has a special fixed output timing. */
1058 if (intel_sdvo->is_lvds)
1059 intel_sdvo_get_dtd_from_mode(&output_dtd,
1060 intel_sdvo->sdvo_lvds_fixed_mode);
1061 else
1062 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1063 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1064 DRM_INFO("Setting output timings on %s failed\n",
1065 SDVO_NAME(intel_sdvo));
1066
1067 /* Set the input timing to the screen. Assume always input 0. */
1068 if (!intel_sdvo_set_target_input(intel_sdvo))
1069 return;
1070
1071 if (intel_sdvo->has_hdmi_monitor) {
1072 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1073 intel_sdvo_set_colorimetry(intel_sdvo,
1074 SDVO_COLORIMETRY_RGB256);
1075 intel_sdvo_set_avi_infoframe(intel_sdvo);
1076 } else
1077 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1078
1079 if (intel_sdvo->is_tv &&
1080 !intel_sdvo_set_tv_format(intel_sdvo))
1081 return;
1082
1083 /* We have tried to get input timing in mode_fixup, and filled into
1084 * adjusted_mode.
1085 */
1086 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1087 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1088 DRM_INFO("Setting input timings on %s failed\n",
1089 SDVO_NAME(intel_sdvo));
1090
1091 switch (pixel_multiplier) {
1092 default:
1093 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1094 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1095 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1096 }
1097 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1098 return;
1099
1100 /* Set the SDVO control regs. */
1101 if (INTEL_INFO(dev)->gen >= 4) {
1102 /* The real mode polarity is set by the SDVO commands, using
1103 * struct intel_sdvo_dtd. */
1104 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1105 if (intel_sdvo->is_hdmi)
1106 sdvox |= intel_sdvo->color_range;
1107 if (INTEL_INFO(dev)->gen < 5)
1108 sdvox |= SDVO_BORDER_ENABLE;
1109 } else {
1110 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1111 switch (intel_sdvo->sdvo_reg) {
1112 case SDVOB:
1113 sdvox &= SDVOB_PRESERVE_MASK;
1114 break;
1115 case SDVOC:
1116 sdvox &= SDVOC_PRESERVE_MASK;
1117 break;
1118 }
1119 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1120 }
1121
1122 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1123 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1124 else
1125 sdvox |= TRANSCODER(intel_crtc->pipe);
1126
1127 if (intel_sdvo->has_hdmi_audio)
1128 sdvox |= SDVO_AUDIO_ENABLE;
1129
1130 if (INTEL_INFO(dev)->gen >= 4) {
1131 /* done in crtc_mode_set as the dpll_md reg must be written early */
1132 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1133 /* done in crtc_mode_set as it lives inside the dpll register */
1134 } else {
1135 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1136 }
1137
1138 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1139 INTEL_INFO(dev)->gen < 5)
1140 sdvox |= SDVO_STALL_SELECT;
1141 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1142 }
1143
1144 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1145 {
1146 struct drm_device *dev = encoder->dev;
1147 struct drm_i915_private *dev_priv = dev->dev_private;
1148 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1149 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1150 u32 temp;
1151
1152 if (mode != DRM_MODE_DPMS_ON) {
1153 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1154 if (0)
1155 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1156
1157 if (mode == DRM_MODE_DPMS_OFF) {
1158 temp = I915_READ(intel_sdvo->sdvo_reg);
1159 if ((temp & SDVO_ENABLE) != 0) {
1160 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1161 }
1162 }
1163 } else {
1164 bool input1, input2;
1165 int i;
1166 u8 status;
1167
1168 temp = I915_READ(intel_sdvo->sdvo_reg);
1169 if ((temp & SDVO_ENABLE) == 0)
1170 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1171 for (i = 0; i < 2; i++)
1172 intel_wait_for_vblank(dev, intel_crtc->pipe);
1173
1174 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1175 /* Warn if the device reported failure to sync.
1176 * A lot of SDVO devices fail to notify of sync, but it's
1177 * a given it the status is a success, we succeeded.
1178 */
1179 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1180 DRM_DEBUG_KMS("First %s output reported failure to "
1181 "sync\n", SDVO_NAME(intel_sdvo));
1182 }
1183
1184 if (0)
1185 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1186 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1187 }
1188 return;
1189 }
1190
1191 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1192 struct drm_display_mode *mode)
1193 {
1194 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1195
1196 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1197 return MODE_NO_DBLESCAN;
1198
1199 if (intel_sdvo->pixel_clock_min > mode->clock)
1200 return MODE_CLOCK_LOW;
1201
1202 if (intel_sdvo->pixel_clock_max < mode->clock)
1203 return MODE_CLOCK_HIGH;
1204
1205 if (intel_sdvo->is_lvds) {
1206 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1207 return MODE_PANEL;
1208
1209 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1210 return MODE_PANEL;
1211 }
1212
1213 return MODE_OK;
1214 }
1215
1216 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1217 {
1218 BUILD_BUG_ON(sizeof(*caps) != 8);
1219 if (!intel_sdvo_get_value(intel_sdvo,
1220 SDVO_CMD_GET_DEVICE_CAPS,
1221 caps, sizeof(*caps)))
1222 return false;
1223
1224 DRM_DEBUG_KMS("SDVO capabilities:\n"
1225 " vendor_id: %d\n"
1226 " device_id: %d\n"
1227 " device_rev_id: %d\n"
1228 " sdvo_version_major: %d\n"
1229 " sdvo_version_minor: %d\n"
1230 " sdvo_inputs_mask: %d\n"
1231 " smooth_scaling: %d\n"
1232 " sharp_scaling: %d\n"
1233 " up_scaling: %d\n"
1234 " down_scaling: %d\n"
1235 " stall_support: %d\n"
1236 " output_flags: %d\n",
1237 caps->vendor_id,
1238 caps->device_id,
1239 caps->device_rev_id,
1240 caps->sdvo_version_major,
1241 caps->sdvo_version_minor,
1242 caps->sdvo_inputs_mask,
1243 caps->smooth_scaling,
1244 caps->sharp_scaling,
1245 caps->up_scaling,
1246 caps->down_scaling,
1247 caps->stall_support,
1248 caps->output_flags);
1249
1250 return true;
1251 }
1252
1253 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1254 {
1255 struct drm_device *dev = intel_sdvo->base.base.dev;
1256 u8 response[2];
1257
1258 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1259 * on the line. */
1260 if (IS_I945G(dev) || IS_I945GM(dev))
1261 return false;
1262
1263 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1264 &response, 2) && response[0];
1265 }
1266
1267 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1268 {
1269 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1270
1271 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
1272 }
1273
1274 static bool
1275 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1276 {
1277 /* Is there more than one type of output? */
1278 return hweight16(intel_sdvo->caps.output_flags) > 1;
1279 }
1280
1281 static struct edid *
1282 intel_sdvo_get_edid(struct drm_connector *connector)
1283 {
1284 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1285 return drm_get_edid(connector, &sdvo->ddc);
1286 }
1287
1288 /* Mac mini hack -- use the same DDC as the analog connector */
1289 static struct edid *
1290 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1291 {
1292 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1293
1294 return drm_get_edid(connector,
1295 intel_gmbus_get_adapter(dev_priv,
1296 dev_priv->crt_ddc_pin));
1297 }
1298
1299 static enum drm_connector_status
1300 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1301 {
1302 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1303 enum drm_connector_status status;
1304 struct edid *edid;
1305
1306 edid = intel_sdvo_get_edid(connector);
1307
1308 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1309 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1310
1311 /*
1312 * Don't use the 1 as the argument of DDC bus switch to get
1313 * the EDID. It is used for SDVO SPD ROM.
1314 */
1315 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1316 intel_sdvo->ddc_bus = ddc;
1317 edid = intel_sdvo_get_edid(connector);
1318 if (edid)
1319 break;
1320 }
1321 /*
1322 * If we found the EDID on the other bus,
1323 * assume that is the correct DDC bus.
1324 */
1325 if (edid == NULL)
1326 intel_sdvo->ddc_bus = saved_ddc;
1327 }
1328
1329 /*
1330 * When there is no edid and no monitor is connected with VGA
1331 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1332 */
1333 if (edid == NULL)
1334 edid = intel_sdvo_get_analog_edid(connector);
1335
1336 status = connector_status_unknown;
1337 if (edid != NULL) {
1338 /* DDC bus is shared, match EDID to connector type */
1339 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1340 status = connector_status_connected;
1341 if (intel_sdvo->is_hdmi) {
1342 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1343 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1344 }
1345 } else
1346 status = connector_status_disconnected;
1347 connector->display_info.raw_edid = NULL;
1348 kfree(edid);
1349 }
1350
1351 if (status == connector_status_connected) {
1352 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1353 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1354 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1355 }
1356
1357 return status;
1358 }
1359
1360 static bool
1361 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1362 struct edid *edid)
1363 {
1364 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1365 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1366
1367 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1368 connector_is_digital, monitor_is_digital);
1369 return connector_is_digital == monitor_is_digital;
1370 }
1371
1372 static enum drm_connector_status
1373 intel_sdvo_detect(struct drm_connector *connector, bool force)
1374 {
1375 uint16_t response;
1376 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1377 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1378 enum drm_connector_status ret;
1379
1380 if (!intel_sdvo_write_cmd(intel_sdvo,
1381 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1382 return connector_status_unknown;
1383
1384 /* add 30ms delay when the output type might be TV */
1385 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
1386 msleep(30);
1387
1388 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1389 return connector_status_unknown;
1390
1391 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1392 response & 0xff, response >> 8,
1393 intel_sdvo_connector->output_flag);
1394
1395 if (response == 0)
1396 return connector_status_disconnected;
1397
1398 intel_sdvo->attached_output = response;
1399
1400 intel_sdvo->has_hdmi_monitor = false;
1401 intel_sdvo->has_hdmi_audio = false;
1402
1403 if ((intel_sdvo_connector->output_flag & response) == 0)
1404 ret = connector_status_disconnected;
1405 else if (IS_TMDS(intel_sdvo_connector))
1406 ret = intel_sdvo_tmds_sink_detect(connector);
1407 else {
1408 struct edid *edid;
1409
1410 /* if we have an edid check it matches the connection */
1411 edid = intel_sdvo_get_edid(connector);
1412 if (edid == NULL)
1413 edid = intel_sdvo_get_analog_edid(connector);
1414 if (edid != NULL) {
1415 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1416 edid))
1417 ret = connector_status_connected;
1418 else
1419 ret = connector_status_disconnected;
1420
1421 connector->display_info.raw_edid = NULL;
1422 kfree(edid);
1423 } else
1424 ret = connector_status_connected;
1425 }
1426
1427 /* May update encoder flag for like clock for SDVO TV, etc.*/
1428 if (ret == connector_status_connected) {
1429 intel_sdvo->is_tv = false;
1430 intel_sdvo->is_lvds = false;
1431 intel_sdvo->base.needs_tv_clock = false;
1432
1433 if (response & SDVO_TV_MASK) {
1434 intel_sdvo->is_tv = true;
1435 intel_sdvo->base.needs_tv_clock = true;
1436 }
1437 if (response & SDVO_LVDS_MASK)
1438 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1439 }
1440
1441 return ret;
1442 }
1443
1444 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1445 {
1446 struct edid *edid;
1447
1448 /* set the bus switch and get the modes */
1449 edid = intel_sdvo_get_edid(connector);
1450
1451 /*
1452 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1453 * link between analog and digital outputs. So, if the regular SDVO
1454 * DDC fails, check to see if the analog output is disconnected, in
1455 * which case we'll look there for the digital DDC data.
1456 */
1457 if (edid == NULL)
1458 edid = intel_sdvo_get_analog_edid(connector);
1459
1460 if (edid != NULL) {
1461 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1462 edid)) {
1463 drm_mode_connector_update_edid_property(connector, edid);
1464 drm_add_edid_modes(connector, edid);
1465 }
1466
1467 connector->display_info.raw_edid = NULL;
1468 kfree(edid);
1469 }
1470 }
1471
1472 /*
1473 * Set of SDVO TV modes.
1474 * Note! This is in reply order (see loop in get_tv_modes).
1475 * XXX: all 60Hz refresh?
1476 */
1477 static const struct drm_display_mode sdvo_tv_modes[] = {
1478 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1479 416, 0, 200, 201, 232, 233, 0,
1480 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1481 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1482 416, 0, 240, 241, 272, 273, 0,
1483 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1484 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1485 496, 0, 300, 301, 332, 333, 0,
1486 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1487 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1488 736, 0, 350, 351, 382, 383, 0,
1489 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1490 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1491 736, 0, 400, 401, 432, 433, 0,
1492 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1493 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1494 736, 0, 480, 481, 512, 513, 0,
1495 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1496 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1497 800, 0, 480, 481, 512, 513, 0,
1498 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1499 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1500 800, 0, 576, 577, 608, 609, 0,
1501 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1502 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1503 816, 0, 350, 351, 382, 383, 0,
1504 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1505 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1506 816, 0, 400, 401, 432, 433, 0,
1507 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1508 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1509 816, 0, 480, 481, 512, 513, 0,
1510 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1511 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1512 816, 0, 540, 541, 572, 573, 0,
1513 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1514 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1515 816, 0, 576, 577, 608, 609, 0,
1516 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1517 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1518 864, 0, 576, 577, 608, 609, 0,
1519 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1520 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1521 896, 0, 600, 601, 632, 633, 0,
1522 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1523 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1524 928, 0, 624, 625, 656, 657, 0,
1525 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1526 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1527 1016, 0, 766, 767, 798, 799, 0,
1528 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1529 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1530 1120, 0, 768, 769, 800, 801, 0,
1531 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1532 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1533 1376, 0, 1024, 1025, 1056, 1057, 0,
1534 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1535 };
1536
1537 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1538 {
1539 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1540 struct intel_sdvo_sdtv_resolution_request tv_res;
1541 uint32_t reply = 0, format_map = 0;
1542 int i;
1543
1544 /* Read the list of supported input resolutions for the selected TV
1545 * format.
1546 */
1547 format_map = 1 << intel_sdvo->tv_format_index;
1548 memcpy(&tv_res, &format_map,
1549 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1550
1551 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1552 return;
1553
1554 BUILD_BUG_ON(sizeof(tv_res) != 3);
1555 if (!intel_sdvo_write_cmd(intel_sdvo,
1556 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1557 &tv_res, sizeof(tv_res)))
1558 return;
1559 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1560 return;
1561
1562 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1563 if (reply & (1 << i)) {
1564 struct drm_display_mode *nmode;
1565 nmode = drm_mode_duplicate(connector->dev,
1566 &sdvo_tv_modes[i]);
1567 if (nmode)
1568 drm_mode_probed_add(connector, nmode);
1569 }
1570 }
1571
1572 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1573 {
1574 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1575 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1576 struct drm_display_mode *newmode;
1577
1578 /*
1579 * Attempt to get the mode list from DDC.
1580 * Assume that the preferred modes are
1581 * arranged in priority order.
1582 */
1583 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1584 if (list_empty(&connector->probed_modes) == false)
1585 goto end;
1586
1587 /* Fetch modes from VBT */
1588 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1589 newmode = drm_mode_duplicate(connector->dev,
1590 dev_priv->sdvo_lvds_vbt_mode);
1591 if (newmode != NULL) {
1592 /* Guarantee the mode is preferred */
1593 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1594 DRM_MODE_TYPE_DRIVER);
1595 drm_mode_probed_add(connector, newmode);
1596 }
1597 }
1598
1599 end:
1600 list_for_each_entry(newmode, &connector->probed_modes, head) {
1601 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1602 intel_sdvo->sdvo_lvds_fixed_mode =
1603 drm_mode_duplicate(connector->dev, newmode);
1604
1605 intel_sdvo->is_lvds = true;
1606 break;
1607 }
1608 }
1609
1610 }
1611
1612 static int intel_sdvo_get_modes(struct drm_connector *connector)
1613 {
1614 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1615
1616 if (IS_TV(intel_sdvo_connector))
1617 intel_sdvo_get_tv_modes(connector);
1618 else if (IS_LVDS(intel_sdvo_connector))
1619 intel_sdvo_get_lvds_modes(connector);
1620 else
1621 intel_sdvo_get_ddc_modes(connector);
1622
1623 return !list_empty(&connector->probed_modes);
1624 }
1625
1626 static void
1627 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1628 {
1629 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1630 struct drm_device *dev = connector->dev;
1631
1632 if (intel_sdvo_connector->left)
1633 drm_property_destroy(dev, intel_sdvo_connector->left);
1634 if (intel_sdvo_connector->right)
1635 drm_property_destroy(dev, intel_sdvo_connector->right);
1636 if (intel_sdvo_connector->top)
1637 drm_property_destroy(dev, intel_sdvo_connector->top);
1638 if (intel_sdvo_connector->bottom)
1639 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1640 if (intel_sdvo_connector->hpos)
1641 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1642 if (intel_sdvo_connector->vpos)
1643 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1644 if (intel_sdvo_connector->saturation)
1645 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1646 if (intel_sdvo_connector->contrast)
1647 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1648 if (intel_sdvo_connector->hue)
1649 drm_property_destroy(dev, intel_sdvo_connector->hue);
1650 if (intel_sdvo_connector->sharpness)
1651 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1652 if (intel_sdvo_connector->flicker_filter)
1653 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1654 if (intel_sdvo_connector->flicker_filter_2d)
1655 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1656 if (intel_sdvo_connector->flicker_filter_adaptive)
1657 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1658 if (intel_sdvo_connector->tv_luma_filter)
1659 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1660 if (intel_sdvo_connector->tv_chroma_filter)
1661 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1662 if (intel_sdvo_connector->dot_crawl)
1663 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1664 if (intel_sdvo_connector->brightness)
1665 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1666 }
1667
1668 static void intel_sdvo_destroy(struct drm_connector *connector)
1669 {
1670 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1671
1672 if (intel_sdvo_connector->tv_format)
1673 drm_property_destroy(connector->dev,
1674 intel_sdvo_connector->tv_format);
1675
1676 intel_sdvo_destroy_enhance_property(connector);
1677 drm_sysfs_connector_remove(connector);
1678 drm_connector_cleanup(connector);
1679 kfree(connector);
1680 }
1681
1682 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1683 {
1684 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1685 struct edid *edid;
1686 bool has_audio = false;
1687
1688 if (!intel_sdvo->is_hdmi)
1689 return false;
1690
1691 edid = intel_sdvo_get_edid(connector);
1692 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1693 has_audio = drm_detect_monitor_audio(edid);
1694 kfree(edid);
1695
1696 return has_audio;
1697 }
1698
1699 static int
1700 intel_sdvo_set_property(struct drm_connector *connector,
1701 struct drm_property *property,
1702 uint64_t val)
1703 {
1704 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1705 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1706 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1707 uint16_t temp_value;
1708 uint8_t cmd;
1709 int ret;
1710
1711 ret = drm_connector_property_set_value(connector, property, val);
1712 if (ret)
1713 return ret;
1714
1715 if (property == dev_priv->force_audio_property) {
1716 int i = val;
1717 bool has_audio;
1718
1719 if (i == intel_sdvo_connector->force_audio)
1720 return 0;
1721
1722 intel_sdvo_connector->force_audio = i;
1723
1724 if (i == HDMI_AUDIO_AUTO)
1725 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1726 else
1727 has_audio = (i == HDMI_AUDIO_ON);
1728
1729 if (has_audio == intel_sdvo->has_hdmi_audio)
1730 return 0;
1731
1732 intel_sdvo->has_hdmi_audio = has_audio;
1733 goto done;
1734 }
1735
1736 if (property == dev_priv->broadcast_rgb_property) {
1737 if (val == !!intel_sdvo->color_range)
1738 return 0;
1739
1740 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1741 goto done;
1742 }
1743
1744 #define CHECK_PROPERTY(name, NAME) \
1745 if (intel_sdvo_connector->name == property) { \
1746 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1747 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1748 cmd = SDVO_CMD_SET_##NAME; \
1749 intel_sdvo_connector->cur_##name = temp_value; \
1750 goto set_value; \
1751 }
1752
1753 if (property == intel_sdvo_connector->tv_format) {
1754 if (val >= TV_FORMAT_NUM)
1755 return -EINVAL;
1756
1757 if (intel_sdvo->tv_format_index ==
1758 intel_sdvo_connector->tv_format_supported[val])
1759 return 0;
1760
1761 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1762 goto done;
1763 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1764 temp_value = val;
1765 if (intel_sdvo_connector->left == property) {
1766 drm_connector_property_set_value(connector,
1767 intel_sdvo_connector->right, val);
1768 if (intel_sdvo_connector->left_margin == temp_value)
1769 return 0;
1770
1771 intel_sdvo_connector->left_margin = temp_value;
1772 intel_sdvo_connector->right_margin = temp_value;
1773 temp_value = intel_sdvo_connector->max_hscan -
1774 intel_sdvo_connector->left_margin;
1775 cmd = SDVO_CMD_SET_OVERSCAN_H;
1776 goto set_value;
1777 } else if (intel_sdvo_connector->right == property) {
1778 drm_connector_property_set_value(connector,
1779 intel_sdvo_connector->left, val);
1780 if (intel_sdvo_connector->right_margin == temp_value)
1781 return 0;
1782
1783 intel_sdvo_connector->left_margin = temp_value;
1784 intel_sdvo_connector->right_margin = temp_value;
1785 temp_value = intel_sdvo_connector->max_hscan -
1786 intel_sdvo_connector->left_margin;
1787 cmd = SDVO_CMD_SET_OVERSCAN_H;
1788 goto set_value;
1789 } else if (intel_sdvo_connector->top == property) {
1790 drm_connector_property_set_value(connector,
1791 intel_sdvo_connector->bottom, val);
1792 if (intel_sdvo_connector->top_margin == temp_value)
1793 return 0;
1794
1795 intel_sdvo_connector->top_margin = temp_value;
1796 intel_sdvo_connector->bottom_margin = temp_value;
1797 temp_value = intel_sdvo_connector->max_vscan -
1798 intel_sdvo_connector->top_margin;
1799 cmd = SDVO_CMD_SET_OVERSCAN_V;
1800 goto set_value;
1801 } else if (intel_sdvo_connector->bottom == property) {
1802 drm_connector_property_set_value(connector,
1803 intel_sdvo_connector->top, val);
1804 if (intel_sdvo_connector->bottom_margin == temp_value)
1805 return 0;
1806
1807 intel_sdvo_connector->top_margin = temp_value;
1808 intel_sdvo_connector->bottom_margin = temp_value;
1809 temp_value = intel_sdvo_connector->max_vscan -
1810 intel_sdvo_connector->top_margin;
1811 cmd = SDVO_CMD_SET_OVERSCAN_V;
1812 goto set_value;
1813 }
1814 CHECK_PROPERTY(hpos, HPOS)
1815 CHECK_PROPERTY(vpos, VPOS)
1816 CHECK_PROPERTY(saturation, SATURATION)
1817 CHECK_PROPERTY(contrast, CONTRAST)
1818 CHECK_PROPERTY(hue, HUE)
1819 CHECK_PROPERTY(brightness, BRIGHTNESS)
1820 CHECK_PROPERTY(sharpness, SHARPNESS)
1821 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1822 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1823 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1824 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1825 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1826 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1827 }
1828
1829 return -EINVAL; /* unknown property */
1830
1831 set_value:
1832 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1833 return -EIO;
1834
1835
1836 done:
1837 if (intel_sdvo->base.base.crtc) {
1838 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1839 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1840 crtc->y, crtc->fb);
1841 }
1842
1843 return 0;
1844 #undef CHECK_PROPERTY
1845 }
1846
1847 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1848 .dpms = intel_sdvo_dpms,
1849 .mode_fixup = intel_sdvo_mode_fixup,
1850 .prepare = intel_encoder_prepare,
1851 .mode_set = intel_sdvo_mode_set,
1852 .commit = intel_encoder_commit,
1853 };
1854
1855 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1856 .dpms = drm_helper_connector_dpms,
1857 .detect = intel_sdvo_detect,
1858 .fill_modes = drm_helper_probe_single_connector_modes,
1859 .set_property = intel_sdvo_set_property,
1860 .destroy = intel_sdvo_destroy,
1861 };
1862
1863 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1864 .get_modes = intel_sdvo_get_modes,
1865 .mode_valid = intel_sdvo_mode_valid,
1866 .best_encoder = intel_best_encoder,
1867 };
1868
1869 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1870 {
1871 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1872
1873 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1874 drm_mode_destroy(encoder->dev,
1875 intel_sdvo->sdvo_lvds_fixed_mode);
1876
1877 i2c_del_adapter(&intel_sdvo->ddc);
1878 intel_encoder_destroy(encoder);
1879 }
1880
1881 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1882 .destroy = intel_sdvo_enc_destroy,
1883 };
1884
1885 static void
1886 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1887 {
1888 uint16_t mask = 0;
1889 unsigned int num_bits;
1890
1891 /* Make a mask of outputs less than or equal to our own priority in the
1892 * list.
1893 */
1894 switch (sdvo->controlled_output) {
1895 case SDVO_OUTPUT_LVDS1:
1896 mask |= SDVO_OUTPUT_LVDS1;
1897 case SDVO_OUTPUT_LVDS0:
1898 mask |= SDVO_OUTPUT_LVDS0;
1899 case SDVO_OUTPUT_TMDS1:
1900 mask |= SDVO_OUTPUT_TMDS1;
1901 case SDVO_OUTPUT_TMDS0:
1902 mask |= SDVO_OUTPUT_TMDS0;
1903 case SDVO_OUTPUT_RGB1:
1904 mask |= SDVO_OUTPUT_RGB1;
1905 case SDVO_OUTPUT_RGB0:
1906 mask |= SDVO_OUTPUT_RGB0;
1907 break;
1908 }
1909
1910 /* Count bits to find what number we are in the priority list. */
1911 mask &= sdvo->caps.output_flags;
1912 num_bits = hweight16(mask);
1913 /* If more than 3 outputs, default to DDC bus 3 for now. */
1914 if (num_bits > 3)
1915 num_bits = 3;
1916
1917 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1918 sdvo->ddc_bus = 1 << num_bits;
1919 }
1920
1921 /**
1922 * Choose the appropriate DDC bus for control bus switch command for this
1923 * SDVO output based on the controlled output.
1924 *
1925 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1926 * outputs, then LVDS outputs.
1927 */
1928 static void
1929 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1930 struct intel_sdvo *sdvo, u32 reg)
1931 {
1932 struct sdvo_device_mapping *mapping;
1933
1934 if (sdvo->is_sdvob)
1935 mapping = &(dev_priv->sdvo_mappings[0]);
1936 else
1937 mapping = &(dev_priv->sdvo_mappings[1]);
1938
1939 if (mapping->initialized)
1940 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1941 else
1942 intel_sdvo_guess_ddc_bus(sdvo);
1943 }
1944
1945 static void
1946 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1947 struct intel_sdvo *sdvo, u32 reg)
1948 {
1949 struct sdvo_device_mapping *mapping;
1950 u8 pin;
1951
1952 if (sdvo->is_sdvob)
1953 mapping = &dev_priv->sdvo_mappings[0];
1954 else
1955 mapping = &dev_priv->sdvo_mappings[1];
1956
1957 pin = GMBUS_PORT_DPB;
1958 if (mapping->initialized)
1959 pin = mapping->i2c_pin;
1960
1961 if (intel_gmbus_is_port_valid(pin)) {
1962 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
1963 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1964 intel_gmbus_force_bit(sdvo->i2c, true);
1965 } else {
1966 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
1967 }
1968 }
1969
1970 static bool
1971 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1972 {
1973 return intel_sdvo_check_supp_encode(intel_sdvo);
1974 }
1975
1976 static u8
1977 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
1978 {
1979 struct drm_i915_private *dev_priv = dev->dev_private;
1980 struct sdvo_device_mapping *my_mapping, *other_mapping;
1981
1982 if (sdvo->is_sdvob) {
1983 my_mapping = &dev_priv->sdvo_mappings[0];
1984 other_mapping = &dev_priv->sdvo_mappings[1];
1985 } else {
1986 my_mapping = &dev_priv->sdvo_mappings[1];
1987 other_mapping = &dev_priv->sdvo_mappings[0];
1988 }
1989
1990 /* If the BIOS described our SDVO device, take advantage of it. */
1991 if (my_mapping->slave_addr)
1992 return my_mapping->slave_addr;
1993
1994 /* If the BIOS only described a different SDVO device, use the
1995 * address that it isn't using.
1996 */
1997 if (other_mapping->slave_addr) {
1998 if (other_mapping->slave_addr == 0x70)
1999 return 0x72;
2000 else
2001 return 0x70;
2002 }
2003
2004 /* No SDVO device info is found for another DVO port,
2005 * so use mapping assumption we had before BIOS parsing.
2006 */
2007 if (sdvo->is_sdvob)
2008 return 0x70;
2009 else
2010 return 0x72;
2011 }
2012
2013 static void
2014 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2015 struct intel_sdvo *encoder)
2016 {
2017 drm_connector_init(encoder->base.base.dev,
2018 &connector->base.base,
2019 &intel_sdvo_connector_funcs,
2020 connector->base.base.connector_type);
2021
2022 drm_connector_helper_add(&connector->base.base,
2023 &intel_sdvo_connector_helper_funcs);
2024
2025 connector->base.base.interlace_allowed = 1;
2026 connector->base.base.doublescan_allowed = 0;
2027 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2028
2029 intel_connector_attach_encoder(&connector->base, &encoder->base);
2030 drm_sysfs_connector_add(&connector->base.base);
2031 }
2032
2033 static void
2034 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2035 {
2036 struct drm_device *dev = connector->base.base.dev;
2037
2038 intel_attach_force_audio_property(&connector->base.base);
2039 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2040 intel_attach_broadcast_rgb_property(&connector->base.base);
2041 }
2042
2043 static bool
2044 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2045 {
2046 struct drm_encoder *encoder = &intel_sdvo->base.base;
2047 struct drm_connector *connector;
2048 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2049 struct intel_connector *intel_connector;
2050 struct intel_sdvo_connector *intel_sdvo_connector;
2051
2052 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2053 if (!intel_sdvo_connector)
2054 return false;
2055
2056 if (device == 0) {
2057 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2058 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2059 } else if (device == 1) {
2060 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2061 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2062 }
2063
2064 intel_connector = &intel_sdvo_connector->base;
2065 connector = &intel_connector->base;
2066 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2067 connector->polled = DRM_CONNECTOR_POLL_HPD;
2068 intel_sdvo->hotplug_active[0] |= 1 << device;
2069 /* Some SDVO devices have one-shot hotplug interrupts.
2070 * Ensure that they get re-enabled when an interrupt happens.
2071 */
2072 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2073 intel_sdvo_enable_hotplug(intel_encoder);
2074 }
2075 else
2076 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2077 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2078 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2079
2080 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2081 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2082 intel_sdvo->is_hdmi = true;
2083 }
2084 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2085 (1 << INTEL_ANALOG_CLONE_BIT));
2086
2087 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2088 if (intel_sdvo->is_hdmi)
2089 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2090
2091 return true;
2092 }
2093
2094 static bool
2095 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2096 {
2097 struct drm_encoder *encoder = &intel_sdvo->base.base;
2098 struct drm_connector *connector;
2099 struct intel_connector *intel_connector;
2100 struct intel_sdvo_connector *intel_sdvo_connector;
2101
2102 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2103 if (!intel_sdvo_connector)
2104 return false;
2105
2106 intel_connector = &intel_sdvo_connector->base;
2107 connector = &intel_connector->base;
2108 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2109 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2110
2111 intel_sdvo->controlled_output |= type;
2112 intel_sdvo_connector->output_flag = type;
2113
2114 intel_sdvo->is_tv = true;
2115 intel_sdvo->base.needs_tv_clock = true;
2116 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2117
2118 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2119
2120 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2121 goto err;
2122
2123 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2124 goto err;
2125
2126 return true;
2127
2128 err:
2129 intel_sdvo_destroy(connector);
2130 return false;
2131 }
2132
2133 static bool
2134 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2135 {
2136 struct drm_encoder *encoder = &intel_sdvo->base.base;
2137 struct drm_connector *connector;
2138 struct intel_connector *intel_connector;
2139 struct intel_sdvo_connector *intel_sdvo_connector;
2140
2141 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2142 if (!intel_sdvo_connector)
2143 return false;
2144
2145 intel_connector = &intel_sdvo_connector->base;
2146 connector = &intel_connector->base;
2147 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2148 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2149 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2150
2151 if (device == 0) {
2152 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2153 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2154 } else if (device == 1) {
2155 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2156 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2157 }
2158
2159 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2160 (1 << INTEL_ANALOG_CLONE_BIT));
2161
2162 intel_sdvo_connector_init(intel_sdvo_connector,
2163 intel_sdvo);
2164 return true;
2165 }
2166
2167 static bool
2168 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2169 {
2170 struct drm_encoder *encoder = &intel_sdvo->base.base;
2171 struct drm_connector *connector;
2172 struct intel_connector *intel_connector;
2173 struct intel_sdvo_connector *intel_sdvo_connector;
2174
2175 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2176 if (!intel_sdvo_connector)
2177 return false;
2178
2179 intel_connector = &intel_sdvo_connector->base;
2180 connector = &intel_connector->base;
2181 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2182 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2183
2184 if (device == 0) {
2185 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2186 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2187 } else if (device == 1) {
2188 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2189 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2190 }
2191
2192 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2193 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2194
2195 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2196 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2197 goto err;
2198
2199 return true;
2200
2201 err:
2202 intel_sdvo_destroy(connector);
2203 return false;
2204 }
2205
2206 static bool
2207 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2208 {
2209 intel_sdvo->is_tv = false;
2210 intel_sdvo->base.needs_tv_clock = false;
2211 intel_sdvo->is_lvds = false;
2212
2213 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2214
2215 if (flags & SDVO_OUTPUT_TMDS0)
2216 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2217 return false;
2218
2219 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2220 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2221 return false;
2222
2223 /* TV has no XXX1 function block */
2224 if (flags & SDVO_OUTPUT_SVID0)
2225 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2226 return false;
2227
2228 if (flags & SDVO_OUTPUT_CVBS0)
2229 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2230 return false;
2231
2232 if (flags & SDVO_OUTPUT_YPRPB0)
2233 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2234 return false;
2235
2236 if (flags & SDVO_OUTPUT_RGB0)
2237 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2238 return false;
2239
2240 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2241 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2242 return false;
2243
2244 if (flags & SDVO_OUTPUT_LVDS0)
2245 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2246 return false;
2247
2248 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2249 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2250 return false;
2251
2252 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2253 unsigned char bytes[2];
2254
2255 intel_sdvo->controlled_output = 0;
2256 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2257 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2258 SDVO_NAME(intel_sdvo),
2259 bytes[0], bytes[1]);
2260 return false;
2261 }
2262 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2263
2264 return true;
2265 }
2266
2267 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2268 struct intel_sdvo_connector *intel_sdvo_connector,
2269 int type)
2270 {
2271 struct drm_device *dev = intel_sdvo->base.base.dev;
2272 struct intel_sdvo_tv_format format;
2273 uint32_t format_map, i;
2274
2275 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2276 return false;
2277
2278 BUILD_BUG_ON(sizeof(format) != 6);
2279 if (!intel_sdvo_get_value(intel_sdvo,
2280 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2281 &format, sizeof(format)))
2282 return false;
2283
2284 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2285
2286 if (format_map == 0)
2287 return false;
2288
2289 intel_sdvo_connector->format_supported_num = 0;
2290 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2291 if (format_map & (1 << i))
2292 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2293
2294
2295 intel_sdvo_connector->tv_format =
2296 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2297 "mode", intel_sdvo_connector->format_supported_num);
2298 if (!intel_sdvo_connector->tv_format)
2299 return false;
2300
2301 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2302 drm_property_add_enum(
2303 intel_sdvo_connector->tv_format, i,
2304 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2305
2306 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2307 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2308 intel_sdvo_connector->tv_format, 0);
2309 return true;
2310
2311 }
2312
2313 #define ENHANCEMENT(name, NAME) do { \
2314 if (enhancements.name) { \
2315 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2316 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2317 return false; \
2318 intel_sdvo_connector->max_##name = data_value[0]; \
2319 intel_sdvo_connector->cur_##name = response; \
2320 intel_sdvo_connector->name = \
2321 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2322 if (!intel_sdvo_connector->name) return false; \
2323 drm_connector_attach_property(connector, \
2324 intel_sdvo_connector->name, \
2325 intel_sdvo_connector->cur_##name); \
2326 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2327 data_value[0], data_value[1], response); \
2328 } \
2329 } while (0)
2330
2331 static bool
2332 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2333 struct intel_sdvo_connector *intel_sdvo_connector,
2334 struct intel_sdvo_enhancements_reply enhancements)
2335 {
2336 struct drm_device *dev = intel_sdvo->base.base.dev;
2337 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2338 uint16_t response, data_value[2];
2339
2340 /* when horizontal overscan is supported, Add the left/right property */
2341 if (enhancements.overscan_h) {
2342 if (!intel_sdvo_get_value(intel_sdvo,
2343 SDVO_CMD_GET_MAX_OVERSCAN_H,
2344 &data_value, 4))
2345 return false;
2346
2347 if (!intel_sdvo_get_value(intel_sdvo,
2348 SDVO_CMD_GET_OVERSCAN_H,
2349 &response, 2))
2350 return false;
2351
2352 intel_sdvo_connector->max_hscan = data_value[0];
2353 intel_sdvo_connector->left_margin = data_value[0] - response;
2354 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2355 intel_sdvo_connector->left =
2356 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2357 if (!intel_sdvo_connector->left)
2358 return false;
2359
2360 drm_connector_attach_property(connector,
2361 intel_sdvo_connector->left,
2362 intel_sdvo_connector->left_margin);
2363
2364 intel_sdvo_connector->right =
2365 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2366 if (!intel_sdvo_connector->right)
2367 return false;
2368
2369 drm_connector_attach_property(connector,
2370 intel_sdvo_connector->right,
2371 intel_sdvo_connector->right_margin);
2372 DRM_DEBUG_KMS("h_overscan: max %d, "
2373 "default %d, current %d\n",
2374 data_value[0], data_value[1], response);
2375 }
2376
2377 if (enhancements.overscan_v) {
2378 if (!intel_sdvo_get_value(intel_sdvo,
2379 SDVO_CMD_GET_MAX_OVERSCAN_V,
2380 &data_value, 4))
2381 return false;
2382
2383 if (!intel_sdvo_get_value(intel_sdvo,
2384 SDVO_CMD_GET_OVERSCAN_V,
2385 &response, 2))
2386 return false;
2387
2388 intel_sdvo_connector->max_vscan = data_value[0];
2389 intel_sdvo_connector->top_margin = data_value[0] - response;
2390 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2391 intel_sdvo_connector->top =
2392 drm_property_create_range(dev, 0,
2393 "top_margin", 0, data_value[0]);
2394 if (!intel_sdvo_connector->top)
2395 return false;
2396
2397 drm_connector_attach_property(connector,
2398 intel_sdvo_connector->top,
2399 intel_sdvo_connector->top_margin);
2400
2401 intel_sdvo_connector->bottom =
2402 drm_property_create_range(dev, 0,
2403 "bottom_margin", 0, data_value[0]);
2404 if (!intel_sdvo_connector->bottom)
2405 return false;
2406
2407 drm_connector_attach_property(connector,
2408 intel_sdvo_connector->bottom,
2409 intel_sdvo_connector->bottom_margin);
2410 DRM_DEBUG_KMS("v_overscan: max %d, "
2411 "default %d, current %d\n",
2412 data_value[0], data_value[1], response);
2413 }
2414
2415 ENHANCEMENT(hpos, HPOS);
2416 ENHANCEMENT(vpos, VPOS);
2417 ENHANCEMENT(saturation, SATURATION);
2418 ENHANCEMENT(contrast, CONTRAST);
2419 ENHANCEMENT(hue, HUE);
2420 ENHANCEMENT(sharpness, SHARPNESS);
2421 ENHANCEMENT(brightness, BRIGHTNESS);
2422 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2423 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2424 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2425 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2426 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2427
2428 if (enhancements.dot_crawl) {
2429 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2430 return false;
2431
2432 intel_sdvo_connector->max_dot_crawl = 1;
2433 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2434 intel_sdvo_connector->dot_crawl =
2435 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2436 if (!intel_sdvo_connector->dot_crawl)
2437 return false;
2438
2439 drm_connector_attach_property(connector,
2440 intel_sdvo_connector->dot_crawl,
2441 intel_sdvo_connector->cur_dot_crawl);
2442 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2443 }
2444
2445 return true;
2446 }
2447
2448 static bool
2449 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2450 struct intel_sdvo_connector *intel_sdvo_connector,
2451 struct intel_sdvo_enhancements_reply enhancements)
2452 {
2453 struct drm_device *dev = intel_sdvo->base.base.dev;
2454 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2455 uint16_t response, data_value[2];
2456
2457 ENHANCEMENT(brightness, BRIGHTNESS);
2458
2459 return true;
2460 }
2461 #undef ENHANCEMENT
2462
2463 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2464 struct intel_sdvo_connector *intel_sdvo_connector)
2465 {
2466 union {
2467 struct intel_sdvo_enhancements_reply reply;
2468 uint16_t response;
2469 } enhancements;
2470
2471 BUILD_BUG_ON(sizeof(enhancements) != 2);
2472
2473 enhancements.response = 0;
2474 intel_sdvo_get_value(intel_sdvo,
2475 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2476 &enhancements, sizeof(enhancements));
2477 if (enhancements.response == 0) {
2478 DRM_DEBUG_KMS("No enhancement is supported\n");
2479 return true;
2480 }
2481
2482 if (IS_TV(intel_sdvo_connector))
2483 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2484 else if (IS_LVDS(intel_sdvo_connector))
2485 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2486 else
2487 return true;
2488 }
2489
2490 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2491 struct i2c_msg *msgs,
2492 int num)
2493 {
2494 struct intel_sdvo *sdvo = adapter->algo_data;
2495
2496 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2497 return -EIO;
2498
2499 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2500 }
2501
2502 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2503 {
2504 struct intel_sdvo *sdvo = adapter->algo_data;
2505 return sdvo->i2c->algo->functionality(sdvo->i2c);
2506 }
2507
2508 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2509 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2510 .functionality = intel_sdvo_ddc_proxy_func
2511 };
2512
2513 static bool
2514 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2515 struct drm_device *dev)
2516 {
2517 sdvo->ddc.owner = THIS_MODULE;
2518 sdvo->ddc.class = I2C_CLASS_DDC;
2519 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2520 sdvo->ddc.dev.parent = &dev->pdev->dev;
2521 sdvo->ddc.algo_data = sdvo;
2522 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2523
2524 return i2c_add_adapter(&sdvo->ddc) == 0;
2525 }
2526
2527 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2528 {
2529 struct drm_i915_private *dev_priv = dev->dev_private;
2530 struct intel_encoder *intel_encoder;
2531 struct intel_sdvo *intel_sdvo;
2532 u32 hotplug_mask;
2533 int i;
2534
2535 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2536 if (!intel_sdvo)
2537 return false;
2538
2539 intel_sdvo->sdvo_reg = sdvo_reg;
2540 intel_sdvo->is_sdvob = is_sdvob;
2541 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2542 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2543 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2544 kfree(intel_sdvo);
2545 return false;
2546 }
2547
2548 /* encoder type will be decided later */
2549 intel_encoder = &intel_sdvo->base;
2550 intel_encoder->type = INTEL_OUTPUT_SDVO;
2551 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2552
2553 /* Read the regs to test if we can talk to the device */
2554 for (i = 0; i < 0x40; i++) {
2555 u8 byte;
2556
2557 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2558 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2559 SDVO_NAME(intel_sdvo));
2560 goto err;
2561 }
2562 }
2563
2564 hotplug_mask = 0;
2565 if (IS_G4X(dev)) {
2566 hotplug_mask = intel_sdvo->is_sdvob ?
2567 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2568 } else if (IS_GEN4(dev)) {
2569 hotplug_mask = intel_sdvo->is_sdvob ?
2570 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2571 } else {
2572 hotplug_mask = intel_sdvo->is_sdvob ?
2573 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2574 }
2575
2576 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2577
2578 /* In default case sdvo lvds is false */
2579 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2580 goto err;
2581
2582 if (intel_sdvo_output_setup(intel_sdvo,
2583 intel_sdvo->caps.output_flags) != true) {
2584 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2585 SDVO_NAME(intel_sdvo));
2586 goto err;
2587 }
2588
2589 /* Only enable the hotplug irq if we need it, to work around noisy
2590 * hotplug lines.
2591 */
2592 if (intel_sdvo->hotplug_active[0])
2593 dev_priv->hotplug_supported_mask |= hotplug_mask;
2594
2595 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2596
2597 /* Set the input timing to the screen. Assume always input 0. */
2598 if (!intel_sdvo_set_target_input(intel_sdvo))
2599 goto err;
2600
2601 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2602 &intel_sdvo->pixel_clock_min,
2603 &intel_sdvo->pixel_clock_max))
2604 goto err;
2605
2606 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2607 "clock range %dMHz - %dMHz, "
2608 "input 1: %c, input 2: %c, "
2609 "output 1: %c, output 2: %c\n",
2610 SDVO_NAME(intel_sdvo),
2611 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2612 intel_sdvo->caps.device_rev_id,
2613 intel_sdvo->pixel_clock_min / 1000,
2614 intel_sdvo->pixel_clock_max / 1000,
2615 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2616 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2617 /* check currently supported outputs */
2618 intel_sdvo->caps.output_flags &
2619 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2620 intel_sdvo->caps.output_flags &
2621 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2622 return true;
2623
2624 err:
2625 drm_encoder_cleanup(&intel_encoder->base);
2626 i2c_del_adapter(&intel_sdvo->ddc);
2627 kfree(intel_sdvo);
2628
2629 return false;
2630 }
kernel source for telekom puls (alcatel/mediatek)