UAPI: (Scripted) Convert #include "..." to #include <path/...> in drivers/gpu/
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / i915 / intel_dvo.c
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include <drm/drmP.h>
30 #include <drm/drm_crtc.h>
31 #include "intel_drv.h"
32 #include <drm/i915_drm.h>
33 #include "i915_drv.h"
34 #include "dvo.h"
35
36 #define SIL164_ADDR 0x38
37 #define CH7xxx_ADDR 0x76
38 #define TFP410_ADDR 0x38
39
40 static const struct intel_dvo_device intel_dvo_devices[] = {
41 {
42 .type = INTEL_DVO_CHIP_TMDS,
43 .name = "sil164",
44 .dvo_reg = DVOC,
45 .slave_addr = SIL164_ADDR,
46 .dev_ops = &sil164_ops,
47 },
48 {
49 .type = INTEL_DVO_CHIP_TMDS,
50 .name = "ch7xxx",
51 .dvo_reg = DVOC,
52 .slave_addr = CH7xxx_ADDR,
53 .dev_ops = &ch7xxx_ops,
54 },
55 {
56 .type = INTEL_DVO_CHIP_LVDS,
57 .name = "ivch",
58 .dvo_reg = DVOA,
59 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
60 .dev_ops = &ivch_ops,
61 },
62 {
63 .type = INTEL_DVO_CHIP_TMDS,
64 .name = "tfp410",
65 .dvo_reg = DVOC,
66 .slave_addr = TFP410_ADDR,
67 .dev_ops = &tfp410_ops,
68 },
69 {
70 .type = INTEL_DVO_CHIP_LVDS,
71 .name = "ch7017",
72 .dvo_reg = DVOC,
73 .slave_addr = 0x75,
74 .gpio = GMBUS_PORT_DPB,
75 .dev_ops = &ch7017_ops,
76 }
77 };
78
79 struct intel_dvo {
80 struct intel_encoder base;
81
82 struct intel_dvo_device dev;
83
84 struct drm_display_mode *panel_fixed_mode;
85 bool panel_wants_dither;
86 };
87
88 static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder)
89 {
90 return container_of(encoder, struct intel_dvo, base.base);
91 }
92
93 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
94 {
95 return container_of(intel_attached_encoder(connector),
96 struct intel_dvo, base);
97 }
98
99 static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
100 {
101 struct drm_i915_private *dev_priv = encoder->dev->dev_private;
102 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
103 u32 dvo_reg = intel_dvo->dev.dvo_reg;
104 u32 temp = I915_READ(dvo_reg);
105
106 if (mode == DRM_MODE_DPMS_ON) {
107 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
108 I915_READ(dvo_reg);
109 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
110 } else {
111 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
112 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
113 I915_READ(dvo_reg);
114 }
115 }
116
117 static int intel_dvo_mode_valid(struct drm_connector *connector,
118 struct drm_display_mode *mode)
119 {
120 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
121
122 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
123 return MODE_NO_DBLESCAN;
124
125 /* XXX: Validate clock range */
126
127 if (intel_dvo->panel_fixed_mode) {
128 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
129 return MODE_PANEL;
130 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
131 return MODE_PANEL;
132 }
133
134 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
135 }
136
137 static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
138 const struct drm_display_mode *mode,
139 struct drm_display_mode *adjusted_mode)
140 {
141 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
142
143 /* If we have timings from the BIOS for the panel, put them in
144 * to the adjusted mode. The CRTC will be set up for this mode,
145 * with the panel scaling set up to source from the H/VDisplay
146 * of the original mode.
147 */
148 if (intel_dvo->panel_fixed_mode != NULL) {
149 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
150 C(hdisplay);
151 C(hsync_start);
152 C(hsync_end);
153 C(htotal);
154 C(vdisplay);
155 C(vsync_start);
156 C(vsync_end);
157 C(vtotal);
158 C(clock);
159 #undef C
160 }
161
162 if (intel_dvo->dev.dev_ops->mode_fixup)
163 return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);
164
165 return true;
166 }
167
168 static void intel_dvo_mode_set(struct drm_encoder *encoder,
169 struct drm_display_mode *mode,
170 struct drm_display_mode *adjusted_mode)
171 {
172 struct drm_device *dev = encoder->dev;
173 struct drm_i915_private *dev_priv = dev->dev_private;
174 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
175 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
176 int pipe = intel_crtc->pipe;
177 u32 dvo_val;
178 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
179 int dpll_reg = DPLL(pipe);
180
181 switch (dvo_reg) {
182 case DVOA:
183 default:
184 dvo_srcdim_reg = DVOA_SRCDIM;
185 break;
186 case DVOB:
187 dvo_srcdim_reg = DVOB_SRCDIM;
188 break;
189 case DVOC:
190 dvo_srcdim_reg = DVOC_SRCDIM;
191 break;
192 }
193
194 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);
195
196 /* Save the data order, since I don't know what it should be set to. */
197 dvo_val = I915_READ(dvo_reg) &
198 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
199 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
200 DVO_BLANK_ACTIVE_HIGH;
201
202 if (pipe == 1)
203 dvo_val |= DVO_PIPE_B_SELECT;
204 dvo_val |= DVO_PIPE_STALL;
205 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
206 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
207 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
208 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
209
210 I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
211
212 /*I915_WRITE(DVOB_SRCDIM,
213 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
214 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
215 I915_WRITE(dvo_srcdim_reg,
216 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
217 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
218 /*I915_WRITE(DVOB, dvo_val);*/
219 I915_WRITE(dvo_reg, dvo_val);
220 }
221
222 /**
223 * Detect the output connection on our DVO device.
224 *
225 * Unimplemented.
226 */
227 static enum drm_connector_status
228 intel_dvo_detect(struct drm_connector *connector, bool force)
229 {
230 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
231 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
232 }
233
234 static int intel_dvo_get_modes(struct drm_connector *connector)
235 {
236 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
237 struct drm_i915_private *dev_priv = connector->dev->dev_private;
238
239 /* We should probably have an i2c driver get_modes function for those
240 * devices which will have a fixed set of modes determined by the chip
241 * (TV-out, for example), but for now with just TMDS and LVDS,
242 * that's not the case.
243 */
244 intel_ddc_get_modes(connector,
245 intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
246 if (!list_empty(&connector->probed_modes))
247 return 1;
248
249 if (intel_dvo->panel_fixed_mode != NULL) {
250 struct drm_display_mode *mode;
251 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
252 if (mode) {
253 drm_mode_probed_add(connector, mode);
254 return 1;
255 }
256 }
257
258 return 0;
259 }
260
261 static void intel_dvo_destroy(struct drm_connector *connector)
262 {
263 drm_sysfs_connector_remove(connector);
264 drm_connector_cleanup(connector);
265 kfree(connector);
266 }
267
268 static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
269 .dpms = intel_dvo_dpms,
270 .mode_fixup = intel_dvo_mode_fixup,
271 .prepare = intel_encoder_prepare,
272 .mode_set = intel_dvo_mode_set,
273 .commit = intel_encoder_commit,
274 };
275
276 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
277 .dpms = drm_helper_connector_dpms,
278 .detect = intel_dvo_detect,
279 .destroy = intel_dvo_destroy,
280 .fill_modes = drm_helper_probe_single_connector_modes,
281 };
282
283 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
284 .mode_valid = intel_dvo_mode_valid,
285 .get_modes = intel_dvo_get_modes,
286 .best_encoder = intel_best_encoder,
287 };
288
289 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
290 {
291 struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
292
293 if (intel_dvo->dev.dev_ops->destroy)
294 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
295
296 kfree(intel_dvo->panel_fixed_mode);
297
298 intel_encoder_destroy(encoder);
299 }
300
301 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
302 .destroy = intel_dvo_enc_destroy,
303 };
304
305 /**
306 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
307 *
308 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
309 * chip being on DVOB/C and having multiple pipes.
310 */
311 static struct drm_display_mode *
312 intel_dvo_get_current_mode(struct drm_connector *connector)
313 {
314 struct drm_device *dev = connector->dev;
315 struct drm_i915_private *dev_priv = dev->dev_private;
316 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
317 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
318 struct drm_display_mode *mode = NULL;
319
320 /* If the DVO port is active, that'll be the LVDS, so we can pull out
321 * its timings to get how the BIOS set up the panel.
322 */
323 if (dvo_val & DVO_ENABLE) {
324 struct drm_crtc *crtc;
325 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
326
327 crtc = intel_get_crtc_for_pipe(dev, pipe);
328 if (crtc) {
329 mode = intel_crtc_mode_get(dev, crtc);
330 if (mode) {
331 mode->type |= DRM_MODE_TYPE_PREFERRED;
332 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
333 mode->flags |= DRM_MODE_FLAG_PHSYNC;
334 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
335 mode->flags |= DRM_MODE_FLAG_PVSYNC;
336 }
337 }
338 }
339
340 return mode;
341 }
342
343 void intel_dvo_init(struct drm_device *dev)
344 {
345 struct drm_i915_private *dev_priv = dev->dev_private;
346 struct intel_encoder *intel_encoder;
347 struct intel_dvo *intel_dvo;
348 struct intel_connector *intel_connector;
349 int i;
350 int encoder_type = DRM_MODE_ENCODER_NONE;
351
352 intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
353 if (!intel_dvo)
354 return;
355
356 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
357 if (!intel_connector) {
358 kfree(intel_dvo);
359 return;
360 }
361
362 intel_encoder = &intel_dvo->base;
363 drm_encoder_init(dev, &intel_encoder->base,
364 &intel_dvo_enc_funcs, encoder_type);
365
366 /* Now, try to find a controller */
367 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
368 struct drm_connector *connector = &intel_connector->base;
369 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
370 struct i2c_adapter *i2c;
371 int gpio;
372
373 /* Allow the I2C driver info to specify the GPIO to be used in
374 * special cases, but otherwise default to what's defined
375 * in the spec.
376 */
377 if (intel_gmbus_is_port_valid(dvo->gpio))
378 gpio = dvo->gpio;
379 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
380 gpio = GMBUS_PORT_SSC;
381 else
382 gpio = GMBUS_PORT_DPB;
383
384 /* Set up the I2C bus necessary for the chip we're probing.
385 * It appears that everything is on GPIOE except for panels
386 * on i830 laptops, which are on GPIOB (DVOA).
387 */
388 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
389
390 intel_dvo->dev = *dvo;
391 if (!dvo->dev_ops->init(&intel_dvo->dev, i2c))
392 continue;
393
394 intel_encoder->type = INTEL_OUTPUT_DVO;
395 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
396 switch (dvo->type) {
397 case INTEL_DVO_CHIP_TMDS:
398 intel_encoder->clone_mask =
399 (1 << INTEL_DVO_TMDS_CLONE_BIT) |
400 (1 << INTEL_ANALOG_CLONE_BIT);
401 drm_connector_init(dev, connector,
402 &intel_dvo_connector_funcs,
403 DRM_MODE_CONNECTOR_DVII);
404 encoder_type = DRM_MODE_ENCODER_TMDS;
405 break;
406 case INTEL_DVO_CHIP_LVDS:
407 intel_encoder->clone_mask =
408 (1 << INTEL_DVO_LVDS_CLONE_BIT);
409 drm_connector_init(dev, connector,
410 &intel_dvo_connector_funcs,
411 DRM_MODE_CONNECTOR_LVDS);
412 encoder_type = DRM_MODE_ENCODER_LVDS;
413 break;
414 }
415
416 drm_connector_helper_add(connector,
417 &intel_dvo_connector_helper_funcs);
418 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
419 connector->interlace_allowed = false;
420 connector->doublescan_allowed = false;
421
422 drm_encoder_helper_add(&intel_encoder->base,
423 &intel_dvo_helper_funcs);
424
425 intel_connector_attach_encoder(intel_connector, intel_encoder);
426 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
427 /* For our LVDS chipsets, we should hopefully be able
428 * to dig the fixed panel mode out of the BIOS data.
429 * However, it's in a different format from the BIOS
430 * data on chipsets with integrated LVDS (stored in AIM
431 * headers, likely), so for now, just get the current
432 * mode being output through DVO.
433 */
434 intel_dvo->panel_fixed_mode =
435 intel_dvo_get_current_mode(connector);
436 intel_dvo->panel_wants_dither = true;
437 }
438
439 drm_sysfs_connector_add(connector);
440 return;
441 }
442
443 drm_encoder_cleanup(&intel_encoder->base);
444 kfree(intel_dvo);
445 kfree(intel_connector);
446 }