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Merge branch 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpu / drm / i810 / i810_dma.c
1 /* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 *
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 */
32
33 #include "drmP.h"
34 #include "drm.h"
35 #include "i810_drm.h"
36 #include "i810_drv.h"
37 #include <linux/interrupt.h> /* For task queue support */
38 #include <linux/delay.h>
39 #include <linux/slab.h>
40 #include <linux/pagemap.h>
41
42 #define I810_BUF_FREE 2
43 #define I810_BUF_CLIENT 1
44 #define I810_BUF_HARDWARE 0
45
46 #define I810_BUF_UNMAPPED 0
47 #define I810_BUF_MAPPED 1
48
49 static struct drm_buf *i810_freelist_get(struct drm_device * dev)
50 {
51 struct drm_device_dma *dma = dev->dma;
52 int i;
53 int used;
54
55 /* Linear search might not be the best solution */
56
57 for (i = 0; i < dma->buf_count; i++) {
58 struct drm_buf *buf = dma->buflist[i];
59 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
60 /* In use is already a pointer */
61 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
62 I810_BUF_CLIENT);
63 if (used == I810_BUF_FREE)
64 return buf;
65 }
66 return NULL;
67 }
68
69 /* This should only be called if the buffer is not sent to the hardware
70 * yet, the hardware updates in use for us once its on the ring buffer.
71 */
72
73 static int i810_freelist_put(struct drm_device *dev, struct drm_buf *buf)
74 {
75 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
76 int used;
77
78 /* In use is already a pointer */
79 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
80 if (used != I810_BUF_CLIENT) {
81 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
82 return -EINVAL;
83 }
84
85 return 0;
86 }
87
88 static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
89 {
90 struct drm_file *priv = filp->private_data;
91 struct drm_device *dev;
92 drm_i810_private_t *dev_priv;
93 struct drm_buf *buf;
94 drm_i810_buf_priv_t *buf_priv;
95
96 dev = priv->minor->dev;
97 dev_priv = dev->dev_private;
98 buf = dev_priv->mmap_buffer;
99 buf_priv = buf->dev_private;
100
101 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
102
103 buf_priv->currently_mapped = I810_BUF_MAPPED;
104
105 if (io_remap_pfn_range(vma, vma->vm_start,
106 vma->vm_pgoff,
107 vma->vm_end - vma->vm_start, vma->vm_page_prot))
108 return -EAGAIN;
109 return 0;
110 }
111
112 static const struct file_operations i810_buffer_fops = {
113 .open = drm_open,
114 .release = drm_release,
115 .unlocked_ioctl = drm_ioctl,
116 .mmap = i810_mmap_buffers,
117 .fasync = drm_fasync,
118 #ifdef CONFIG_COMPAT
119 .compat_ioctl = drm_compat_ioctl,
120 #endif
121 .llseek = noop_llseek,
122 };
123
124 static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
125 {
126 struct drm_device *dev = file_priv->minor->dev;
127 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
128 drm_i810_private_t *dev_priv = dev->dev_private;
129 const struct file_operations *old_fops;
130 int retcode = 0;
131
132 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
133 return -EINVAL;
134
135 /* This is all entirely broken */
136 old_fops = file_priv->filp->f_op;
137 file_priv->filp->f_op = &i810_buffer_fops;
138 dev_priv->mmap_buffer = buf;
139 buf_priv->virtual = (void *)vm_mmap(file_priv->filp, 0, buf->total,
140 PROT_READ | PROT_WRITE,
141 MAP_SHARED, buf->bus_address);
142 dev_priv->mmap_buffer = NULL;
143 file_priv->filp->f_op = old_fops;
144 if (IS_ERR(buf_priv->virtual)) {
145 /* Real error */
146 DRM_ERROR("mmap error\n");
147 retcode = PTR_ERR(buf_priv->virtual);
148 buf_priv->virtual = NULL;
149 }
150
151 return retcode;
152 }
153
154 static int i810_unmap_buffer(struct drm_buf *buf)
155 {
156 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
157 int retcode = 0;
158
159 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
160 return -EINVAL;
161
162 retcode = vm_munmap((unsigned long)buf_priv->virtual,
163 (size_t) buf->total);
164
165 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
166 buf_priv->virtual = NULL;
167
168 return retcode;
169 }
170
171 static int i810_dma_get_buffer(struct drm_device *dev, drm_i810_dma_t *d,
172 struct drm_file *file_priv)
173 {
174 struct drm_buf *buf;
175 drm_i810_buf_priv_t *buf_priv;
176 int retcode = 0;
177
178 buf = i810_freelist_get(dev);
179 if (!buf) {
180 retcode = -ENOMEM;
181 DRM_DEBUG("retcode=%d\n", retcode);
182 return retcode;
183 }
184
185 retcode = i810_map_buffer(buf, file_priv);
186 if (retcode) {
187 i810_freelist_put(dev, buf);
188 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
189 return retcode;
190 }
191 buf->file_priv = file_priv;
192 buf_priv = buf->dev_private;
193 d->granted = 1;
194 d->request_idx = buf->idx;
195 d->request_size = buf->total;
196 d->virtual = buf_priv->virtual;
197
198 return retcode;
199 }
200
201 static int i810_dma_cleanup(struct drm_device *dev)
202 {
203 struct drm_device_dma *dma = dev->dma;
204
205 /* Make sure interrupts are disabled here because the uninstall ioctl
206 * may not have been called from userspace and after dev_private
207 * is freed, it's too late.
208 */
209 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
210 drm_irq_uninstall(dev);
211
212 if (dev->dev_private) {
213 int i;
214 drm_i810_private_t *dev_priv =
215 (drm_i810_private_t *) dev->dev_private;
216
217 if (dev_priv->ring.virtual_start)
218 drm_core_ioremapfree(&dev_priv->ring.map, dev);
219 if (dev_priv->hw_status_page) {
220 pci_free_consistent(dev->pdev, PAGE_SIZE,
221 dev_priv->hw_status_page,
222 dev_priv->dma_status_page);
223 }
224 kfree(dev->dev_private);
225 dev->dev_private = NULL;
226
227 for (i = 0; i < dma->buf_count; i++) {
228 struct drm_buf *buf = dma->buflist[i];
229 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
230
231 if (buf_priv->kernel_virtual && buf->total)
232 drm_core_ioremapfree(&buf_priv->map, dev);
233 }
234 }
235 return 0;
236 }
237
238 static int i810_wait_ring(struct drm_device *dev, int n)
239 {
240 drm_i810_private_t *dev_priv = dev->dev_private;
241 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
242 int iters = 0;
243 unsigned long end;
244 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
245
246 end = jiffies + (HZ * 3);
247 while (ring->space < n) {
248 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
249 ring->space = ring->head - (ring->tail + 8);
250 if (ring->space < 0)
251 ring->space += ring->Size;
252
253 if (ring->head != last_head) {
254 end = jiffies + (HZ * 3);
255 last_head = ring->head;
256 }
257
258 iters++;
259 if (time_before(end, jiffies)) {
260 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
261 DRM_ERROR("lockup\n");
262 goto out_wait_ring;
263 }
264 udelay(1);
265 }
266
267 out_wait_ring:
268 return iters;
269 }
270
271 static void i810_kernel_lost_context(struct drm_device *dev)
272 {
273 drm_i810_private_t *dev_priv = dev->dev_private;
274 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
275
276 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
277 ring->tail = I810_READ(LP_RING + RING_TAIL);
278 ring->space = ring->head - (ring->tail + 8);
279 if (ring->space < 0)
280 ring->space += ring->Size;
281 }
282
283 static int i810_freelist_init(struct drm_device *dev, drm_i810_private_t *dev_priv)
284 {
285 struct drm_device_dma *dma = dev->dma;
286 int my_idx = 24;
287 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
288 int i;
289
290 if (dma->buf_count > 1019) {
291 /* Not enough space in the status page for the freelist */
292 return -EINVAL;
293 }
294
295 for (i = 0; i < dma->buf_count; i++) {
296 struct drm_buf *buf = dma->buflist[i];
297 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
298
299 buf_priv->in_use = hw_status++;
300 buf_priv->my_use_idx = my_idx;
301 my_idx += 4;
302
303 *buf_priv->in_use = I810_BUF_FREE;
304
305 buf_priv->map.offset = buf->bus_address;
306 buf_priv->map.size = buf->total;
307 buf_priv->map.type = _DRM_AGP;
308 buf_priv->map.flags = 0;
309 buf_priv->map.mtrr = 0;
310
311 drm_core_ioremap(&buf_priv->map, dev);
312 buf_priv->kernel_virtual = buf_priv->map.handle;
313
314 }
315 return 0;
316 }
317
318 static int i810_dma_initialize(struct drm_device *dev,
319 drm_i810_private_t *dev_priv,
320 drm_i810_init_t *init)
321 {
322 struct drm_map_list *r_list;
323 memset(dev_priv, 0, sizeof(drm_i810_private_t));
324
325 list_for_each_entry(r_list, &dev->maplist, head) {
326 if (r_list->map &&
327 r_list->map->type == _DRM_SHM &&
328 r_list->map->flags & _DRM_CONTAINS_LOCK) {
329 dev_priv->sarea_map = r_list->map;
330 break;
331 }
332 }
333 if (!dev_priv->sarea_map) {
334 dev->dev_private = (void *)dev_priv;
335 i810_dma_cleanup(dev);
336 DRM_ERROR("can not find sarea!\n");
337 return -EINVAL;
338 }
339 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
340 if (!dev_priv->mmio_map) {
341 dev->dev_private = (void *)dev_priv;
342 i810_dma_cleanup(dev);
343 DRM_ERROR("can not find mmio map!\n");
344 return -EINVAL;
345 }
346 dev->agp_buffer_token = init->buffers_offset;
347 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
348 if (!dev->agp_buffer_map) {
349 dev->dev_private = (void *)dev_priv;
350 i810_dma_cleanup(dev);
351 DRM_ERROR("can not find dma buffer map!\n");
352 return -EINVAL;
353 }
354
355 dev_priv->sarea_priv = (drm_i810_sarea_t *)
356 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
357
358 dev_priv->ring.Start = init->ring_start;
359 dev_priv->ring.End = init->ring_end;
360 dev_priv->ring.Size = init->ring_size;
361
362 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
363 dev_priv->ring.map.size = init->ring_size;
364 dev_priv->ring.map.type = _DRM_AGP;
365 dev_priv->ring.map.flags = 0;
366 dev_priv->ring.map.mtrr = 0;
367
368 drm_core_ioremap(&dev_priv->ring.map, dev);
369
370 if (dev_priv->ring.map.handle == NULL) {
371 dev->dev_private = (void *)dev_priv;
372 i810_dma_cleanup(dev);
373 DRM_ERROR("can not ioremap virtual address for"
374 " ring buffer\n");
375 return -ENOMEM;
376 }
377
378 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
379
380 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
381
382 dev_priv->w = init->w;
383 dev_priv->h = init->h;
384 dev_priv->pitch = init->pitch;
385 dev_priv->back_offset = init->back_offset;
386 dev_priv->depth_offset = init->depth_offset;
387 dev_priv->front_offset = init->front_offset;
388
389 dev_priv->overlay_offset = init->overlay_offset;
390 dev_priv->overlay_physical = init->overlay_physical;
391
392 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
393 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
394 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
395
396 /* Program Hardware Status Page */
397 dev_priv->hw_status_page =
398 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
399 &dev_priv->dma_status_page);
400 if (!dev_priv->hw_status_page) {
401 dev->dev_private = (void *)dev_priv;
402 i810_dma_cleanup(dev);
403 DRM_ERROR("Can not allocate hardware status page\n");
404 return -ENOMEM;
405 }
406 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
407 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
408
409 I810_WRITE(0x02080, dev_priv->dma_status_page);
410 DRM_DEBUG("Enabled hardware status page\n");
411
412 /* Now we need to init our freelist */
413 if (i810_freelist_init(dev, dev_priv) != 0) {
414 dev->dev_private = (void *)dev_priv;
415 i810_dma_cleanup(dev);
416 DRM_ERROR("Not enough space in the status page for"
417 " the freelist\n");
418 return -ENOMEM;
419 }
420 dev->dev_private = (void *)dev_priv;
421
422 return 0;
423 }
424
425 static int i810_dma_init(struct drm_device *dev, void *data,
426 struct drm_file *file_priv)
427 {
428 drm_i810_private_t *dev_priv;
429 drm_i810_init_t *init = data;
430 int retcode = 0;
431
432 switch (init->func) {
433 case I810_INIT_DMA_1_4:
434 DRM_INFO("Using v1.4 init.\n");
435 dev_priv = kmalloc(sizeof(drm_i810_private_t), GFP_KERNEL);
436 if (dev_priv == NULL)
437 return -ENOMEM;
438 retcode = i810_dma_initialize(dev, dev_priv, init);
439 break;
440
441 case I810_CLEANUP_DMA:
442 DRM_INFO("DMA Cleanup\n");
443 retcode = i810_dma_cleanup(dev);
444 break;
445 default:
446 return -EINVAL;
447 }
448
449 return retcode;
450 }
451
452 /* Most efficient way to verify state for the i810 is as it is
453 * emitted. Non-conformant state is silently dropped.
454 *
455 * Use 'volatile' & local var tmp to force the emitted values to be
456 * identical to the verified ones.
457 */
458 static void i810EmitContextVerified(struct drm_device *dev,
459 volatile unsigned int *code)
460 {
461 drm_i810_private_t *dev_priv = dev->dev_private;
462 int i, j = 0;
463 unsigned int tmp;
464 RING_LOCALS;
465
466 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
467
468 OUT_RING(GFX_OP_COLOR_FACTOR);
469 OUT_RING(code[I810_CTXREG_CF1]);
470
471 OUT_RING(GFX_OP_STIPPLE);
472 OUT_RING(code[I810_CTXREG_ST1]);
473
474 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
475 tmp = code[i];
476
477 if ((tmp & (7 << 29)) == (3 << 29) &&
478 (tmp & (0x1f << 24)) < (0x1d << 24)) {
479 OUT_RING(tmp);
480 j++;
481 } else
482 printk("constext state dropped!!!\n");
483 }
484
485 if (j & 1)
486 OUT_RING(0);
487
488 ADVANCE_LP_RING();
489 }
490
491 static void i810EmitTexVerified(struct drm_device *dev, volatile unsigned int *code)
492 {
493 drm_i810_private_t *dev_priv = dev->dev_private;
494 int i, j = 0;
495 unsigned int tmp;
496 RING_LOCALS;
497
498 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
499
500 OUT_RING(GFX_OP_MAP_INFO);
501 OUT_RING(code[I810_TEXREG_MI1]);
502 OUT_RING(code[I810_TEXREG_MI2]);
503 OUT_RING(code[I810_TEXREG_MI3]);
504
505 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
506 tmp = code[i];
507
508 if ((tmp & (7 << 29)) == (3 << 29) &&
509 (tmp & (0x1f << 24)) < (0x1d << 24)) {
510 OUT_RING(tmp);
511 j++;
512 } else
513 printk("texture state dropped!!!\n");
514 }
515
516 if (j & 1)
517 OUT_RING(0);
518
519 ADVANCE_LP_RING();
520 }
521
522 /* Need to do some additional checking when setting the dest buffer.
523 */
524 static void i810EmitDestVerified(struct drm_device *dev,
525 volatile unsigned int *code)
526 {
527 drm_i810_private_t *dev_priv = dev->dev_private;
528 unsigned int tmp;
529 RING_LOCALS;
530
531 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
532
533 tmp = code[I810_DESTREG_DI1];
534 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
535 OUT_RING(CMD_OP_DESTBUFFER_INFO);
536 OUT_RING(tmp);
537 } else
538 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
539 tmp, dev_priv->front_di1, dev_priv->back_di1);
540
541 /* invarient:
542 */
543 OUT_RING(CMD_OP_Z_BUFFER_INFO);
544 OUT_RING(dev_priv->zi1);
545
546 OUT_RING(GFX_OP_DESTBUFFER_VARS);
547 OUT_RING(code[I810_DESTREG_DV1]);
548
549 OUT_RING(GFX_OP_DRAWRECT_INFO);
550 OUT_RING(code[I810_DESTREG_DR1]);
551 OUT_RING(code[I810_DESTREG_DR2]);
552 OUT_RING(code[I810_DESTREG_DR3]);
553 OUT_RING(code[I810_DESTREG_DR4]);
554 OUT_RING(0);
555
556 ADVANCE_LP_RING();
557 }
558
559 static void i810EmitState(struct drm_device *dev)
560 {
561 drm_i810_private_t *dev_priv = dev->dev_private;
562 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
563 unsigned int dirty = sarea_priv->dirty;
564
565 DRM_DEBUG("%x\n", dirty);
566
567 if (dirty & I810_UPLOAD_BUFFERS) {
568 i810EmitDestVerified(dev, sarea_priv->BufferState);
569 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
570 }
571
572 if (dirty & I810_UPLOAD_CTX) {
573 i810EmitContextVerified(dev, sarea_priv->ContextState);
574 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
575 }
576
577 if (dirty & I810_UPLOAD_TEX0) {
578 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
579 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
580 }
581
582 if (dirty & I810_UPLOAD_TEX1) {
583 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
584 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
585 }
586 }
587
588 /* need to verify
589 */
590 static void i810_dma_dispatch_clear(struct drm_device *dev, int flags,
591 unsigned int clear_color,
592 unsigned int clear_zval)
593 {
594 drm_i810_private_t *dev_priv = dev->dev_private;
595 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
596 int nbox = sarea_priv->nbox;
597 struct drm_clip_rect *pbox = sarea_priv->boxes;
598 int pitch = dev_priv->pitch;
599 int cpp = 2;
600 int i;
601 RING_LOCALS;
602
603 if (dev_priv->current_page == 1) {
604 unsigned int tmp = flags;
605
606 flags &= ~(I810_FRONT | I810_BACK);
607 if (tmp & I810_FRONT)
608 flags |= I810_BACK;
609 if (tmp & I810_BACK)
610 flags |= I810_FRONT;
611 }
612
613 i810_kernel_lost_context(dev);
614
615 if (nbox > I810_NR_SAREA_CLIPRECTS)
616 nbox = I810_NR_SAREA_CLIPRECTS;
617
618 for (i = 0; i < nbox; i++, pbox++) {
619 unsigned int x = pbox->x1;
620 unsigned int y = pbox->y1;
621 unsigned int width = (pbox->x2 - x) * cpp;
622 unsigned int height = pbox->y2 - y;
623 unsigned int start = y * pitch + x * cpp;
624
625 if (pbox->x1 > pbox->x2 ||
626 pbox->y1 > pbox->y2 ||
627 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
628 continue;
629
630 if (flags & I810_FRONT) {
631 BEGIN_LP_RING(6);
632 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
633 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
634 OUT_RING((height << 16) | width);
635 OUT_RING(start);
636 OUT_RING(clear_color);
637 OUT_RING(0);
638 ADVANCE_LP_RING();
639 }
640
641 if (flags & I810_BACK) {
642 BEGIN_LP_RING(6);
643 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
644 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
645 OUT_RING((height << 16) | width);
646 OUT_RING(dev_priv->back_offset + start);
647 OUT_RING(clear_color);
648 OUT_RING(0);
649 ADVANCE_LP_RING();
650 }
651
652 if (flags & I810_DEPTH) {
653 BEGIN_LP_RING(6);
654 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
655 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
656 OUT_RING((height << 16) | width);
657 OUT_RING(dev_priv->depth_offset + start);
658 OUT_RING(clear_zval);
659 OUT_RING(0);
660 ADVANCE_LP_RING();
661 }
662 }
663 }
664
665 static void i810_dma_dispatch_swap(struct drm_device *dev)
666 {
667 drm_i810_private_t *dev_priv = dev->dev_private;
668 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
669 int nbox = sarea_priv->nbox;
670 struct drm_clip_rect *pbox = sarea_priv->boxes;
671 int pitch = dev_priv->pitch;
672 int cpp = 2;
673 int i;
674 RING_LOCALS;
675
676 DRM_DEBUG("swapbuffers\n");
677
678 i810_kernel_lost_context(dev);
679
680 if (nbox > I810_NR_SAREA_CLIPRECTS)
681 nbox = I810_NR_SAREA_CLIPRECTS;
682
683 for (i = 0; i < nbox; i++, pbox++) {
684 unsigned int w = pbox->x2 - pbox->x1;
685 unsigned int h = pbox->y2 - pbox->y1;
686 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
687 unsigned int start = dst;
688
689 if (pbox->x1 > pbox->x2 ||
690 pbox->y1 > pbox->y2 ||
691 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
692 continue;
693
694 BEGIN_LP_RING(6);
695 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
696 OUT_RING(pitch | (0xCC << 16));
697 OUT_RING((h << 16) | (w * cpp));
698 if (dev_priv->current_page == 0)
699 OUT_RING(dev_priv->front_offset + start);
700 else
701 OUT_RING(dev_priv->back_offset + start);
702 OUT_RING(pitch);
703 if (dev_priv->current_page == 0)
704 OUT_RING(dev_priv->back_offset + start);
705 else
706 OUT_RING(dev_priv->front_offset + start);
707 ADVANCE_LP_RING();
708 }
709 }
710
711 static void i810_dma_dispatch_vertex(struct drm_device *dev,
712 struct drm_buf *buf, int discard, int used)
713 {
714 drm_i810_private_t *dev_priv = dev->dev_private;
715 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
716 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
717 struct drm_clip_rect *box = sarea_priv->boxes;
718 int nbox = sarea_priv->nbox;
719 unsigned long address = (unsigned long)buf->bus_address;
720 unsigned long start = address - dev->agp->base;
721 int i = 0;
722 RING_LOCALS;
723
724 i810_kernel_lost_context(dev);
725
726 if (nbox > I810_NR_SAREA_CLIPRECTS)
727 nbox = I810_NR_SAREA_CLIPRECTS;
728
729 if (used > 4 * 1024)
730 used = 0;
731
732 if (sarea_priv->dirty)
733 i810EmitState(dev);
734
735 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
736 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
737
738 *(u32 *) buf_priv->kernel_virtual =
739 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
740
741 if (used & 4) {
742 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
743 used += 4;
744 }
745
746 i810_unmap_buffer(buf);
747 }
748
749 if (used) {
750 do {
751 if (i < nbox) {
752 BEGIN_LP_RING(4);
753 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
754 SC_ENABLE);
755 OUT_RING(GFX_OP_SCISSOR_INFO);
756 OUT_RING(box[i].x1 | (box[i].y1 << 16));
757 OUT_RING((box[i].x2 -
758 1) | ((box[i].y2 - 1) << 16));
759 ADVANCE_LP_RING();
760 }
761
762 BEGIN_LP_RING(4);
763 OUT_RING(CMD_OP_BATCH_BUFFER);
764 OUT_RING(start | BB1_PROTECTED);
765 OUT_RING(start + used - 4);
766 OUT_RING(0);
767 ADVANCE_LP_RING();
768
769 } while (++i < nbox);
770 }
771
772 if (discard) {
773 dev_priv->counter++;
774
775 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
776 I810_BUF_HARDWARE);
777
778 BEGIN_LP_RING(8);
779 OUT_RING(CMD_STORE_DWORD_IDX);
780 OUT_RING(20);
781 OUT_RING(dev_priv->counter);
782 OUT_RING(CMD_STORE_DWORD_IDX);
783 OUT_RING(buf_priv->my_use_idx);
784 OUT_RING(I810_BUF_FREE);
785 OUT_RING(CMD_REPORT_HEAD);
786 OUT_RING(0);
787 ADVANCE_LP_RING();
788 }
789 }
790
791 static void i810_dma_dispatch_flip(struct drm_device *dev)
792 {
793 drm_i810_private_t *dev_priv = dev->dev_private;
794 int pitch = dev_priv->pitch;
795 RING_LOCALS;
796
797 DRM_DEBUG("page=%d pfCurrentPage=%d\n",
798 dev_priv->current_page,
799 dev_priv->sarea_priv->pf_current_page);
800
801 i810_kernel_lost_context(dev);
802
803 BEGIN_LP_RING(2);
804 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
805 OUT_RING(0);
806 ADVANCE_LP_RING();
807
808 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
809 /* On i815 at least ASYNC is buggy */
810 /* pitch<<5 is from 11.2.8 p158,
811 its the pitch / 8 then left shifted 8,
812 so (pitch >> 3) << 8 */
813 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
814 if (dev_priv->current_page == 0) {
815 OUT_RING(dev_priv->back_offset);
816 dev_priv->current_page = 1;
817 } else {
818 OUT_RING(dev_priv->front_offset);
819 dev_priv->current_page = 0;
820 }
821 OUT_RING(0);
822 ADVANCE_LP_RING();
823
824 BEGIN_LP_RING(2);
825 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
826 OUT_RING(0);
827 ADVANCE_LP_RING();
828
829 /* Increment the frame counter. The client-side 3D driver must
830 * throttle the framerate by waiting for this value before
831 * performing the swapbuffer ioctl.
832 */
833 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
834
835 }
836
837 static void i810_dma_quiescent(struct drm_device *dev)
838 {
839 drm_i810_private_t *dev_priv = dev->dev_private;
840 RING_LOCALS;
841
842 i810_kernel_lost_context(dev);
843
844 BEGIN_LP_RING(4);
845 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
846 OUT_RING(CMD_REPORT_HEAD);
847 OUT_RING(0);
848 OUT_RING(0);
849 ADVANCE_LP_RING();
850
851 i810_wait_ring(dev, dev_priv->ring.Size - 8);
852 }
853
854 static int i810_flush_queue(struct drm_device *dev)
855 {
856 drm_i810_private_t *dev_priv = dev->dev_private;
857 struct drm_device_dma *dma = dev->dma;
858 int i, ret = 0;
859 RING_LOCALS;
860
861 i810_kernel_lost_context(dev);
862
863 BEGIN_LP_RING(2);
864 OUT_RING(CMD_REPORT_HEAD);
865 OUT_RING(0);
866 ADVANCE_LP_RING();
867
868 i810_wait_ring(dev, dev_priv->ring.Size - 8);
869
870 for (i = 0; i < dma->buf_count; i++) {
871 struct drm_buf *buf = dma->buflist[i];
872 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
873
874 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
875 I810_BUF_FREE);
876
877 if (used == I810_BUF_HARDWARE)
878 DRM_DEBUG("reclaimed from HARDWARE\n");
879 if (used == I810_BUF_CLIENT)
880 DRM_DEBUG("still on client\n");
881 }
882
883 return ret;
884 }
885
886 /* Must be called with the lock held */
887 void i810_driver_reclaim_buffers(struct drm_device *dev,
888 struct drm_file *file_priv)
889 {
890 struct drm_device_dma *dma = dev->dma;
891 int i;
892
893 if (!dma)
894 return;
895 if (!dev->dev_private)
896 return;
897 if (!dma->buflist)
898 return;
899
900 i810_flush_queue(dev);
901
902 for (i = 0; i < dma->buf_count; i++) {
903 struct drm_buf *buf = dma->buflist[i];
904 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
905
906 if (buf->file_priv == file_priv && buf_priv) {
907 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
908 I810_BUF_FREE);
909
910 if (used == I810_BUF_CLIENT)
911 DRM_DEBUG("reclaimed from client\n");
912 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
913 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
914 }
915 }
916 }
917
918 static int i810_flush_ioctl(struct drm_device *dev, void *data,
919 struct drm_file *file_priv)
920 {
921 LOCK_TEST_WITH_RETURN(dev, file_priv);
922
923 i810_flush_queue(dev);
924 return 0;
925 }
926
927 static int i810_dma_vertex(struct drm_device *dev, void *data,
928 struct drm_file *file_priv)
929 {
930 struct drm_device_dma *dma = dev->dma;
931 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
932 u32 *hw_status = dev_priv->hw_status_page;
933 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
934 dev_priv->sarea_priv;
935 drm_i810_vertex_t *vertex = data;
936
937 LOCK_TEST_WITH_RETURN(dev, file_priv);
938
939 DRM_DEBUG("idx %d used %d discard %d\n",
940 vertex->idx, vertex->used, vertex->discard);
941
942 if (vertex->idx < 0 || vertex->idx > dma->buf_count)
943 return -EINVAL;
944
945 i810_dma_dispatch_vertex(dev,
946 dma->buflist[vertex->idx],
947 vertex->discard, vertex->used);
948
949 atomic_add(vertex->used, &dev->counts[_DRM_STAT_SECONDARY]);
950 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
951 sarea_priv->last_enqueue = dev_priv->counter - 1;
952 sarea_priv->last_dispatch = (int)hw_status[5];
953
954 return 0;
955 }
956
957 static int i810_clear_bufs(struct drm_device *dev, void *data,
958 struct drm_file *file_priv)
959 {
960 drm_i810_clear_t *clear = data;
961
962 LOCK_TEST_WITH_RETURN(dev, file_priv);
963
964 /* GH: Someone's doing nasty things... */
965 if (!dev->dev_private)
966 return -EINVAL;
967
968 i810_dma_dispatch_clear(dev, clear->flags,
969 clear->clear_color, clear->clear_depth);
970 return 0;
971 }
972
973 static int i810_swap_bufs(struct drm_device *dev, void *data,
974 struct drm_file *file_priv)
975 {
976 DRM_DEBUG("\n");
977
978 LOCK_TEST_WITH_RETURN(dev, file_priv);
979
980 i810_dma_dispatch_swap(dev);
981 return 0;
982 }
983
984 static int i810_getage(struct drm_device *dev, void *data,
985 struct drm_file *file_priv)
986 {
987 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
988 u32 *hw_status = dev_priv->hw_status_page;
989 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
990 dev_priv->sarea_priv;
991
992 sarea_priv->last_dispatch = (int)hw_status[5];
993 return 0;
994 }
995
996 static int i810_getbuf(struct drm_device *dev, void *data,
997 struct drm_file *file_priv)
998 {
999 int retcode = 0;
1000 drm_i810_dma_t *d = data;
1001 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1002 u32 *hw_status = dev_priv->hw_status_page;
1003 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1004 dev_priv->sarea_priv;
1005
1006 LOCK_TEST_WITH_RETURN(dev, file_priv);
1007
1008 d->granted = 0;
1009
1010 retcode = i810_dma_get_buffer(dev, d, file_priv);
1011
1012 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
1013 task_pid_nr(current), retcode, d->granted);
1014
1015 sarea_priv->last_dispatch = (int)hw_status[5];
1016
1017 return retcode;
1018 }
1019
1020 static int i810_copybuf(struct drm_device *dev, void *data,
1021 struct drm_file *file_priv)
1022 {
1023 /* Never copy - 2.4.x doesn't need it */
1024 return 0;
1025 }
1026
1027 static int i810_docopy(struct drm_device *dev, void *data,
1028 struct drm_file *file_priv)
1029 {
1030 /* Never copy - 2.4.x doesn't need it */
1031 return 0;
1032 }
1033
1034 static void i810_dma_dispatch_mc(struct drm_device *dev, struct drm_buf *buf, int used,
1035 unsigned int last_render)
1036 {
1037 drm_i810_private_t *dev_priv = dev->dev_private;
1038 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1039 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1040 unsigned long address = (unsigned long)buf->bus_address;
1041 unsigned long start = address - dev->agp->base;
1042 int u;
1043 RING_LOCALS;
1044
1045 i810_kernel_lost_context(dev);
1046
1047 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
1048 if (u != I810_BUF_CLIENT)
1049 DRM_DEBUG("MC found buffer that isn't mine!\n");
1050
1051 if (used > 4 * 1024)
1052 used = 0;
1053
1054 sarea_priv->dirty = 0x7f;
1055
1056 DRM_DEBUG("addr 0x%lx, used 0x%x\n", address, used);
1057
1058 dev_priv->counter++;
1059 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1060 DRM_DEBUG("start : %lx\n", start);
1061 DRM_DEBUG("used : %d\n", used);
1062 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1063
1064 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1065 if (used & 4) {
1066 *(u32 *) ((char *) buf_priv->virtual + used) = 0;
1067 used += 4;
1068 }
1069
1070 i810_unmap_buffer(buf);
1071 }
1072 BEGIN_LP_RING(4);
1073 OUT_RING(CMD_OP_BATCH_BUFFER);
1074 OUT_RING(start | BB1_PROTECTED);
1075 OUT_RING(start + used - 4);
1076 OUT_RING(0);
1077 ADVANCE_LP_RING();
1078
1079 BEGIN_LP_RING(8);
1080 OUT_RING(CMD_STORE_DWORD_IDX);
1081 OUT_RING(buf_priv->my_use_idx);
1082 OUT_RING(I810_BUF_FREE);
1083 OUT_RING(0);
1084
1085 OUT_RING(CMD_STORE_DWORD_IDX);
1086 OUT_RING(16);
1087 OUT_RING(last_render);
1088 OUT_RING(0);
1089 ADVANCE_LP_RING();
1090 }
1091
1092 static int i810_dma_mc(struct drm_device *dev, void *data,
1093 struct drm_file *file_priv)
1094 {
1095 struct drm_device_dma *dma = dev->dma;
1096 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1097 u32 *hw_status = dev_priv->hw_status_page;
1098 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1099 dev_priv->sarea_priv;
1100 drm_i810_mc_t *mc = data;
1101
1102 LOCK_TEST_WITH_RETURN(dev, file_priv);
1103
1104 if (mc->idx >= dma->buf_count || mc->idx < 0)
1105 return -EINVAL;
1106
1107 i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
1108 mc->last_render);
1109
1110 atomic_add(mc->used, &dev->counts[_DRM_STAT_SECONDARY]);
1111 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1112 sarea_priv->last_enqueue = dev_priv->counter - 1;
1113 sarea_priv->last_dispatch = (int)hw_status[5];
1114
1115 return 0;
1116 }
1117
1118 static int i810_rstatus(struct drm_device *dev, void *data,
1119 struct drm_file *file_priv)
1120 {
1121 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1122
1123 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1124 }
1125
1126 static int i810_ov0_info(struct drm_device *dev, void *data,
1127 struct drm_file *file_priv)
1128 {
1129 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1130 drm_i810_overlay_t *ov = data;
1131
1132 ov->offset = dev_priv->overlay_offset;
1133 ov->physical = dev_priv->overlay_physical;
1134
1135 return 0;
1136 }
1137
1138 static int i810_fstatus(struct drm_device *dev, void *data,
1139 struct drm_file *file_priv)
1140 {
1141 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1142
1143 LOCK_TEST_WITH_RETURN(dev, file_priv);
1144 return I810_READ(0x30008);
1145 }
1146
1147 static int i810_ov0_flip(struct drm_device *dev, void *data,
1148 struct drm_file *file_priv)
1149 {
1150 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1151
1152 LOCK_TEST_WITH_RETURN(dev, file_priv);
1153
1154 /* Tell the overlay to update */
1155 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1156
1157 return 0;
1158 }
1159
1160 /* Not sure why this isn't set all the time:
1161 */
1162 static void i810_do_init_pageflip(struct drm_device *dev)
1163 {
1164 drm_i810_private_t *dev_priv = dev->dev_private;
1165
1166 DRM_DEBUG("\n");
1167 dev_priv->page_flipping = 1;
1168 dev_priv->current_page = 0;
1169 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1170 }
1171
1172 static int i810_do_cleanup_pageflip(struct drm_device *dev)
1173 {
1174 drm_i810_private_t *dev_priv = dev->dev_private;
1175
1176 DRM_DEBUG("\n");
1177 if (dev_priv->current_page != 0)
1178 i810_dma_dispatch_flip(dev);
1179
1180 dev_priv->page_flipping = 0;
1181 return 0;
1182 }
1183
1184 static int i810_flip_bufs(struct drm_device *dev, void *data,
1185 struct drm_file *file_priv)
1186 {
1187 drm_i810_private_t *dev_priv = dev->dev_private;
1188
1189 DRM_DEBUG("\n");
1190
1191 LOCK_TEST_WITH_RETURN(dev, file_priv);
1192
1193 if (!dev_priv->page_flipping)
1194 i810_do_init_pageflip(dev);
1195
1196 i810_dma_dispatch_flip(dev);
1197 return 0;
1198 }
1199
1200 int i810_driver_load(struct drm_device *dev, unsigned long flags)
1201 {
1202 /* i810 has 4 more counters */
1203 dev->counters += 4;
1204 dev->types[6] = _DRM_STAT_IRQ;
1205 dev->types[7] = _DRM_STAT_PRIMARY;
1206 dev->types[8] = _DRM_STAT_SECONDARY;
1207 dev->types[9] = _DRM_STAT_DMA;
1208
1209 pci_set_master(dev->pdev);
1210
1211 return 0;
1212 }
1213
1214 void i810_driver_lastclose(struct drm_device *dev)
1215 {
1216 i810_dma_cleanup(dev);
1217 }
1218
1219 void i810_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1220 {
1221 if (dev->dev_private) {
1222 drm_i810_private_t *dev_priv = dev->dev_private;
1223 if (dev_priv->page_flipping)
1224 i810_do_cleanup_pageflip(dev);
1225 }
1226
1227 if (file_priv->master && file_priv->master->lock.hw_lock) {
1228 drm_idlelock_take(&file_priv->master->lock);
1229 i810_driver_reclaim_buffers(dev, file_priv);
1230 drm_idlelock_release(&file_priv->master->lock);
1231 } else {
1232 /* master disappeared, clean up stuff anyway and hope nothing
1233 * goes wrong */
1234 i810_driver_reclaim_buffers(dev, file_priv);
1235 }
1236
1237 }
1238
1239 int i810_driver_dma_quiescent(struct drm_device *dev)
1240 {
1241 i810_dma_quiescent(dev);
1242 return 0;
1243 }
1244
1245 struct drm_ioctl_desc i810_ioctls[] = {
1246 DRM_IOCTL_DEF_DRV(I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1247 DRM_IOCTL_DEF_DRV(I810_VERTEX, i810_dma_vertex, DRM_AUTH|DRM_UNLOCKED),
1248 DRM_IOCTL_DEF_DRV(I810_CLEAR, i810_clear_bufs, DRM_AUTH|DRM_UNLOCKED),
1249 DRM_IOCTL_DEF_DRV(I810_FLUSH, i810_flush_ioctl, DRM_AUTH|DRM_UNLOCKED),
1250 DRM_IOCTL_DEF_DRV(I810_GETAGE, i810_getage, DRM_AUTH|DRM_UNLOCKED),
1251 DRM_IOCTL_DEF_DRV(I810_GETBUF, i810_getbuf, DRM_AUTH|DRM_UNLOCKED),
1252 DRM_IOCTL_DEF_DRV(I810_SWAP, i810_swap_bufs, DRM_AUTH|DRM_UNLOCKED),
1253 DRM_IOCTL_DEF_DRV(I810_COPY, i810_copybuf, DRM_AUTH|DRM_UNLOCKED),
1254 DRM_IOCTL_DEF_DRV(I810_DOCOPY, i810_docopy, DRM_AUTH|DRM_UNLOCKED),
1255 DRM_IOCTL_DEF_DRV(I810_OV0INFO, i810_ov0_info, DRM_AUTH|DRM_UNLOCKED),
1256 DRM_IOCTL_DEF_DRV(I810_FSTATUS, i810_fstatus, DRM_AUTH|DRM_UNLOCKED),
1257 DRM_IOCTL_DEF_DRV(I810_OV0FLIP, i810_ov0_flip, DRM_AUTH|DRM_UNLOCKED),
1258 DRM_IOCTL_DEF_DRV(I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1259 DRM_IOCTL_DEF_DRV(I810_RSTATUS, i810_rstatus, DRM_AUTH|DRM_UNLOCKED),
1260 DRM_IOCTL_DEF_DRV(I810_FLIP, i810_flip_bufs, DRM_AUTH|DRM_UNLOCKED),
1261 };
1262
1263 int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
1264
1265 /**
1266 * Determine if the device really is AGP or not.
1267 *
1268 * All Intel graphics chipsets are treated as AGP, even if they are really
1269 * PCI-e.
1270 *
1271 * \param dev The device to be tested.
1272 *
1273 * \returns
1274 * A value of 1 is always retured to indictate every i810 is AGP.
1275 */
1276 int i810_driver_device_is_agp(struct drm_device *dev)
1277 {
1278 return 1;
1279 }
kernel source for telekom puls (alcatel/mediatek)