drivers/gpu/drm/cirrus/cirrus_drv.h

   1 /*
   2  * Copyright 2012 Red Hat
   3  *
   4  * This file is subject to the terms and conditions of the GNU General
   5  * Public License version 2. See the file COPYING in the main
   6  * directory of this archive for more details.
   7  *
   8  * Authors: Matthew Garrett
   9  *          Dave Airlie
  10  */
  11 #ifndef __CIRRUS_DRV_H__
  12 #define __CIRRUS_DRV_H__
  13
  14 #include <video/vga.h>
  15
  16 #include <drm/drm_fb_helper.h>
  17
  18 #include <drm/ttm/ttm_bo_api.h>
  19 #include <drm/ttm/ttm_bo_driver.h>
  20 #include <drm/ttm/ttm_placement.h>
  21 #include <drm/ttm/ttm_memory.h>
  22 #include <drm/ttm/ttm_module.h>
  23
  24 #define DRIVER_AUTHOR           "Matthew Garrett"
  25
  26 #define DRIVER_NAME             "cirrus"
  27 #define DRIVER_DESC             "qemu Cirrus emulation"
  28 #define DRIVER_DATE             "20110418"
  29
  30 #define DRIVER_MAJOR            1
  31 #define DRIVER_MINOR            0
  32 #define DRIVER_PATCHLEVEL       0
  33
  34 #define CIRRUSFB_CONN_LIMIT 1
  35
  36 #define RREG8(reg) ioread8(((void __iomem *)cdev->rmmio) + (reg))
  37 #define WREG8(reg, v) iowrite8(v, ((void __iomem *)cdev->rmmio) + (reg))
  38 #define RREG32(reg) ioread32(((void __iomem *)cdev->rmmio) + (reg))
  39 #define WREG32(reg, v) iowrite32(v, ((void __iomem *)cdev->rmmio) + (reg))
  40
  41 #define SEQ_INDEX 4
  42 #define SEQ_DATA 5
  43
  44 #define WREG_SEQ(reg, v)                                        \
  45         do {                                                    \
  46                 WREG8(SEQ_INDEX, reg);                          \
  47                 WREG8(SEQ_DATA, v);                             \
  48         } while (0)                                             \
  49
  50 #define CRT_INDEX 0x14
  51 #define CRT_DATA 0x15
  52
  53 #define WREG_CRT(reg, v)                                        \
  54         do {                                                    \
  55                 WREG8(CRT_INDEX, reg);                          \
  56                 WREG8(CRT_DATA, v);                             \
  57         } while (0)                                             \
  58
  59 #define GFX_INDEX 0xe
  60 #define GFX_DATA 0xf
  61
  62 #define WREG_GFX(reg, v)                                        \
  63         do {                                                    \
  64                 WREG8(GFX_INDEX, reg);                          \
  65                 WREG8(GFX_DATA, v);                             \
  66         } while (0)                                             \
  67
  68 /*
  69  * Cirrus has a "hidden" DAC register that can be accessed by writing to
  70  * the pixel mask register to reset the state, then reading from the register
  71  * four times. The next write will then pass to the DAC
  72  */
  73 #define VGA_DAC_MASK 0x6
  74
  75 #define WREG_HDR(v)                                             \
  76         do {                                                    \
  77                 RREG8(VGA_DAC_MASK);                                    \
  78                 RREG8(VGA_DAC_MASK);                                    \
  79                 RREG8(VGA_DAC_MASK);                                    \
  80                 RREG8(VGA_DAC_MASK);                                    \
  81                 WREG8(VGA_DAC_MASK, v);                                 \
  82         } while (0)                                             \
  83
  84
  85 #define CIRRUS_MAX_FB_HEIGHT 4096
  86 #define CIRRUS_MAX_FB_WIDTH 4096
  87
  88 #define CIRRUS_DPMS_CLEARED (-1)
  89
  90 #define to_cirrus_crtc(x) container_of(x, struct cirrus_crtc, base)
  91 #define to_cirrus_encoder(x) container_of(x, struct cirrus_encoder, base)
  92 #define to_cirrus_framebuffer(x) container_of(x, struct cirrus_framebuffer, base)
  93
  94 struct cirrus_crtc {
  95         struct drm_crtc                 base;
  96         u8                              lut_r[256], lut_g[256], lut_b[256];
  97         int                             last_dpms;
  98         bool                            enabled;
  99 };
 100
 101 struct cirrus_fbdev;
 102 struct cirrus_mode_info {
 103         bool                            mode_config_initialized;
 104         struct cirrus_crtc              *crtc;
 105         /* pointer to fbdev info structure */
 106         struct cirrus_fbdev             *gfbdev;
 107 };
 108
 109 struct cirrus_encoder {
 110         struct drm_encoder              base;
 111         int                             last_dpms;
 112 };
 113
 114 struct cirrus_connector {
 115         struct drm_connector            base;
 116 };
 117
 118 struct cirrus_framebuffer {
 119         struct drm_framebuffer          base;
 120         struct drm_gem_object *obj;
 121 };
 122
 123 struct cirrus_mc {
 124         resource_size_t                 vram_size;
 125         resource_size_t                 vram_base;
 126 };
 127
 128 struct cirrus_device {
 129         struct drm_device               *dev;
 130         unsigned long                   flags;
 131
 132         resource_size_t                 rmmio_base;
 133         resource_size_t                 rmmio_size;
 134         void __iomem                    *rmmio;
 135
 136         struct cirrus_mc                        mc;
 137         struct cirrus_mode_info         mode_info;
 138
 139         int                             num_crtc;
 140         int fb_mtrr;
 141
 142         struct {
 143                 struct drm_global_reference mem_global_ref;
 144                 struct ttm_bo_global_ref bo_global_ref;
 145                 struct ttm_bo_device bdev;
 146                 atomic_t validate_sequence;
 147         } ttm;
 148         bool mm_inited;
 149 };
 150
 151
 152 struct cirrus_fbdev {
 153         struct drm_fb_helper helper;
 154         struct cirrus_framebuffer gfb;
 155         struct list_head fbdev_list;
 156         void *sysram;
 157         int size;
 158 };
 159
 160 struct cirrus_bo {
 161         struct ttm_buffer_object bo;
 162         struct ttm_placement placement;
 163         struct ttm_bo_kmap_obj kmap;
 164         struct drm_gem_object gem;
 165         u32 placements[3];
 166         int pin_count;
 167 };
 168 #define gem_to_cirrus_bo(gobj) container_of((gobj), struct cirrus_bo, gem)
 169
 170 static inline struct cirrus_bo *
 171 cirrus_bo(struct ttm_buffer_object *bo)
 172 {
 173         return container_of(bo, struct cirrus_bo, bo);
 174 }
 175
 176
 177 #define to_cirrus_obj(x) container_of(x, struct cirrus_gem_object, base)
 178 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
 179
 180                                 /* cirrus_mode.c */
 181 void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 182                              u16 blue, int regno);
 183 void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 184                              u16 *blue, int regno);
 185
 186
 187                                 /* cirrus_main.c */
 188 int cirrus_device_init(struct cirrus_device *cdev,
 189                       struct drm_device *ddev,
 190                       struct pci_dev *pdev,
 191                       uint32_t flags);
 192 void cirrus_device_fini(struct cirrus_device *cdev);
 193 int cirrus_gem_init_object(struct drm_gem_object *obj);
 194 void cirrus_gem_free_object(struct drm_gem_object *obj);
 195 int cirrus_dumb_mmap_offset(struct drm_file *file,
 196                             struct drm_device *dev,
 197                             uint32_t handle,
 198                             uint64_t *offset);
 199 int cirrus_gem_create(struct drm_device *dev,
 200                    u32 size, bool iskernel,
 201                       struct drm_gem_object **obj);
 202 int cirrus_dumb_create(struct drm_file *file,
 203                     struct drm_device *dev,
 204                        struct drm_mode_create_dumb *args);
 205 int cirrus_dumb_destroy(struct drm_file *file,
 206                      struct drm_device *dev,
 207                         uint32_t handle);
 208
 209 int cirrus_framebuffer_init(struct drm_device *dev,
 210                            struct cirrus_framebuffer *gfb,
 211                             struct drm_mode_fb_cmd2 *mode_cmd,
 212                             struct drm_gem_object *obj);
 213
 214                                 /* cirrus_display.c */
 215 int cirrus_modeset_init(struct cirrus_device *cdev);
 216 void cirrus_modeset_fini(struct cirrus_device *cdev);
 217
 218                                 /* cirrus_fbdev.c */
 219 int cirrus_fbdev_init(struct cirrus_device *cdev);
 220 void cirrus_fbdev_fini(struct cirrus_device *cdev);
 221
 222
 223
 224                                 /* cirrus_irq.c */
 225 void cirrus_driver_irq_preinstall(struct drm_device *dev);
 226 int cirrus_driver_irq_postinstall(struct drm_device *dev);
 227 void cirrus_driver_irq_uninstall(struct drm_device *dev);
 228 irqreturn_t cirrus_driver_irq_handler(DRM_IRQ_ARGS);
 229
 230                                 /* cirrus_kms.c */
 231 int cirrus_driver_load(struct drm_device *dev, unsigned long flags);
 232 int cirrus_driver_unload(struct drm_device *dev);
 233 extern struct drm_ioctl_desc cirrus_ioctls[];
 234 extern int cirrus_max_ioctl;
 235
 236 int cirrus_mm_init(struct cirrus_device *cirrus);
 237 void cirrus_mm_fini(struct cirrus_device *cirrus);
 238 void cirrus_ttm_placement(struct cirrus_bo *bo, int domain);
 239 int cirrus_bo_create(struct drm_device *dev, int size, int align,
 240                      uint32_t flags, struct cirrus_bo **pcirrusbo);
 241 int cirrus_mmap(struct file *filp, struct vm_area_struct *vma);
 242 int cirrus_bo_reserve(struct cirrus_bo *bo, bool no_wait);
 243 void cirrus_bo_unreserve(struct cirrus_bo *bo);
 244 int cirrus_bo_push_sysram(struct cirrus_bo *bo);
 245 int cirrus_bo_pin(struct cirrus_bo *bo, u32 pl_flag, u64 *gpu_addr);
 246 #endif                          /* __CIRRUS_DRV_H__ */