drivers/gpu/drm/ast/ast_drv.h

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  13  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  14  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  15  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  16  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  17  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  18  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  19  *
  20  * The above copyright notice and this permission notice (including the
  21  * next paragraph) shall be included in all copies or substantial portions
  22  * of the Software.
  23  *
  24  */
  25 /*
  26  * Authors: Dave Airlie <airlied@redhat.com>
  27  */
  28 #ifndef __AST_DRV_H__
  29 #define __AST_DRV_H__
  30
  31 #include <drm/drm_fb_helper.h>
  32
  33 #include <drm/ttm/ttm_bo_api.h>
  34 #include <drm/ttm/ttm_bo_driver.h>
  35 #include <drm/ttm/ttm_placement.h>
  36 #include <drm/ttm/ttm_memory.h>
  37 #include <drm/ttm/ttm_module.h>
  38
  39 #include <linux/i2c.h>
  40 #include <linux/i2c-algo-bit.h>
  41
  42 #define DRIVER_AUTHOR           "Dave Airlie"
  43
  44 #define DRIVER_NAME             "ast"
  45 #define DRIVER_DESC             "AST"
  46 #define DRIVER_DATE             "20120228"
  47
  48 #define DRIVER_MAJOR            0
  49 #define DRIVER_MINOR            1
  50 #define DRIVER_PATCHLEVEL       0
  51
  52 #define PCI_CHIP_AST2000 0x2000
  53 #define PCI_CHIP_AST2100 0x2010
  54 #define PCI_CHIP_AST1180 0x1180
  55
  56
  57 enum ast_chip {
  58         AST2000,
  59         AST2100,
  60         AST1100,
  61         AST2200,
  62         AST2150,
  63         AST2300,
  64         AST1180,
  65 };
  66
  67 #define AST_DRAM_512Mx16 0
  68 #define AST_DRAM_1Gx16   1
  69 #define AST_DRAM_512Mx32 2
  70 #define AST_DRAM_1Gx32   3
  71 #define AST_DRAM_2Gx16   6
  72 #define AST_DRAM_4Gx16   7
  73
  74 struct ast_fbdev;
  75
  76 struct ast_private {
  77         struct drm_device *dev;
  78
  79         void __iomem *regs;
  80         void __iomem *ioregs;
  81
  82         enum ast_chip chip;
  83         bool vga2_clone;
  84         uint32_t dram_bus_width;
  85         uint32_t dram_type;
  86         uint32_t mclk;
  87         uint32_t vram_size;
  88
  89         struct ast_fbdev *fbdev;
  90
  91         int fb_mtrr;
  92
  93         struct {
  94                 struct drm_global_reference mem_global_ref;
  95                 struct ttm_bo_global_ref bo_global_ref;
  96                 struct ttm_bo_device bdev;
  97                 atomic_t validate_sequence;
  98         } ttm;
  99
 100         struct drm_gem_object *cursor_cache;
 101         uint64_t cursor_cache_gpu_addr;
 102         struct ttm_bo_kmap_obj cache_kmap;
 103         int next_cursor;
 104 };
 105
 106 int ast_driver_load(struct drm_device *dev, unsigned long flags);
 107 int ast_driver_unload(struct drm_device *dev);
 108
 109 struct ast_gem_object;
 110
 111 #define AST_IO_AR_PORT_WRITE            (0x40)
 112 #define AST_IO_MISC_PORT_WRITE          (0x42)
 113 #define AST_IO_SEQ_PORT                 (0x44)
 114 #define AST_DAC_INDEX_READ              (0x3c7)
 115 #define AST_IO_DAC_INDEX_WRITE          (0x48)
 116 #define AST_IO_DAC_DATA                 (0x49)
 117 #define AST_IO_GR_PORT                  (0x4E)
 118 #define AST_IO_CRTC_PORT                (0x54)
 119 #define AST_IO_INPUT_STATUS1_READ       (0x5A)
 120 #define AST_IO_MISC_PORT_READ           (0x4C)
 121
 122 #define __ast_read(x) \
 123 static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \
 124 u##x val = 0;\
 125 val = ioread##x(ast->regs + reg); \
 126 return val;\
 127 }
 128
 129 __ast_read(8);
 130 __ast_read(16);
 131 __ast_read(32)
 132
 133 #define __ast_io_read(x) \
 134 static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \
 135 u##x val = 0;\
 136 val = ioread##x(ast->ioregs + reg); \
 137 return val;\
 138 }
 139
 140 __ast_io_read(8);
 141 __ast_io_read(16);
 142 __ast_io_read(32);
 143
 144 #define __ast_write(x) \
 145 static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\
 146         iowrite##x(val, ast->regs + reg);\
 147         }
 148
 149 __ast_write(8);
 150 __ast_write(16);
 151 __ast_write(32);
 152
 153 #define __ast_io_write(x) \
 154 static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\
 155         iowrite##x(val, ast->ioregs + reg);\
 156         }
 157
 158 __ast_io_write(8);
 159 __ast_io_write(16);
 160 #undef __ast_io_write
 161
 162 static inline void ast_set_index_reg(struct ast_private *ast,
 163                                      uint32_t base, uint8_t index,
 164                                      uint8_t val)
 165 {
 166         ast_io_write16(ast, base, ((u16)val << 8) | index);
 167 }
 168
 169 void ast_set_index_reg_mask(struct ast_private *ast,
 170                             uint32_t base, uint8_t index,
 171                             uint8_t mask, uint8_t val);
 172 uint8_t ast_get_index_reg(struct ast_private *ast,
 173                           uint32_t base, uint8_t index);
 174 uint8_t ast_get_index_reg_mask(struct ast_private *ast,
 175                                uint32_t base, uint8_t index, uint8_t mask);
 176
 177 static inline void ast_open_key(struct ast_private *ast)
 178 {
 179         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xA1, 0xFF, 0x04);
 180 }
 181
 182 #define AST_VIDMEM_SIZE_8M    0x00800000
 183 #define AST_VIDMEM_SIZE_16M   0x01000000
 184 #define AST_VIDMEM_SIZE_32M   0x02000000
 185 #define AST_VIDMEM_SIZE_64M   0x04000000
 186 #define AST_VIDMEM_SIZE_128M  0x08000000
 187
 188 #define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M
 189
 190 #define AST_MAX_HWC_WIDTH 64
 191 #define AST_MAX_HWC_HEIGHT 64
 192
 193 #define AST_HWC_SIZE                (AST_MAX_HWC_WIDTH*AST_MAX_HWC_HEIGHT*2)
 194 #define AST_HWC_SIGNATURE_SIZE      32
 195
 196 #define AST_DEFAULT_HWC_NUM 2
 197 /* define for signature structure */
 198 #define AST_HWC_SIGNATURE_CHECKSUM  0x00
 199 #define AST_HWC_SIGNATURE_SizeX     0x04
 200 #define AST_HWC_SIGNATURE_SizeY     0x08
 201 #define AST_HWC_SIGNATURE_X         0x0C
 202 #define AST_HWC_SIGNATURE_Y         0x10
 203 #define AST_HWC_SIGNATURE_HOTSPOTX  0x14
 204 #define AST_HWC_SIGNATURE_HOTSPOTY  0x18
 205
 206
 207 struct ast_i2c_chan {
 208         struct i2c_adapter adapter;
 209         struct drm_device *dev;
 210         struct i2c_algo_bit_data bit;
 211 };
 212
 213 struct ast_connector {
 214         struct drm_connector base;
 215         struct ast_i2c_chan *i2c;
 216 };
 217
 218 struct ast_crtc {
 219         struct drm_crtc base;
 220         u8 lut_r[256], lut_g[256], lut_b[256];
 221         struct drm_gem_object *cursor_bo;
 222         uint64_t cursor_addr;
 223         int cursor_width, cursor_height;
 224         u8 offset_x, offset_y;
 225 };
 226
 227 struct ast_encoder {
 228         struct drm_encoder base;
 229 };
 230
 231 struct ast_framebuffer {
 232         struct drm_framebuffer base;
 233         struct drm_gem_object *obj;
 234 };
 235
 236 struct ast_fbdev {
 237         struct drm_fb_helper helper;
 238         struct ast_framebuffer afb;
 239         struct list_head fbdev_list;
 240         void *sysram;
 241         int size;
 242         struct ttm_bo_kmap_obj mapping;
 243 };
 244
 245 #define to_ast_crtc(x) container_of(x, struct ast_crtc, base)
 246 #define to_ast_connector(x) container_of(x, struct ast_connector, base)
 247 #define to_ast_encoder(x) container_of(x, struct ast_encoder, base)
 248 #define to_ast_framebuffer(x) container_of(x, struct ast_framebuffer, base)
 249
 250 struct ast_vbios_stdtable {
 251         u8 misc;
 252         u8 seq[4];
 253         u8 crtc[25];
 254         u8 ar[20];
 255         u8 gr[9];
 256 };
 257
 258 struct ast_vbios_enhtable {
 259         u32 ht;
 260         u32 hde;
 261         u32 hfp;
 262         u32 hsync;
 263         u32 vt;
 264         u32 vde;
 265         u32 vfp;
 266         u32 vsync;
 267         u32 dclk_index;
 268         u32 flags;
 269         u32 refresh_rate;
 270         u32 refresh_rate_index;
 271         u32 mode_id;
 272 };
 273
 274 struct ast_vbios_dclk_info {
 275         u8 param1;
 276         u8 param2;
 277         u8 param3;
 278 };
 279
 280 struct ast_vbios_mode_info {
 281         struct ast_vbios_stdtable *std_table;
 282         struct ast_vbios_enhtable *enh_table;
 283 };
 284
 285 extern int ast_mode_init(struct drm_device *dev);
 286 extern void ast_mode_fini(struct drm_device *dev);
 287
 288 int ast_framebuffer_init(struct drm_device *dev,
 289                          struct ast_framebuffer *ast_fb,
 290                          struct drm_mode_fb_cmd2 *mode_cmd,
 291                          struct drm_gem_object *obj);
 292
 293 int ast_fbdev_init(struct drm_device *dev);
 294 void ast_fbdev_fini(struct drm_device *dev);
 295 void ast_fbdev_set_suspend(struct drm_device *dev, int state);
 296
 297 struct ast_bo {
 298         struct ttm_buffer_object bo;
 299         struct ttm_placement placement;
 300         struct ttm_bo_kmap_obj kmap;
 301         struct drm_gem_object gem;
 302         u32 placements[3];
 303         int pin_count;
 304 };
 305 #define gem_to_ast_bo(gobj) container_of((gobj), struct ast_bo, gem)
 306
 307 static inline struct ast_bo *
 308 ast_bo(struct ttm_buffer_object *bo)
 309 {
 310         return container_of(bo, struct ast_bo, bo);
 311 }
 312
 313
 314 #define to_ast_obj(x) container_of(x, struct ast_gem_object, base)
 315
 316 #define AST_MM_ALIGN_SHIFT 4
 317 #define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1)
 318
 319 extern int ast_dumb_create(struct drm_file *file,
 320                            struct drm_device *dev,
 321                            struct drm_mode_create_dumb *args);
 322 extern int ast_dumb_destroy(struct drm_file *file,
 323                             struct drm_device *dev,
 324                             uint32_t handle);
 325
 326 extern int ast_gem_init_object(struct drm_gem_object *obj);
 327 extern void ast_gem_free_object(struct drm_gem_object *obj);
 328 extern int ast_dumb_mmap_offset(struct drm_file *file,
 329                                 struct drm_device *dev,
 330                                 uint32_t handle,
 331                                 uint64_t *offset);
 332
 333 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
 334
 335 int ast_mm_init(struct ast_private *ast);
 336 void ast_mm_fini(struct ast_private *ast);
 337
 338 int ast_bo_create(struct drm_device *dev, int size, int align,
 339                   uint32_t flags, struct ast_bo **pastbo);
 340
 341 int ast_gem_create(struct drm_device *dev,
 342                    u32 size, bool iskernel,
 343                    struct drm_gem_object **obj);
 344
 345 int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr);
 346 int ast_bo_unpin(struct ast_bo *bo);
 347
 348 int ast_bo_reserve(struct ast_bo *bo, bool no_wait);
 349 void ast_bo_unreserve(struct ast_bo *bo);
 350 void ast_ttm_placement(struct ast_bo *bo, int domain);
 351 int ast_bo_push_sysram(struct ast_bo *bo);
 352 int ast_mmap(struct file *filp, struct vm_area_struct *vma);
 353
 354 /* ast post */
 355 void ast_post_gpu(struct drm_device *dev);
 356 #endif