Merge tag 'asm-generic' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / edac / edac_mc_sysfs.c
1 /*
2 * edac_mc kernel module
3 * (C) 2005-2007 Linux Networx (http://lnxi.com)
4 *
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
7 *
8 * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
9 *
10 * (c) 2012 - Mauro Carvalho Chehab <mchehab@redhat.com>
11 * The entire API were re-written, and ported to use struct device
12 *
13 */
14
15 #include <linux/ctype.h>
16 #include <linux/slab.h>
17 #include <linux/edac.h>
18 #include <linux/bug.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/uaccess.h>
21
22 #include "edac_core.h"
23 #include "edac_module.h"
24
25 /* MC EDAC Controls, setable by module parameter, and sysfs */
26 static int edac_mc_log_ue = 1;
27 static int edac_mc_log_ce = 1;
28 static int edac_mc_panic_on_ue;
29 static int edac_mc_poll_msec = 1000;
30
31 /* Getter functions for above */
32 int edac_mc_get_log_ue(void)
33 {
34 return edac_mc_log_ue;
35 }
36
37 int edac_mc_get_log_ce(void)
38 {
39 return edac_mc_log_ce;
40 }
41
42 int edac_mc_get_panic_on_ue(void)
43 {
44 return edac_mc_panic_on_ue;
45 }
46
47 /* this is temporary */
48 int edac_mc_get_poll_msec(void)
49 {
50 return edac_mc_poll_msec;
51 }
52
53 static int edac_set_poll_msec(const char *val, struct kernel_param *kp)
54 {
55 long l;
56 int ret;
57
58 if (!val)
59 return -EINVAL;
60
61 ret = strict_strtol(val, 0, &l);
62 if (ret == -EINVAL || ((int)l != l))
63 return -EINVAL;
64 *((int *)kp->arg) = l;
65
66 /* notify edac_mc engine to reset the poll period */
67 edac_mc_reset_delay_period(l);
68
69 return 0;
70 }
71
72 /* Parameter declarations for above */
73 module_param(edac_mc_panic_on_ue, int, 0644);
74 MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
75 module_param(edac_mc_log_ue, int, 0644);
76 MODULE_PARM_DESC(edac_mc_log_ue,
77 "Log uncorrectable error to console: 0=off 1=on");
78 module_param(edac_mc_log_ce, int, 0644);
79 MODULE_PARM_DESC(edac_mc_log_ce,
80 "Log correctable error to console: 0=off 1=on");
81 module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int,
82 &edac_mc_poll_msec, 0644);
83 MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
84
85 static struct device *mci_pdev;
86
87 /*
88 * various constants for Memory Controllers
89 */
90 static const char *mem_types[] = {
91 [MEM_EMPTY] = "Empty",
92 [MEM_RESERVED] = "Reserved",
93 [MEM_UNKNOWN] = "Unknown",
94 [MEM_FPM] = "FPM",
95 [MEM_EDO] = "EDO",
96 [MEM_BEDO] = "BEDO",
97 [MEM_SDR] = "Unbuffered-SDR",
98 [MEM_RDR] = "Registered-SDR",
99 [MEM_DDR] = "Unbuffered-DDR",
100 [MEM_RDDR] = "Registered-DDR",
101 [MEM_RMBS] = "RMBS",
102 [MEM_DDR2] = "Unbuffered-DDR2",
103 [MEM_FB_DDR2] = "FullyBuffered-DDR2",
104 [MEM_RDDR2] = "Registered-DDR2",
105 [MEM_XDR] = "XDR",
106 [MEM_DDR3] = "Unbuffered-DDR3",
107 [MEM_RDDR3] = "Registered-DDR3"
108 };
109
110 static const char *dev_types[] = {
111 [DEV_UNKNOWN] = "Unknown",
112 [DEV_X1] = "x1",
113 [DEV_X2] = "x2",
114 [DEV_X4] = "x4",
115 [DEV_X8] = "x8",
116 [DEV_X16] = "x16",
117 [DEV_X32] = "x32",
118 [DEV_X64] = "x64"
119 };
120
121 static const char *edac_caps[] = {
122 [EDAC_UNKNOWN] = "Unknown",
123 [EDAC_NONE] = "None",
124 [EDAC_RESERVED] = "Reserved",
125 [EDAC_PARITY] = "PARITY",
126 [EDAC_EC] = "EC",
127 [EDAC_SECDED] = "SECDED",
128 [EDAC_S2ECD2ED] = "S2ECD2ED",
129 [EDAC_S4ECD4ED] = "S4ECD4ED",
130 [EDAC_S8ECD8ED] = "S8ECD8ED",
131 [EDAC_S16ECD16ED] = "S16ECD16ED"
132 };
133
134 #ifdef CONFIG_EDAC_LEGACY_SYSFS
135 /*
136 * EDAC sysfs CSROW data structures and methods
137 */
138
139 #define to_csrow(k) container_of(k, struct csrow_info, dev)
140
141 /*
142 * We need it to avoid namespace conflicts between the legacy API
143 * and the per-dimm/per-rank one
144 */
145 #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
146 struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
147
148 struct dev_ch_attribute {
149 struct device_attribute attr;
150 int channel;
151 };
152
153 #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
154 struct dev_ch_attribute dev_attr_legacy_##_name = \
155 { __ATTR(_name, _mode, _show, _store), (_var) }
156
157 #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
158
159 /* Set of more default csrow<id> attribute show/store functions */
160 static ssize_t csrow_ue_count_show(struct device *dev,
161 struct device_attribute *mattr, char *data)
162 {
163 struct csrow_info *csrow = to_csrow(dev);
164
165 return sprintf(data, "%u\n", csrow->ue_count);
166 }
167
168 static ssize_t csrow_ce_count_show(struct device *dev,
169 struct device_attribute *mattr, char *data)
170 {
171 struct csrow_info *csrow = to_csrow(dev);
172
173 return sprintf(data, "%u\n", csrow->ce_count);
174 }
175
176 static ssize_t csrow_size_show(struct device *dev,
177 struct device_attribute *mattr, char *data)
178 {
179 struct csrow_info *csrow = to_csrow(dev);
180 int i;
181 u32 nr_pages = 0;
182
183 if (csrow->mci->csbased)
184 return sprintf(data, "%u\n", PAGES_TO_MiB(csrow->nr_pages));
185
186 for (i = 0; i < csrow->nr_channels; i++)
187 nr_pages += csrow->channels[i]->dimm->nr_pages;
188 return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
189 }
190
191 static ssize_t csrow_mem_type_show(struct device *dev,
192 struct device_attribute *mattr, char *data)
193 {
194 struct csrow_info *csrow = to_csrow(dev);
195
196 return sprintf(data, "%s\n", mem_types[csrow->channels[0]->dimm->mtype]);
197 }
198
199 static ssize_t csrow_dev_type_show(struct device *dev,
200 struct device_attribute *mattr, char *data)
201 {
202 struct csrow_info *csrow = to_csrow(dev);
203
204 return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]);
205 }
206
207 static ssize_t csrow_edac_mode_show(struct device *dev,
208 struct device_attribute *mattr,
209 char *data)
210 {
211 struct csrow_info *csrow = to_csrow(dev);
212
213 return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]);
214 }
215
216 /* show/store functions for DIMM Label attributes */
217 static ssize_t channel_dimm_label_show(struct device *dev,
218 struct device_attribute *mattr,
219 char *data)
220 {
221 struct csrow_info *csrow = to_csrow(dev);
222 unsigned chan = to_channel(mattr);
223 struct rank_info *rank = csrow->channels[chan];
224
225 /* if field has not been initialized, there is nothing to send */
226 if (!rank->dimm->label[0])
227 return 0;
228
229 return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
230 rank->dimm->label);
231 }
232
233 static ssize_t channel_dimm_label_store(struct device *dev,
234 struct device_attribute *mattr,
235 const char *data, size_t count)
236 {
237 struct csrow_info *csrow = to_csrow(dev);
238 unsigned chan = to_channel(mattr);
239 struct rank_info *rank = csrow->channels[chan];
240
241 ssize_t max_size = 0;
242
243 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
244 strncpy(rank->dimm->label, data, max_size);
245 rank->dimm->label[max_size] = '\0';
246
247 return max_size;
248 }
249
250 /* show function for dynamic chX_ce_count attribute */
251 static ssize_t channel_ce_count_show(struct device *dev,
252 struct device_attribute *mattr, char *data)
253 {
254 struct csrow_info *csrow = to_csrow(dev);
255 unsigned chan = to_channel(mattr);
256 struct rank_info *rank = csrow->channels[chan];
257
258 return sprintf(data, "%u\n", rank->ce_count);
259 }
260
261 /* cwrow<id>/attribute files */
262 DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
263 DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
264 DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
265 DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
266 DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
267 DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
268
269 /* default attributes of the CSROW<id> object */
270 static struct attribute *csrow_attrs[] = {
271 &dev_attr_legacy_dev_type.attr,
272 &dev_attr_legacy_mem_type.attr,
273 &dev_attr_legacy_edac_mode.attr,
274 &dev_attr_legacy_size_mb.attr,
275 &dev_attr_legacy_ue_count.attr,
276 &dev_attr_legacy_ce_count.attr,
277 NULL,
278 };
279
280 static struct attribute_group csrow_attr_grp = {
281 .attrs = csrow_attrs,
282 };
283
284 static const struct attribute_group *csrow_attr_groups[] = {
285 &csrow_attr_grp,
286 NULL
287 };
288
289 static void csrow_attr_release(struct device *dev)
290 {
291 struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
292
293 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
294 kfree(csrow);
295 }
296
297 static struct device_type csrow_attr_type = {
298 .groups = csrow_attr_groups,
299 .release = csrow_attr_release,
300 };
301
302 /*
303 * possible dynamic channel DIMM Label attribute files
304 *
305 */
306
307 #define EDAC_NR_CHANNELS 6
308
309 DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
310 channel_dimm_label_show, channel_dimm_label_store, 0);
311 DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
312 channel_dimm_label_show, channel_dimm_label_store, 1);
313 DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
314 channel_dimm_label_show, channel_dimm_label_store, 2);
315 DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
316 channel_dimm_label_show, channel_dimm_label_store, 3);
317 DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
318 channel_dimm_label_show, channel_dimm_label_store, 4);
319 DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
320 channel_dimm_label_show, channel_dimm_label_store, 5);
321
322 /* Total possible dynamic DIMM Label attribute file table */
323 static struct device_attribute *dynamic_csrow_dimm_attr[] = {
324 &dev_attr_legacy_ch0_dimm_label.attr,
325 &dev_attr_legacy_ch1_dimm_label.attr,
326 &dev_attr_legacy_ch2_dimm_label.attr,
327 &dev_attr_legacy_ch3_dimm_label.attr,
328 &dev_attr_legacy_ch4_dimm_label.attr,
329 &dev_attr_legacy_ch5_dimm_label.attr
330 };
331
332 /* possible dynamic channel ce_count attribute files */
333 DEVICE_CHANNEL(ch0_ce_count, S_IRUGO | S_IWUSR,
334 channel_ce_count_show, NULL, 0);
335 DEVICE_CHANNEL(ch1_ce_count, S_IRUGO | S_IWUSR,
336 channel_ce_count_show, NULL, 1);
337 DEVICE_CHANNEL(ch2_ce_count, S_IRUGO | S_IWUSR,
338 channel_ce_count_show, NULL, 2);
339 DEVICE_CHANNEL(ch3_ce_count, S_IRUGO | S_IWUSR,
340 channel_ce_count_show, NULL, 3);
341 DEVICE_CHANNEL(ch4_ce_count, S_IRUGO | S_IWUSR,
342 channel_ce_count_show, NULL, 4);
343 DEVICE_CHANNEL(ch5_ce_count, S_IRUGO | S_IWUSR,
344 channel_ce_count_show, NULL, 5);
345
346 /* Total possible dynamic ce_count attribute file table */
347 static struct device_attribute *dynamic_csrow_ce_count_attr[] = {
348 &dev_attr_legacy_ch0_ce_count.attr,
349 &dev_attr_legacy_ch1_ce_count.attr,
350 &dev_attr_legacy_ch2_ce_count.attr,
351 &dev_attr_legacy_ch3_ce_count.attr,
352 &dev_attr_legacy_ch4_ce_count.attr,
353 &dev_attr_legacy_ch5_ce_count.attr
354 };
355
356 static inline int nr_pages_per_csrow(struct csrow_info *csrow)
357 {
358 int chan, nr_pages = 0;
359
360 for (chan = 0; chan < csrow->nr_channels; chan++)
361 nr_pages += csrow->channels[chan]->dimm->nr_pages;
362
363 return nr_pages;
364 }
365
366 /* Create a CSROW object under specifed edac_mc_device */
367 static int edac_create_csrow_object(struct mem_ctl_info *mci,
368 struct csrow_info *csrow, int index)
369 {
370 int err, chan;
371
372 if (csrow->nr_channels >= EDAC_NR_CHANNELS)
373 return -ENODEV;
374
375 csrow->dev.type = &csrow_attr_type;
376 csrow->dev.bus = &mci->bus;
377 device_initialize(&csrow->dev);
378 csrow->dev.parent = &mci->dev;
379 csrow->mci = mci;
380 dev_set_name(&csrow->dev, "csrow%d", index);
381 dev_set_drvdata(&csrow->dev, csrow);
382
383 edac_dbg(0, "creating (virtual) csrow node %s\n",
384 dev_name(&csrow->dev));
385
386 err = device_add(&csrow->dev);
387 if (err < 0)
388 return err;
389
390 for (chan = 0; chan < csrow->nr_channels; chan++) {
391 /* Only expose populated DIMMs */
392 if (!csrow->channels[chan]->dimm->nr_pages)
393 continue;
394 err = device_create_file(&csrow->dev,
395 dynamic_csrow_dimm_attr[chan]);
396 if (err < 0)
397 goto error;
398 err = device_create_file(&csrow->dev,
399 dynamic_csrow_ce_count_attr[chan]);
400 if (err < 0) {
401 device_remove_file(&csrow->dev,
402 dynamic_csrow_dimm_attr[chan]);
403 goto error;
404 }
405 }
406
407 return 0;
408
409 error:
410 for (--chan; chan >= 0; chan--) {
411 device_remove_file(&csrow->dev,
412 dynamic_csrow_dimm_attr[chan]);
413 device_remove_file(&csrow->dev,
414 dynamic_csrow_ce_count_attr[chan]);
415 }
416 put_device(&csrow->dev);
417
418 return err;
419 }
420
421 /* Create a CSROW object under specifed edac_mc_device */
422 static int edac_create_csrow_objects(struct mem_ctl_info *mci)
423 {
424 int err, i, chan;
425 struct csrow_info *csrow;
426
427 for (i = 0; i < mci->nr_csrows; i++) {
428 csrow = mci->csrows[i];
429 if (!nr_pages_per_csrow(csrow))
430 continue;
431 err = edac_create_csrow_object(mci, mci->csrows[i], i);
432 if (err < 0)
433 goto error;
434 }
435 return 0;
436
437 error:
438 for (--i; i >= 0; i--) {
439 csrow = mci->csrows[i];
440 if (!nr_pages_per_csrow(csrow))
441 continue;
442 for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
443 if (!csrow->channels[chan]->dimm->nr_pages)
444 continue;
445 device_remove_file(&csrow->dev,
446 dynamic_csrow_dimm_attr[chan]);
447 device_remove_file(&csrow->dev,
448 dynamic_csrow_ce_count_attr[chan]);
449 }
450 put_device(&mci->csrows[i]->dev);
451 }
452
453 return err;
454 }
455
456 static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
457 {
458 int i, chan;
459 struct csrow_info *csrow;
460
461 for (i = mci->nr_csrows - 1; i >= 0; i--) {
462 csrow = mci->csrows[i];
463 if (!nr_pages_per_csrow(csrow))
464 continue;
465 for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
466 if (!csrow->channels[chan]->dimm->nr_pages)
467 continue;
468 edac_dbg(1, "Removing csrow %d channel %d sysfs nodes\n",
469 i, chan);
470 device_remove_file(&csrow->dev,
471 dynamic_csrow_dimm_attr[chan]);
472 device_remove_file(&csrow->dev,
473 dynamic_csrow_ce_count_attr[chan]);
474 }
475 put_device(&mci->csrows[i]->dev);
476 device_del(&mci->csrows[i]->dev);
477 }
478 }
479 #endif
480
481 /*
482 * Per-dimm (or per-rank) devices
483 */
484
485 #define to_dimm(k) container_of(k, struct dimm_info, dev)
486
487 /* show/store functions for DIMM Label attributes */
488 static ssize_t dimmdev_location_show(struct device *dev,
489 struct device_attribute *mattr, char *data)
490 {
491 struct dimm_info *dimm = to_dimm(dev);
492
493 return edac_dimm_info_location(dimm, data, PAGE_SIZE);
494 }
495
496 static ssize_t dimmdev_label_show(struct device *dev,
497 struct device_attribute *mattr, char *data)
498 {
499 struct dimm_info *dimm = to_dimm(dev);
500
501 /* if field has not been initialized, there is nothing to send */
502 if (!dimm->label[0])
503 return 0;
504
505 return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label);
506 }
507
508 static ssize_t dimmdev_label_store(struct device *dev,
509 struct device_attribute *mattr,
510 const char *data,
511 size_t count)
512 {
513 struct dimm_info *dimm = to_dimm(dev);
514
515 ssize_t max_size = 0;
516
517 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
518 strncpy(dimm->label, data, max_size);
519 dimm->label[max_size] = '\0';
520
521 return max_size;
522 }
523
524 static ssize_t dimmdev_size_show(struct device *dev,
525 struct device_attribute *mattr, char *data)
526 {
527 struct dimm_info *dimm = to_dimm(dev);
528
529 return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
530 }
531
532 static ssize_t dimmdev_mem_type_show(struct device *dev,
533 struct device_attribute *mattr, char *data)
534 {
535 struct dimm_info *dimm = to_dimm(dev);
536
537 return sprintf(data, "%s\n", mem_types[dimm->mtype]);
538 }
539
540 static ssize_t dimmdev_dev_type_show(struct device *dev,
541 struct device_attribute *mattr, char *data)
542 {
543 struct dimm_info *dimm = to_dimm(dev);
544
545 return sprintf(data, "%s\n", dev_types[dimm->dtype]);
546 }
547
548 static ssize_t dimmdev_edac_mode_show(struct device *dev,
549 struct device_attribute *mattr,
550 char *data)
551 {
552 struct dimm_info *dimm = to_dimm(dev);
553
554 return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
555 }
556
557 /* dimm/rank attribute files */
558 static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
559 dimmdev_label_show, dimmdev_label_store);
560 static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
561 static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
562 static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
563 static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
564 static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
565
566 /* attributes of the dimm<id>/rank<id> object */
567 static struct attribute *dimm_attrs[] = {
568 &dev_attr_dimm_label.attr,
569 &dev_attr_dimm_location.attr,
570 &dev_attr_size.attr,
571 &dev_attr_dimm_mem_type.attr,
572 &dev_attr_dimm_dev_type.attr,
573 &dev_attr_dimm_edac_mode.attr,
574 NULL,
575 };
576
577 static struct attribute_group dimm_attr_grp = {
578 .attrs = dimm_attrs,
579 };
580
581 static const struct attribute_group *dimm_attr_groups[] = {
582 &dimm_attr_grp,
583 NULL
584 };
585
586 static void dimm_attr_release(struct device *dev)
587 {
588 struct dimm_info *dimm = container_of(dev, struct dimm_info, dev);
589
590 edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev));
591 kfree(dimm);
592 }
593
594 static struct device_type dimm_attr_type = {
595 .groups = dimm_attr_groups,
596 .release = dimm_attr_release,
597 };
598
599 /* Create a DIMM object under specifed memory controller device */
600 static int edac_create_dimm_object(struct mem_ctl_info *mci,
601 struct dimm_info *dimm,
602 int index)
603 {
604 int err;
605 dimm->mci = mci;
606
607 dimm->dev.type = &dimm_attr_type;
608 dimm->dev.bus = &mci->bus;
609 device_initialize(&dimm->dev);
610
611 dimm->dev.parent = &mci->dev;
612 if (mci->mem_is_per_rank)
613 dev_set_name(&dimm->dev, "rank%d", index);
614 else
615 dev_set_name(&dimm->dev, "dimm%d", index);
616 dev_set_drvdata(&dimm->dev, dimm);
617 pm_runtime_forbid(&mci->dev);
618
619 err = device_add(&dimm->dev);
620
621 edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm->dev));
622
623 return err;
624 }
625
626 /*
627 * Memory controller device
628 */
629
630 #define to_mci(k) container_of(k, struct mem_ctl_info, dev)
631
632 static ssize_t mci_reset_counters_store(struct device *dev,
633 struct device_attribute *mattr,
634 const char *data, size_t count)
635 {
636 struct mem_ctl_info *mci = to_mci(dev);
637 int cnt, row, chan, i;
638 mci->ue_mc = 0;
639 mci->ce_mc = 0;
640 mci->ue_noinfo_count = 0;
641 mci->ce_noinfo_count = 0;
642
643 for (row = 0; row < mci->nr_csrows; row++) {
644 struct csrow_info *ri = mci->csrows[row];
645
646 ri->ue_count = 0;
647 ri->ce_count = 0;
648
649 for (chan = 0; chan < ri->nr_channels; chan++)
650 ri->channels[chan]->ce_count = 0;
651 }
652
653 cnt = 1;
654 for (i = 0; i < mci->n_layers; i++) {
655 cnt *= mci->layers[i].size;
656 memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
657 memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
658 }
659
660 mci->start_time = jiffies;
661 return count;
662 }
663
664 /* Memory scrubbing interface:
665 *
666 * A MC driver can limit the scrubbing bandwidth based on the CPU type.
667 * Therefore, ->set_sdram_scrub_rate should be made to return the actual
668 * bandwidth that is accepted or 0 when scrubbing is to be disabled.
669 *
670 * Negative value still means that an error has occurred while setting
671 * the scrub rate.
672 */
673 static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
674 struct device_attribute *mattr,
675 const char *data, size_t count)
676 {
677 struct mem_ctl_info *mci = to_mci(dev);
678 unsigned long bandwidth = 0;
679 int new_bw = 0;
680
681 if (!mci->set_sdram_scrub_rate)
682 return -ENODEV;
683
684 if (strict_strtoul(data, 10, &bandwidth) < 0)
685 return -EINVAL;
686
687 new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
688 if (new_bw < 0) {
689 edac_printk(KERN_WARNING, EDAC_MC,
690 "Error setting scrub rate to: %lu\n", bandwidth);
691 return -EINVAL;
692 }
693
694 return count;
695 }
696
697 /*
698 * ->get_sdram_scrub_rate() return value semantics same as above.
699 */
700 static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
701 struct device_attribute *mattr,
702 char *data)
703 {
704 struct mem_ctl_info *mci = to_mci(dev);
705 int bandwidth = 0;
706
707 if (!mci->get_sdram_scrub_rate)
708 return -ENODEV;
709
710 bandwidth = mci->get_sdram_scrub_rate(mci);
711 if (bandwidth < 0) {
712 edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
713 return bandwidth;
714 }
715
716 return sprintf(data, "%d\n", bandwidth);
717 }
718
719 /* default attribute files for the MCI object */
720 static ssize_t mci_ue_count_show(struct device *dev,
721 struct device_attribute *mattr,
722 char *data)
723 {
724 struct mem_ctl_info *mci = to_mci(dev);
725
726 return sprintf(data, "%d\n", mci->ue_mc);
727 }
728
729 static ssize_t mci_ce_count_show(struct device *dev,
730 struct device_attribute *mattr,
731 char *data)
732 {
733 struct mem_ctl_info *mci = to_mci(dev);
734
735 return sprintf(data, "%d\n", mci->ce_mc);
736 }
737
738 static ssize_t mci_ce_noinfo_show(struct device *dev,
739 struct device_attribute *mattr,
740 char *data)
741 {
742 struct mem_ctl_info *mci = to_mci(dev);
743
744 return sprintf(data, "%d\n", mci->ce_noinfo_count);
745 }
746
747 static ssize_t mci_ue_noinfo_show(struct device *dev,
748 struct device_attribute *mattr,
749 char *data)
750 {
751 struct mem_ctl_info *mci = to_mci(dev);
752
753 return sprintf(data, "%d\n", mci->ue_noinfo_count);
754 }
755
756 static ssize_t mci_seconds_show(struct device *dev,
757 struct device_attribute *mattr,
758 char *data)
759 {
760 struct mem_ctl_info *mci = to_mci(dev);
761
762 return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
763 }
764
765 static ssize_t mci_ctl_name_show(struct device *dev,
766 struct device_attribute *mattr,
767 char *data)
768 {
769 struct mem_ctl_info *mci = to_mci(dev);
770
771 return sprintf(data, "%s\n", mci->ctl_name);
772 }
773
774 static ssize_t mci_size_mb_show(struct device *dev,
775 struct device_attribute *mattr,
776 char *data)
777 {
778 struct mem_ctl_info *mci = to_mci(dev);
779 int total_pages = 0, csrow_idx, j;
780
781 for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
782 struct csrow_info *csrow = mci->csrows[csrow_idx];
783
784 if (csrow->mci->csbased) {
785 total_pages += csrow->nr_pages;
786 } else {
787 for (j = 0; j < csrow->nr_channels; j++) {
788 struct dimm_info *dimm = csrow->channels[j]->dimm;
789
790 total_pages += dimm->nr_pages;
791 }
792 }
793 }
794
795 return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
796 }
797
798 static ssize_t mci_max_location_show(struct device *dev,
799 struct device_attribute *mattr,
800 char *data)
801 {
802 struct mem_ctl_info *mci = to_mci(dev);
803 int i;
804 char *p = data;
805
806 for (i = 0; i < mci->n_layers; i++) {
807 p += sprintf(p, "%s %d ",
808 edac_layer_name[mci->layers[i].type],
809 mci->layers[i].size - 1);
810 }
811
812 return p - data;
813 }
814
815 #ifdef CONFIG_EDAC_DEBUG
816 static ssize_t edac_fake_inject_write(struct file *file,
817 const char __user *data,
818 size_t count, loff_t *ppos)
819 {
820 struct device *dev = file->private_data;
821 struct mem_ctl_info *mci = to_mci(dev);
822 static enum hw_event_mc_err_type type;
823 u16 errcount = mci->fake_inject_count;
824
825 if (!errcount)
826 errcount = 1;
827
828 type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED
829 : HW_EVENT_ERR_CORRECTED;
830
831 printk(KERN_DEBUG
832 "Generating %d %s fake error%s to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n",
833 errcount,
834 (type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE",
835 errcount > 1 ? "s" : "",
836 mci->fake_inject_layer[0],
837 mci->fake_inject_layer[1],
838 mci->fake_inject_layer[2]
839 );
840 edac_mc_handle_error(type, mci, errcount, 0, 0, 0,
841 mci->fake_inject_layer[0],
842 mci->fake_inject_layer[1],
843 mci->fake_inject_layer[2],
844 "FAKE ERROR", "for EDAC testing only");
845
846 return count;
847 }
848
849 static const struct file_operations debug_fake_inject_fops = {
850 .open = simple_open,
851 .write = edac_fake_inject_write,
852 .llseek = generic_file_llseek,
853 };
854 #endif
855
856 /* default Control file */
857 DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
858
859 /* default Attribute files */
860 DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
861 DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
862 DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
863 DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
864 DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
865 DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
866 DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
867 DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
868
869 /* memory scrubber attribute file */
870 DEVICE_ATTR(sdram_scrub_rate, S_IRUGO | S_IWUSR, mci_sdram_scrub_rate_show,
871 mci_sdram_scrub_rate_store);
872
873 static struct attribute *mci_attrs[] = {
874 &dev_attr_reset_counters.attr,
875 &dev_attr_mc_name.attr,
876 &dev_attr_size_mb.attr,
877 &dev_attr_seconds_since_reset.attr,
878 &dev_attr_ue_noinfo_count.attr,
879 &dev_attr_ce_noinfo_count.attr,
880 &dev_attr_ue_count.attr,
881 &dev_attr_ce_count.attr,
882 &dev_attr_sdram_scrub_rate.attr,
883 &dev_attr_max_location.attr,
884 NULL
885 };
886
887 static struct attribute_group mci_attr_grp = {
888 .attrs = mci_attrs,
889 };
890
891 static const struct attribute_group *mci_attr_groups[] = {
892 &mci_attr_grp,
893 NULL
894 };
895
896 static void mci_attr_release(struct device *dev)
897 {
898 struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
899
900 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
901 kfree(mci);
902 }
903
904 static struct device_type mci_attr_type = {
905 .groups = mci_attr_groups,
906 .release = mci_attr_release,
907 };
908
909 #ifdef CONFIG_EDAC_DEBUG
910 static struct dentry *edac_debugfs;
911
912 int __init edac_debugfs_init(void)
913 {
914 edac_debugfs = debugfs_create_dir("edac", NULL);
915 if (IS_ERR(edac_debugfs)) {
916 edac_debugfs = NULL;
917 return -ENOMEM;
918 }
919 return 0;
920 }
921
922 void __exit edac_debugfs_exit(void)
923 {
924 debugfs_remove(edac_debugfs);
925 }
926
927 int edac_create_debug_nodes(struct mem_ctl_info *mci)
928 {
929 struct dentry *d, *parent;
930 char name[80];
931 int i;
932
933 if (!edac_debugfs)
934 return -ENODEV;
935
936 d = debugfs_create_dir(mci->dev.kobj.name, edac_debugfs);
937 if (!d)
938 return -ENOMEM;
939 parent = d;
940
941 for (i = 0; i < mci->n_layers; i++) {
942 sprintf(name, "fake_inject_%s",
943 edac_layer_name[mci->layers[i].type]);
944 d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent,
945 &mci->fake_inject_layer[i]);
946 if (!d)
947 goto nomem;
948 }
949
950 d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent,
951 &mci->fake_inject_ue);
952 if (!d)
953 goto nomem;
954
955 d = debugfs_create_u16("fake_inject_count", S_IRUGO | S_IWUSR, parent,
956 &mci->fake_inject_count);
957 if (!d)
958 goto nomem;
959
960 d = debugfs_create_file("fake_inject", S_IWUSR, parent,
961 &mci->dev,
962 &debug_fake_inject_fops);
963 if (!d)
964 goto nomem;
965
966 mci->debugfs = parent;
967 return 0;
968 nomem:
969 debugfs_remove(mci->debugfs);
970 return -ENOMEM;
971 }
972 #endif
973
974 /*
975 * Create a new Memory Controller kobject instance,
976 * mc<id> under the 'mc' directory
977 *
978 * Return:
979 * 0 Success
980 * !0 Failure
981 */
982 int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
983 {
984 int i, err;
985
986 /*
987 * The memory controller needs its own bus, in order to avoid
988 * namespace conflicts at /sys/bus/edac.
989 */
990 mci->bus.name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
991 if (!mci->bus.name)
992 return -ENOMEM;
993 edac_dbg(0, "creating bus %s\n", mci->bus.name);
994 err = bus_register(&mci->bus);
995 if (err < 0)
996 return err;
997
998 /* get the /sys/devices/system/edac subsys reference */
999 mci->dev.type = &mci_attr_type;
1000 device_initialize(&mci->dev);
1001
1002 mci->dev.parent = mci_pdev;
1003 mci->dev.bus = &mci->bus;
1004 dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
1005 dev_set_drvdata(&mci->dev, mci);
1006 pm_runtime_forbid(&mci->dev);
1007
1008 edac_dbg(0, "creating device %s\n", dev_name(&mci->dev));
1009 err = device_add(&mci->dev);
1010 if (err < 0) {
1011 bus_unregister(&mci->bus);
1012 kfree(mci->bus.name);
1013 return err;
1014 }
1015
1016 /*
1017 * Create the dimm/rank devices
1018 */
1019 for (i = 0; i < mci->tot_dimms; i++) {
1020 struct dimm_info *dimm = mci->dimms[i];
1021 /* Only expose populated DIMMs */
1022 if (dimm->nr_pages == 0)
1023 continue;
1024 #ifdef CONFIG_EDAC_DEBUG
1025 edac_dbg(1, "creating dimm%d, located at ", i);
1026 if (edac_debug_level >= 1) {
1027 int lay;
1028 for (lay = 0; lay < mci->n_layers; lay++)
1029 printk(KERN_CONT "%s %d ",
1030 edac_layer_name[mci->layers[lay].type],
1031 dimm->location[lay]);
1032 printk(KERN_CONT "\n");
1033 }
1034 #endif
1035 err = edac_create_dimm_object(mci, dimm, i);
1036 if (err) {
1037 edac_dbg(1, "failure: create dimm %d obj\n", i);
1038 goto fail;
1039 }
1040 }
1041
1042 #ifdef CONFIG_EDAC_LEGACY_SYSFS
1043 err = edac_create_csrow_objects(mci);
1044 if (err < 0)
1045 goto fail;
1046 #endif
1047
1048 #ifdef CONFIG_EDAC_DEBUG
1049 edac_create_debug_nodes(mci);
1050 #endif
1051 return 0;
1052
1053 fail:
1054 for (i--; i >= 0; i--) {
1055 struct dimm_info *dimm = mci->dimms[i];
1056 if (dimm->nr_pages == 0)
1057 continue;
1058 put_device(&dimm->dev);
1059 device_del(&dimm->dev);
1060 }
1061 put_device(&mci->dev);
1062 device_del(&mci->dev);
1063 bus_unregister(&mci->bus);
1064 kfree(mci->bus.name);
1065 return err;
1066 }
1067
1068 /*
1069 * remove a Memory Controller instance
1070 */
1071 void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
1072 {
1073 int i;
1074
1075 edac_dbg(0, "\n");
1076
1077 #ifdef CONFIG_EDAC_DEBUG
1078 debugfs_remove(mci->debugfs);
1079 #endif
1080 #ifdef CONFIG_EDAC_LEGACY_SYSFS
1081 edac_delete_csrow_objects(mci);
1082 #endif
1083
1084 for (i = 0; i < mci->tot_dimms; i++) {
1085 struct dimm_info *dimm = mci->dimms[i];
1086 if (dimm->nr_pages == 0)
1087 continue;
1088 edac_dbg(0, "removing device %s\n", dev_name(&dimm->dev));
1089 put_device(&dimm->dev);
1090 device_del(&dimm->dev);
1091 }
1092 }
1093
1094 void edac_unregister_sysfs(struct mem_ctl_info *mci)
1095 {
1096 edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev));
1097 put_device(&mci->dev);
1098 device_del(&mci->dev);
1099 bus_unregister(&mci->bus);
1100 kfree(mci->bus.name);
1101 }
1102
1103 static void mc_attr_release(struct device *dev)
1104 {
1105 /*
1106 * There's no container structure here, as this is just the mci
1107 * parent device, used to create the /sys/devices/mc sysfs node.
1108 * So, there are no attributes on it.
1109 */
1110 edac_dbg(1, "Releasing device %s\n", dev_name(dev));
1111 kfree(dev);
1112 }
1113
1114 static struct device_type mc_attr_type = {
1115 .release = mc_attr_release,
1116 };
1117 /*
1118 * Init/exit code for the module. Basically, creates/removes /sys/class/rc
1119 */
1120 int __init edac_mc_sysfs_init(void)
1121 {
1122 struct bus_type *edac_subsys;
1123 int err;
1124
1125 /* get the /sys/devices/system/edac subsys reference */
1126 edac_subsys = edac_get_sysfs_subsys();
1127 if (edac_subsys == NULL) {
1128 edac_dbg(1, "no edac_subsys\n");
1129 err = -EINVAL;
1130 goto out;
1131 }
1132
1133 mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL);
1134 if (!mci_pdev) {
1135 err = -ENOMEM;
1136 goto out_put_sysfs;
1137 }
1138
1139 mci_pdev->bus = edac_subsys;
1140 mci_pdev->type = &mc_attr_type;
1141 device_initialize(mci_pdev);
1142 dev_set_name(mci_pdev, "mc");
1143
1144 err = device_add(mci_pdev);
1145 if (err < 0)
1146 goto out_dev_free;
1147
1148 edac_dbg(0, "device %s created\n", dev_name(mci_pdev));
1149
1150 return 0;
1151
1152 out_dev_free:
1153 kfree(mci_pdev);
1154 out_put_sysfs:
1155 edac_put_sysfs_subsys();
1156 out:
1157 return err;
1158 }
1159
1160 void __exit edac_mc_sysfs_exit(void)
1161 {
1162 put_device(mci_pdev);
1163 device_del(mci_pdev);
1164 edac_put_sysfs_subsys();
1165 kfree(mci_pdev);
1166 }