drivers/dma/Kconfig

   1 #
   2 # DMA engine configuration
   3 #
   4
   5 menuconfig DMADEVICES
   6         bool "DMA Engine support"
   7         depends on HAS_DMA
   8         help
   9           DMA engines can do asynchronous data transfers without
  10           involving the host CPU.  Currently, this framework can be
  11           used to offload memory copies in the network stack and
  12           RAID operations in the MD driver.  This menu only presents
  13           DMA Device drivers supported by the configured arch, it may
  14           be empty in some cases.
  15
  16 if DMADEVICES
  17
  18 comment "DMA Devices"
  19
  20 config ASYNC_TX_DISABLE_CHANNEL_SWITCH
  21         bool
  22
  23 config INTEL_IOATDMA
  24         tristate "Intel I/OAT DMA support"
  25         depends on PCI && X86
  26         select DMA_ENGINE
  27         select DCA
  28         select ASYNC_TX_DISABLE_CHANNEL_SWITCH
  29         help
  30           Enable support for the Intel(R) I/OAT DMA engine present
  31           in recent Intel Xeon chipsets.
  32
  33           Say Y here if you have such a chipset.
  34
  35           If unsure, say N.
  36
  37 config INTEL_IOP_ADMA
  38         tristate "Intel IOP ADMA support"
  39         depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
  40         select DMA_ENGINE
  41         help
  42           Enable support for the Intel(R) IOP Series RAID engines.
  43
  44 config DW_DMAC
  45         tristate "Synopsys DesignWare AHB DMA support"
  46         depends on AVR32
  47         select DMA_ENGINE
  48         default y if CPU_AT32AP7000
  49         help
  50           Support the Synopsys DesignWare AHB DMA controller.  This
  51           can be integrated in chips such as the Atmel AT32ap7000.
  52
  53 config AT_HDMAC
  54         tristate "Atmel AHB DMA support"
  55         depends on ARCH_AT91SAM9RL
  56         select DMA_ENGINE
  57         help
  58           Support the Atmel AHB DMA controller.  This can be integrated in
  59           chips such as the Atmel AT91SAM9RL.
  60
  61 config FSL_DMA
  62         tristate "Freescale Elo and Elo Plus DMA support"
  63         depends on FSL_SOC
  64         select DMA_ENGINE
  65         ---help---
  66           Enable support for the Freescale Elo and Elo Plus DMA controllers.
  67           The Elo is the DMA controller on some 82xx and 83xx parts, and the
  68           Elo Plus is the DMA controller on 85xx and 86xx parts.
  69
  70 config MV_XOR
  71         bool "Marvell XOR engine support"
  72         depends on PLAT_ORION
  73         select DMA_ENGINE
  74         ---help---
  75           Enable support for the Marvell XOR engine.
  76
  77 config MX3_IPU
  78         bool "MX3x Image Processing Unit support"
  79         depends on ARCH_MX3
  80         select DMA_ENGINE
  81         default y
  82         help
  83           If you plan to use the Image Processing unit in the i.MX3x, say
  84           Y here. If unsure, select Y.
  85
  86 config MX3_IPU_IRQS
  87         int "Number of dynamically mapped interrupts for IPU"
  88         depends on MX3_IPU
  89         range 2 137
  90         default 4
  91         help
  92           Out of 137 interrupt sources on i.MX31 IPU only very few are used.
  93           To avoid bloating the irq_desc[] array we allocate a sufficient
  94           number of IRQ slots and map them dynamically to specific sources.
  95
  96 config TXX9_DMAC
  97         tristate "Toshiba TXx9 SoC DMA support"
  98         depends on MACH_TX49XX || MACH_TX39XX
  99         select DMA_ENGINE
 100         help
 101           Support the TXx9 SoC internal DMA controller.  This can be
 102           integrated in chips such as the Toshiba TX4927/38/39.
 103
 104 config SH_DMAE
 105         tristate "Renesas SuperH DMAC support"
 106         depends on SUPERH && SH_DMA
 107         depends on !SH_DMA_API
 108         select DMA_ENGINE
 109         help
 110           Enable support for the Renesas SuperH DMA controllers.
 111
 112 config DMA_ENGINE
 113         bool
 114
 115 comment "DMA Clients"
 116         depends on DMA_ENGINE
 117
 118 config NET_DMA
 119         bool "Network: TCP receive copy offload"
 120         depends on DMA_ENGINE && NET
 121         default (INTEL_IOATDMA || FSL_DMA)
 122         help
 123           This enables the use of DMA engines in the network stack to
 124           offload receive copy-to-user operations, freeing CPU cycles.
 125
 126           Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
 127           say N.
 128
 129 config ASYNC_TX_DMA
 130         bool "Async_tx: Offload support for the async_tx api"
 131         depends on DMA_ENGINE
 132         help
 133           This allows the async_tx api to take advantage of offload engines for
 134           memcpy, memset, xor, and raid6 p+q operations.  If your platform has
 135           a dma engine that can perform raid operations and you have enabled
 136           MD_RAID456 say Y.
 137
 138           If unsure, say N.
 139
 140 config DMATEST
 141         tristate "DMA Test client"
 142         depends on DMA_ENGINE
 143         help
 144           Simple DMA test client. Say N unless you're debugging a
 145           DMA Device driver.
 146
 147 endif