drivers/crypto/caam/ctrl.c

   1 /*
   2  * CAAM control-plane driver backend
   3  * Controller-level driver, kernel property detection, initialization
   4  *
   5  * Copyright 2008-2012 Freescale Semiconductor, Inc.
   6  */
   7
   8 #include "compat.h"
   9 #include "regs.h"
  10 #include "intern.h"
  11 #include "jr.h"
  12 #include "desc_constr.h"
  13 #include "error.h"
  14 #include "ctrl.h"
  15
  16 static int caam_remove(struct platform_device *pdev)
  17 {
  18         struct device *ctrldev;
  19         struct caam_drv_private *ctrlpriv;
  20         struct caam_drv_private_jr *jrpriv;
  21         struct caam_full __iomem *topregs;
  22         int ring, ret = 0;
  23
  24         ctrldev = &pdev->dev;
  25         ctrlpriv = dev_get_drvdata(ctrldev);
  26         topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
  27
  28         /* shut down JobRs */
  29         for (ring = 0; ring < ctrlpriv->total_jobrs; ring++) {
  30                 ret |= caam_jr_shutdown(ctrlpriv->jrdev[ring]);
  31                 jrpriv = dev_get_drvdata(ctrlpriv->jrdev[ring]);
  32                 irq_dispose_mapping(jrpriv->irq);
  33         }
  34
  35         /* Shut down debug views */
  36 #ifdef CONFIG_DEBUG_FS
  37         debugfs_remove_recursive(ctrlpriv->dfs_root);
  38 #endif
  39
  40         /* Unmap controller region */
  41         iounmap(&topregs->ctrl);
  42
  43         kfree(ctrlpriv->jrdev);
  44         kfree(ctrlpriv);
  45
  46         return ret;
  47 }
  48
  49 /*
  50  * Descriptor to instantiate RNG State Handle 0 in normal mode and
  51  * load the JDKEK, TDKEK and TDSK registers
  52  */
  53 static void build_instantiation_desc(u32 *desc)
  54 {
  55         u32 *jump_cmd;
  56
  57         init_job_desc(desc, 0);
  58
  59         /* INIT RNG in non-test mode */
  60         append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  61                          OP_ALG_AS_INIT);
  62
  63         /* wait for done */
  64         jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1);
  65         set_jump_tgt_here(desc, jump_cmd);
  66
  67         /*
  68          * load 1 to clear written reg:
  69          * resets the done interrrupt and returns the RNG to idle.
  70          */
  71         append_load_imm_u32(desc, 1, LDST_SRCDST_WORD_CLRW);
  72
  73         /* generate secure keys (non-test) */
  74         append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  75                          OP_ALG_RNG4_SK);
  76 }
  77
  78 struct instantiate_result {
  79         struct completion completion;
  80         int err;
  81 };
  82
  83 static void rng4_init_done(struct device *dev, u32 *desc, u32 err,
  84                            void *context)
  85 {
  86         struct instantiate_result *instantiation = context;
  87
  88         if (err) {
  89                 char tmp[CAAM_ERROR_STR_MAX];
  90
  91                 dev_err(dev, "%08x: %s\n", err, caam_jr_strstatus(tmp, err));
  92         }
  93
  94         instantiation->err = err;
  95         complete(&instantiation->completion);
  96 }
  97
  98 static int instantiate_rng(struct device *jrdev)
  99 {
 100         struct instantiate_result instantiation;
 101
 102         dma_addr_t desc_dma;
 103         u32 *desc;
 104         int ret;
 105
 106         desc = kmalloc(CAAM_CMD_SZ * 6, GFP_KERNEL | GFP_DMA);
 107         if (!desc) {
 108                 dev_err(jrdev, "cannot allocate RNG init descriptor memory\n");
 109                 return -ENOMEM;
 110         }
 111
 112         build_instantiation_desc(desc);
 113         desc_dma = dma_map_single(jrdev, desc, desc_bytes(desc), DMA_TO_DEVICE);
 114         init_completion(&instantiation.completion);
 115         ret = caam_jr_enqueue(jrdev, desc, rng4_init_done, &instantiation);
 116         if (!ret) {
 117                 wait_for_completion_interruptible(&instantiation.completion);
 118                 ret = instantiation.err;
 119                 if (ret)
 120                         dev_err(jrdev, "unable to instantiate RNG\n");
 121         }
 122
 123         dma_unmap_single(jrdev, desc_dma, desc_bytes(desc), DMA_TO_DEVICE);
 124
 125         kfree(desc);
 126
 127         return ret;
 128 }
 129
 130 /*
 131  * By default, the TRNG runs for 200 clocks per sample;
 132  * 1600 clocks per sample generates better entropy.
 133  */
 134 static void kick_trng(struct platform_device *pdev)
 135 {
 136         struct device *ctrldev = &pdev->dev;
 137         struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
 138         struct caam_full __iomem *topregs;
 139         struct rng4tst __iomem *r4tst;
 140         u32 val;
 141
 142         topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
 143         r4tst = &topregs->ctrl.r4tst[0];
 144
 145         /* put RNG4 into program mode */
 146         setbits32(&r4tst->rtmctl, RTMCTL_PRGM);
 147         /* 1600 clocks per sample */
 148         val = rd_reg32(&r4tst->rtsdctl);
 149         val = (val & ~RTSDCTL_ENT_DLY_MASK) | (1600 << RTSDCTL_ENT_DLY_SHIFT);
 150         wr_reg32(&r4tst->rtsdctl, val);
 151         /* min. freq. count */
 152         wr_reg32(&r4tst->rtfrqmin, 400);
 153         /* max. freq. count */
 154         wr_reg32(&r4tst->rtfrqmax, 6400);
 155         /* put RNG4 into run mode */
 156         clrbits32(&r4tst->rtmctl, RTMCTL_PRGM);
 157 }
 158
 159 /**
 160  * caam_get_era() - Return the ERA of the SEC on SoC, based
 161  * on the SEC_VID register.
 162  * Returns the ERA number (1..4) or -ENOTSUPP if the ERA is unknown.
 163  * @caam_id - the value of the SEC_VID register
 164  **/
 165 int caam_get_era(u64 caam_id)
 166 {
 167         struct sec_vid *sec_vid = (struct sec_vid *)&caam_id;
 168         static const struct {
 169                 u16 ip_id;
 170                 u8 maj_rev;
 171                 u8 era;
 172         } caam_eras[] = {
 173                 {0x0A10, 1, 1},
 174                 {0x0A10, 2, 2},
 175                 {0x0A12, 1, 3},
 176                 {0x0A14, 1, 3},
 177                 {0x0A14, 2, 4},
 178                 {0x0A16, 1, 4},
 179                 {0x0A11, 1, 4}
 180         };
 181         int i;
 182
 183         for (i = 0; i < ARRAY_SIZE(caam_eras); i++)
 184                 if (caam_eras[i].ip_id == sec_vid->ip_id &&
 185                         caam_eras[i].maj_rev == sec_vid->maj_rev)
 186                                 return caam_eras[i].era;
 187
 188         return -ENOTSUPP;
 189 }
 190 EXPORT_SYMBOL(caam_get_era);
 191
 192 /* Probe routine for CAAM top (controller) level */
 193 static int caam_probe(struct platform_device *pdev)
 194 {
 195         int ret, ring, rspec;
 196         u64 caam_id;
 197         struct device *dev;
 198         struct device_node *nprop, *np;
 199         struct caam_ctrl __iomem *ctrl;
 200         struct caam_full __iomem *topregs;
 201         struct caam_drv_private *ctrlpriv;
 202 #ifdef CONFIG_DEBUG_FS
 203         struct caam_perfmon *perfmon;
 204 #endif
 205
 206         ctrlpriv = kzalloc(sizeof(struct caam_drv_private), GFP_KERNEL);
 207         if (!ctrlpriv)
 208                 return -ENOMEM;
 209
 210         dev = &pdev->dev;
 211         dev_set_drvdata(dev, ctrlpriv);
 212         ctrlpriv->pdev = pdev;
 213         nprop = pdev->dev.of_node;
 214
 215         /* Get configuration properties from device tree */
 216         /* First, get register page */
 217         ctrl = of_iomap(nprop, 0);
 218         if (ctrl == NULL) {
 219                 dev_err(dev, "caam: of_iomap() failed\n");
 220                 return -ENOMEM;
 221         }
 222         ctrlpriv->ctrl = (struct caam_ctrl __force *)ctrl;
 223
 224         /* topregs used to derive pointers to CAAM sub-blocks only */
 225         topregs = (struct caam_full __iomem *)ctrl;
 226
 227         /* Get the IRQ of the controller (for security violations only) */
 228         ctrlpriv->secvio_irq = of_irq_to_resource(nprop, 0, NULL);
 229
 230         /*
 231          * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
 232          * long pointers in master configuration register
 233          */
 234         setbits32(&topregs->ctrl.mcr, MCFGR_WDENABLE |
 235                   (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0));
 236
 237         if (sizeof(dma_addr_t) == sizeof(u64))
 238                 if (of_device_is_compatible(nprop, "fsl,sec-v5.0"))
 239                         dma_set_mask(dev, DMA_BIT_MASK(40));
 240                 else
 241                         dma_set_mask(dev, DMA_BIT_MASK(36));
 242         else
 243                 dma_set_mask(dev, DMA_BIT_MASK(32));
 244
 245         /*
 246          * Detect and enable JobRs
 247          * First, find out how many ring spec'ed, allocate references
 248          * for all, then go probe each one.
 249          */
 250         rspec = 0;
 251         for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring")
 252                 rspec++;
 253         if (!rspec) {
 254                 /* for backward compatible with device trees */
 255                 for_each_compatible_node(np, NULL, "fsl,sec4.0-job-ring")
 256                         rspec++;
 257         }
 258
 259         ctrlpriv->jrdev = kzalloc(sizeof(struct device *) * rspec, GFP_KERNEL);
 260         if (ctrlpriv->jrdev == NULL) {
 261                 iounmap(&topregs->ctrl);
 262                 return -ENOMEM;
 263         }
 264
 265         ring = 0;
 266         ctrlpriv->total_jobrs = 0;
 267         for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring") {
 268                 caam_jr_probe(pdev, np, ring);
 269                 ctrlpriv->total_jobrs++;
 270                 ring++;
 271         }
 272         if (!ring) {
 273                 for_each_compatible_node(np, NULL, "fsl,sec4.0-job-ring") {
 274                         caam_jr_probe(pdev, np, ring);
 275                         ctrlpriv->total_jobrs++;
 276                         ring++;
 277                 }
 278         }
 279
 280         /* Check to see if QI present. If so, enable */
 281         ctrlpriv->qi_present = !!(rd_reg64(&topregs->ctrl.perfmon.comp_parms) &
 282                                   CTPR_QI_MASK);
 283         if (ctrlpriv->qi_present) {
 284                 ctrlpriv->qi = (struct caam_queue_if __force *)&topregs->qi;
 285                 /* This is all that's required to physically enable QI */
 286                 wr_reg32(&topregs->qi.qi_control_lo, QICTL_DQEN);
 287         }
 288
 289         /* If no QI and no rings specified, quit and go home */
 290         if ((!ctrlpriv->qi_present) && (!ctrlpriv->total_jobrs)) {
 291                 dev_err(dev, "no queues configured, terminating\n");
 292                 caam_remove(pdev);
 293                 return -ENOMEM;
 294         }
 295
 296         /*
 297          * RNG4 based SECs (v5+) need special initialization prior
 298          * to executing any descriptors
 299          */
 300         if (of_device_is_compatible(nprop, "fsl,sec-v5.0")) {
 301                 kick_trng(pdev);
 302                 ret = instantiate_rng(ctrlpriv->jrdev[0]);
 303                 if (ret) {
 304                         caam_remove(pdev);
 305                         return ret;
 306                 }
 307         }
 308
 309         /* NOTE: RTIC detection ought to go here, around Si time */
 310
 311         /* Initialize queue allocator lock */
 312         spin_lock_init(&ctrlpriv->jr_alloc_lock);
 313
 314         caam_id = rd_reg64(&topregs->ctrl.perfmon.caam_id);
 315
 316         /* Report "alive" for developer to see */
 317         dev_info(dev, "device ID = 0x%016llx (Era %d)\n", caam_id,
 318                  caam_get_era(caam_id));
 319         dev_info(dev, "job rings = %d, qi = %d\n",
 320                  ctrlpriv->total_jobrs, ctrlpriv->qi_present);
 321
 322 #ifdef CONFIG_DEBUG_FS
 323         /*
 324          * FIXME: needs better naming distinction, as some amalgamation of
 325          * "caam" and nprop->full_name. The OF name isn't distinctive,
 326          * but does separate instances
 327          */
 328         perfmon = (struct caam_perfmon __force *)&ctrl->perfmon;
 329
 330         ctrlpriv->dfs_root = debugfs_create_dir("caam", NULL);
 331         ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root);
 332
 333         /* Controller-level - performance monitor counters */
 334         ctrlpriv->ctl_rq_dequeued =
 335                 debugfs_create_u64("rq_dequeued",
 336                                    S_IRUSR | S_IRGRP | S_IROTH,
 337                                    ctrlpriv->ctl, &perfmon->req_dequeued);
 338         ctrlpriv->ctl_ob_enc_req =
 339                 debugfs_create_u64("ob_rq_encrypted",
 340                                    S_IRUSR | S_IRGRP | S_IROTH,
 341                                    ctrlpriv->ctl, &perfmon->ob_enc_req);
 342         ctrlpriv->ctl_ib_dec_req =
 343                 debugfs_create_u64("ib_rq_decrypted",
 344                                    S_IRUSR | S_IRGRP | S_IROTH,
 345                                    ctrlpriv->ctl, &perfmon->ib_dec_req);
 346         ctrlpriv->ctl_ob_enc_bytes =
 347                 debugfs_create_u64("ob_bytes_encrypted",
 348                                    S_IRUSR | S_IRGRP | S_IROTH,
 349                                    ctrlpriv->ctl, &perfmon->ob_enc_bytes);
 350         ctrlpriv->ctl_ob_prot_bytes =
 351                 debugfs_create_u64("ob_bytes_protected",
 352                                    S_IRUSR | S_IRGRP | S_IROTH,
 353                                    ctrlpriv->ctl, &perfmon->ob_prot_bytes);
 354         ctrlpriv->ctl_ib_dec_bytes =
 355                 debugfs_create_u64("ib_bytes_decrypted",
 356                                    S_IRUSR | S_IRGRP | S_IROTH,
 357                                    ctrlpriv->ctl, &perfmon->ib_dec_bytes);
 358         ctrlpriv->ctl_ib_valid_bytes =
 359                 debugfs_create_u64("ib_bytes_validated",
 360                                    S_IRUSR | S_IRGRP | S_IROTH,
 361                                    ctrlpriv->ctl, &perfmon->ib_valid_bytes);
 362
 363         /* Controller level - global status values */
 364         ctrlpriv->ctl_faultaddr =
 365                 debugfs_create_u64("fault_addr",
 366                                    S_IRUSR | S_IRGRP | S_IROTH,
 367                                    ctrlpriv->ctl, &perfmon->faultaddr);
 368         ctrlpriv->ctl_faultdetail =
 369                 debugfs_create_u32("fault_detail",
 370                                    S_IRUSR | S_IRGRP | S_IROTH,
 371                                    ctrlpriv->ctl, &perfmon->faultdetail);
 372         ctrlpriv->ctl_faultstatus =
 373                 debugfs_create_u32("fault_status",
 374                                    S_IRUSR | S_IRGRP | S_IROTH,
 375                                    ctrlpriv->ctl, &perfmon->status);
 376
 377         /* Internal covering keys (useful in non-secure mode only) */
 378         ctrlpriv->ctl_kek_wrap.data = &ctrlpriv->ctrl->kek[0];
 379         ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 380         ctrlpriv->ctl_kek = debugfs_create_blob("kek",
 381                                                 S_IRUSR |
 382                                                 S_IRGRP | S_IROTH,
 383                                                 ctrlpriv->ctl,
 384                                                 &ctrlpriv->ctl_kek_wrap);
 385
 386         ctrlpriv->ctl_tkek_wrap.data = &ctrlpriv->ctrl->tkek[0];
 387         ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 388         ctrlpriv->ctl_tkek = debugfs_create_blob("tkek",
 389                                                  S_IRUSR |
 390                                                  S_IRGRP | S_IROTH,
 391                                                  ctrlpriv->ctl,
 392                                                  &ctrlpriv->ctl_tkek_wrap);
 393
 394         ctrlpriv->ctl_tdsk_wrap.data = &ctrlpriv->ctrl->tdsk[0];
 395         ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 396         ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk",
 397                                                  S_IRUSR |
 398                                                  S_IRGRP | S_IROTH,
 399                                                  ctrlpriv->ctl,
 400                                                  &ctrlpriv->ctl_tdsk_wrap);
 401 #endif
 402         return 0;
 403 }
 404
 405 static struct of_device_id caam_match[] = {
 406         {
 407                 .compatible = "fsl,sec-v4.0",
 408         },
 409         {
 410                 .compatible = "fsl,sec4.0",
 411         },
 412         {},
 413 };
 414 MODULE_DEVICE_TABLE(of, caam_match);
 415
 416 static struct platform_driver caam_driver = {
 417         .driver = {
 418                 .name = "caam",
 419                 .owner = THIS_MODULE,
 420                 .of_match_table = caam_match,
 421         },
 422         .probe       = caam_probe,
 423         .remove      = caam_remove,
 424 };
 425
 426 module_platform_driver(caam_driver);
 427
 428 MODULE_LICENSE("GPL");
 429 MODULE_DESCRIPTION("FSL CAAM request backend");
 430 MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");